[all-commits] [llvm/llvm-project] 0b1652: [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (#20...

[Kane Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
      https://github.com/llvm/llvm-project/commit/0b1652db8a18b336f39855fcf9b5137fa0b4b3c9
  Author: Kane Wang <wangqiang1 at kylinos.cn>
  Date:   2026-07-17 (Fri, 17 Jul 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    A llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv32.mir
    A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-xchg-rv64.mir

  Log Message:
  -----------
  [RISCV][GlobalISel] Legalize G_ATOMICRMW_XCHG (#209983)

This commit makes `xchg` consistent with `add/and/or/xor` across all
type/extension combinations. Updates `legalizer-info-validation.mir` for
the newly defined rules and adds `atomicrmw-xchg.ll` and
`legalize-atomicrmw-xchg-rv{32,64}.mir` tests.



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