[all-commits] [llvm/llvm-project] 2a006d: [AArch64][GlobalISel] Add sign bits for G_VASHR (#...

Joel Walker via All-commits all-commits at lists.llvm.org
Fri Jul 17 03:49:21 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a006dff821342c1726fd3137f804186851a26bb
      https://github.com/llvm/llvm-project/commit/2a006dff821342c1726fd3137f804186851a26bb
  Author: Joel Walker <theagingboy05 at gmail.com>
  Date:   2026-07-17 (Fri, 17 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vashr.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Add sign bits for G_VASHR (#210269)

Ports the `AArch64ISD::VASHR` case from
`ComputeNumSignBitsForTargetNode` to the GlobalISel hook: an arithmetic
right shift by K adds K copies of the sign bit, so the result has
`min(SignBits(Src) + K, ScalarSizeInBits)` sign bits. `G_VASHR`'s shift
amount is always an immediate in `[1, ElementBits]`.

Follow-up to #198314, which added the `G_FCM*` cases.

Assisted by Claude (Anthropic).



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