[all-commits] [llvm/llvm-project] b9869c: [AArch64][SVE] Support lowering masked loads/store...

[Shanzhi Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b9869c8c920a7dfa983e215bc30729b13d8b353b
      https://github.com/llvm/llvm-project/commit/b9869c8c920a7dfa983e215bc30729b13d8b353b
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-17 (Fri, 17 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-stores.ll

  Log Message:
  -----------
  [AArch64][SVE] Support lowering masked loads/stores of <4 x bf16> and <8 x bf16> (#208744)

Add support for lowering masked loads/stores of <4 x bf16> and <8 x
bf16> when target features contain "+sve" and "+bf16".

Fixes: #201149



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