[all-commits] [llvm/llvm-project] 4536b1: [GlobalISel] Fix crash in isConstantOrConstantSpla...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Thu Jul 16 09:51:47 PDT 2026
Branch: refs/heads/users/MaskRay/spr/cycleinfo-move-scalar-cycle-accessors-to-genericcycleinfo-nfc
Home: https://github.com/llvm/llvm-project
Commit: 4536b1c44ebb54780f04e1ec992547d70a2d9700
https://github.com/llvm/llvm-project/commit/4536b1c44ebb54780f04e1ec992547d70a2d9700
Author: Mateusz Chudyk <mateusz.chudyk at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-fdiv-inlineasm-operand.mir
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
Log Message:
-----------
[GlobalISel] Fix crash in isConstantOrConstantSplatVectorFP for non-register operands
isConstantOrConstantSplatVectorFP unconditionally accessed operand 0 as
a register, which causes a crash when the instruction is INLINEASM
(whose operand 0 is the asm string, not a register def).
This can happen when matchRepeatedFPDivisor walks the use-def chain of a
G_FDIV operand and reaches an INLINEASM instruction that defines the
dividend.
Commit: 09f8509bec1fec4636c8e592dcd55a80f39f2667
https://github.com/llvm/llvm-project/commit/09f8509bec1fec4636c8e592dcd55a80f39f2667
Author: ilia-cher <30845429+ilia-cher at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
Log Message:
-----------
[AMDGPU] Fix speculative register pressure queries (#208574)
There are two issues with the way we currently speculate register
pressure:
1. GCNDownwardRPTracker::advance(with UseInternalIterator=false), which
is called by the scheduler in schedNode, resets LastTrackedMI, so the
tracker (bumpDownwardPressure) doesn't know where the last scheduled
instruction is and falls back to the beginning of the basic block. As a
result, when we estimate RP impact for a given MI, we tend to find uses
that are often already scheduled and should be skipped.
2. When looking for the remaining uses between LastTrackedMI and the
candidate MI we should skip already scheduled instruction.
Commit: ca6fe413daa538440cf47d4734051e3be7293600
https://github.com/llvm/llvm-project/commit/ca6fe413daa538440cf47d4734051e3be7293600
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[LangRef] State that the memory model is an axiomatic one (#208710)
Currently, one could read large parts of the memory model without learning for
sure whether it is meant as an operational model that describes how individual
operations change some notion of state or if it is an axiomatic model (like the
C++ memory model) that lists constraints that a candidate execution must
satisfy to be allowed.
While the description of what a read returns sounds somewhat operational,
aspects like the definition of fence instructions, the monotonic modification
order, and the total order of sequentially consistent operations place it in
the realm of axiomatic models.
This is an attempt to make the nature of the model more explicit (and maybe a
place to discuss the nature of the model), as suggested by RalfJung in the
reviews for #204329.
Commit: aa199a3bc9d4ecdf87026d4db8dbb52bffa40605
https://github.com/llvm/llvm-project/commit/aa199a3bc9d4ecdf87026d4db8dbb52bffa40605
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
Log Message:
-----------
AMDGPU: Fix creating temporary TTI in AMDGPUCodeGenPrepare (#209976)
This should always be queried from the pass manager
Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
Commit: 2bc2229f40028c66f6fe5956659570b55133035c
https://github.com/llvm/llvm-project/commit/2bc2229f40028c66f6fe5956659570b55133035c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
M llvm/test/DebugInfo/AMDGPU/cfi.ll
M llvm/test/DebugInfo/AMDGPU/code-pointer-size.ll
M llvm/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
M llvm/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
M llvm/test/DebugInfo/AMDGPU/heterogeneous-dwarf-cfi-directives.s
M llvm/test/DebugInfo/AMDGPU/pointer-address-space.ll
M llvm/test/DebugInfo/AMDGPU/print-reg-name.s
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/AMDGPU/wqm-wwm-debug-loc.ll
Log Message:
-----------
AMDGPU: Migrate DebugInfo tests to new subarch triples (58) (#209818)
Mostly mechanical by script
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
https://github.com/llvm/llvm-project/commit/0f6a60fd6a2f54e5af99bb5c7c85e794b2ff3841
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
M llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
M llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
Log Message:
-----------
AMDGPU: Migrate MIR parser tests to new subarch triples (59) (#209819)
Mechanical migration by script.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 041149970208fd709524e3b19c6aff4b41b58813
https://github.com/llvm/llvm-project/commit/041149970208fd709524e3b19c6aff4b41b58813
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-duplication.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect-callee-md.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-load-balancing.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-no-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/preserve-globals.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll
Log Message:
-----------
AMDGPU: Use amdgpu triples in llvm-split tests (60) (#209866)
Update by regex
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: dab4c918c2453cc5650563571c35c6949bf5c611
https://github.com/llvm/llvm-project/commit/dab4c918c2453cc5650563571c35c6949bf5c611
Author: roman1741941 <rdivacky at vlakno.cz>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterBankEmitter.cpp
Log Message:
-----------
[TableGen] Optimize register bank and info emission. (#208297)
Don't go via a BitVector just to a read a single value out of it.
Commit: 88acd428fd72f44312408c3fb6165992fb3b043a
https://github.com/llvm/llvm-project/commit/88acd428fd72f44312408c3fb6165992fb3b043a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Analysis/KernelInfo/enable-kernel-info/amdgpu.test
M llvm/test/Analysis/KernelInfo/flat-addrspace/amdgpu.test
M llvm/test/Analysis/KernelInfo/launch-bounds/amdgpu.ll
M llvm/test/Analysis/KernelInfo/openmp/README.md
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
Log Message:
-----------
AMDGPU: Migrate KernelInfo tests to new subarch triples (61) (#209867)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 36d2fb92bcac253e2e1bb20b7ea7b22033027691
https://github.com/llvm/llvm-project/commit/36d2fb92bcac253e2e1bb20b7ea7b22033027691
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
Log Message:
-----------
[AMDGPU] Reject sub-dword format buffer loads and stores (#209703)
An i8 `buffer.{load,store}.format` has no corresponding hardware
instruction so diagnose it in SelectionDAG and fail legalization in
GlobalISel instead of emitting invalid format opcodes
Commit: 65d3601c44632bd0b5b90d559953cbd47442c0e2
https://github.com/llvm/llvm-project/commit/65d3601c44632bd0b5b90d559953cbd47442c0e2
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
A llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
Log Message:
-----------
[RISC-V] Make Short Forward Branches capable of matching Zibi instructions (#208637)
Add new SFB patterns to make `PseudoCCMOVGPR` capable of matching `beqi`
and `bnei`, so that it can be folded into `PseudoCC*` of `SFBALU_rr`
variants
Commit: 8a77787a526e31f48dd4d6f4cd9d68b982d8b772
https://github.com/llvm/llvm-project/commit/8a77787a526e31f48dd4d6f4cd9d68b982d8b772
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
Log Message:
-----------
Revert "[X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt`" (#210006)
Reverts #208392 - while we investigate a miscompile due to CF/ZF mismatch
Commit: bf397be011e2cecce6ca0c1d0342eef217a06059
https://github.com/llvm/llvm-project/commit/bf397be011e2cecce6ca0c1d0342eef217a06059
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/IR/Instructions.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Assembler/atomic.ll
A llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
A llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
M llvm/unittests/IR/VerifierTest.cpp
Log Message:
-----------
[IR] Add elementwise modifier to atomic loads (#204556)
Add an `elementwise` modifier to atomic loads to represent
per-element atomic semantics for fixed-vector loads.
Without the modifier, a vector atomic load remains a whole-value
atomic operation. With `elementwise`, the load behaves as if it were
expanded into one scalar atomic load per fixed-vector element, without
providing atomicity for the vector value as a whole.
Discussion:
https://discourse.llvm.org/t/rfc-add-elementwise-modifier-to-atomic-loads-and-stores/91100
Commit: 9c6a9f5fa37ffc21d4561301772bc600bd344d4c
https://github.com/llvm/llvm-project/commit/9c6a9f5fa37ffc21d4561301772bc600bd344d4c
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
Log Message:
-----------
[CodeGen][ARM64EC] Copy first four arguments to FP registers in vararg exit thunks (#209581)
ARM64EC vararg functions receive all types of the first four arguments
in x0-x3. Because x86_64 expects floating-point arguments in FP
registers, always copy x0-x3 to d0-d3 in the exit thunks, matching
MSVC's behavior.
Commit: c012610ab9924f465baea5e62397056ea9594567
https://github.com/llvm/llvm-project/commit/c012610ab9924f465baea5e62397056ea9594567
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M cross-project-tests/CMakeLists.txt
A cross-project-tests/dtlto/remote-options.test
Log Message:
-----------
[DTLTO] Add remote compiler option forwarding coverage (#208589)
Add a cross-project DTLTO test that checks the existing LTO
configuration state serialized into the remote Clang command line. The
test uses the validate.py distributor to inspect the generated DTLTO
JSON.
Cover all the existing forwarded options.
Add paired negative checks for optional flags so the test also verifies
they are not emitted when the corresponding configuration state is not
set.
Commit: d94df008e71552fe5e07fa789bfa7f097cfdb0d9
https://github.com/llvm/llvm-project/commit/d94df008e71552fe5e07fa789bfa7f097cfdb0d9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-reduce/mir/drop-ir-references.mir
M llvm/test/tools/llvm-reduce/mir/generic-vreg.mir
M llvm/test/tools/llvm-reduce/mir/infer-triple.mir
M llvm/test/tools/llvm-reduce/mir/input-file-does-not-exist.mir
M llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
M llvm/test/tools/llvm-reduce/mir/multiple-functions.mir
M llvm/test/tools/llvm-reduce/mir/preserve-block-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-frame-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
M llvm/test/tools/llvm-reduce/mir/preserve-max-call-frame-size.mir
M llvm/test/tools/llvm-reduce/mir/preserve-mem-operands.mir
M llvm/test/tools/llvm-reduce/mir/preserve-reg-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-flags.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses-generic.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses.mir
M llvm/test/tools/llvm-reduce/mir/remove-frame-destroy.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def0.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def1.mir
M llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir
M llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir
Log Message:
-----------
AMDGPU: Convert llvm-reduce tests to new subarch triples (62) (#209868)
Pick arbitrary real subarch
Commit: fb2feebb64a6975f993791d86f00b085d6cd3bca
https://github.com/llvm/llvm-project/commit/fb2feebb64a6975f993791d86f00b085d6cd3bca
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
Log Message:
-----------
[RISCV][VPlan] Cost vp.merges that are likely to be folded away as free (#209387)
A vp.merge is lowered to a PseudoVMERGE_VVM on RISC-V, and
RISCVVectorPeehole usually folds away PseudoVMERGE_VVMs when its true
operand is a binary op.
This accounts for this in the cost model and plumbs it through the loop
vectorizer. The following reduction loop was previously considered
unprofitable to vectorize, but after this change is now vectorized, and
folds away all its vp.merges:
void three_gathers(const long *a, const long *c, const long *d,
const long *b, long n, long *out) {
long s1 = 0, s2 = 0, s3 = 0;
for (long i = 0; i < n; i++) {
long j = b[i];
s1 += a[j];
s2 += c[j];
s3 += d[j];
}
out[0] = s1;
out[1] = s2;
out[2] = s3;
}
Some vp.merges have only phis for their operands which can't be folded
away, coming from FindLastIV reductions. So this extends and reuses the
VectorInstrContext hint to limit the discount when one of the operands
is a binary op.
Also see the commit message in 9e77f59005917e32f09136fa43018f471267f5bd
which mentions the vp.merge cost should be updated.
Commit: c1ba7d0aaad6baa898c6735f71a99791839a1847
https://github.com/llvm/llvm-project/commit/c1ba7d0aaad6baa898c6735f71a99791839a1847
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
Log Message:
-----------
Reapply "[clang][bytecode] Diagnose pointer subtractions of elements โฆ (#209998)
โฆof different arrays" (#209969)
This reverts commit 745b946cbbf30708044b4a2c4a7726d0c02ca0de.
Use only one `fold()` for the virtual base offset assertions.
The pointer subtraction _is_ invalid, but the current interpreter
doesn't diagnose it since the `LValueDesignator`s are invalid.
Commit: 2b8125c686614ffc5c5f8cde007cd6ddcf6649d8
https://github.com/llvm/llvm-project/commit/2b8125c686614ffc5c5f8cde007cd6ddcf6649d8
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/OpenCLExtensions.def
A clang/test/Misc/amdgcn.unsupported_core_3.1.cl
M clang/test/SemaOpenCL/extension-version.cl
Log Message:
-----------
[Clang][OpenCL] Promote a few extensions to OpenCL 3.1 core (#204330)
Following 6 OpenCL extensions are promoted to core features in 3.1:
https://github.com/KhronosGroup/OpenCL-Docs/commit/9fff1a87a975
- cl_khr_extended_bit_ops
- cl_khr_integer_dot_product
- cl_khr_subgroup_extended_types
- cl_khr_subgroup_rotate
- cl_khr_subgroup_shuffle
- cl_khr_subgroup_shuffle_relative
A target claiming OpenCL C 3.1 conformance without supporting one of
these features is now diagnosed.
Updated release notes for the change.
Assisted-by: Claude
Commit: adc0f685fe94e66e68698ac87a8595e878477a61
https://github.com/llvm/llvm-project/commit/adc0f685fe94e66e68698ac87a8595e878477a61
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-llvm-debuginfo-analyzer.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-adjustSchedDependency.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-revertScheduling.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-scheduleRegion.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-check-metadata.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics-chain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
Log Message:
-----------
AMDGPU: Convert tests to use subarch from triples in the file (#209869)
This set was using target triple in the source rather than command
line arguments.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 9277129afc6be0e4cf919bce1e0d2c56521af654
https://github.com/llvm/llvm-project/commit/9277129afc6be0e4cf919bce1e0d2c56521af654
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/convergent.mir
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
Log Message:
-----------
AMDGPU: Use subarch in tests using generic arches (#209870)
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 65180a50117244b4758e03175bed2dc34fc74f91
https://github.com/llvm/llvm-project/commit/65180a50117244b4758e03175bed2dc34fc74f91
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Relax address constraints during stride analysis (#209168)
VPlanTransforms::convertToStridedAccesses() only handled loads whose
address was a VPWidenGEPRecipe, missing pointer-induction loops where
the address is computed differently. Analyze the address VPValue
directly so these cases are also converted to strided loads.
Fixed #207171
Commit: 9b5ad6ee5dc5139f2a156350da64a84df8145fc6
https://github.com/llvm/llvm-project/commit/9b5ad6ee5dc5139f2a156350da64a84df8145fc6
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/liboffload/API/Program.td
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
Log Message:
-----------
[offload] add translation of plugin-specific error codes to Offload API ECs (#207208)
liboffload plugins would not always exhaustively map the underlying
API's error values to ol_errc_t, resulting in unintended behavior - e.g.
olCreateProgram, given an invalid binary, would return OL_ERRC_UNKNOWN
instead of OL_ERRC_INVALID_BINARY.
This patch largely eliminates the most glaring cases of this by
assigning an ol_errc_t value to every error code of the underlying API
in every plugin. The proper granularity for this mapping is per-API
call, but that is a large rework that belongs in a separate patch.
Assisted-by: Claude
Commit: 83582cfcdb4973a337195c1f59d6a3468d135434
https://github.com/llvm/llvm-project/commit/83582cfcdb4973a337195c1f59d6a3468d135434
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/c11atomics.c
Log Message:
-----------
[clang][CodeGen] Do not use atomicrmw in compound assignments with FP conversions (#209114)
Per C11 6.5.16.2p1, when the left operand of operator `+=` has atomic
type, the right shall have arithmetic type. Do not try the `atomicrmw`
fast-path when FP conversion, arithmetic and truncation are required, as
a single atomic operation may not correctly capture the combined
semantics.
Fixes: https://github.com/llvm/llvm-project/issues/208997.
Commit: 59d7709ee9352df286bfb9b7a3b97c38deae5495
https://github.com/llvm/llvm-project/commit/59d7709ee9352df286bfb9b7a3b97c38deae5495
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M polly/lib/Transform/DeLICM.cpp
A polly/test/DeLICM/outofquota-greedycollapse.ll
Log Message:
-----------
Bound ISL operations during DeLICM scalar collapsing (#203073)
The IslMaxOperationsGuard in DeLICM previously covered only the zone
analysis performed in computeZone(). The subsequent greedyCollapse() ->
collapseScalarsToStore() path calls computeScalarReachingOverwrite(),
which performs an unbounded ISL lexmin().
Share a single[already present], dormant IslMaxOperationsGuard across
both regions and arm it narrowly around each operation intensive
computation via IslQuotaScope, so the same operations budget covers both
computeZone() and the scalar collapsing. When the quota is exceeded
during scalar collapsing, bail out cleanly: increment DeLICMOutOfQuota
and emit an "OutOfQuota" analysis remark.
Fixes: https://github.com/llvm/llvm-project/issues/202045
Commit: ad792fafbe64b3889ffac6e06bdd2a91ab8591bb
https://github.com/llvm/llvm-project/commit/ad792fafbe64b3889ffac6e06bdd2a91ab8591bb
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
Log Message:
-----------
[SLP][NFC] Address follow-up cleanups in SLPUtils (#210016)
Follow-up to #206881, addressing deferred review comments:
- Assert VL is non-empty in allSameType before consume_front.
- Use llvm::all_of instead of std::all_of in allSameOpcode.
- Rewrite isVectorLikeInstWithConstOps as a dyn_cast + opcode switch.
---------
Co-authored-by: Antonio Frighetto <me at antoniofrighetto.com>
Commit: 20a86a2fb7a793a59d7535ceb4d0f67c07b2f10e
https://github.com/llvm/llvm-project/commit/20a86a2fb7a793a59d7535ceb4d0f67c07b2f10e
Author: 311Volt <41923095+311Volt at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
Log Message:
-----------
[offload] fix failure of olCreateProgramTest.TruncatedBinary (#210024)
https://github.com/llvm/llvm-project/pull/207208 caused a CI failure on
openmp-offload-amdgpu-clang-flang in the
olCreateProgramTest.TruncatedBinary test.
This PR removes this test case, as it's unclear whether guarding against
such cases is worth it.
Commit: 83eac376c5dfc4e730955f37a48f24850e0b5a52
https://github.com/llvm/llvm-project/commit/83eac376c5dfc4e730955f37a48f24850e0b5a52
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/pre-fir-tree-multiway-branch.f90
M flang/test/Lower/pre-fir-tree02.f90
Log Message:
-----------
[flang][PFT] record every target of multiway branches (#210012)
The Evaluation node stored branch targets in a single `Evaluation *`
(`controlSuccessor`). `markBranchTarget` therefore silently dropped
every target after the first when lowering a computed `GO TO` or
arithmetic `IF`, so any analysis that consulted `controlSuccessor` to
enumerate branch targets saw only the first label.
Add `extraControlSuccessors` alongside
`controlSuccessor`. `markBranchTarget` still fills `controlSuccessor`
with the first target, but appends each subsequent distinct target to
`extraControlSuccessors`. Extend the PFT dumper to print the extra
targets after the first ("-> N, M, K"), so PFT dumps expose every branch
target.
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 5a98e96135e223890cbf0640584e30c0db695ecf
https://github.com/llvm/llvm-project/commit/5a98e96135e223890cbf0640584e30c0db695ecf
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M flang/test/Driver/fakeflang.F
M flang/tools/CMakeLists.txt
M flang/tools/fakeflang/CMakeLists.txt
R flang/tools/fakeflang/ensure_flang_exists.cmake
M flang/tools/fakeflang/fakeflang.cpp
M flang/tools/flang-driver/CMakeLists.txt
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
Log Message:
-----------
[Flang][CMake] Use fakeflang as dispatcher (#209482)
With #203481 where `runtimes-configure` does not depend on `flang`
anymore, the following race could happen in incremental builds: While
ninja/make builds some of the libFortran*.so libraries in a
BUILD_SHARED_LIBS=ON build, CMake tries to execute flang which tries to
load the .so libraries while they are linked. This race condition can
only happen in incremental builds because before the real bin/flang is
built completely the first time, it points to fakeflang which would be
working. Only in an incremental build, would the real bin/flang already
been built created before, pointing to the currently re-built flang.
I did not think this would be possible because CMake only needs to probe
flang once and thereafter (in the incremental build) remembers the probe
result in `CMakeFiles/<version>/CMakeFortranCompiler.cmake`. CMake does
not support changing the compiler once configured and errors-out if you
try to change `CMAKE_Fortran_COMPILER`. I do not know why/when CMake is
re-probing the compiler in some incremental builds, but has been
reported to do so in #205360.
This patch avoids any replacement of build artifacts and instead decides
in fakeflang when to call real flang or to emulate the Flang
preprocessor. The decision is made based of on the FLANG_BOOTSTRAP_PROBE
environment variable that is set only in the configure step. The feature
that allows this is unfortunately only available starting in CMake 4.2.
All suppported CMake versions before CMake 4.2 use the filename
`CMakeFortranCompilerId.F`, so make the decision based on that when
using earlier versions of CMake.
Tested with CMake 3.20, 3.28, 3.31, 4.1, and 4.2.
Fixes #205360
Commit: 57ceb12780157d68f7c14d5ed8f18bc87dc768fd
https://github.com/llvm/llvm-project/commit/57ceb12780157d68f7c14d5ed8f18bc87dc768fd
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/PDB/Native/LinePrinter.h
Log Message:
-----------
[DebugInfo][NFC] Fix PDB/Native/LinePrinter.h build warning -Wmicrosoft-unqualified-friend (#209715)
Fix build warning on Windows, which is error under -Werror: unqualified
friend declaration referring to type outside of the nearest enclosing
namespace is a Microsoft extension; add a nested name specifier
[-Wmicrosoft-unqualified-friend]
Commit: 5e4f44041d32234ea8227cbb2473173bd5edfc1c
https://github.com/llvm/llvm-project/commit/5e4f44041d32234ea8227cbb2473173bd5edfc1c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
Log Message:
-----------
[AMDGPU] Clean up GFX13 feature list (#208416)
GFX13 features were previously mostly inherited from GFX12/GFX1250.
- define an explicit gfx13 target parser feature list, including
gfx13-insts and cvt-pknorm-vop3-insts.
- remove transpose load F4/F6 support from gfx13 (previously copied from
gfx12)
Commit: 3faf46d218d3cb888c818b3e99d7e05b06ca68fa
https://github.com/llvm/llvm-project/commit/3faf46d218d3cb888c818b3e99d7e05b06ca68fa
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Session::OnCallControllerReturnFn, comments. NFC. (#210035)
Rename Session::OnCallHandlerCompleteFn to
Session::OnControllerCallReturnFn and add a comment to clarify its
purpose: This callback is used to handle retured values from calls to
the controller.
Commit: 8866215f30953c7df146276ac10753de941b1fcb
https://github.com/llvm/llvm-project/commit/8866215f30953c7df146276ac10753de941b1fcb
Author: mkovacevic99 <mkovacevic at baylibre.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm-c/Orc.h
Log Message:
-----------
[Orc] Update the comment so it doesn't mention TargetTriple argument that no longer exists (#210023)
Completes the fix for the
https://github.com/llvm/llvm-project/issues/80097
Commit: 3d87de86a24d1bff2821e4eb2f2d28e58605a394
https://github.com/llvm/llvm-project/commit/3d87de86a24d1bff2821e4eb2f2d28e58605a394
Author: Philip742 <philip.wilkinson at arm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for MXFP in CONCAT (#209719)
Adds support to profile compliance for MXFP variants of CONCAT
Signed-off-by: Philip Wilkinson <philip.wilkinson at arm.com>
Commit: 18fc5a8adbe5dba7dc281bacdb149e95dc7dc1be
https://github.com/llvm/llvm-project/commit/18fc5a8adbe5dba7dc281bacdb149e95dc7dc1be
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[TableGen][RISCV] Generate pre/post-RA statistics for macro fusions (#209394)
Teach `MacroFusionPredicatorEmitter` to emit `Statistic` counters
recording how often each macro fusion is matched, and wire them
up for RISC-V.
This is based on the idea in #186499, generalized so counters are
generated automatically for any target using the emitter.
Because both the pre-RA and post-RA schedulers run MacroFusion,
a single counter would conflate the two. Counters are split into
pre-RA/post-RA variants, distinguished by the `NoVRegs` property,
addressing the double-counting concern from #186499:
```cpp
STATISTIC(NumTuneLDADDFusionPreRA, "Times TuneLDADDFusion Triggered (pre-ra)");
STATISTIC(NumTuneLDADDFusionPostRA, "Times TuneLDADDFusion Triggered (post-ra)");
...
if (SecondMI.getMF()->getProperties().hasNoVRegs())
++NumTuneLDADDFusionPostRA;
else
++NumTuneLDADDFusionPreRA;
```
Besides, RISC-V counters use the `riscv-macro-fusion` debug type.
Co-authored-by: Sam Elliott <aelliott at qti.qualcomm.com>
Assisted-by: TRAE CLI (DeepSeek V4 Pro)
Commit: db7356dde8312a86e79ec0d7b7f844878a1a743c
https://github.com/llvm/llvm-project/commit/db7356dde8312a86e79ec0d7b7f844878a1a743c
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
[libc++] Partially revert #208330 (#209928)
We found out that the new mechanism for detecting overriden functions
does not support Arm Pointer Authentication (PAuth). Addressing this
limitation is going to require changes to Clang. In the meantime, we
switched back to the old mechanism when PAuth is enabled.
Commit: 3bf897eaac63ea4e6b8c4f77d84f833f63167e3d
https://github.com/llvm/llvm-project/commit/3bf897eaac63ea4e6b8c4f77d84f833f63167e3d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-profitable instcount check across the loops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/210045
Commit: ee5cff53cf4f0c23254bda94c7249e4ea008d457
https://github.com/llvm/llvm-project/commit/ee5cff53cf4f0c23254bda94c7249e4ea008d457
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/unittests/mock/helpers.cpp
Log Message:
-----------
[libsycl] Fix mock error in unittest helper (#209726)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 66e8cc5ec83d7ec5e506c53b11c1d22887c0c418
https://github.com/llvm/llvm-project/commit/66e8cc5ec83d7ec5e506c53b11c1d22887c0c418
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Handle (X | Y) >s -1 as X >s -1 && Y >s -1. (#209743)
InstCombine canonicalizes X >=s 0 && Y >=s 0 as (X | Y) >=s 0. Teach
ConstraintElimination to recover the signed-positive information by
looking through compares of binary ORs.
Alive2 Proof: https://alive2.llvm.org/ce/z/sqNF8M
Compile-time impact is neutral
https://llvm-compile-time-tracker.com/compare.php?from=88acd428fd72f44312408c3fb6165992fb3b043a&to=a2aa4cacb953b32d6319939b9aee3226a7294334&stat=instructions%3Au
PR: https://github.com/llvm/llvm-project/pull/209743
Commit: 6388cfc492e82702dfc1aa965adab7e85c7ad3d8
https://github.com/llvm/llvm-project/commit/6388cfc492e82702dfc1aa965adab7e85c7ad3d8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/reduction.ll
Log Message:
-----------
[AMDGPU] Add missing FMF flags in tests (NFC) (#210055)
The flags should be on the select, not the fcmp for nsz to have
any effect.
Commit: 424fec2368d615dff78b4167e78e9bbb06fc4214
https://github.com/llvm/llvm-project/commit/424fec2368d615dff78b4167e78e9bbb06fc4214
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Analysis/AliasSet/memset.ll
Log Message:
-----------
[NFC][test][AliasSet] Canonicalise memset.ll's overload suffices (#210059)
The second overload suffix here corresponds to the type of the length,
the third argument, which is an i64 not an i32. Canonicalise this to
avoid confusion from inconsistency.
Whilst here, fix the whitespace used to align the arguments in the
intrinsic declarations, a remnant of losing the two characters in "i8"
when migrating to opaque pointers.
Fixes: 9f0916129024 ("[AST] Add test coverage of memsets")
Fixes: ac924305793c ("[AliasSet] Convert tests to opaque pointers
(NFC)")
Commit: 006d13e206401545c011028d85749071acdc5326
https://github.com/llvm/llvm-project/commit/006d13e206401545c011028d85749071acdc5326
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0][NFC] Cleanup dead code (#210060)
As we have done several refactorings lately, some dead code/data was
left behind inadvertedly. This is just cleaning it up.
Commit: 6ba12f1878384fa0d5be092b511f67e7e808772b
https://github.com/llvm/llvm-project/commit/6ba12f1878384fa0d5be092b511f67e7e808772b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
Log Message:
-----------
[X86] fold-signbit-reduction-cmp.ll - test for each x86-64 cpu level (#210051)
Commit: 26c200d88e720fa88e8692ace13a493696ac591f
https://github.com/llvm/llvm-project/commit/26c200d88e720fa88e8692ace13a493696ac591f
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN sin builtins (#197784)
Adds codegen for the following AMDGCN sin builtins:
- __builtin_amdgcn_sinf (float)
- __builtin_amdgcn_sinh (half)
- __builtin_amdgcn_sin_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.sin` intrinsic.
Commit: 8739d89c4c2475eefc4638882311515fc67f9f9b
https://github.com/llvm/llvm-project/commit/8739d89c4c2475eefc4638882311515fc67f9f9b
Author: Yuan Suo <suoyuan666 at s5n.xyz>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Introduce buildOriginFlowChain to use-after-invalidation (#208891)
After completing the implementation of `buildOriginFlowChain`, we should
integrate it into the remaining diagnostics. I started with
`use-after-invalidation` because there is already an overload of
`buildOriginFlowChain` for `UseFact`.
While testing, I noticed the following diagnostics:
```txt
test.cpp:9:23: note: result of call to 'begin<std::vector<int>>' aliases the storage of parameter 'v'
9 | auto it = std::find(std::begin(v), std::end(v), 3); // expected-warning {{parameter 'v' is later invalidated}} \
| ^~~~~~~~~~~~~
test.cpp:9:13: note: result of call to 'find<__gnu_cxx::__normal_iterator<int *, std::vector<int>>, int>' aliases the storage of parameter 'v'
9 | auto it = std::find(std::begin(v), std::end(v), 3); // expected-warning {{parameter 'v' is later invalidated}} \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
I think these diagnostics could be made clearer, but I'd prefer to
address that in a separate PR.
---------
Signed-off-by: Yuan Suo <suoyuan666 at s5n.xyz>
Commit: 19595357e32b36383a025fddaaf8c38f90658b7b
https://github.com/llvm/llvm-project/commit/19595357e32b36383a025fddaaf8c38f90658b7b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] combineAdd - remove unnecessary add(a,concat(vpmaddwd(x,y),vpmaddwd(z,w))) -> vpdpwssd(a,concat(x,z),concat(y,w)) fold (#209838)
We already handle vpmaddwd concatenation in combineConcatVectorOps - but
512-bit vpmaddwd is only available on BWI targets, which was missing
from the tests
Technically if there's a target that has AVX512VNNI but not BWI, then
this fold would be useful, but there's no such target and there's a
limit to "what if" optimisations we really need.
A small attempt at cleaning out some not very useful code from
X86ISelLowering.cpp - I'm intending to do a lot more of this for 24.x / #143088
Commit: e3d3b3b0cf3672480d6f781a9726cec1e7983d14
https://github.com/llvm/llvm-project/commit/e3d3b3b0cf3672480d6f781a9726cec1e7983d14
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/src/__support/mathvec/CMakeLists.txt
A libc/src/__support/mathvec/acosf.h
A libc/src/__support/mathvec/acoshf.h
A libc/src/__support/mathvec/acospif.h
A libc/src/__support/mathvec/asinf.h
A libc/src/__support/mathvec/asinhf.h
A libc/src/__support/mathvec/asinpif.h
A libc/src/__support/mathvec/atanf.h
A libc/src/__support/mathvec/atanhf.h
A libc/src/__support/mathvec/cbrtf.h
M libc/src/__support/mathvec/common_constants.h
A libc/src/__support/mathvec/cosf.h
A libc/src/__support/mathvec/coshf.h
A libc/src/__support/mathvec/cospif.h
A libc/src/__support/mathvec/erff.h
A libc/src/__support/mathvec/exp10f.h
A libc/src/__support/mathvec/exp10m1f.h
A libc/src/__support/mathvec/exp2f.h
A libc/src/__support/mathvec/exp2m1f.h
M libc/src/__support/mathvec/expf.h
M libc/src/__support/mathvec/expf_utils.h
A libc/src/__support/mathvec/expm1f.h
A libc/src/__support/mathvec/log10f.h
A libc/src/__support/mathvec/log1pf.h
A libc/src/__support/mathvec/log2f.h
A libc/src/__support/mathvec/logf.h
A libc/src/__support/mathvec/rsqrtf.h
A libc/src/__support/mathvec/sinf.h
A libc/src/__support/mathvec/sinhf.h
A libc/src/__support/mathvec/sinpif.h
A libc/src/__support/mathvec/sqrtf.h
A libc/src/__support/mathvec/tanf.h
A libc/src/__support/mathvec/tanhf.h
A libc/src/__support/mathvec/tanpif.h
M libc/src/mathvec/CMakeLists.txt
A libc/src/mathvec/abi_prefix.h
A libc/src/mathvec/acosf.h
A libc/src/mathvec/acoshf.h
A libc/src/mathvec/acospif.h
A libc/src/mathvec/asinf.h
A libc/src/mathvec/asinhf.h
A libc/src/mathvec/asinpif.h
A libc/src/mathvec/atanf.h
A libc/src/mathvec/atanhf.h
A libc/src/mathvec/cbrtf.h
A libc/src/mathvec/cosf.h
A libc/src/mathvec/coshf.h
A libc/src/mathvec/cospif.h
A libc/src/mathvec/erff.h
A libc/src/mathvec/exp10f.h
A libc/src/mathvec/exp10m1f.h
A libc/src/mathvec/exp2f.h
A libc/src/mathvec/exp2m1f.h
M libc/src/mathvec/expf.h
A libc/src/mathvec/expm1f.h
M libc/src/mathvec/generic/CMakeLists.txt
A libc/src/mathvec/generic/acosf.cpp
A libc/src/mathvec/generic/acoshf.cpp
A libc/src/mathvec/generic/acospif.cpp
A libc/src/mathvec/generic/asinf.cpp
A libc/src/mathvec/generic/asinhf.cpp
A libc/src/mathvec/generic/asinpif.cpp
A libc/src/mathvec/generic/atanf.cpp
A libc/src/mathvec/generic/atanhf.cpp
A libc/src/mathvec/generic/cbrtf.cpp
A libc/src/mathvec/generic/cosf.cpp
A libc/src/mathvec/generic/coshf.cpp
A libc/src/mathvec/generic/cospif.cpp
A libc/src/mathvec/generic/erff.cpp
A libc/src/mathvec/generic/exp10f.cpp
A libc/src/mathvec/generic/exp10m1f.cpp
A libc/src/mathvec/generic/exp2f.cpp
A libc/src/mathvec/generic/exp2m1f.cpp
M libc/src/mathvec/generic/expf.cpp
A libc/src/mathvec/generic/expm1f.cpp
A libc/src/mathvec/generic/log10f.cpp
A libc/src/mathvec/generic/log1pf.cpp
A libc/src/mathvec/generic/log2f.cpp
A libc/src/mathvec/generic/logf.cpp
A libc/src/mathvec/generic/rsqrtf.cpp
A libc/src/mathvec/generic/sinf.cpp
A libc/src/mathvec/generic/sinhf.cpp
A libc/src/mathvec/generic/sinpif.cpp
A libc/src/mathvec/generic/sqrtf.cpp
A libc/src/mathvec/generic/tanf.cpp
A libc/src/mathvec/generic/tanhf.cpp
A libc/src/mathvec/generic/tanpif.cpp
A libc/src/mathvec/log10f.h
A libc/src/mathvec/log1pf.h
A libc/src/mathvec/log2f.h
A libc/src/mathvec/logf.h
A libc/src/mathvec/rsqrtf.h
A libc/src/mathvec/sinf.h
A libc/src/mathvec/sinhf.h
A libc/src/mathvec/sinpif.h
A libc/src/mathvec/sqrtf.h
A libc/src/mathvec/tanf.h
A libc/src/mathvec/tanhf.h
A libc/src/mathvec/tanpif.h
M libc/test/src/mathvec/CMakeLists.txt
A libc/test/src/mathvec/UnitTestWrappers.h
A libc/test/src/mathvec/acosf_test.cpp
A libc/test/src/mathvec/acoshf_test.cpp
A libc/test/src/mathvec/acospif_test.cpp
A libc/test/src/mathvec/asinf_test.cpp
A libc/test/src/mathvec/asinhf_test.cpp
A libc/test/src/mathvec/asinpif_test.cpp
A libc/test/src/mathvec/atanf_test.cpp
A libc/test/src/mathvec/atanhf_test.cpp
A libc/test/src/mathvec/cbrtf_test.cpp
A libc/test/src/mathvec/cosf_test.cpp
A libc/test/src/mathvec/coshf_test.cpp
A libc/test/src/mathvec/cospif_test.cpp
A libc/test/src/mathvec/erff_test.cpp
M libc/test/src/mathvec/exhaustive/CMakeLists.txt
A libc/test/src/mathvec/exhaustive/acosf_test.cpp
A libc/test/src/mathvec/exhaustive/acoshf_test.cpp
A libc/test/src/mathvec/exhaustive/acospif_test.cpp
A libc/test/src/mathvec/exhaustive/asinf_test.cpp
A libc/test/src/mathvec/exhaustive/asinhf_test.cpp
A libc/test/src/mathvec/exhaustive/asinpif_test.cpp
A libc/test/src/mathvec/exhaustive/atanf_test.cpp
A libc/test/src/mathvec/exhaustive/atanhf_test.cpp
A libc/test/src/mathvec/exhaustive/cbrtf_test.cpp
A libc/test/src/mathvec/exhaustive/cosf_test.cpp
A libc/test/src/mathvec/exhaustive/coshf_test.cpp
A libc/test/src/mathvec/exhaustive/cospif_test.cpp
A libc/test/src/mathvec/exhaustive/erff_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/test/src/mathvec/exhaustive/exp10f_test.cpp
A libc/test/src/mathvec/exhaustive/exp10m1f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2m1f_test.cpp
M libc/test/src/mathvec/exhaustive/expf_test.cpp
A libc/test/src/mathvec/exhaustive/expm1f_test.cpp
A libc/test/src/mathvec/exhaustive/log10f_test.cpp
A libc/test/src/mathvec/exhaustive/log1pf_test.cpp
A libc/test/src/mathvec/exhaustive/log2f_test.cpp
A libc/test/src/mathvec/exhaustive/logf_test.cpp
A libc/test/src/mathvec/exhaustive/rsqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/sinf_test.cpp
A libc/test/src/mathvec/exhaustive/sinhf_test.cpp
A libc/test/src/mathvec/exhaustive/sinpif_test.cpp
A libc/test/src/mathvec/exhaustive/sqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/tanf_test.cpp
A libc/test/src/mathvec/exhaustive/tanhf_test.cpp
A libc/test/src/mathvec/exhaustive/tanpif_test.cpp
A libc/test/src/mathvec/exp10f_test.cpp
A libc/test/src/mathvec/exp10m1f_test.cpp
A libc/test/src/mathvec/exp2f_test.cpp
A libc/test/src/mathvec/exp2m1f_test.cpp
M libc/test/src/mathvec/expf_test.cpp
A libc/test/src/mathvec/expm1f_test.cpp
A libc/test/src/mathvec/log10f_test.cpp
A libc/test/src/mathvec/log1pf_test.cpp
A libc/test/src/mathvec/log2f_test.cpp
A libc/test/src/mathvec/logf_test.cpp
A libc/test/src/mathvec/rsqrtf_test.cpp
A libc/test/src/mathvec/sinf_test.cpp
A libc/test/src/mathvec/sinhf_test.cpp
A libc/test/src/mathvec/sinpif_test.cpp
A libc/test/src/mathvec/sqrtf_test.cpp
A libc/test/src/mathvec/tanf_test.cpp
A libc/test/src/mathvec/tanhf_test.cpp
A libc/test/src/mathvec/tanpif_test.cpp
Log Message:
-----------
[libc][mathvec] Add loop over scalar for unary FP32 (#199273)
Adds all FP32 unary functions currently supported in scalar LLVM LIBM to
LIBMVEC as loop over scalars.
Includes some cleanup of existing mathvec testing infrastructure
Commit: 1cb7e838cd47ecad4050948c0c907ecb1f466ac3
https://github.com/llvm/llvm-project/commit/1cb7e838cd47ecad4050948c0c907ecb1f466ac3
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Simplify some isVALU calls. NFC. (#210057)
Commit: 122efb26893f7e214d0223615c3a4abcc0ac7796
https://github.com/llvm/llvm-project/commit/122efb26893f7e214d0223615c3a4abcc0ac7796
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/is_heap_until.h
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
Log Message:
-----------
[libc++] Optimize std::is_heap_until (#209141)
Fixes #208299
Commit: 6e7ff09291652cc784a095707029852e249902f9
https://github.com/llvm/llvm-project/commit/6e7ff09291652cc784a095707029852e249902f9
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Improve debug printing of regunits in SIInsertWaitcnts (#210066)
Use the standard printRegUnit helper.
Commit: c7a5b9c0ddd1a5e89a3e8b5a79a916f03e0689b7
https://github.com/llvm/llvm-project/commit/c7a5b9c0ddd1a5e89a3e8b5a79a916f03e0689b7
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/Analysis/HashRecognize.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[LoopIdiomRecognize] Enable clmul optimization for CRC loops (#203405)
The current `optimizeCRCLoop` function always optimizes CRC loops to use
a 256-entry Sarwate lookup table to process a byte at a time (except on
Hexagon and with optsize). However, some targets are able to process
larger chunks of CRC data with carry-less/polynomial multiplication
instructions. Implement this approach in IR for such targets using the
`llvm.clmul` intrinsic. (Only with optsize for the moment, though.)
Like the current CRC loop optimization, this does not apply to the
Hexagon target, despite it having a `pmpyw` instruction.
Assisted-by: Claude Opus 4.8
Commit: 73aa9102362f07e2f8fc537b3d2f72062d4a1e68
https://github.com/llvm/llvm-project/commit/73aa9102362f07e2f8fc537b3d2f72062d4a1e68
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
A libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
A libsycl/include/sycl/__impl/group.hpp
A libsycl/include/sycl/__impl/memory_enums.hpp
A libsycl/include/sycl/__impl/nd_item.hpp
A libsycl/include/sycl/__impl/nd_range.hpp
M libsycl/include/sycl/__impl/queue.hpp
A libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/detail/queue_impl.cpp
A libsycl/test/basic/group.cpp
A libsycl/test/basic/group_local_id.cpp
A libsycl/test/basic/linear_sub_group.cpp
A libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/sub_group_by_value_semantics.cpp
A libsycl/test/basic/sub_group_common.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
Log Message:
-----------
[libsycl] Implement nd_range kernel submissions (#206505)
This PR adds core SYCL 2020 nd_range kernel submissions (including
nd_item, group, and sub_group).
Assisted with GH Copilot.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 0852ac5649a0ac6959af6fbc2e4cf6cf4bad7238
https://github.com/llvm/llvm-project/commit/0852ac5649a0ac6959af6fbc2e4cf6cf4bad7238
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCSchedule.td
M llvm/lib/Target/PowerPC/PPCSchedule440.td
M llvm/lib/Target/PowerPC/PPCScheduleA2.td
M llvm/lib/Target/PowerPC/PPCScheduleE500.td
M llvm/lib/Target/PowerPC/PPCScheduleE500mc.td
M llvm/lib/Target/PowerPC/PPCScheduleE5500.td
M llvm/lib/Target/PowerPC/PPCScheduleG3.td
Log Message:
-----------
[PowerPC] Remove itinerary IIC_LdStDCBA (#207227)
The itinerary IIC_LdStDCBA is defined and used in scheduling models, but
no instruction is assigned to it. However, since the instruction is
basically retired (not part of the portable Power ISA), and all
scheduling models model it similar to IIC_LdStDCBF, the itinerary can be
removed.
Commit: 96cab305c0402e051d16e748911bd469b4ad57fe
https://github.com/llvm/llvm-project/commit/96cab305c0402e051d16e748911bd469b4ad57fe
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/test/Assembler/callbr.ll
Log Message:
-----------
[AMDGPU] Improve amdgcn_kill verification (#208220)
Commit: 8c22bbde747ce8c577318c3fb6cafaae6f1b8aec
https://github.com/llvm/llvm-project/commit/8c22bbde747ce8c577318c3fb6cafaae6f1b8aec
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Replace lowerBuildVectorAsRV32PNarrowingShift with shuffle lowering. (#209088)
Add an implementation of isExtractSubvectorCheap for extracting
v2i16/v4i8 from a v4i16/v8i8 vector on RV32. This allows the
build_vector+extract_elt pattern to be turned into
shuffle_vector+extract_subvectors.
Assisted-by: Claude
Commit: 00674044ab7111ce25ac9a613fefeace7dff1125
https://github.com/llvm/llvm-project/commit/00674044ab7111ce25ac9a613fefeace7dff1125
Author: Benjamin Jurk <106487517+bnjmnjrk at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] Add m_SpecificType(Type*) matcher (#208427)
Fixes #208401.
Commit: d333df5aeb31ecf867e1a7908a7814485f4aa7f0
https://github.com/llvm/llvm-project/commit/d333df5aeb31ecf867e1a7908a7814485f4aa7f0
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[LLDB] Print stderr in HandleStop (#208875)
There are some testcases silently fail in stopping hook without
returning anything on FreeBSD. We dump the error from the handler to
make it easier to debug.
Commit: 7fc7d8d5d2c10db1cff7f53175ad4cb158f0890d
https://github.com/llvm/llvm-project/commit/7fc7d8d5d2c10db1cff7f53175ad4cb158f0890d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes e3d3b3b (#210068)
This fixes e3d3b3b0cf3672480d6f781a9726cec1e7983d14.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e3d3b3b0cf3672480d6f781a9726cec1e7983d14
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 638d6736400891b03f211487ccb643a49f14f743
https://github.com/llvm/llvm-project/commit/638d6736400891b03f211487ccb643a49f14f743
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
Log Message:
-----------
[LifetimeSafety] Add better lifetimebound fix-it spelling for C (#209967)
Use `__attribute__((lifetimebound))` as the default lifetimebound fix-it
spelling in pre-C23 C.
C++ and C23 continue to use `[[clang::lifetimebound]]` as the default
spelling.
When no explicit lifetimebound macro is configured, pre-C23 C only looks
for `__attribute__((lifetimebound))`, C++ and C23 keep looking for
`[[clang::lifetimebound]]` macros first, then
`__attribute__((lifetimebound))`.
Follow up of https://github.com/llvm/llvm-project/pull/204045
Commit: 9ec7974432975674b0128ea85a54cb3e5b0ffa75
https://github.com/llvm/llvm-project/commit/9ec7974432975674b0128ea85a54cb3e5b0ffa75
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
[AMDGPU] Update libc/runtime target to use amdgpu (#210032)
Update libc/runtime targets to use "amdgpu" instead of "amdgcn". This
change is necessary to do libc testing with a
check-libc-amdgpu-amd-amdhsa target. The previous
check-libc-amdgcn-amd-amdhsa target already stopped working after
https://github.com/llvm/llvm-project/pull/209247.
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: dfa1360735f5a834ce96c8c63594e2cdc3bfe0ea
https://github.com/llvm/llvm-project/commit/dfa1360735f5a834ce96c8c63594e2cdc3bfe0ea
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN cos builtins (#197806)
Adds codegen for the following AMDGCN cos builtins:
- __builtin_amdgcn_cosf (float)
- __builtin_amdgcn_cosh (half)
- __builtin_amdgcn_cos_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.cos` intrinsic.
Commit: 8f0a479f46c98e1a098319786d0848e4b9e0a98d
https://github.com/llvm/llvm-project/commit/8f0a479f46c98e1a098319786d0848e4b9e0a98d
Author: jandrovins <46629861+jandrovins at users.noreply.github.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Instrumentor.cpp
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.json
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
Log Message:
-----------
[Instrumentor] Fix indirect arguments on gpu targets (#209835)
When an argument is passed indirectly,
`IRTCallDescription::createLLVMCall` spills it into a temporary alloca
and passes that alloca address to the runtime call. The alloca is
created in the target's alloca address space. On GPUs it is not address
space 0, which is what the runtime expects for indirect parameters. The
alloca pointer was passed as the argument, so its type didn't match the
call's declared parameter type, causing a "bad signature" assertion in
`CallInst::init` when instrumenting GPU code that requires indirection.
The solution is therefore to cast this pointer to address space 0 before
passing it the the instrumentor call.
Commit: 689fa1d6d74a465130ad0b1705813e14d1cd5b1a
https://github.com/llvm/llvm-project/commit/689fa1d6d74a465130ad0b1705813e14d1cd5b1a
Author: Hardik Kumar <hardikxk at gmail.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/AST/CommentLexer.h
Log Message:
-----------
Fix Unintialised char *CommentLexer resulting in potential UB. (#210067)
The patch intialised the pointer to a .
Previously the pointer would have some garbage value which might have
resulted in UB.
closes #210034
Commit: f57bdc62619417a2ee9076ac05db9d115c3ba464
https://github.com/llvm/llvm-project/commit/f57bdc62619417a2ee9076ac05db9d115c3ba464
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/and-negative.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
Log Message:
-----------
[ConstraintElim] Handle (X & Y) <s 0 as X <s 0 && Y <s 0. (#210033)
InstCombine canonicalizes X <s 0 && Y <s 0 as (X & Y) <s 0. Teach
ConstraintElimination to recover the signed-negative information by
looking through compares of binary ANDs.
Alive2 Proof: https://alive2.llvm.org/ce/z/R6DWqD
Depends on https://github.com/llvm/llvm-project/pull/209743
PR: https://github.com/llvm/llvm-project/pull/210033
Commit: c9ec54a8a781166546c1001a8bfb2448fbacda44
https://github.com/llvm/llvm-project/commit/c9ec54a8a781166546c1001a8bfb2448fbacda44
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV] Add DUMMY_REG_PAIR_WITH_X0->GPR copy to copyPhysReg. (#209964)
The register coalescer can convert (extract_subreg x0_pair, sub_gpr_odd)
to a read of DUMMY_REG_PAIR_WITH_X0. This patch treats it the same as a
copy from X0.
I don't know if this is a good long term fix, but I think it's ok for
now. I will continue to look for other options.
Commit: a5b70908d9cacd0aa1c918c920e8a6118b4340ce
https://github.com/llvm/llvm-project/commit/a5b70908d9cacd0aa1c918c920e8a6118b4340ce
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
Log Message:
-----------
[AMDGPU] Guard more intrinsics with target features (#203956)
Commit: 53dae32b8a3e973a1677bd2745b9128741d69f59
https://github.com/llvm/llvm-project/commit/53dae32b8a3e973a1677bd2745b9128741d69f59
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M libsycl/include/sycl/__impl/queue.hpp
Log Message:
-----------
[libsycl] fix nd_range template resolution (#210081)
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: d76f5249eaca89f73ff8e55783153a8376938abf
https://github.com/llvm/llvm-project/commit/d76f5249eaca89f73ff8e55783153a8376938abf
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M lldb/tools/lldb-server/lldb-gdbserver.cpp
Log Message:
-----------
[lldb][Windows] Don't let the inferior inherit the --pipe handle (#207024)
`lldb-server` writes its listening socket id to the `--pipe` handle and
then closes it. The parent process that spawned it reads the pipe until
EOF purely as a synchronization point (`"the server is now listening"`).
On Windows the inferior is launched with `bInheritHandles=TRUE` (it
needs the ConPTY handles), so it also inherited the pipe's write end.
That kept the write end open after `lldb-server` closed its own handle,
so the parent never saw EOF: it blocked until its read timeout and the
client's connection handshake timed out first.
This patch clears `HANDLE_FLAG_INHERIT` on the `--pipe` handle so the
inferior cannot keep the write end open, while leaving it valid for
lldb-server's own use.
rdar://180736036
Commit: 694c561cf73e81943395e18b2d96621baf68efe5
https://github.com/llvm/llvm-project/commit/694c561cf73e81943395e18b2d96621baf68efe5
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
Log Message:
-----------
[CycleInfo] Store cycles in a flat preorder array. NFC (#209981)
Store cycles by value in one array in cycle-forest preorder, each cycle
immediately followed by its descendants, instead of heap-allocating each
cycle and holding its children in a std::vector<std::unique_ptr<>>.
Child and top-level iteration become pointer arithmetic that skips a
subtree via a new NumDescendants count, and sizeof(GenericCycle) drops
from 72 to 48. GenericCycleInfoCompute builds the forest with temporary
nodes, then flatten() moves it into the array.
GenericCycle still exposes raw pointers into this array. The eventual
goal is to replace them with an opaque handle, so all access goes
through GenericCycleInfo and the storage stays an implementation detail.
Aided by Fable 5
Commit: 16c6374250a465204e067b518577a2b4fd655f93
https://github.com/llvm/llvm-project/commit/16c6374250a465204e067b518577a2b4fd655f93
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/llvm-abi-tests.yml
Log Message:
-----------
workflows/llvm-abi-tests: Fix typo (#209917)
Introduced by 9bd8bbb2b76c55ca83ddb6e0aa8a3a79b65706d4.
Commit: 1339cce21497adde64cf95d1c7396244ad417871
https://github.com/llvm/llvm-project/commit/1339cce21497adde64cf95d1c7396244ad417871
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/llvm-abi-tests.yml
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/CommentLexer.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/OpenCLExtensions.def
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/c11atomics.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/Misc/amdgcn.unsupported_core_3.1.cl
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/SemaOpenCL/extension-version.cl
M cross-project-tests/CMakeLists.txt
A cross-project-tests/dtlto/remote-options.test
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Driver/fakeflang.F
A flang/test/Lower/pre-fir-tree-multiway-branch.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/tools/CMakeLists.txt
M flang/tools/fakeflang/CMakeLists.txt
R flang/tools/fakeflang/ensure_flang_exists.cmake
M flang/tools/fakeflang/fakeflang.cpp
M flang/tools/flang-driver/CMakeLists.txt
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/src/__support/mathvec/CMakeLists.txt
A libc/src/__support/mathvec/acosf.h
A libc/src/__support/mathvec/acoshf.h
A libc/src/__support/mathvec/acospif.h
A libc/src/__support/mathvec/asinf.h
A libc/src/__support/mathvec/asinhf.h
A libc/src/__support/mathvec/asinpif.h
A libc/src/__support/mathvec/atanf.h
A libc/src/__support/mathvec/atanhf.h
A libc/src/__support/mathvec/cbrtf.h
M libc/src/__support/mathvec/common_constants.h
A libc/src/__support/mathvec/cosf.h
A libc/src/__support/mathvec/coshf.h
A libc/src/__support/mathvec/cospif.h
A libc/src/__support/mathvec/erff.h
A libc/src/__support/mathvec/exp10f.h
A libc/src/__support/mathvec/exp10m1f.h
A libc/src/__support/mathvec/exp2f.h
A libc/src/__support/mathvec/exp2m1f.h
M libc/src/__support/mathvec/expf.h
M libc/src/__support/mathvec/expf_utils.h
A libc/src/__support/mathvec/expm1f.h
A libc/src/__support/mathvec/log10f.h
A libc/src/__support/mathvec/log1pf.h
A libc/src/__support/mathvec/log2f.h
A libc/src/__support/mathvec/logf.h
A libc/src/__support/mathvec/rsqrtf.h
A libc/src/__support/mathvec/sinf.h
A libc/src/__support/mathvec/sinhf.h
A libc/src/__support/mathvec/sinpif.h
A libc/src/__support/mathvec/sqrtf.h
A libc/src/__support/mathvec/tanf.h
A libc/src/__support/mathvec/tanhf.h
A libc/src/__support/mathvec/tanpif.h
M libc/src/mathvec/CMakeLists.txt
A libc/src/mathvec/abi_prefix.h
A libc/src/mathvec/acosf.h
A libc/src/mathvec/acoshf.h
A libc/src/mathvec/acospif.h
A libc/src/mathvec/asinf.h
A libc/src/mathvec/asinhf.h
A libc/src/mathvec/asinpif.h
A libc/src/mathvec/atanf.h
A libc/src/mathvec/atanhf.h
A libc/src/mathvec/cbrtf.h
A libc/src/mathvec/cosf.h
A libc/src/mathvec/coshf.h
A libc/src/mathvec/cospif.h
A libc/src/mathvec/erff.h
A libc/src/mathvec/exp10f.h
A libc/src/mathvec/exp10m1f.h
A libc/src/mathvec/exp2f.h
A libc/src/mathvec/exp2m1f.h
M libc/src/mathvec/expf.h
A libc/src/mathvec/expm1f.h
M libc/src/mathvec/generic/CMakeLists.txt
A libc/src/mathvec/generic/acosf.cpp
A libc/src/mathvec/generic/acoshf.cpp
A libc/src/mathvec/generic/acospif.cpp
A libc/src/mathvec/generic/asinf.cpp
A libc/src/mathvec/generic/asinhf.cpp
A libc/src/mathvec/generic/asinpif.cpp
A libc/src/mathvec/generic/atanf.cpp
A libc/src/mathvec/generic/atanhf.cpp
A libc/src/mathvec/generic/cbrtf.cpp
A libc/src/mathvec/generic/cosf.cpp
A libc/src/mathvec/generic/coshf.cpp
A libc/src/mathvec/generic/cospif.cpp
A libc/src/mathvec/generic/erff.cpp
A libc/src/mathvec/generic/exp10f.cpp
A libc/src/mathvec/generic/exp10m1f.cpp
A libc/src/mathvec/generic/exp2f.cpp
A libc/src/mathvec/generic/exp2m1f.cpp
M libc/src/mathvec/generic/expf.cpp
A libc/src/mathvec/generic/expm1f.cpp
A libc/src/mathvec/generic/log10f.cpp
A libc/src/mathvec/generic/log1pf.cpp
A libc/src/mathvec/generic/log2f.cpp
A libc/src/mathvec/generic/logf.cpp
A libc/src/mathvec/generic/rsqrtf.cpp
A libc/src/mathvec/generic/sinf.cpp
A libc/src/mathvec/generic/sinhf.cpp
A libc/src/mathvec/generic/sinpif.cpp
A libc/src/mathvec/generic/sqrtf.cpp
A libc/src/mathvec/generic/tanf.cpp
A libc/src/mathvec/generic/tanhf.cpp
A libc/src/mathvec/generic/tanpif.cpp
A libc/src/mathvec/log10f.h
A libc/src/mathvec/log1pf.h
A libc/src/mathvec/log2f.h
A libc/src/mathvec/logf.h
A libc/src/mathvec/rsqrtf.h
A libc/src/mathvec/sinf.h
A libc/src/mathvec/sinhf.h
A libc/src/mathvec/sinpif.h
A libc/src/mathvec/sqrtf.h
A libc/src/mathvec/tanf.h
A libc/src/mathvec/tanhf.h
A libc/src/mathvec/tanpif.h
M libc/test/src/mathvec/CMakeLists.txt
A libc/test/src/mathvec/UnitTestWrappers.h
A libc/test/src/mathvec/acosf_test.cpp
A libc/test/src/mathvec/acoshf_test.cpp
A libc/test/src/mathvec/acospif_test.cpp
A libc/test/src/mathvec/asinf_test.cpp
A libc/test/src/mathvec/asinhf_test.cpp
A libc/test/src/mathvec/asinpif_test.cpp
A libc/test/src/mathvec/atanf_test.cpp
A libc/test/src/mathvec/atanhf_test.cpp
A libc/test/src/mathvec/cbrtf_test.cpp
A libc/test/src/mathvec/cosf_test.cpp
A libc/test/src/mathvec/coshf_test.cpp
A libc/test/src/mathvec/cospif_test.cpp
A libc/test/src/mathvec/erff_test.cpp
M libc/test/src/mathvec/exhaustive/CMakeLists.txt
A libc/test/src/mathvec/exhaustive/acosf_test.cpp
A libc/test/src/mathvec/exhaustive/acoshf_test.cpp
A libc/test/src/mathvec/exhaustive/acospif_test.cpp
A libc/test/src/mathvec/exhaustive/asinf_test.cpp
A libc/test/src/mathvec/exhaustive/asinhf_test.cpp
A libc/test/src/mathvec/exhaustive/asinpif_test.cpp
A libc/test/src/mathvec/exhaustive/atanf_test.cpp
A libc/test/src/mathvec/exhaustive/atanhf_test.cpp
A libc/test/src/mathvec/exhaustive/cbrtf_test.cpp
A libc/test/src/mathvec/exhaustive/cosf_test.cpp
A libc/test/src/mathvec/exhaustive/coshf_test.cpp
A libc/test/src/mathvec/exhaustive/cospif_test.cpp
A libc/test/src/mathvec/exhaustive/erff_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/test/src/mathvec/exhaustive/exp10f_test.cpp
A libc/test/src/mathvec/exhaustive/exp10m1f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2m1f_test.cpp
M libc/test/src/mathvec/exhaustive/expf_test.cpp
A libc/test/src/mathvec/exhaustive/expm1f_test.cpp
A libc/test/src/mathvec/exhaustive/log10f_test.cpp
A libc/test/src/mathvec/exhaustive/log1pf_test.cpp
A libc/test/src/mathvec/exhaustive/log2f_test.cpp
A libc/test/src/mathvec/exhaustive/logf_test.cpp
A libc/test/src/mathvec/exhaustive/rsqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/sinf_test.cpp
A libc/test/src/mathvec/exhaustive/sinhf_test.cpp
A libc/test/src/mathvec/exhaustive/sinpif_test.cpp
A libc/test/src/mathvec/exhaustive/sqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/tanf_test.cpp
A libc/test/src/mathvec/exhaustive/tanhf_test.cpp
A libc/test/src/mathvec/exhaustive/tanpif_test.cpp
A libc/test/src/mathvec/exp10f_test.cpp
A libc/test/src/mathvec/exp10m1f_test.cpp
A libc/test/src/mathvec/exp2f_test.cpp
A libc/test/src/mathvec/exp2m1f_test.cpp
M libc/test/src/mathvec/expf_test.cpp
A libc/test/src/mathvec/expm1f_test.cpp
A libc/test/src/mathvec/log10f_test.cpp
A libc/test/src/mathvec/log1pf_test.cpp
A libc/test/src/mathvec/log2f_test.cpp
A libc/test/src/mathvec/logf_test.cpp
A libc/test/src/mathvec/rsqrtf_test.cpp
A libc/test/src/mathvec/sinf_test.cpp
A libc/test/src/mathvec/sinhf_test.cpp
A libc/test/src/mathvec/sinpif_test.cpp
A libc/test/src/mathvec/sqrtf_test.cpp
A libc/test/src/mathvec/tanf_test.cpp
A libc/test/src/mathvec/tanhf_test.cpp
A libc/test/src/mathvec/tanpif_test.cpp
M libcxx/include/__algorithm/is_heap_until.h
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
M libcxxabi/src/stdlib_new_delete.cpp
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
A libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
A libsycl/include/sycl/__impl/group.hpp
A libsycl/include/sycl/__impl/memory_enums.hpp
A libsycl/include/sycl/__impl/nd_item.hpp
A libsycl/include/sycl/__impl/nd_range.hpp
M libsycl/include/sycl/__impl/queue.hpp
A libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/detail/queue_impl.cpp
A libsycl/test/basic/group.cpp
A libsycl/test/basic/group_local_id.cpp
A libsycl/test/basic/linear_sub_group.cpp
A libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/sub_group_by_value_semantics.cpp
A libsycl/test/basic/sub_group_common.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
M lldb/source/Target/Target.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/docs/LangRef.md
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm/Analysis/HashRecognize.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/DebugInfo/PDB/Native/LinePrinter.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/PowerPC/PPCSchedule.td
M llvm/lib/Target/PowerPC/PPCSchedule440.td
M llvm/lib/Target/PowerPC/PPCScheduleA2.td
M llvm/lib/Target/PowerPC/PPCScheduleE500.td
M llvm/lib/Target/PowerPC/PPCScheduleE500mc.td
M llvm/lib/Target/PowerPC/PPCScheduleE5500.td
M llvm/lib/Target/PowerPC/PPCScheduleG3.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/AliasSet/memset.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Analysis/KernelInfo/enable-kernel-info/amdgpu.test
M llvm/test/Analysis/KernelInfo/flat-addrspace/amdgpu.test
M llvm/test/Analysis/KernelInfo/launch-bounds/amdgpu.ll
M llvm/test/Analysis/KernelInfo/openmp/README.md
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
M llvm/test/Assembler/atomic.ll
M llvm/test/Assembler/callbr.ll
A llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
A llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-fdiv-inlineasm-operand.mir
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-llvm-debuginfo-analyzer.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/convergent.mir
M llvm/test/CodeGen/AMDGPU/debug-independence-adjustSchedDependency.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-revertScheduling.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-scheduleRegion.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-check-metadata.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics-chain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
M llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
M llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
M llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
M llvm/test/CodeGen/X86/vpdpwssd.ll
M llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
M llvm/test/DebugInfo/AMDGPU/cfi.ll
M llvm/test/DebugInfo/AMDGPU/code-pointer-size.ll
M llvm/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
M llvm/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
M llvm/test/DebugInfo/AMDGPU/heterogeneous-dwarf-cfi-directives.s
M llvm/test/DebugInfo/AMDGPU/pointer-address-space.ll
M llvm/test/DebugInfo/AMDGPU/print-reg-name.s
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/AMDGPU/wqm-wwm-debug-loc.ll
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.json
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
M llvm/test/TableGen/MacroFusion.td
A llvm/test/Transforms/ConstraintElimination/and-negative.ll
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
A llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
A llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
M llvm/test/tools/llvm-reduce/mir/drop-ir-references.mir
M llvm/test/tools/llvm-reduce/mir/generic-vreg.mir
M llvm/test/tools/llvm-reduce/mir/infer-triple.mir
M llvm/test/tools/llvm-reduce/mir/input-file-does-not-exist.mir
M llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
M llvm/test/tools/llvm-reduce/mir/multiple-functions.mir
M llvm/test/tools/llvm-reduce/mir/preserve-block-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-frame-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
M llvm/test/tools/llvm-reduce/mir/preserve-max-call-frame-size.mir
M llvm/test/tools/llvm-reduce/mir/preserve-mem-operands.mir
M llvm/test/tools/llvm-reduce/mir/preserve-reg-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-flags.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses-generic.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses.mir
M llvm/test/tools/llvm-reduce/mir/remove-frame-destroy.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def0.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def1.mir
M llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir
M llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-duplication.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect-callee-md.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-load-balancing.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-no-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/preserve-globals.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/RegisterBankEmitter.cpp
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M offload/liboffload/API/Program.td
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/SessionTest.cpp
M polly/lib/Transform/DeLICM.cpp
A polly/test/DeLICM/outofquota-greedycollapse.ll
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[๐๐ฝ๐ฟ] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Commit: c3f6054d25c730f0721fad4a921dd3c347f93127
https://github.com/llvm/llvm-project/commit/c3f6054d25c730f0721fad4a921dd3c347f93127
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M .github/workflows/llvm-abi-tests.yml
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/CommentLexer.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/OpenCLExtensions.def
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/virtual-bases.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/c11atomics.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/Misc/amdgcn.unsupported_core_3.1.cl
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/SemaOpenCL/extension-version.cl
M cross-project-tests/CMakeLists.txt
A cross-project-tests/dtlto/remote-options.test
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Driver/fakeflang.F
A flang/test/Lower/pre-fir-tree-multiway-branch.f90
M flang/test/Lower/pre-fir-tree02.f90
M flang/tools/CMakeLists.txt
M flang/tools/fakeflang/CMakeLists.txt
R flang/tools/fakeflang/ensure_flang_exists.cmake
M flang/tools/fakeflang/fakeflang.cpp
M flang/tools/flang-driver/CMakeLists.txt
M libc/CMakeLists.txt
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/simd.h
M libc/src/__support/mathvec/CMakeLists.txt
A libc/src/__support/mathvec/acosf.h
A libc/src/__support/mathvec/acoshf.h
A libc/src/__support/mathvec/acospif.h
A libc/src/__support/mathvec/asinf.h
A libc/src/__support/mathvec/asinhf.h
A libc/src/__support/mathvec/asinpif.h
A libc/src/__support/mathvec/atanf.h
A libc/src/__support/mathvec/atanhf.h
A libc/src/__support/mathvec/cbrtf.h
M libc/src/__support/mathvec/common_constants.h
A libc/src/__support/mathvec/cosf.h
A libc/src/__support/mathvec/coshf.h
A libc/src/__support/mathvec/cospif.h
A libc/src/__support/mathvec/erff.h
A libc/src/__support/mathvec/exp10f.h
A libc/src/__support/mathvec/exp10m1f.h
A libc/src/__support/mathvec/exp2f.h
A libc/src/__support/mathvec/exp2m1f.h
M libc/src/__support/mathvec/expf.h
M libc/src/__support/mathvec/expf_utils.h
A libc/src/__support/mathvec/expm1f.h
A libc/src/__support/mathvec/log10f.h
A libc/src/__support/mathvec/log1pf.h
A libc/src/__support/mathvec/log2f.h
A libc/src/__support/mathvec/logf.h
A libc/src/__support/mathvec/rsqrtf.h
A libc/src/__support/mathvec/sinf.h
A libc/src/__support/mathvec/sinhf.h
A libc/src/__support/mathvec/sinpif.h
A libc/src/__support/mathvec/sqrtf.h
A libc/src/__support/mathvec/tanf.h
A libc/src/__support/mathvec/tanhf.h
A libc/src/__support/mathvec/tanpif.h
M libc/src/mathvec/CMakeLists.txt
A libc/src/mathvec/abi_prefix.h
A libc/src/mathvec/acosf.h
A libc/src/mathvec/acoshf.h
A libc/src/mathvec/acospif.h
A libc/src/mathvec/asinf.h
A libc/src/mathvec/asinhf.h
A libc/src/mathvec/asinpif.h
A libc/src/mathvec/atanf.h
A libc/src/mathvec/atanhf.h
A libc/src/mathvec/cbrtf.h
A libc/src/mathvec/cosf.h
A libc/src/mathvec/coshf.h
A libc/src/mathvec/cospif.h
A libc/src/mathvec/erff.h
A libc/src/mathvec/exp10f.h
A libc/src/mathvec/exp10m1f.h
A libc/src/mathvec/exp2f.h
A libc/src/mathvec/exp2m1f.h
M libc/src/mathvec/expf.h
A libc/src/mathvec/expm1f.h
M libc/src/mathvec/generic/CMakeLists.txt
A libc/src/mathvec/generic/acosf.cpp
A libc/src/mathvec/generic/acoshf.cpp
A libc/src/mathvec/generic/acospif.cpp
A libc/src/mathvec/generic/asinf.cpp
A libc/src/mathvec/generic/asinhf.cpp
A libc/src/mathvec/generic/asinpif.cpp
A libc/src/mathvec/generic/atanf.cpp
A libc/src/mathvec/generic/atanhf.cpp
A libc/src/mathvec/generic/cbrtf.cpp
A libc/src/mathvec/generic/cosf.cpp
A libc/src/mathvec/generic/coshf.cpp
A libc/src/mathvec/generic/cospif.cpp
A libc/src/mathvec/generic/erff.cpp
A libc/src/mathvec/generic/exp10f.cpp
A libc/src/mathvec/generic/exp10m1f.cpp
A libc/src/mathvec/generic/exp2f.cpp
A libc/src/mathvec/generic/exp2m1f.cpp
M libc/src/mathvec/generic/expf.cpp
A libc/src/mathvec/generic/expm1f.cpp
A libc/src/mathvec/generic/log10f.cpp
A libc/src/mathvec/generic/log1pf.cpp
A libc/src/mathvec/generic/log2f.cpp
A libc/src/mathvec/generic/logf.cpp
A libc/src/mathvec/generic/rsqrtf.cpp
A libc/src/mathvec/generic/sinf.cpp
A libc/src/mathvec/generic/sinhf.cpp
A libc/src/mathvec/generic/sinpif.cpp
A libc/src/mathvec/generic/sqrtf.cpp
A libc/src/mathvec/generic/tanf.cpp
A libc/src/mathvec/generic/tanhf.cpp
A libc/src/mathvec/generic/tanpif.cpp
A libc/src/mathvec/log10f.h
A libc/src/mathvec/log1pf.h
A libc/src/mathvec/log2f.h
A libc/src/mathvec/logf.h
A libc/src/mathvec/rsqrtf.h
A libc/src/mathvec/sinf.h
A libc/src/mathvec/sinhf.h
A libc/src/mathvec/sinpif.h
A libc/src/mathvec/sqrtf.h
A libc/src/mathvec/tanf.h
A libc/src/mathvec/tanhf.h
A libc/src/mathvec/tanpif.h
M libc/test/src/mathvec/CMakeLists.txt
A libc/test/src/mathvec/UnitTestWrappers.h
A libc/test/src/mathvec/acosf_test.cpp
A libc/test/src/mathvec/acoshf_test.cpp
A libc/test/src/mathvec/acospif_test.cpp
A libc/test/src/mathvec/asinf_test.cpp
A libc/test/src/mathvec/asinhf_test.cpp
A libc/test/src/mathvec/asinpif_test.cpp
A libc/test/src/mathvec/atanf_test.cpp
A libc/test/src/mathvec/atanhf_test.cpp
A libc/test/src/mathvec/cbrtf_test.cpp
A libc/test/src/mathvec/cosf_test.cpp
A libc/test/src/mathvec/coshf_test.cpp
A libc/test/src/mathvec/cospif_test.cpp
A libc/test/src/mathvec/erff_test.cpp
M libc/test/src/mathvec/exhaustive/CMakeLists.txt
A libc/test/src/mathvec/exhaustive/acosf_test.cpp
A libc/test/src/mathvec/exhaustive/acoshf_test.cpp
A libc/test/src/mathvec/exhaustive/acospif_test.cpp
A libc/test/src/mathvec/exhaustive/asinf_test.cpp
A libc/test/src/mathvec/exhaustive/asinhf_test.cpp
A libc/test/src/mathvec/exhaustive/asinpif_test.cpp
A libc/test/src/mathvec/exhaustive/atanf_test.cpp
A libc/test/src/mathvec/exhaustive/atanhf_test.cpp
A libc/test/src/mathvec/exhaustive/cbrtf_test.cpp
A libc/test/src/mathvec/exhaustive/cosf_test.cpp
A libc/test/src/mathvec/exhaustive/coshf_test.cpp
A libc/test/src/mathvec/exhaustive/cospif_test.cpp
A libc/test/src/mathvec/exhaustive/erff_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
A libc/test/src/mathvec/exhaustive/exp10f_test.cpp
A libc/test/src/mathvec/exhaustive/exp10m1f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2f_test.cpp
A libc/test/src/mathvec/exhaustive/exp2m1f_test.cpp
M libc/test/src/mathvec/exhaustive/expf_test.cpp
A libc/test/src/mathvec/exhaustive/expm1f_test.cpp
A libc/test/src/mathvec/exhaustive/log10f_test.cpp
A libc/test/src/mathvec/exhaustive/log1pf_test.cpp
A libc/test/src/mathvec/exhaustive/log2f_test.cpp
A libc/test/src/mathvec/exhaustive/logf_test.cpp
A libc/test/src/mathvec/exhaustive/rsqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/sinf_test.cpp
A libc/test/src/mathvec/exhaustive/sinhf_test.cpp
A libc/test/src/mathvec/exhaustive/sinpif_test.cpp
A libc/test/src/mathvec/exhaustive/sqrtf_test.cpp
A libc/test/src/mathvec/exhaustive/tanf_test.cpp
A libc/test/src/mathvec/exhaustive/tanhf_test.cpp
A libc/test/src/mathvec/exhaustive/tanpif_test.cpp
A libc/test/src/mathvec/exp10f_test.cpp
A libc/test/src/mathvec/exp10m1f_test.cpp
A libc/test/src/mathvec/exp2f_test.cpp
A libc/test/src/mathvec/exp2m1f_test.cpp
M libc/test/src/mathvec/expf_test.cpp
A libc/test/src/mathvec/expm1f_test.cpp
A libc/test/src/mathvec/log10f_test.cpp
A libc/test/src/mathvec/log1pf_test.cpp
A libc/test/src/mathvec/log2f_test.cpp
A libc/test/src/mathvec/logf_test.cpp
A libc/test/src/mathvec/rsqrtf_test.cpp
A libc/test/src/mathvec/sinf_test.cpp
A libc/test/src/mathvec/sinhf_test.cpp
A libc/test/src/mathvec/sinpif_test.cpp
A libc/test/src/mathvec/sqrtf_test.cpp
A libc/test/src/mathvec/tanf_test.cpp
A libc/test/src/mathvec/tanhf_test.cpp
A libc/test/src/mathvec/tanpif_test.cpp
M libcxx/include/__algorithm/is_heap_until.h
M libcxx/src/include/overridable_function.h
M libcxx/src/new.cpp
M libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
M libcxxabi/src/stdlib_new_delete.cpp
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
A libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
A libsycl/include/sycl/__impl/group.hpp
A libsycl/include/sycl/__impl/memory_enums.hpp
A libsycl/include/sycl/__impl/nd_item.hpp
A libsycl/include/sycl/__impl/nd_range.hpp
M libsycl/include/sycl/__impl/queue.hpp
A libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/detail/queue_impl.cpp
A libsycl/test/basic/group.cpp
A libsycl/test/basic/group_local_id.cpp
A libsycl/test/basic/linear_sub_group.cpp
A libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/sub_group_by_value_semantics.cpp
A libsycl/test/basic/sub_group_common.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/queue/sycl_kernel_launch.cpp
M lldb/source/Target/Target.cpp
M lldb/tools/lldb-server/lldb-gdbserver.cpp
M llvm/CMakeLists.txt
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/docs/LangRef.md
M llvm/include/llvm-c/Orc.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/Analysis/HashRecognize.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/DebugInfo/PDB/Native/LinePrinter.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/IR/VerifierAMDGPU.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/PowerPC/PPCSchedule.td
M llvm/lib/Target/PowerPC/PPCSchedule440.td
M llvm/lib/Target/PowerPC/PPCScheduleA2.td
M llvm/lib/Target/PowerPC/PPCScheduleE500.td
M llvm/lib/Target/PowerPC/PPCScheduleE500mc.td
M llvm/lib/Target/PowerPC/PPCScheduleE5500.td
M llvm/lib/Target/PowerPC/PPCScheduleG3.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/AliasSet/memset.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Analysis/KernelInfo/enable-kernel-info/amdgpu.test
M llvm/test/Analysis/KernelInfo/flat-addrspace/amdgpu.test
M llvm/test/Analysis/KernelInfo/launch-bounds/amdgpu.ll
M llvm/test/Analysis/KernelInfo/openmp/README.md
M llvm/test/Analysis/KernelInfo/openmp/amdgpu.ll
M llvm/test/Assembler/atomic.ll
M llvm/test/Assembler/callbr.ll
A llvm/test/Assembler/invalid-load-store-atomic-elementwise.ll
A llvm/test/Bitcode/atomic-load-store-elementwise.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-fdiv-inlineasm-operand.mir
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-llvm-debuginfo-analyzer.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
M llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
M llvm/test/CodeGen/AMDGPU/convergent.mir
M llvm/test/CodeGen/AMDGPU/debug-independence-adjustSchedDependency.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-revertScheduling.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-scheduleRegion.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
M llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
M llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-attributes.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-check-metadata.ll
M llvm/test/CodeGen/AMDGPU/pr155452.ll
M llvm/test/CodeGen/AMDGPU/reduction.ll
M llvm/test/CodeGen/AMDGPU/rename-disconnected-bug.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.gfx950.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
M llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics-chain.ll
M llvm/test/CodeGen/AMDGPU/vgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/MIR/AMDGPU/cfi-pseudos.mir
M llvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
M llvm/test/CodeGen/MIR/AMDGPU/dead-flag-on-use-operand-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/instr-mmra.mir
M llvm/test/CodeGen/MIR/AMDGPU/killed-flag-on-def-parse-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-min-num-agprs.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-expect-id.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-parse.mir
M llvm/test/CodeGen/MIR/AMDGPU/noalias-addrspace-undefine-matadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/parse-cfi-unsigned-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-class-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-invalid-register-name-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-mfi.ll
M llvm/test/CodeGen/MIR/AMDGPU/preload-kernarg-stack-type-error.mir
M llvm/test/CodeGen/MIR/AMDGPU/ptradd-flags.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_alu.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_wait_loadcnt_dscnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt-errors.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt.mir
M llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
M llvm/test/CodeGen/MIR/AMDGPU/subreg-def-is-not-ssa.mir
M llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtreg-uses-unallocatable-class.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
M llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
M llvm/test/CodeGen/X86/bitcnt-load-with-cmov.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
R llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
M llvm/test/CodeGen/X86/vpdpwssd.ll
M llvm/test/DebugInfo/AMDGPU/bitcast-store-combine-debugloc.ll
M llvm/test/DebugInfo/AMDGPU/cfi.ll
M llvm/test/DebugInfo/AMDGPU/code-pointer-size.ll
M llvm/test/DebugInfo/AMDGPU/dbg-value-sched-crash.ll
M llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
M llvm/test/DebugInfo/AMDGPU/dwarfdump-relocs.ll
M llvm/test/DebugInfo/AMDGPU/heterogeneous-dwarf-cfi-directives.s
M llvm/test/DebugInfo/AMDGPU/pointer-address-space.ll
M llvm/test/DebugInfo/AMDGPU/print-reg-name.s
M llvm/test/DebugInfo/AMDGPU/variable-locations.ll
M llvm/test/DebugInfo/AMDGPU/wqm-wwm-debug-loc.ll
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.json
A llvm/test/Instrumentation/Instrumentor/load_store_gpu_ind.ll
M llvm/test/MC/AMDGPU/gfx13_asm_vds.s
M llvm/test/TableGen/MacroFusion.td
A llvm/test/Transforms/ConstraintElimination/and-negative.ll
M llvm/test/Transforms/ConstraintElimination/or-non-negative.ll
A llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction-cost.ll
M llvm/test/Transforms/PhaseOrdering/constraint-eliminiation-interactions.ll
A llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
M llvm/test/tools/llvm-reduce/mir/drop-ir-references.mir
M llvm/test/tools/llvm-reduce/mir/generic-vreg.mir
M llvm/test/tools/llvm-reduce/mir/infer-triple.mir
M llvm/test/tools/llvm-reduce/mir/input-file-does-not-exist.mir
M llvm/test/tools/llvm-reduce/mir/instr-reduce-dead-def.mir
M llvm/test/tools/llvm-reduce/mir/multiple-functions.mir
M llvm/test/tools/llvm-reduce/mir/preserve-block-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-frame-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/test/tools/llvm-reduce/mir/preserve-machine-function-info-amdgpu.mir
M llvm/test/tools/llvm-reduce/mir/preserve-max-call-frame-size.mir
M llvm/test/tools/llvm-reduce/mir/preserve-mem-operands.mir
M llvm/test/tools/llvm-reduce/mir/preserve-reg-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-flags.mir
M llvm/test/tools/llvm-reduce/mir/reduce-instruction-unreachable-block.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-defs.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-hints.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-masks.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses-generic.mir
M llvm/test/tools/llvm-reduce/mir/reduce-register-uses.mir
M llvm/test/tools/llvm-reduce/mir/remove-frame-destroy.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def0.mir
M llvm/test/tools/llvm-reduce/mir/subreg-def1.mir
M llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir
M llvm/test/tools/llvm-reduce/mir/undef-virt-reg.mir
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize-with-call.ll
M llvm/test/tools/llvm-split/AMDGPU/address-taken-externalize.ll
M llvm/test/tools/llvm-split/AMDGPU/declarations.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
M llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-cost-ranking.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-duplication.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-external.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect-callee-md.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-overridable.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables-noexternal.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-global-variables.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-load-balancing.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-no-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging-weak_odr.ll
M llvm/test/tools/llvm-split/AMDGPU/large-kernels-merging.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/non-kernels-dependency-indirect.ll
M llvm/test/tools/llvm-split/AMDGPU/preserve-globals.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-2.ll
M llvm/test/tools/llvm-split/AMDGPU/recursive-search-8.ll
M llvm/unittests/CodeGen/GlobalISel/GISelUtilsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M llvm/utils/TableGen/RegisterBankEmitter.cpp
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Dialect/Tosa/availability.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M offload/liboffload/API/Program.td
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Trace.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M offload/unittests/OffloadAPI/common/Environment.cpp
M offload/unittests/OffloadAPI/common/Environment.hpp
M offload/unittests/OffloadAPI/program/olCreateProgram.cpp
M orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/test/unit/SessionTest.cpp
M polly/lib/Transform/DeLICM.cpp
A polly/test/DeLICM/outofquota-greedycollapse.ll
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
ArrayRef getEntries
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/0fe7f9060f57...c3f6054d25c7
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