[all-commits] [llvm/llvm-project] 89a4b2: [libc] Replace sys/select.h, sys/utsname.h and sys...

Fangrui Song via All-commits all-commits at lists.llvm.org
Thu Jul 16 00:38:59 PDT 2026 

  Branch: refs/heads/users/MaskRay/spr/main.cycleinfo-move-scalar-cycle-accessors-to-genericcycleinfo-nfc
  Home:   https://github.com/llvm/llvm-project
  Commit: 89a4b2f880a7b852cb9b4ff20a1e38a6b3a037a5
      https://github.com/llvm/llvm-project/commit/89a4b2f880a7b852cb9b4ff20a1e38a6b3a037a5
  Author: Pavel Labath <pavel at labath.sk>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M libc/hdr/CMakeLists.txt
    A libc/hdr/sys_select_macros.h
    A libc/hdr/sys_wait_macros.h
    M libc/hdr/types/CMakeLists.txt
    A libc/hdr/types/fd_set.h
    A libc/hdr/types/struct_rusage.h
    A libc/hdr/types/struct_utsname.h
    M libc/src/sys/select/linux/CMakeLists.txt
    M libc/src/sys/select/linux/select.cpp
    M libc/src/sys/select/select.h
    M libc/src/sys/utsname/linux/CMakeLists.txt
    M libc/src/sys/utsname/linux/uname.cpp
    M libc/src/sys/utsname/uname.h
    M libc/src/sys/wait/linux/CMakeLists.txt
    M libc/src/sys/wait/wait4.h
    M libc/src/sys/wait/wait4Impl.h
    M libc/src/unistd/linux/CMakeLists.txt
    M libc/src/unistd/linux/gethostname.cpp

  Log Message:
  -----------
  [libc] Replace sys/select.h, sys/utsname.h and sys/wait.h includes with proxy headers (#209851)

I'm replacing system includes of <sys/select.h>, <sys/utsname.h>, and
<sys/wait.h> in non-test and non-proxy code with granular proxy headers.

- add proxy headers for sys/select.h and sys/wait.h macros as well as
fd_set, struct rusage, and struct utsname types
- switch select, uname, gethostname, and wait4 internal headers and
implementations to include the proxy headers instead of system headers
- update cmake dependencies for the affected entry points

Assisted by Gemini.


  Commit: 5a530a22fae4aaa41da79779cd56db57f8de55f8
      https://github.com/llvm/llvm-project/commit/5a530a22fae4aaa41da79779cd56db57f8de55f8
  Author: Pavel Labath <pavel at labath.sk>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M libc/include/llvm-libc-macros/netinet-in-macros.h
    M libc/test/include/netinet_in_test.cpp

  Log Message:
  -----------
  [libc] Reimplement IN6_IS_ADDR_* macros using statement expressions (#209772)

This patch fixes three issues with the previous implementation:
- the macro argument was being evaluated more than once
- casting to other types (uint32_t in particular) was an aliasing
violation
- it was casting to non-const pointers, resulting in compiler errors in
cases where the user passes a const ptr.

A statement expression fixes the first issue by using a temporary
variable. The second issue is fixed by using the appropriate members of
struct in6_addr. The last issue is fixed by dropping the cast
completely. This requires the user to pass a correctly types pointer (as
POSIX requires). Implementations keep it for compatibility with old code
passing void * and similar, but a quick survey shows that most modern
code passes the correct types. If this turns out to be an issue, we can
easily add the cast (to a const type) back.

Implementation notes:
- IN6_IS_ADDR_MULTICAST doesn't use the statement expression because the
argument is evaluated only once
- I use private helper macros (__IN6_IS_ADDR_UNSPECIFIED and
__IN6_IS_ADDR_LOOPBACK) so IN6_IS_ADDR_V4COMPAT does not nest statement
expressions
- I considered using private entrypoints (like we do with cpuset macros)
instead of statement expressions, but decided against it because these
macros are simpler and would thus result in a higher
boilerplate-to-useful-code ratio (particularly given our restriction on
calling other entrypoints)

Assisted by Gemini.


  Commit: 762941070b1824ba5dc0a6b6a9e8c9dc4b5911e8
      https://github.com/llvm/llvm-project/commit/762941070b1824ba5dc0a6b6a9e8c9dc4b5911e8
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M orc-rt/lib/executor/StandaloneMachOUnwindInfoRegistrar.cpp
    M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
    M orc-rt/lib/executor/Unix/NativeMemoryAPIs.inc
    M orc-rt/lib/executor/sps-ci/MemoryAccessSPSCI.cpp
    M orc-rt/test/unit/AllocActionTest.cpp
    M orc-rt/test/unit/CompilerTest.cpp
    M orc-rt/test/unit/ErrorCAPITest.cpp
    M orc-rt/test/unit/ErrorExceptionInteropTest.cpp
    M orc-rt/test/unit/ErrorTest.cpp
    M orc-rt/test/unit/LockedAccessTest.cpp
    M orc-rt/test/unit/QueueingRunnerTest.cpp
    M orc-rt/test/unit/RTTITest.cpp
    M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
    M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
    M orc-rt/test/unit/WrapperFunctionBufferTest.cpp

  Log Message:
  -----------
  [orc-rt] Close with "// namespace" consistently. NFC. (#209979)


  Commit: ac067a7e1366f1a9fca74b2cb69d6b005c6b732e
      https://github.com/llvm/llvm-project/commit/ac067a7e1366f1a9fca74b2cb69d6b005c6b732e
  Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-bf16.ll

  Log Message:
  -----------
  [AMDGPU] Use v_pk_add_bf16 for scalar bf16 fadd on gfx1250/gfx13 (#209128)

Targets with packed bf16 instructions can do a scalar bf16 fadd with a
single `v_pk_add_bf16` operating on the low half, instead of promoting
to f32 and going through `v_fma_mix_f32_bf16 + v_cvt_pk_bf16_f32`.


  Commit: 76ee189f61dfbe249159ed7e0e772b50b4eb7aeb
      https://github.com/llvm/llvm-project/commit/76ee189f61dfbe249159ed7e0e772b50b4eb7aeb
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/MergeFunctions.h
    M llvm/lib/Transforms/IPO/MergeFunctions.cpp
    R llvm/test/Transforms/MergeFunc/merge-functions-branch-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-reordered-blocks-branch-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-select-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-value-profile.ll
    M llvm/unittests/Transforms/IPO/MergeFunctionsTest.cpp

  Log Message:
  -----------
  Revert "[MergeFunctions] Preserve instruction-level profile metadata during merging" (#209987)

Reverts llvm/llvm-project#208009

Causes unit test failures.


  Commit: 4ffab8581b9f35ed3934762aa9b9baf0fd84084f
      https://github.com/llvm/llvm-project/commit/4ffab8581b9f35ed3934762aa9b9baf0fd84084f
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll

  Log Message:
  -----------
  [Mips] Fix test after #201537 (#209993)


  Commit: ab1c8f643667ce85ec11dcfbdadac13e06291ce2
      https://github.com/llvm/llvm-project/commit/ab1c8f643667ce85ec11dcfbdadac13e06291ce2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M clang/docs/HIPSupport.md

  Log Message:
  -----------
  clang/HIP: Update documentation for class name (#209992)


  Commit: f5dfaa6dc5e85b6fbd4eb9f7eadef3ee010894d8
      https://github.com/llvm/llvm-project/commit/f5dfaa6dc5e85b6fbd4eb9f7eadef3ee010894d8
  Author: Andreas Jonson <andjo403 at hotmail.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
    M llvm/test/Transforms/InstCombine/mul.ll

  Log Message:
  -----------
  [InstCombine] Teach takeLog2 log2(X + 1) IIF X[0,1] -> X (#209741)

proof: https://alive2.llvm.org/ce/z/B7WjCg


  Commit: 29cf2fb0116d6e13f81913440a41f577d11de664
      https://github.com/llvm/llvm-project/commit/29cf2fb0116d6e13f81913440a41f577d11de664
  Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/Rematerializer.h
    M llvm/lib/CodeGen/Rematerializer.cpp
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
    M llvm/unittests/CodeGen/RematerializerTest.cpp

  Log Message:
  -----------
  [CodeGen] Fine-grained LIS updates on remat and dead-def handling (#202673)

This replaces the rematerializer's manual bulk LIS update paradigm in
favor of an automated fine-grained one that

1. performs LIS updates as rematerializations happen and
2. handles the removal of dead-definitions properly (this replaces the
prior partial handling of live interval splitting).

The new approach should be less error-prone (clients do not have to
periodically update the LIS, which is now up-to-date at all times from
the client's perspective) and faster in general (live intervals aren't
fully re-created every time a def or use of a register changes).

Handling dead-definitions (through a `LiveRangeEditor`) adds some
complexity to the rematerializer since unrematerializable MIs can now
also be deleted. This is exposed to listeners through a new event.
Furthermore, rematerializable registers can now become "permanently
dead" if all their users were unrematerializable MIs that became dead as
a result of other rematerializations.

The combination of these two improvements makes handling live-interval
splitting unnecessary. Rematerializable registers have a single-def by
construction so cannot ever have multiple disconnected components. On
the other hand, if we remove dead definitions as they appear,
unrematerializable registers's live interval cannot become made up of
multiple disconnected components purely as a result of
rematerializations. It is the rematerializer's client responsibility to
ensure that the LIS is in a valid state before the rematerializer
analyses the function.


  Commit: 941ed8a66c45b7cb3cadda6de919e429969e95d8
      https://github.com/llvm/llvm-project/commit/941ed8a66c45b7cb3cadda6de919e429969e95d8
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-07-16 (Thu, 16 Jul 2026)

  Changed paths:
    M clang/docs/HIPSupport.md
    M libc/hdr/CMakeLists.txt
    A libc/hdr/sys_select_macros.h
    A libc/hdr/sys_wait_macros.h
    M libc/hdr/types/CMakeLists.txt
    A libc/hdr/types/fd_set.h
    A libc/hdr/types/struct_rusage.h
    A libc/hdr/types/struct_utsname.h
    M libc/include/llvm-libc-macros/netinet-in-macros.h
    M libc/src/sys/select/linux/CMakeLists.txt
    M libc/src/sys/select/linux/select.cpp
    M libc/src/sys/select/select.h
    M libc/src/sys/utsname/linux/CMakeLists.txt
    M libc/src/sys/utsname/linux/uname.cpp
    M libc/src/sys/utsname/uname.h
    M libc/src/sys/wait/linux/CMakeLists.txt
    M libc/src/sys/wait/wait4.h
    M libc/src/sys/wait/wait4Impl.h
    M libc/src/unistd/linux/CMakeLists.txt
    M libc/src/unistd/linux/gethostname.cpp
    M libc/test/include/netinet_in_test.cpp
    M llvm/include/llvm/CodeGen/Rematerializer.h
    M llvm/include/llvm/Transforms/IPO/MergeFunctions.h
    M llvm/lib/CodeGen/Rematerializer.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Transforms/IPO/MergeFunctions.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
    M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
    M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-bf16.ll
    M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
    M llvm/test/Transforms/InstCombine/mul.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-branch-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-reordered-blocks-branch-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-select-weights.ll
    R llvm/test/Transforms/MergeFunc/merge-functions-value-profile.ll
    M llvm/unittests/CodeGen/RematerializerTest.cpp
    M llvm/unittests/Transforms/IPO/MergeFunctionsTest.cpp
    M orc-rt/lib/executor/StandaloneMachOUnwindInfoRegistrar.cpp
    M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
    M orc-rt/lib/executor/Unix/NativeMemoryAPIs.inc
    M orc-rt/lib/executor/sps-ci/MemoryAccessSPSCI.cpp
    M orc-rt/test/unit/AllocActionTest.cpp
    M orc-rt/test/unit/CompilerTest.cpp
    M orc-rt/test/unit/ErrorCAPITest.cpp
    M orc-rt/test/unit/ErrorExceptionInteropTest.cpp
    M orc-rt/test/unit/ErrorTest.cpp
    M orc-rt/test/unit/LockedAccessTest.cpp
    M orc-rt/test/unit/QueueingRunnerTest.cpp
    M orc-rt/test/unit/RTTITest.cpp
    M orc-rt/test/unit/SPSWrapperFunctionTest.cpp
    M orc-rt/test/unit/ThreadPoolRunnerTest.cpp
    M orc-rt/test/unit/WrapperFunctionBufferTest.cpp

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]


Compare: https://github.com/llvm/llvm-project/compare/4348105e1fa1...941ed8a66c45

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