[all-commits] [llvm/llvm-project] 02e7e6: [LoongArch] Fix invalid VEXTH combines for unsuppo...
hev via All-commits
all-commits at lists.llvm.org
Thu Jul 16 00:35:15 PDT 2026
Branch: refs/heads/users/hev/fix-207316
Home: https://github.com/llvm/llvm-project
Commit: 02e7e6f78843b5874d453f52db7502e6db1ce122
https://github.com/llvm/llvm-project/commit/02e7e6f78843b5874d453f52db7502e6db1ce122
Author: WANG Rui <wangrui at loongson.cn>
Date: 2026-07-16 (Thu, 16 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Fix invalid VEXTH combines for unsupported type extensions
`performEXTENDCombine` could form `VEXTH`/`VEXTH_U` nodes for unsupported
type combinations, such as extending `v8i8` to `v8i32` or `v2i64` to `v2i128`.
These illegal nodes would later reach instruction selection and trigger
backend failures:
* `Cannot select: LoongArchISD::VEXTH`
* `Don't know how to legalize this operation`
Prevent these combines from firing by verifying that the destination type
is legal and has exactly twice the total bit width of the source before
forming a `VEXTH`/`VEXTH_U` node.
Apply the same checks to `performSHLCombine` for consistency.
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