[all-commits] [llvm/llvm-project] 50f2b9: [AArch64] Lower fixed width bf16 fpround (#209411)

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 50f2b9443d23eba757c3c0f42eef71e0f9721b15
      https://github.com/llvm/llvm-project/commit/50f2b9443d23eba757c3c0f42eef71e0f9721b15
  Author: David Green <david.green at arm.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-bf16.ll
    R llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc-bf16.ll
    A llvm/test/CodeGen/AArch64/sve-fixed-length-fp-trunc-bf16.ll

  Log Message:
  -----------
  [AArch64] Lower fixed width bf16 fpround (#209411)

Similar to #209194, this was previously hitting an error with an illegal
FP_ROUND_MERGE_PASSTHRU. This time we lower the fptrunc to a scalable
fptrunc and let it legalize naturally. On SVE systems a f64->bf16
fptrunc will fail to legalize, but lowers successfully with sve2 with
fcvtn. A store(fptrunc) -> truncstore combine was disabled too as it
fails with bf16.



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