[all-commits] [llvm/llvm-project] 105261: [X86] fmaddsub-combine.ll + fmsubadd-combine.ll - ...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 105261293d6763055cecf7e37aced21de94eaefc
      https://github.com/llvm/llvm-project/commit/105261293d6763055cecf7e37aced21de94eaefc
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/X86/fmaddsub-combine.ll
    M llvm/test/CodeGen/X86/fmsubadd-combine.ll

  Log Message:
  -----------
  [X86] fmaddsub-combine.ll + fmsubadd-combine.ll - cleanup 512-bit buildvector tests (#209850)

Followup to #207436 - the full buildvector and partial buildvector tests
are covered by PhaseOrdering/X86/fmaddsub.ll which outputs the (still
poor) vectorized shuffle patterns

Ensure the current middle-end IR is tested by the backend, even though
its still not optimal (and divergent between SSE and AVX targets) - I've
kept the buildvector backend patterns for now (and moved the buildvector
fmsubadd patterns to fmsubadd-combine.ll for consistency).

Next step will be to investigate why the middle-end IR result isn't
optimal.

Minor cleanup for #144489



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