[all-commits] [llvm/llvm-project] 7d638b: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Matt Arsenault via All-commits all-commits at lists.llvm.org
Wed Jul 15 08:34:57 PDT 2026 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7d638b4dbcb10c224741cdd4634a768c7bc6d305
      https://github.com/llvm/llvm-project/commit/7d638b4dbcb10c224741cdd4634a768c7bc6d305
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
    M llvm/test/CodeGen/AMDGPU/add_i128.ll
    M llvm/test/CodeGen/AMDGPU/add_i64.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
    M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
    M llvm/test/CodeGen/AMDGPU/allow-check.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
    M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
    M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
    M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
    M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
    M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
    M llvm/test/CodeGen/AMDGPU/call-constant.ll
    M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
    M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
    M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
    M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
    M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
    M llvm/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
    M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
    M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
    M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
    M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
    M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
    M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
    M llvm/test/CodeGen/AMDGPU/commute-compares.ll
    M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
    M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
    M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
    M llvm/test/CodeGen/AMDGPU/cttz-elts.ll
    M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
    M llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
    M llvm/test/CodeGen/AMDGPU/debug-value2.ll
    M llvm/test/CodeGen/AMDGPU/debug_frame.ll
    M llvm/test/CodeGen/AMDGPU/default_amdhsa_code_object_version.ll
    M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
    M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
    M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
    M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
    M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
    M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
    M llvm/test/CodeGen/AMDGPU/extload-align.ll
    M llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
    M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
    M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
    M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
    M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
    M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
    M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
    M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
    M llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
    M llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
    M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
    M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
    M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
    M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
    M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir
    M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
    M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
    M llvm/test/CodeGen/AMDGPU/fold-over-exec.mir
    M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
    M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
    M llvm/test/CodeGen/AMDGPU/fp-to-int-to-fp.ll
    M llvm/test/CodeGen/AMDGPU/frame-lowering-entry-all-sgpr-used.mir
    M llvm/test/CodeGen/AMDGPU/freeze-other-uses-issue-198094.ll
    M llvm/test/CodeGen/AMDGPU/global-alias.ll
    M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-deduced-arg-attr.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1.ll
    M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3.ll
    M llvm/test/CodeGen/AMDGPU/huge-number-operand-folds.mir
    M llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
    M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
    M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
    M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
    M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/invalid-inline-asm-constraint-crash.ll
    M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
    M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
    M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
    M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
    M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (50) (#209776)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on
llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 ->
-mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu
following the default-subtarget pinning. Codegen output is unchanged.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)



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