[all-commits] [llvm/llvm-project] fa3fbd: [LoongArch] Fix invalid VEXTH combines for unsuppo...

[hev via All-commits]

  Branch: refs/heads/users/hev/fix-207316
  Home:   https://github.com/llvm/llvm-project
  Commit: fa3fbd2158f3bbe7d4caa4c115a027dd49f2686e
      https://github.com/llvm/llvm-project/commit/fa3fbd2158f3bbe7d4caa4c115a027dd49f2686e
  Author: WANG Rui <wangrui at loongson.cn>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    A llvm/test/CodeGen/LoongArch/lasx/issue207316.ll
    M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
    M llvm/test/CodeGen/LoongArch/lsx/vexth.ll

  Log Message:
  -----------
  [LoongArch] Fix invalid VEXTH combines for unsupported type extensions

`matchHalfOf128BitLanes` was shared by both shift and extend combines, but it
unconditionally required LSX support, preventing valid LASX-only patterns
from matching. Make the helper check LSX and LASX requirements
independently based on the pattern being recognized.

Additionally, `performEXTENDCombine` could form `VEXTH`/`VEXTH_U` nodes for
unsupported type combinations, such as extending `v8i8` to `v8i32` or
`v2i64` to `v2i128`. These illegal nodes would later reach instruction
selection and trigger backend failures:

* `Cannot select: LoongArchISD::VEXTH`
* `Don't know how to legalize this operation`



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