[all-commits] [llvm/llvm-project] 510038: [RISCV] Fold 26-bit frame-index offsets into Xqcil...

[Garvit Gupta via All-commits]

  Branch: refs/heads/release/23.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 5100381e4719316bb4f00419bb52e260dc32f2e6
      https://github.com/llvm/llvm-project/commit/5100381e4719316bb4f00419bb52e260dc32f2e6
  Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
    M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
    A llvm/test/CodeGen/RISCV/xqcilo-xqcilia-frame-index.ll

  Log Message:
  -----------
  [RISCV] Fold 26-bit frame-index offsets into Xqcilo/Xqcilia load/store/addi (#209315)

Extend frame-index addressing such that the sp-relative offset resolved for a stack access that fits within 26-bit and not 12-bits; folds directly into the wide Xqcilo/Xqcilia instructions. This is achieved by adding the support for the following:

- Adding support for stack accesses to complex pattern `SelectAddrRegImm26` for 26-bit loads and stores
- Adding support for frame index operand to qc.e.addi instruction
- Allowing 26-bit offsets to fold into the loads and store instructions from qcilo/qcilia extension

(cherry picked from commit 79d1db7e00932407c4aa1028632f2c188d14cac8)



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