[all-commits] [llvm/llvm-project] 046acf: [RISCV][P-ext] Add packed saturating rounding shif...

[SiHuaN via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 046acff1018f034e2a5d714c7287b9055148d1c7
      https://github.com/llvm/llvm-project/commit/046acff1018f034e2a5d714c7287b9055148d1c7
  Author: SiHuaN <liyongtai at iscas.ac.cn>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll

  Log Message:
  -----------
  [RISCV][P-ext] Add packed saturating rounding shift codegen (#208630)

Add codegen for `pssha`, `psshar`, `psshl`, and `psshlr` on RV32 and
RV64.



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