[all-commits] [llvm/llvm-project] 2d6692: AMDGPU: Migrate CodeGen tests to amdgpu subarch tr...

Wed Jul 15 00:28:03 PDT 2026

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2d6692d577cfee5af4d96a0759a14b55ee58b6e1
      https://github.com/llvm/llvm-project/commit/2d6692d577cfee5af4d96a0759a14b55ee58b6e1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-07-15 (Wed, 15 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/si-scheduler.ll
    M llvm/test/CodeGen/AMDGPU/si-sgpr-spill.ll
    M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
    M llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
    M llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
    M llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
    M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
    M llvm/test/CodeGen/AMDGPU/si-vector-hang.ll
    M llvm/test/CodeGen/AMDGPU/sibling-call.ll
    M llvm/test/CodeGen/AMDGPU/sign_extend.ll
    M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
    M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/simplify-libcall-nobuiltin-def.ll
    M llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
    M llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll
    M llvm/test/CodeGen/AMDGPU/simulated-trap-pseudo-expand.ll
    M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/sink-after-control-flow-postra.mir
    M llvm/test/CodeGen/AMDGPU/sink-after-control-flow.mir
    M llvm/test/CodeGen/AMDGPU/sink-image-sample.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
    M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
    M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
    M llvm/test/CodeGen/AMDGPU/skip-fold-regsequence.mir
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
    M llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll
    M llvm/test/CodeGen/AMDGPU/smed3.ll
    M llvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
    M llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
    M llvm/test/CodeGen/AMDGPU/smfmac_alloc_failure_no_agpr_O0.ll
    M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.ll
    M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir
    M llvm/test/CodeGen/AMDGPU/smrd-gfx10.ll
    M llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
    M llvm/test/CodeGen/AMDGPU/smrd.ll
    M llvm/test/CodeGen/AMDGPU/smrd_vmem_war.ll
    M llvm/test/CodeGen/AMDGPU/snippet-copy-bundle-regression.mir
    M llvm/test/CodeGen/AMDGPU/soft-clause-dbg-value.mir
    M llvm/test/CodeGen/AMDGPU/soft-clause-exceeds-register-budget.ll
    M llvm/test/CodeGen/AMDGPU/sopk-compares.ll
    M llvm/test/CodeGen/AMDGPU/sopk-no-literal.ll
    M llvm/test/CodeGen/AMDGPU/speculative-execution-freecasts.ll
    M llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
    M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
    M llvm/test/CodeGen/AMDGPU/spill-agpr.mir
    M llvm/test/CodeGen/AMDGPU/spill-alloc-sgpr-init-bug.ll
    M llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
    M llvm/test/CodeGen/AMDGPU/spill-m0.ll
    M llvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
    M llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
    M llvm/test/CodeGen/AMDGPU/spill-regpressure-less.mir
    M llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
    M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
    M llvm/test/CodeGen/AMDGPU/spill-sgpr-stack-no-sgpr.ll
    M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
    M llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
    M llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
    M llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
    M llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/spill-wait.mir
    M llvm/test/CodeGen/AMDGPU/spill-wide-sgpr.ll
    M llvm/test/CodeGen/AMDGPU/spill-writelane-vgprs.ll
    M llvm/test/CodeGen/AMDGPU/spill192.mir
    M llvm/test/CodeGen/AMDGPU/spill224.mir
    M llvm/test/CodeGen/AMDGPU/spill288.mir
    M llvm/test/CodeGen/AMDGPU/spill320.mir
    M llvm/test/CodeGen/AMDGPU/spill352.mir
    M llvm/test/CodeGen/AMDGPU/spill384.mir
    M llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
    M llvm/test/CodeGen/AMDGPU/spillv16.ll
    M llvm/test/CodeGen/AMDGPU/spillv16.mir
    M llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
    M llvm/test/CodeGen/AMDGPU/spillv16Kernel.mir
    M llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
    M llvm/test/CodeGen/AMDGPU/split-liverange-overlapping-copies.mir
    M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
    M llvm/test/CodeGen/AMDGPU/split-smrd.ll
    M llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll
    M llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
    M llvm/test/CodeGen/AMDGPU/splitkit-do-not-undo-subclass-split-with-remat.mir
    M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
    M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
    M llvm/test/CodeGen/AMDGPU/splitkit.mir
    M llvm/test/CodeGen/AMDGPU/sra.ll
    M llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
    M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
    M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll
    M llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll
    M llvm/test/CodeGen/AMDGPU/sreg-xnull-regclass-bitwidth.mir
    M llvm/test/CodeGen/AMDGPU/srem.ll
    M llvm/test/CodeGen/AMDGPU/srem64.ll
    M llvm/test/CodeGen/AMDGPU/srl-bitcast-bv.ll

  Log Message:
  -----------
  AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (33) (#209562)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)

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