[all-commits] [llvm/llvm-project] c311e7: [X86] Break false dependencies on Zen 4 and 5 (#20...

[Iurii Khosoi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c311e7b3d68cb88487c4dbc4029d101e4c19c908
      https://github.com/llvm/llvm-project/commit/c311e7b3d68cb88487c4dbc4029d101e4c19c908
  Author: Iurii Khosoi <aadaa_fgtaa at pm.me>
  Date:   2026-07-14 (Tue, 14 Jul 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86.td
    M llvm/lib/Target/X86/X86InstrInfo.cpp
    M llvm/test/CodeGen/X86/bitcnt-false-dep.ll
    A llvm/test/CodeGen/X86/bls-false-dep.ll
    A llvm/test/CodeGen/X86/compress-false-deps.ll
    A llvm/test/CodeGen/X86/expand-false-deps.ll

  Log Message:
  -----------
  [X86] Break false dependencies on Zen 4 and 5 (#206849) (#207079)

Some variants of Zen 5 microarchitectures have a false dependency on the
output register of tzcnt, blsr, blsi and blsmsk instructions. This PR
splits existing tuning feature for the false dependency of tzcnt/lzcnt
and adds a new tuning feature for bls*. The tzcnt and bls* tunings are
enabled by default for Zen 5.

Furthermore, at least some variants of Zen 4 and 5 microarchitectures
appear to have a false dependency on the output register of zero-masked
compress and expand instructions. Tested on Ryzen 9 9950X, Ryzen 9 7950X
and Ryzen AI 7 350, also apparent in uops.info data from Ryzen 5 7600X
and Ryzen 7 9700X (see #206849). This PR adds a new tuning feature for
the false dependency of compress/expand. The tuning is enabled for Zen 4
and Zen 5.

Fixes #206849



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