[all-commits] [llvm/llvm-project] a8ba0a: [NVPTX] Expand fp/int conversions involving intege...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Mon Jul 13 12:34:39 PDT 2026
Branch: refs/heads/users/ziqingluo/179151541-followup
Home: https://github.com/llvm/llvm-project
Commit: a8ba0ad546660542b7200cd8269574b988c89f86
https://github.com/llvm/llvm-project/commit/a8ba0ad546660542b7200cd8269574b988c89f86
Author: Lukas Stephan <kulst at mailbox.org>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
A llvm/test/CodeGen/NVPTX/convert-fp-i128.ll
Log Message:
-----------
[NVPTX] Expand fp/int conversions involving integers wider than 64 bits (#201679)
NVPTX does not support direct PTX conversion instructions between
floating point types and integer types wider than 64 bits.
Previously, such conversions could reach instruction selection and fail
with an _unsupported library call operation_ error.
Reproducer on godbolt: https://godbolt.org/z/G6Yr9cE1d
This patch sets the maximum supported fp/int conversion width to 64 bits
so larger conversions are expanded before instruction selection.
It also adds a regression test for 128-bit integer/floating-point
conversions.
Related to #191013
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: 5a73020f0261922e1f30cd458f7d0bd757fb9ba1
https://github.com/llvm/llvm-project/commit/5a73020f0261922e1f30cd458f7d0bd757fb9ba1
Author: Mike Kruskal <mkruskal at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
Log Message:
-----------
[compiler-rt] [sanitizer_common] Add a testcase reproducing SIGSEGV in ForEachMappedRegion (#208358)
Likely related to https://github.com/llvm/llvm-project/issues/84482 and
https://github.com/llvm/llvm-project/issues/21068
Assisted-by: Gemini
Commit: 7e89dcfba2dcc4d85f04c05a3fee483b6d2e3150
https://github.com/llvm/llvm-project/commit/7e89dcfba2dcc4d85f04c05a3fee483b6d2e3150
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A offload/test/offloading/fortran/map-zero-size-array.f90
Log Message:
-----------
[Flang][OpenMP] Support mapping of zero-sized arrays (#208133)
Whilst there is no data in theory to map with a zero sized array, the
Fortran OpenMP specification considers the case of a zero sized array
being mapped to device as the data being present on device. This
includes both the data and the descriptor, and it should fundamentlaly
work as a zero-sized array would on device with the respective Fortran
functions for presence and size checking etc.
We can't actually map a nullptr to device and expect it to be present in
current OpenMP (for good reason), however, thankfully, a zero sized
array isn't actually a nullptr, it is a descriptor contianing an
allocated 1-byte of data. So, we can map this to device, alongside the
descriptor and then the zero sized array is correctlly on device for all
intents and purposes. This case is notably different from a
non-allocated or non-zero sized array so we can do this without shooting
ourselves in the foot.
Commit: a9a709f01bfb6204816db9b3bedbe4b627c4bfc3
https://github.com/llvm/llvm-project/commit/a9a709f01bfb6204816db9b3bedbe4b627c4bfc3
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Scope.h
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/Scope.cpp
Log Message:
-----------
[Clang] [NFC] Use ScopeFlags for expansion statement scopes (#208849)
Previously, we were using a separate `bool` member in `Scope` for this
because we ran out of bits in `ScopeFlags`. #198436 recently freed up a
bit for this, so switch to using it instead.
Fixes #207774.
Commit: 1dd5ad4c3342313a7b8804277db9395c5326eb9b
https://github.com/llvm/llvm-project/commit/1dd5ad4c3342313a7b8804277db9395c5326eb9b
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
A clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
M clang/test/CodeGenCXX/msvc-vector-deleting-dtors-sized-delete.cpp
M clang/test/Modules/glob-delete-with-virtual-dtor.cpp
M clang/test/Modules/msvc-vector-deleting-destructors.cpp
M clang/test/PCH/glob-delete-with-virtual-dtor.cpp
M clang/test/PCH/msvc-vector-deleting-destructors.cpp
Log Message:
-----------
[clang][win] MSVC-compat: Use `__global_delete` wrapper in deleting destructors instead of directly referencing `::operator delete` (#188372)
When Clang emits scalar/vector deleting destructors for classes with a
class-level `operator delete`, it generates a conditional dispatch that
can call either the class-level or global `::operator delete`. The
global path directly referenced `::operator delete`, causing `LNK2001`
linker errors in environments where no global `::operator delete`
exists.
MSVC handles this by calling `__global_delete` (and
`__global_array_delete` for vector deletes) - this is a compiler
generated function that is ONLY defined if there is a direct call to
global `::operator delete` for type with non-trivial destructors.
Additionally, it always emits an empty `__empty_global_delete` and uses
`/ALTERNATIVENAME` linker arg to default `__global_delete` (and
`__global_array_delete`) to `__empty_global_delete` if there is NEVER an
delete operator call that would triffer the body to be emitted (thus the
empty function should never be called).
This change aligns Clang's behavior with MSVC when MSVC compatibility
mode and non-LLVM 21 ABI is used, with one difference: the LLVM
generated `__empty_global_delete` traps since it should never be called.
Commit: 1b879464b362c7dc591ac7b5ce4fd78b2353fe30
https://github.com/llvm/llvm-project/commit/1b879464b362c7dc591ac7b5ce4fd78b2353fe30
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
A clang/include/clang/Basic/AtomicLineLogger.h
A clang/lib/Basic/AtomicLineLogger.cpp
M clang/lib/Basic/CMakeLists.txt
A clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
Log Message:
-----------
[clang] Adding an Atomic Line Logger (#205395)
This PR adds an atomic line logger to `clang`.
Situations have arisen where `clang` performs multi-threaded tasks (such
as dependency scanning), and race conditions may happen. Such race
conditions are difficult to debug using either `lldb` or with
`llvm::errs()`.
This logger provides atomic logging per line to a file on disk with time
stamps at each line to facilitate such investigations. Specifically, the
logger is designed with the following properties:
1. Each line is atomically written to the backing file. This avoids
concurrent writes making the output text interleaving.
2. Each line is prefixed with a timestamp, a process ID and a thread ID.
3. `LogLine` implements a `<<` operator to allow arbitrary printable
types to be piped into it.
4. The `LogLine`'s user does not need to check if it is setup or valid.
A LogLine is always valid and can always accept input from `<<`. It
becomes a no-op if the `LogLine` object is returned from a default
constructed `AtomicLineLogger`.
5. The write happens when a `LogLine` object goes out of scope.
The logger is inspired by the
[OnDiskCASLogger](https://github.com/llvm/llvm-project/blob/09abee845d2136630fc3f50524148daa55a740a8/llvm/include/llvm/CAS/OnDiskCASLogger.h#L33).
A followup PR https://github.com/llvm/llvm-project/pull/195896 wires up
this logger to clang's dependency scanning stack.
Assisted-by: claude-opus-4.6
rdar://39907408
Commit: b5a7d1e675f222f7e6a3d3e6536e2214c415e1b6
https://github.com/llvm/llvm-project/commit/b5a7d1e675f222f7e6a3d3e6536e2214c415e1b6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Log Message:
-----------
[lldb] Fix SymbolFilePDBTests build for StringRef FileSpec getters (#208857)
f9b5264523b1 changed FileSpec::GetDirectory() to return llvm::StringRef
instead of ConstString. ConstString had an operator bool, so the guard
```
if (left.GetDirectory() && right.GetDirectory())
```
compiled. StringRef has neither a bool conversion nor operator&&, so the
test no longer builds. Check for a non-empty directory instead, which
preserves the original "if BOTH have a directory" intent.
Commit: 18f8a356957608d8b6c4318698af53aa4f27a36f
https://github.com/llvm/llvm-project/commit/18f8a356957608d8b6c4318698af53aa4f27a36f
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Utility/Policy.h
M lldb/source/Utility/Policy.cpp
Log Message:
-----------
[lldb] Make PolicyStack::Get() out-of-line (#208815)
LLDB builds with hidden visibility by default, so a function-local
static in an inline function is not shared across shared library
boundaries: each dylib that includes this header and calls an inline
Get() gets its own private copy of the thread_local stack, silently
splitting one logical per-thread stack into several. Declaring it
out-of-line ensures every dylib resolves to the single instance defined
in Policy.cpp.
Nothing currently pushes a policy from outside liblldb, so this has no
observable effect yet, but any future capability that needs to be set in
one shared library and read in another depends on this.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a35565161078268c253df85369b3878ca33c726b
https://github.com/llvm/llvm-project/commit/a35565161078268c253df85369b3878ca33c726b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/functionalities/statusline/statusline_flood.py
Log Message:
-----------
[lldb] Serialize scripted-command output with the statusline (#208609)
A Python command's print() writes to sys.stdout, which the interpreter
session pointed at the debugger's raw terminal descriptor via
PyFile_FromFd. Those writes bypass the debugger's output lock, so they
can race with the statusline, resulting in truncated output. Back the
session's terminal stdout and stderr with a pipe instead. A reader
thread drains the pipe and writes to the terminal through
Debugger::PrintAsync, which takes the same output lock as the
statusline.
Only redirect when a statusline could actually be drawing: the pipe and
reader thread are set up only when StatuslineSupported() holds
(show-statusline is enabled and the output is an escape-code-capable
terminal) and the target is the debugger's own terminal. The interactive
interpreter opts out entirely, since input()'s readline line editing and
echo need both sys.stdin and sys.stdout to be the real terminal.
Python still gets a real line-buffered text file over the pipe, so
output stays live and file objects passed to SB APIs
(SetImmediateOutputFile, subprocess, fileno) keep working. On session
teardown the wrappers are flushed before the pipe is closed so a
retained sys.stdout does not strand a trailing line or write into a
closed descriptor.
rdar://181841574
Commit: 8e955ee22fbd1bd41e8adb9a0c333113824f1dfe
https://github.com/llvm/llvm-project/commit/8e955ee22fbd1bd41e8adb9a0c333113824f1dfe
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M lldb/include/lldb/DataFormatters/TypeCategoryMap.h
M lldb/source/DataFormatters/TypeCategoryMap.cpp
Log Message:
-----------
[lldb] TypeCategoryMap: Replace ConstString with StringRef (#208117)
I plan on removing ConstStrings from DataFormatters where possible.
There's a lot of entangled classes in DataFormatters but TypeCategoryMap
feels approachable to start with.
Commit: ea2148117950cbc0236ff3416fffa58a44f58fb1
https://github.com/llvm/llvm-project/commit/ea2148117950cbc0236ff3416fffa58a44f58fb1
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaExpand.cpp
Log Message:
-----------
[Clang] Fix APSInt width of template argument in FinishCXXExpansionStmt() (#208859)
After merging #169680, we started getting assertions in
IntegerLiteral::Create() on some ARM systems:
```
Assertion `V.getBitWidth() == C.getIntWidth(type) &&
"Integer type is not the correct size for constant."'
```
The expansion statements patch doesn't ever create an IntegerLiteral
directly, but there is one place where we create a TemplateArgument of
type 'ptrdiff_t', but we unconditionally set the bit width of its APSInt
to 64 bits.
Presumably, the assertion is due to 'ptrdiff_t' not being a 64-bit type
on these systems, so make sure that we query its bit width and use that
as the width of the APSInt.
I don't have a way of verifying if this patch fixes the CI issue since
pre-commit CI doesn't run on the affected system and I don't have an ARM
machine, but I'm merging this anyway since this issue is breaking CI and
querying the width of 'ptrdiff_t' is something we should be doing here regardless.
Commit: 20e952ec610f0ff99fe67dd69f1eac86b6132bda
https://github.com/llvm/llvm-project/commit/20e952ec610f0ff99fe67dd69f1eac86b6132bda
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/include/clang/Basic/OpenCLOptions.h
M clang/lib/Sema/SemaOpenCL.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/storageclass.cl
M clang/test/SemaOpenCL/unsupported-image.cl
Log Message:
-----------
[OpenCL] Fix extensions checks for 3.1 (#208370)
These extension checks apply to 3.1 as well.
This fix kernel build fails when OpenCL 3.1 is enabled in
https://github.com/intel/opencl-clang/pull/752
Assisted-by: Claude
Commit: 43ef833f39af617eea9850a1818d74ac376296ae
https://github.com/llvm/llvm-project/commit/43ef833f39af617eea9850a1818d74ac376296ae
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/compiler_rt_scalbn_test.c
M compiler-rt/test/builtins/Unit/compiler_rt_scalbnf_test.c
M compiler-rt/test/lit.common.cfg.py
Log Message:
-----------
[Darwin] Mark scalbn tests unsupported on macOS 26.4 (#208858)
Commit: a1feacb3e4fdf447ca15052cf4124d06691bf56a
https://github.com/llvm/llvm-project/commit/a1feacb3e4fdf447ca15052cf4124d06691bf56a
Author: Jade Abraham <jademabraham17 at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
Add build option CLANG_INCLUDE_EXAMPLES (#187317)
Adds a new build option for clang, CLANG_INCLUDE_EXAMPLES, which
controls if the examples directory is included in the build. It defaults
to the value for LLVM_INCLUDE_EXAMPLES (same as CLANG_INCLUDE_DOCS and
CLANG_INCLUDE_TESTS)
Signed-off-by: Jade Abraham <jademabraham17 at gmail.com>
Commit: 7d38440aecf6c131f3c8887afea759b102ae2704
https://github.com/llvm/llvm-project/commit/7d38440aecf6c131f3c8887afea759b102ae2704
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[libc++] Replace the of use custom sections for detecting overriden functions (#208330)
This is a follow up to #133876 and an alternative to #120805 which
doesn't rely on aliases and works across both ELF and Mach-O. This
mechanism is preferable in baremetal environments since it doesn't
require special handling of the custom sections.
Commit: a83ec0fb845e04b1b579decc4cc8f56245267c16
https://github.com/llvm/llvm-project/commit/a83ec0fb845e04b1b579decc4cc8f56245267c16
Author: Congzhe Cao <congzhe.cao at huawei.com>
Date: 2026-07-10 (Fri, 10 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/CloneFunction.cpp
Log Message:
-----------
[Utils] Improve documentation for `cloneLoopWithPreheader()` (#208817)
Fixed #191471.
The client needs to further update the CFG and DominatorTree after
calling `cloneLoopWithPreheader()` to ensure the IR remains valid,
the function itself does not automatically update the control flow fully.
Clarified and improved the comments for the function.
Commit: 184d97baded92622778a701b66e7f148903f3525
https://github.com/llvm/llvm-project/commit/184d97baded92622778a701b66e7f148903f3525
Author: Sirraide <aeternalmail at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[Clang] [Docs] Add release note for expansion statements (#208878)
This was supposed to be part of the original patch, but we lost it
because I didn't pay enough attention when I was merging the release
notes after the migration from RST -> MD (I deleted the RST file but
forgot to move the release note to the MD file...)
Commit: 1a8a53f30e386b0b136e833bfd7fb83839035f37
https://github.com/llvm/llvm-project/commit/1a8a53f30e386b0b136e833bfd7fb83839035f37
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M orc-rt/lib/executor/Logging.cpp
M orc-rt/test/unit/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Hold log level names as uppercase (#208880)
orc_rt_log_Level_getName is used primarily in text prefixes (e.g. the
upcoming printf backend's "[orc-rt:General:LEVEL]"), where uppercase is
the intended rendering. Storing the names as uppercase lets the backend
use them directly without case conversion. orc_rt_log_Level_parse
performs a case-insensitive parse, so ORC_RT_LOG=info and similar still
work.
[orc-rt] Hold log level names as uppercase.
orc_rt_log_Level_getName is expected to be primarily used in
text-prefixes (e.g. in the upcoming printf backend), where it should be
printed as uppercase. Storing as uppercase in the first place will save
us a toupper conversion on each log call.
Commit: 4d5856669efa7a1271d2f5201bb3ebf32420ffde
https://github.com/llvm/llvm-project/commit/4d5856669efa7a1271d2f5201bb3ebf32420ffde
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Log Message:
-----------
[GlobalISel][AArch64] Improve legalization of shift amounts (#208676)
Fixes crashes when the shift amount type is already between s32 and s64,
but not s32 or s64.
The shift amount should have the same type with the shifted value for
the shift instructions, so add the same `widenScalarToNextPow2`
legalization that we apply to the shifted value, to the shift amount.
Fixes crashes in programs like:
define i8 @test(i48 %a) {
entry:
%b = lshr i48 %a, 15
%c = trunc i48 %b to i8
ret i8 %c
}
The new test crashes before this PR.
Commit: 0730f680b6ac237ee1c81b2c55a741ba7065ee97
https://github.com/llvm/llvm-project/commit/0730f680b6ac237ee1c81b2c55a741ba7065ee97
Author: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto-parameters.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-lambdas.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
Log Message:
-----------
[clang-tidy] make `misc-const-correctness` work with `auto` variables and lambdas (#157319)
Fixes #60789.
Currently, the check will never make `auto` variables `const`. Here's
the relevant bit of code:
https://github.com/llvm/llvm-project/blob/6b200e21adec0e28407def6fcb2e6c7359fd881b/clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp#L108-L110
Notice how the matcher's name is `AutoTemplateType`, but it has nothing
to do with templates. What it *was* intended to do, I'm not sure, but
excluding all `auto` variables can't be right.
For lambdas, this is the only justification I can find:
https://github.com/llvm/llvm-project/blob/36627e1724504d783dc1cbc466666516d28260e4/clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp#L30-L34
Which doesn't convince me.
Looking at the test changes, I believe there's only one new false
positive, and that one seems to be a symptom of an existing problem that
was only being masked by `auto`, but we can absolutely discuss whether
the now-diagnosed cases are correct.
---------
Co-authored-by: Victor Baranov <bar.victor.2002 at gmail.com>
Commit: b2f93b13fea00ea6550b7154a16548f8fe952b63
https://github.com/llvm/llvm-project/commit/b2f93b13fea00ea6550b7154a16548f8fe952b63
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M offload/test/offloading/fortran/declare-target-common-block-main.f90
Log Message:
-----------
[OpenMP][Offload] Fix flang offload test (#208829)
This PR attempts to address the remaining flang offload test failure
after https://github.com/llvm/llvm-project/pull/208617. Bot:
https://lab.llvm.org/buildbot/#/builders/67/builds/8412
The problem with is test is that `foo__l8` kernel was not linked into
device image without explicitly use the amdgpu-amd-amdhsa triple in the
compilation. It only happened to this specific test.
Local test results after fix:
```
Testing Time: 146.44s
Total Discovered Tests: 3478
Skipped : 77 (2.21%)
Unsupported : 341 (9.80%)
Passed : 3055 (87.84%)
Expectedly Failed: 5 (0.14%)
```
Commit: e2223e665eccd0580c3f1c9d4d31b2262a8ca823
https://github.com/llvm/llvm-project/commit/e2223e665eccd0580c3f1c9d4d31b2262a8ca823
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
M llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
Log Message:
-----------
[AArch64][GlobalISel] Fold G_SHUFFLE to single-element TBL with zero elements. (#200938)
A TBL with out-of-range values will place zero into the respective
vector lane. Use this to generate a more efficient 1 operand TBL where
possible.
Commit: ced9fa35844724063b20d4b0d67a7960247c8067
https://github.com/llvm/llvm-project/commit/ced9fa35844724063b20d4b0d67a7960247c8067
Author: wanglei <wanglei at loongson.cn>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/test/Interpreter/emulated-tls.cpp
Log Message:
-----------
[clang][test] Fix emulated-tls.cpp failure on LoongArch (#208886)
The LoongArch backend does not support emulated TLS, so
mark the test as unsupported to fix the LoongArch buildbot
failure.
Failure: https://lab.llvm.org/staging/#/builders/20/builds/28875
Commit: 290279b6b69138f4162cace4865713efa12ec262
https://github.com/llvm/llvm-project/commit/290279b6b69138f4162cace4865713efa12ec262
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/test/CodeGen/ARM/elf-preemption.ll
M llvm/test/CodeGen/ARM/weak-hidden-pic.ll
Log Message:
-----------
[ARM] Use .reloc for weak symbols in PIC mode instead of GOT indirection (#208372)
In ARM ELF PIC mode, weak symbols referenced via the constant pool use a
PC-relative expression like `.long sym-(.LPC+8)`. The assembler eagerly
resolves this when both the symbol and reference are in the same
section, which prevents the linker from overriding a weak definition
with a strong one from another object file.
The previous approach (#198577) forced weak symbols to go through GOT
indirection to avoid this, but that adds an extra load. This patch
instead emits a `.reloc` directive alongside the local PC-relative
expression, forcing the assembler to emit a proper `R_ARM_REL32`
relocation. This lets the linker perform the override without the
runtime cost of a GOT load.
Commit: 72af746a3e19627fc1d1c40bf6eabb2887850ac5
https://github.com/llvm/llvm-project/commit/72af746a3e19627fc1d1c40bf6eabb2887850ac5
Author: Osama Abdelkader <osama.abdelkader at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/static-data-member.cpp
Log Message:
-----------
Reject auto combined with type specifiers in C++ (#208552)
Follow-up of https://github.com/llvm/llvm-project/pull/166004
- Diagnose C++ declarations that combine `auto` with another type
specifier, such as `auto int` .
- Preserve C/C23 handling where `auto` can still be interpreted as a
storage-class specifier in valid combinations.
- Fix parser disambiguation so `auto Use = 0` treats `Use` as the
declarator name before type lookup, avoiding ambiguous lookup
regressions.
---------
Signed-off-by: Osama Abdelkader <osama.abdelkader at gmail.com>
Commit: cce2b5acd7b0307c7985d58e7348a3e06b928eb4
https://github.com/llvm/llvm-project/commit/cce2b5acd7b0307c7985d58e7348a3e06b928eb4
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
Log Message:
-----------
[clang-tidy] Support parentheses around subscript operators in readability-redundant-parentheses (#208759)
Subscript operators have the same operator procedure as function calls.
Treat overloaded `()` as built-in operators as a drive-by. I missed this
case when reviewing #192254.
Commit: d5ff29d5b4b9cd7ba446d1cff138a8e626ec27d0
https://github.com/llvm/llvm-project/commit/d5ff29d5b4b9cd7ba446d1cff138a8e626ec27d0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/aa-as-infer.ll
M llvm/test/CodeGen/AMDGPU/aa-points-to-constant-memory.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/abs_i32.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/add-debug.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir
M llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
M llvm/test/CodeGen/AMDGPU/addsub64_carry.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx908.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-attributor-accesslist-offsetbins-out-of-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-branch-weight-metadata.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis-heuristics.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-mul24.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (5) (#208834)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: a9987b7049c11e2f5694a4ab69ffcfc785080758
https://github.com/llvm/llvm-project/commit/a9987b7049c11e2f5694a4ab69ffcfc785080758
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-export-kernel-runtime-handles.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare-crash-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-max-num-workgroups-load-annotate.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-num-agpr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-shader-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-demanded-bits-for-target-node.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-copysign.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-exp2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fabs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-floor.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fma.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmax.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-fmin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-image-function-signatures.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp-splat.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ldexp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-mad.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rint.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-round.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.nobuiltin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.sin.cos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.nobuiltins.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.weak.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acosh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-acospi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asinh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-asinpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atanh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-atanpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cbrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cos.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cosh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-cospi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-erf.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-erfc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-expm1.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log10.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log2.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-rsqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sin.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sinh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sinpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-sqrt.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tanh.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tanpi.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tgamma.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-unexpected-types.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-snop-padding.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-none.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (6) (#208835)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 4f94d25bc15865037cf5fd7c228012f8204d3eda
https://github.com/llvm/llvm-project/commit/4f94d25bc15865037cf5fd7c228012f8204d3eda
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-alloca-placement.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-none.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-wwm-single-lane.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-unroll-threshold.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-elf.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp-on.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal.ll
M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
M llvm/test/CodeGen/AMDGPU/annotate-noclobber.ll
M llvm/test/CodeGen/AMDGPU/anonymous-gv.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i32.ll
M llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce_flags.ll
M llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-merge-empty-other.mir
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (7) (#208836)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: d90e6c8674724dedb21bc20e2b47c378a471275b
https://github.com/llvm/llvm-project/commit/d90e6c8674724dedb21bc20e2b47c378a471275b
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/StackColoring.cpp
A llvm/test/CodeGen/RISCV/stack-coloring-large-stack.ll
Log Message:
-----------
[StackColoring] Change TotalStackSize from unsigned to int64_t (#208671)
StackColoring tracks the total size of the stack as `unsigned int`. This
will wrap around, even on 64-bit systems, if the stack is greater than
that resulting in a wrong size. This can happen on both PPC and RISCV64.
Commit: 4125b6fce8bab893145b265f112d9c9fb2ea609b
https://github.com/llvm/llvm-project/commit/4125b6fce8bab893145b265f112d9c9fb2ea609b
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
Log Message:
-----------
[GlobalISel] Improve bf16 converts with fast-math flags. (#200741)
This alters the lowering of bf16 G_TRUNC to exclude the check for nan if
the operation being extended is nnan. Flags are then threaded through so
that the G_FPEXT and G_FPTRUNC from promoted nodes keep the same FMF.
Commit: a54fc1f407d4d05a51688638230e54761831d31a
https://github.com/llvm/llvm-project/commit/a54fc1f407d4d05a51688638230e54761831d31a
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Extend handling to bf16 vecreduce. (#208684)
This alters the extension of f16 vecreduce to bf16, allowing us to
handle the non-strict fadd and fmul reductions, along with fmin and fmax
variants.
Commit: 79ebcadfd492bb22c2c96e651146bd10b6bd8ae9
https://github.com/llvm/llvm-project/commit/79ebcadfd492bb22c2c96e651146bd10b6bd8ae9
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
A clang/test/Analysis/block-in-critical-section-raii.cpp
Log Message:
-----------
[analyzer] Prevent inlining RAII ctors/dtors (#208729)
BlockInCriticalSectionChecker registers the pre-call for the RAII ctors
and Dtors - and also the raw 'lock' and 'unlock' handlers.
However, pre-call does not prevent inlining. This means that (in the
likely case of) that the body is present, the analyzer will model the
effect of the lock twice. This happens on libc++ unique_lock.
We really should have eval-called the ctor/dtor to avoid the inlining of
those, but here we are.
rdar://175814310
Commit: e490b437555b1f5fce7636d383fc2d7f22097577
https://github.com/llvm/llvm-project/commit/e490b437555b1f5fce7636d383fc2d7f22097577
Author: Luan Rabelo <96793857+Lu4nScr1pt1ng at users.noreply.github.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
A clang/test/Analysis/html_diagnostics/variable-popups-eol.c
Log Message:
-----------
[analyzer] Fix invalid HTML nesting for popups at end of line (#207793)
The static analyzer's HTML reports contain misnested tags whenever a
variable with a `variable_popup` is the last token on a source line.
`AddLineNumber` inserts the row-closing `</td></tr>` with `InsertTextBefore`, which
places it in front of text previously inserted at the same offset. As a result,
the popup's closing `</table></span>` tags and the arrow anchor `</span>`
tags end up outside the table row. HTML parsers (jsoup, pup) and validators
reject the file from that point on.
Before:
<span class='variable'>b</td></tr><table
class='variable_popup'>...</table></span></span></span>
<img width="786" height="414" alt="image"
src="https://github.com/user-attachments/assets/023461ad-73e4-424e-a4fb-42faf7a945f0"
/>
After:
<span class='variable'>b<table
class='variable_popup'>...</table></span></span></span></td></tr>
<img width="877" height="477" alt="image"
src="https://github.com/user-attachments/assets/cf8aada4-21c8-4af7-9e07-c2d8cc1d0724"
/>
The fix inserts `</td></tr>` with `InsertTextAfter` so tags closing at
the end-of-line offset stay inside the row. To keep the message bubbles
outside the code rows, the line number table is now added before the path pieces
are processed, and bubbles are inserted after the newline, between the
current and the next row.
The pre-existing tests only exercised popups on variables followed by
more tokens (`if (b)`), which is why this was never caught; the new test
places the variable at the end of the line. This has been broken since at least
clang 10; the earlier fix (D73993 / commit 482e236e569e)
only covered the macro popup variant.
I verified this with the Analysis/html_diagnostics tests, the full
clang/test/Analysis suite, and by running generated reports through an
HTML parser that checks tag nesting: 4 errors before / 0 after on the
reproducer above, and 8 → 0 on a larger file with macro popups, multiple
events per line, and mid-line popups. The visible report content is
unchanged.
Fixes #46089
Commit: 847fe431d082fe134ea88031ca3705792fb1bb61
https://github.com/llvm/llvm-project/commit/847fe431d082fe134ea88031ca3705792fb1bb61
Author: Jerry Dang <kuroyukiasuna at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll
Log Message:
-----------
[AArch64] Fix miscompilation due to integer overflow in immediate offset for stack store/load instructions with preserve_all (#207026)
Fix AArch64 framelowering bug exposed by a preserve_all function that
spills 30+ callee-saved registers: paired stp/ldp offsets overflows the
signed 7-bit immediate, fixed by spilling those registers as single
str/ldr instead.
AI Usage Disclosure
AI was used to help the:
- investigation process
- suggestion of solution
- suggestion of comment wordings
Fixes #204564
Commit: 9d5d8834793da9efe297620db3ef39633688f830
https://github.com/llvm/llvm-project/commit/9d5d8834793da9efe297620db3ef39633688f830
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
Log Message:
-----------
[AggressiveInstCombine] Fix crash when folding consecutive loads into a type smaller than the combined load (#207229)
Commit: a11e844f4e3302d47c7934e4817f14639e510aad
https://github.com/llvm/llvm-project/commit/a11e844f4e3302d47c7934e4817f14639e510aad
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
Log Message:
-----------
[clang][LifetimeSafety] Short-circuit joins of identical immutable containers (#208908)
Commit: 31ddc7e564814a42af39f0e71371469d0b1fca24
https://github.com/llvm/llvm-project/commit/31ddc7e564814a42af39f0e71371469d0b1fca24
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M mlir/lib/Analysis/Presburger/Matrix.cpp
Log Message:
-----------
[mlir][presburger] Avoid redundant zero-initialization in insertColumns (#199911)
When insertColumns does not trigger a physical reallocation, the inner
loop needlessly loops up to nReservedColumns - 1. This causes massive
redundant zero-writes on trailing columns that are already zero. This
patch truncates the inner loop start boundary to nColumns - 1, when the
reserved capacity is unchanged, optimizing the non-realloc path from
O(nRows * nReservedColumns) to O(nRows * nColumns).
Commit: 670e0a0c147aeade297b3235f5ade3786abd7d4c
https://github.com/llvm/llvm-project/commit/670e0a0c147aeade297b3235f5ade3786abd7d4c
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/strictfp-builtins.c
M clang/test/CodeGen/X86/strictfp_builtins.c
M clang/test/CodeGen/builtin_float.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/strictfp_builtins.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
M clang/test/Headers/openmp_device_math_isnan.cpp
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/IR/Intrinsics.cpp
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
A llvm/test/Assembler/print-formatted.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/Instrumentation/MemorySanitizer/is-fpclass.ll
M llvm/test/Transforms/Attributor/nofpclass-select.ll
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/fpclass-test.ll
M llvm/test/Transforms/CodeGenPrepare/RISCV/fpclass-test.ll
M llvm/test/Transforms/CodeGenPrepare/X86/fpclass-test.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
M llvm/test/Transforms/InstCombine/fabs.ll
M llvm/test/Transforms/InstCombine/fadd.ll
M llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
M llvm/test/Transforms/InstCombine/fpclass-from-dom-cond.ll
M llvm/test/Transforms/InstCombine/freeze-fp-ops.ll
M llvm/test/Transforms/InstCombine/freeze-phi.ll
M llvm/test/Transforms/InstCombine/is_fpclass.ll
M llvm/test/Transforms/InstCombine/pr80941.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
M llvm/test/Transforms/InstSimplify/canonicalize.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/SLPVectorizer/is_fpclass.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
M llvm/test/Transforms/SpeculativeExecution/spec-calls.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/tools/llubi/intr_fp_is_fpclass.ll
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
Log Message:
-----------
[IR] Use pretty printing for mask in is_fpclass (#207653)
The second argument of `llvm.is_fpclass` is a mask, where each bit
represents a floating-point class. Understanding the check that the call
makes in an IR dump requires additional effort. To simplify the
interpretation of IR dumps, a previously implemented pretty-printing
mechanism can be used:
https://github.com/llvm/llvm-project/commit/39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3.
This commit implements this mechanism for printing the arguments of
`llvm.is_fpclass`.
This change also fixes the printing of argument names: if an argument
name is absent, it is simply not printed.
Commit: 419cce0bb5e5fea52f701a20124f88ea1eee3e29
https://github.com/llvm/llvm-project/commit/419cce0bb5e5fea52f701a20124f88ea1eee3e29
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
Log Message:
-----------
[libcxx][NFC] Move release notes for MSVC's implementation of exception_ptr (#208883)
These were accidentally placed in LLVM 22 rather than 23 file.
Commit: 6e01e7334d7b9f8696f5b883b433d56e7a8b2851
https://github.com/llvm/llvm-project/commit/6e01e7334d7b9f8696f5b883b433d56e7a8b2851
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libcxx] Bump runner set (#208929)
This pulls in 6d3cf7f436a01f4622fb660e413a4020209777b8, and
8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c.
Commit: 09796808802f99c30a23bc0f2cd68243764e84ab
https://github.com/llvm/llvm-project/commit/09796808802f99c30a23bc0f2cd68243764e84ab
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove dead member functions (NFC) (#208936)
Remove member functions with no remaining callers anywhere in the tree:
- VPExpressionRecipe::getOperandOfResultType
- VPBlockBase::getSingleHierarchicalSuccessor
- VPIRFlags::hasNonNegFlag
- VPWidenIntOrFpInductionRecipe::getStartValue, which is an exact
duplicate of the inherited VPWidenInductionRecipe::getStartValue.
Commit: 030fdcef27fe29b5e2c1ef0c6c9df6050b51569a
https://github.com/llvm/llvm-project/commit/030fdcef27fe29b5e2c1ef0c6c9df6050b51569a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC). (#203386)
VPRecipeBase::dump() constructs a fresh VPSlotTracker instance on each
call. VPSlotTracker construction requires iterating over all recipes in
the plan, to number all VPValues.
To avoid doing lots of unnecessary work when printing VPlan costs,
construct a shared VPSlotTracker in VPCostContext, re-used by all
prints.
This can speed up debug output for large loops.
PR: https://github.com/llvm/llvm-project/pull/203386
Commit: 5742a30a749a5cc9271bd5bd8945c3033285c775
https://github.com/llvm/llvm-project/commit/5742a30a749a5cc9271bd5bd8945c3033285c775
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-strict-wqm.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-bf16-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-workgroups_error_check.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
M llvm/test/CodeGen/AMDGPU/attributor-noalias-addrspace.ll
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
M llvm/test/CodeGen/AMDGPU/back-off-barrier-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/bad-agpr-vgpr-regalloc-priority.mir
M llvm/test/CodeGen/AMDGPU/barrier-elimination-gfx12.ll
M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/basic-call-return.ll
M llvm/test/CodeGen/AMDGPU/basic-loop.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16-ops.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-combine.ll
M llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bit-op-reduce-width-known-bits.ll
M llvm/test/CodeGen/AMDGPU/bitcast-constant-to-vector.ll
M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-coalescer-verifier-error-empty-subrange.mir
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/branch-folder-requires-no-phis.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx11.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/break-smem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_sat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-unsupported-errors.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsic-mmo-type.ll
M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/buffer-store-dwordx4-vpk-mul-war-hazard-gfx942.mir
M llvm/test/CodeGen/AMDGPU/bug-cselect-b64.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (8) (#208837)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c84e264eb8539f05a7347fb12183ea04001bc1a9
https://github.com/llvm/llvm-project/commit/c84e264eb8539f05a7347fb12183ea04001bc1a9
Author: David Green <david.green at arm.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
Log Message:
-----------
[AArch64][GlobalISel] Add test coverage for bf16 fptosi.sat. NFC (#208955)
Commit: 63f4d28adf0af9f275f6c09450d5a48d451b59b1
https://github.com/llvm/llvm-project/commit/63f4d28adf0af9f275f6c09450d5a48d451b59b1
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/RelocScan.h
M lld/test/ELF/i386-tls-ie-shared.s
Log Message:
-----------
[ELF] Fix data race when handleTlsIe adds a RELATIVE relocation (#208956)
The ieExpr == R_GOT PIC case (e.g. R_386_TLS_IE in -shared links) calls
the unsynchronized addRelativeReloc from concurrent scanSectionImpl
tasks, racing on relaDyn->relativeRelocs. Use the sharded variant like
processAux. Split i386-tls-ie-shared.s into two input files so that a
ThreadSanitizer build detects the race.
Commit: 905f654bb721f1df119bd2cfaa23736e30838e90
https://github.com/llvm/llvm-project/commit/905f654bb721f1df119bd2cfaa23736e30838e90
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/RelocScan.h
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace getThreadIndex with explicit shards in RelocScan. NFC (#208959)
Parallel relocation scanning (https://reviews.llvm.org/D133003) appends
dynamic relocations to `relocsVec[parallel::getThreadIndex()]`.
`getThreadIndex` returns -1u on main, which is a known hazard.
Instead, run one scan task per worker via `parallelFor`, with tasks
claiming object files off a shared counter, and pass the task index
through scanSection/RelocScan as the relocsVec shard.
Commit: 410a2a236355a432c6a73cbd3338badabd280dc8
https://github.com/llvm/llvm-project/commit/410a2a236355a432c6a73cbd3338badabd280dc8
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/pstl.reverse_copy.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Default implementation of parallel std::reverse_copy (#208085)
This PR adds a default parallel implementation of `std::reverse_copy`
based on `std::reverse_iterator` + parallel `std::copy`.
Effectively it's a one-liner:
```c++
return _Copy()(__policy,
std::reverse_iterator<_BidirectionalIterator>(std::move(__last)),
std::reverse_iterator<_BidirectionalIterator>(std::move(__first)),
std::move(__result));
```
Included tests check that:
- Semantics of the function is correct.
- The function correctly SFINAE out when the first argument is not an
execution policy.
- The `nodiscard` policy is followed.
- The `noexcept` policy is followed.
- `static_assert` verifies iterators' categories (bidirectional and
forward).
Part of #99938.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: d6d0ccce19d1dee79fd9b5b655aae554e7455d97
https://github.com/llvm/llvm-project/commit/d6d0ccce19d1dee79fd9b5b655aae554e7455d97
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Client.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/source/Protocol/MCP/Client.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/MCPServerInfoTest.cpp
M lldb/unittests/tools/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
Log Message:
-----------
[lldb-mcp] Multiplex across all discovered LLDB instances (#208827)
Connect to every LLDB MCP server advertised under ~/.lldb rather than a
single one, and present them to the client as one server. A stale
registry entry from a crashed instance simply fails to connect and is
skipped.
Each instance is identified by the pid of its lldb process, now recorded
in the ServerInfo registry file. Tools and resources are addressed with
instance-qualified URIs, e.g. lldb-mcp://instance/{pid}/debugger/{id}
and lldb://instance/{pid}/debugger/{id}/target/{idx}. Listing requests
(sessions_list, resources/list) fan out to every backend and aggregate;
targeted requests (command, resources/read) are routed by the pid parsed
from the URI. Backends only know their local lldb-mcp://debugger/{id}
form, so URIs are rewritten in both directions.
Add Binder::FailPendingRequests (and Client::CancelPendingRequests) so
that when the client disconnects with a request still in flight to a
backend, the abandoned reply is satisfied with an error instead of being
destroyed unanswered, which would trip the binder's "must reply" assert.
The multiplexer cancels its backends on shutdown before unwinding.
Assisted-by: Claude
Commit: 074c4b35fba7eb7bfbb514e5ebdf16b1ff074311
https://github.com/llvm/llvm-project/commit/074c4b35fba7eb7bfbb514e5ebdf16b1ff074311
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
Log Message:
-----------
[ELF] Replace getThreadIndex with explicit shards in markLive. NFC (#208974)
The parallel mark loop appends deeper discoveries to per-thread queues
indexed by `parallel::getThreadIndex()`, the last getThreadIndex user in
lld. Instead, have each worker claim frontier items off a shared
counter, accumulating into an explicit shard.
The finer-grained item claiming improves load balancing: the markLive
--time-trace phase is ~5% faster for a clang --gc-sections link and ~4%
for a larger chromium one.
Commit: 61b5d7802713e9634750d24456597b28ca85a335
https://github.com/llvm/llvm-project/commit/61b5d7802713e9634750d24456597b28ca85a335
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
Log Message:
-----------
[CIR][NFC] Add missing enum values related to CXXExpansionStmt (#208919)
Add missing enum values related to CXXExpansionStmt
Commit: 3a6048dbea15390c20e4ea063ffed2c2610fcaaf
https://github.com/llvm/llvm-project/commit/3a6048dbea15390c20e4ea063ffed2c2610fcaaf
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/test/CodeGen/ARM/elf-preemption.ll
M llvm/test/CodeGen/ARM/weak-hidden-pic.ll
Log Message:
-----------
Revert "[ARM] Use .reloc for weak symbols in PIC mode instead of GOT indirection" (#208968)
There is a few breakages between `clang-armv8-quick` failing the
`Interpreter/execute-weak.cpp` test and bots failing linking
`libclang_rt.atomic.so`.
Reverts llvm/llvm-project#208372
Commit: e9e21f520ccd8f4c292686dfdeb04eae080110e3
https://github.com/llvm/llvm-project/commit/e9e21f520ccd8f4c292686dfdeb04eae080110e3
Author: Adam Scott <adamscott200322 at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-calling-conv.ll
M llvm/test/CodeGen/X86/avx512-ext.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-load-store.ll
M llvm/test/CodeGen/X86/avx512-mask-op.ll
M llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/build-vector-128.ll
M llvm/test/CodeGen/X86/build-vector-256.ll
M llvm/test/CodeGen/X86/build-vector-512.ll
R llvm/test/CodeGen/X86/buildvec-strided-loads.ll
M llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
Revert [X86] EltsFromConsecutiveLoads - handle trunc(wideload()) patterns (#199371) (#208960)
Reverts llvm/llvm-project#199371.
The strided path emits wide loads without checking that the widened
range is dereferenceable. The last wide load reads up to (stride -
element) bytes past the last element and faults when the data ends at a
page boundary. Flagged by @nikic in
https://github.com/llvm/llvm-project/pull/199371#issuecomment-4947406318.
Reproducer on current main **MADE WITH CLAUDE OPUS**
strided.ll, 8 x i16 at a 4 byte stride, the source only touches bytes
[0, 30):
```llvm
define void @strided8i16(ptr %p, ptr %out) {
%g0 = getelementptr inbounds i8, ptr %p, i64 0
%g1 = getelementptr inbounds i8, ptr %p, i64 4
%g2 = getelementptr inbounds i8, ptr %p, i64 8
%g3 = getelementptr inbounds i8, ptr %p, i64 12
%g4 = getelementptr inbounds i8, ptr %p, i64 16
%g5 = getelementptr inbounds i8, ptr %p, i64 20
%g6 = getelementptr inbounds i8, ptr %p, i64 24
%g7 = getelementptr inbounds i8, ptr %p, i64 28
%v0 = load i16, ptr %g0, align 1
%v1 = load i16, ptr %g1, align 1
%v2 = load i16, ptr %g2, align 1
%v3 = load i16, ptr %g3, align 1
%v4 = load i16, ptr %g4, align 1
%v5 = load i16, ptr %g5, align 1
%v6 = load i16, ptr %g6, align 1
%v7 = load i16, ptr %g7, align 1
%r0 = insertelement <8 x i16> undef, i16 %v0, i32 0
%r1 = insertelement <8 x i16> %r0, i16 %v1, i32 1
%r2 = insertelement <8 x i16> %r1, i16 %v2, i32 2
%r3 = insertelement <8 x i16> %r2, i16 %v3, i32 3
%r4 = insertelement <8 x i16> %r3, i16 %v4, i32 4
%r5 = insertelement <8 x i16> %r4, i16 %v5, i32 5
%r6 = insertelement <8 x i16> %r5, i16 %v6, i32 6
%r7 = insertelement <8 x i16> %r6, i16 %v7, i32 7
store <8 x i16> %r7, ptr %out, align 1
ret void
}
```
driver.c, puts the 30 data bytes flush against a PROT_NONE page:
```c
#include <sys/mman.h>
#include <unistd.h>
#include <string.h>
#include <stdint.h>
#include <stdio.h>
void strided8i16(void *p, void *out);
int main(void) {
long pg = sysconf(_SC_PAGESIZE);
char *m = mmap(0, 2*pg, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0);
mprotect(m + pg, pg, PROT_NONE); /* unmapped guard page right after */
memset(m, 0x11, pg);
char *p = m + pg - 30; /* data [0,30) ends exactly at page end */
uint16_t out[8];
strided8i16(p, out); /* source touches only bytes [0,30) */
printf(" returned OK, out[0]=%u\n", out[0]);
return 0;
}
```
```
$ llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 -filetype=obj strided.ll -o strided.o
$ cc driver.c strided.o -o repro
$ ./repro; echo "exit: $?"
Segmentation fault (core dumped)
exit: 139
$ llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 -filetype=obj strided.ll -o strided_sse2.o
$ cc driver.c strided_sse2.o -o repro_sse2
$ ./repro_sse2; echo "exit: $?"
returned OK, out[0]=4369
exit: 0
```
With +avx2 the fold fires and emits a 32 byte `vmovdqu (%rdi), %ymm0`
over the 30 byte footprint. With plain sse2 the buildvector stays scalar
and only the accessed bytes are read.
Commit: 9dffcd2752af16a09eeb4131f90a1a0fe2b76a1f
https://github.com/llvm/llvm-project/commit/9dffcd2752af16a09eeb4131f90a1a0fe2b76a1f
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-11 (Sat, 11 Jul 2026)
Changed paths:
M lld/ELF/Writer.cpp
M lld/test/ELF/aarch64-reloc-pauth.s
Log Message:
-----------
[PAC][lld] Properly handle `.relr.auth.dyn` -> `.rela.dyn` movement (#195649)
Address the following issues reported in #171475:
1. Proper adjustment of `__rela_iplt_end` address if a move from
`.relr.auth.dyn` to `.rela.dyn` took place
2. Set `__rela_iplt_start` properly if prior to such movement from
`.relr.auth.dyn`, the `.rela.dyn` was empty
3. Allocate enough space for both RELA* and AARCH64_AUTH_RELR* tags in
the `.dynamic` section in case we end up with both `.relr.auth.dyn` and
`.rela.dyn`. If one of the sections becomes empty - just pad the
`.dynamic` section with null tags in the end.
Resolves #171475
---------
Co-authored-by: Jessica Clarke <jrtc27 at jrtc27.com>
Commit: 77929619bc93b86e99f6ae6a9b10ef85a27c4c18
https://github.com/llvm/llvm-project/commit/77929619bc93b86e99f6ae6a9b10ef85a27c4c18
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
Log Message:
-----------
[clang][bytecode] Remove EvalEmitter::OpPC (#208988)
We pass this when evaluting opcodes in EvalEmitter, but we never set it
to anything, so the underlying pointer is always null and we later and
up using the source location of the expression we're evaluating.
This seems to only cause problems when Statement expressions are
involved so far.
Commit: 02a38835c2f0cea609290ead1280d1102042081f
https://github.com/llvm/llvm-project/commit/02a38835c2f0cea609290ead1280d1102042081f
Author: amosher-nvidia <amosher at nvidia.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/linkerscript/tbss-addr-expr.s
Log Message:
-----------
[lld][ELF] Allow explicit address expressions on .tbss output sections (#196447)
D107208 allows consecutive SHF_TLS SHT_NOBITS (.tbss) output sections by
making
each .tbss start at the end address of the previous one
(state->tbssAddr). This
happens unconditionally, so an explicit output section address
(`.tbss ADDR : { ... }`) is silently ignored, unlike GNU ld.
Apply the tbssAddr fallback only when the section has no address
expression.
Some embedded/RTOS applications link the kernel and several mutually
isolated
tasks into a single ELF and require every section, .tbss included, to
sit at a
specific address matching the memory map. Placing a task's .tbss in its
own
protected region is a security boundary: one task must not be able to
modify
another's TLS. Previously lld placed .tbss adjacent to .text in RX
memory
instead of where the linker script directed it, in RW memory.
Commit: 359b99c85332edc17ab5cdbcfb7d272d24509f60
https://github.com/llvm/llvm-project/commit/359b99c85332edc17ab5cdbcfb7d272d24509f60
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmulladd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-extval-struct-operand-no-scalar-reuse.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-noreturn-block.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-with-constants.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unique_values.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/uselistorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/packed-math.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/fmuladd_width_prop.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-interleaved-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-alt-node-must-ext.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-root-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fadd.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmin-fmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmul.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/add-sub-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-strict-bitwidth-than-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast-load-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast_long.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-same-lane-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-store-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/call.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-after-intrinsic-call-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-member-in-non-commutable-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutativity.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-node-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/complex-fma-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/control-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-non-inst-in-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operand-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-used-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-used-outside-with-immediate-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyables-with-parent-scalars-in-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_clear_undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_mandeltext.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-node-with-copyable-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast_extra_shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-binop-doesnotneedschedule-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-operand-already-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/expected-prof-consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-reduced-value-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-used-in-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multiple-uses.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-subnodes-same-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-with-undef-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-non-schedulable-overlap.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/hoist.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/icmp-altopcode-after-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
M llvm/test/Transforms/SLPVectorizer/X86/in-tree-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/loopinvariant.ll
M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/many-uses-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbw-bitcast-to-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-for-copyable-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-use-bitcasted-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-commutative-op-in-commutative-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-2-num-elems-reused.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-bswap.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-reduced-select-of-bits.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-user-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
M llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-root-deleted.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-with-cycle.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_landingpad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_overalignedtype.ll
M llvm/test/Transforms/SLPVectorizer/X86/phis-different-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr27163.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate-mmra.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-non-scheduled-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-bswap-with-larger-reduced-type.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-stored.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-across-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-copyable-reused-scalars.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_not_all_parts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extract-scalar-lanes.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-mask-with-poison-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-fma-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-scalar-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-last-instruction-different-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-operands-but-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/saxpy.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-reduction-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-compatible-with-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/sibling-loops-mismatched-tripcount.ll
M llvm/test/Transforms/SLPVectorizer/X86/simplebb.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
M llvm/test/Transforms/SLPVectorizer/X86/small-graph-diff-block-instructions.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-full-match.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-parent-operands-in-spill.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reduce-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vector-operand-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/store-load-forward-conflict.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-extract-dominance.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-ordering-stress.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunc-store-value-ty-not-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-node-with-same-last-instr.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-gather-some-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/whole-registers-compare.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-combined-opcode.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-with-zero-and-incompat.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alt-cmp-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/crash_extractelement_poison.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
M llvm/test/Transforms/SLPVectorizer/ext-after-phi-node.ll
M llvm/test/Transforms/SLPVectorizer/ext-int-reduced-not-operand.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/external-user-instruction-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/gather_extract_from_vectorbuild.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/insert-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-uses-vectorized-index.ll
M llvm/test/Transforms/SLPVectorizer/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/last-buildvector-node.ll
M llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-user-not-min.ll
M llvm/test/Transforms/SLPVectorizer/multi-node-vectorized-insts.ll
M llvm/test/Transforms/SLPVectorizer/multi-uses-with-deps-in-first.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/partial-register-extract.ll
M llvm/test/Transforms/SLPVectorizer/phi-undef-input.ll
M llvm/test/Transforms/SLPVectorizer/postponed_gathers.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/reordered-top-scalars.ll
M llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/reschedule.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/return.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/root-trunc-extract-reuse.ll
M llvm/test/Transforms/SLPVectorizer/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
M llvm/test/Transforms/SLPVectorizer/shufflebuilder-bug.ll
M llvm/test/Transforms/SLPVectorizer/slp-deleted-inst.ll
M llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/stores-non-ordered.ll
M llvm/test/Transforms/SLPVectorizer/unknown-entries.ll
M llvm/test/Transforms/SLPVectorizer/vectorize-reorder-alt-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP] Use constant 64-bit indices for Extract/InsertElement (#208957)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 76f0d4693463ec2c09b4e14eca8f96020bb710e6
https://github.com/llvm/llvm-project/commit/76f0d4693463ec2c09b4e14eca8f96020bb710e6
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/ELF/aarch64-reloc-pauth.s
M lld/test/ELF/pack-dyn-relocs-relr-loop.s
Log Message:
-----------
[ELF,test] Improve .relr.auth.dyn -> .rela.dyn movement coverage (#208991)
Test two behaviors of #195649 that were unasserted:
- .dynamic shrinks when all .relr.auth.dyn entries are moved to a
non-empty .rela.dyn. Check the section header size: readelf -d stops
at the first DT_NULL and cannot show stale padding. This subsumes
empty-relr.s (a size-neutral tag swap, which passed even without the
fix), so remove it.
- An empty .rela.dyn is removed when .relr.auth.dyn is unused. Assert
this in pack-dyn-relocs-relr-loop.s.
Commit: 7215a1a19c13c79e66a9e8661aa7798cb3261b94
https://github.com/llvm/llvm-project/commit/7215a1a19c13c79e66a9e8661aa7798cb3261b94
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-vectors-complex.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/missing-alignment.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/opaque_ptr.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/pointer-elements.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/unaligned-buffer.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/4x2xhalf.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/extend-chain.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-cleanup.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-invariant.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill-with-redundant-elements.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/gap-fill.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/load-store-256-bit.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/masked-store.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/propagate-invariance-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/NVPTX/vectorize_i8.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/correct-order.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/massive_indirection.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/or-disjoint-nested-add.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/or-disjoint-zext.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/scev-range-zext.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add-inseltpoison.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/int_sideeffect.ll
Log Message:
-----------
[LoadStoreVectorizer] Use constant 64-bit indices for Extract/InsertElement (#208941)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 2aab89554cbf800bf50928fe7b1b3de2cbd41b26
https://github.com/llvm/llvm-project/commit/2aab89554cbf800bf50928fe7b1b3de2cbd41b26
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_reinterpret.c
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-extract.c
M clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon-misc.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/arm64_vdupq_n_f64.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/prefer-integer-partition.ll
M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
M llvm/test/Transforms/SROA/struct-to-vector-fp-store-only-tail.ll
M llvm/test/Transforms/SROA/vector-conversion.ll
M llvm/test/Transforms/SROA/vector-promotion-rmw-cannot-tree-merge.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
Log Message:
-----------
[SROA] Use constant 64-bit indices for Extract/InsertElement (#208918)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: e62c0cb076fbcb70752530571726944648a48829
https://github.com/llvm/llvm-project/commit/e62c0cb076fbcb70752530571726944648a48829
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/PCH/cxx20-template-args.cpp
Log Message:
-----------
[clang][bytecode] Fix comparing `TemplateParamObjectDecl`s (#208734)
1) When creating the global variables for them, always use the first
decl
2) When converting null pointers to `APValue`, don't cast the nullptr
base to `Expr` or `ValueDecl`. Use `LValueBase()` instead, so the
internal `PointerUnion` has an all-zeros value as `getOpaqueValue()`. If
we don't do this, we run into problems with merging of
`TemplateParamObjectDecls` because they don't compare equal via
`::Profile()`.
Commit: 25a5b7869cd13698f7556af6b4084cca835ae988
https://github.com/llvm/llvm-project/commit/25a5b7869cd13698f7556af6b4084cca835ae988
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
Log Message:
-----------
[PatternMatch] Add capturing m_Phi matcher (NFC) (#208949)
Add a new capturing m_Phi matcher and use it in some patterns instead of
manually casting/checking if operand is a phi.
PR: https://github.com/llvm/llvm-project/pull/208949
Commit: af812fc18a8ab488bf8b70f9b8ae19bbdd1aea48
https://github.com/llvm/llvm-project/commit/af812fc18a8ab488bf8b70f9b8ae19bbdd1aea48
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvp-widening-convert.ll
Log Message:
-----------
[Clang][RISCV][P-ext] Support packed widening convert intrinsics (#208394)
This patch implements all packed widening convert intrinsics using
general vector operations. Low widening conversions use
`__builtin_convertvector`, while high-half conversions use general
shuffles.
The generated code for high-half conversions is correct but not yet
optimal.
Commit: 4c7948d06c93e8d233cd4733fd4107f3b68bc7bc
https://github.com/llvm/llvm-project/commit/4c7948d06c93e8d233cd4733fd4107f3b68bc7bc
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Revert "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003)
Reverts llvm/llvm-project#203386.
This causes a large compile-time regression.
Commit: a34cb573eae65f48f0e51147289e042a86b55d16
https://github.com/llvm/llvm-project/commit/a34cb573eae65f48f0e51147289e042a86b55d16
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
A clang/test/Analysis/string-search-modeling.c
Log Message:
-----------
[analyzer] Model strchr/strrchr/memchr/strstr/strpbrk/strchrnul (#207267)
CStringChecker did not model these buffer-search functions, so the
engine bound each call to a fresh conjured symbol unrelated to the source.
As a consequence, we could not track the origin of the returned pointer,
thus the fact that it shares provenance of the source pointer.
Fixes #203260
Assisted-by: Claude Opus 4.8
Commit: 97bceede1059b67d3491011f415856f32de21c9c
https://github.com/llvm/llvm-project/commit/97bceede1059b67d3491011f415856f32de21c9c
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-srl-bitcast-bv.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-ext] Improve the codegen for unzip-like shuffle and buildvector (#208763)
This patch selects `pncvt*`/`unzip*` for unzip-like patterns.
On RV32, we select packed narrow shift for i8x4 and i16x2 BUILD_VECTOR
that are equivalent to deinterleave shuffle.
On RV64, we select packed unzip for i8x4 and i16x2 deinterleave shuffle.
Apart from the packed unzip intrinsics, this patch also adds support for
the codegen of two-source unzip.
Commit: a06b1c9f4bd49af7e2c68cacf5922136906bb335
https://github.com/llvm/llvm-project/commit/a06b1c9f4bd49af7e2c68cacf5922136906bb335
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Logging_printf.cpp
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/logging/lit.local.cfg
A orc-rt/test/regression/logging/printf-backend/bad-level.test
A orc-rt/test/regression/logging/printf-backend/debug-compiled-out.test
A orc-rt/test/regression/logging/printf-backend/debug-level.test
A orc-rt/test/regression/logging/printf-backend/format.test
A orc-rt/test/regression/logging/printf-backend/level-off.test
A orc-rt/test/regression/logging/printf-backend/lit.local.cfg
A orc-rt/test/regression/logging/printf-backend/output-redirect.test
A orc-rt/test/regression/logging/printf-backend/runtime-level.test
M orc-rt/test/tools/CMakeLists.txt
A orc-rt/test/tools/orc-rt-log-check.cpp
Log Message:
-----------
[orc-rt] Add printf logging backend (#209006)
Implement the printf backend, selected at configure-time with
ORC_RT_LOG_BACKEND=printf. Messages are written to stderr, or to the
file named by the ORC_RT_LOG_OUTPUT environment variable.
The ORC_RT_LOG environment variable sets the runtime level floor (error,
warning, info, debug, or off) -- only messages at or above it are shown.
When unset it defaults to warning, so warnings and errors are shown and
info and debug are opt-in. The runtime floor cannot go below the
compile-time ORC_RT_LOG_LEVEL floor (the lowest level built in).
Also add regression tests, driven by a new orc-rt-log-check tool that
reports the compiled-in backend and levels (which lit exposes as
features) and emits a message at each level.
Commit: 3187f2659848d0cfadc9caa601215afb8bd9b242
https://github.com/llvm/llvm-project/commit/3187f2659848d0cfadc9caa601215afb8bd9b242
Author: Zinovy Nis <zinovy.nis at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
Log Message:
-----------
[clang-tidy] Modernize-use-string-view: fix todo for ternary (#209008)
Add a support for any-depth ternary expressions
Commit: 3f2d8eb20a8d86d9aeea75a00e21a4ecff0a5234
https://github.com/llvm/llvm-project/commit/3f2d8eb20a8d86d9aeea75a00e21a4ecff0a5234
Author: Lukas <43409484+hertelukas at users.noreply.github.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
A llvm/test/Transforms/FixIrreducible/multiedge.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
A llvm/test/Transforms/UnifyLoopExits/multiedge.ll
Log Message:
-----------
[FixIrreducible][UnifyLoopExits] Fix callbr multiedge splitting (#207598)
This fixes a bug where splitting `callbr` multiedges corrupts the
successor's PHI nodes.
Originally, the first split edge would replace all incoming edges from
the `callbr` block with the newly introduced target block by using
`replacePhiUsesWith`. Later edges would create new target blocks and
would try to update their edge's PHI as well, but would not find it,
leading to a corrupted PHI node.
To fix this, it is theoretically only necessary to ensure that exactly
one PHI argument is replaced per split edge. However, as all the PHI
nodes must have the same argument for every edge from one predecessor, a
single target block suffices, through which all traffic can be routed,
which will be especially useful for switches, where multiedges are
common.
[Trunk crashing](https://godbolt.org/z/4MM5eMrW5)
Found while working on PR #206567, cc @ro-i.
Commit: b82a9a57e72c29a5e8fc81109a62eb827fa5d8f0
https://github.com/llvm/llvm-project/commit/b82a9a57e72c29a5e8fc81109a62eb827fa5d8f0
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetBuildBM.cpp
M llvm/include/llvm/ADT/ImmutableSet.h
Log Message:
-----------
[ADT] Fuse the two post-mutation tree walks in ImutAVLFactory (#208907)
Commit: f99f2a582e947af3f20580fa2674ca0c6bde1b2c
https://github.com/llvm/llvm-project/commit/f99f2a582e947af3f20580fa2674ca0c6bde1b2c
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/UseAfterLifetimeEnd.cpp
M clang/test/Analysis/debug-lifetime-bound.cpp
M clang/test/Analysis/lifetime-bound.cpp
Log Message:
-----------
[analyzer] Implement LifetimeModeling checker and refactor UseAfterLifetimeEnd (#205951)
Commit: 7c2f4db828e5b9fd391c7f69bdd7dfe866b41bc0
https://github.com/llvm/llvm-project/commit/7c2f4db828e5b9fd391c7f69bdd7dfe866b41bc0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Environment.cpp
A orc-rt/lib/executor/Environment.h
M orc-rt/lib/executor/Logging_printf.cpp
Log Message:
-----------
[orc-rt] Add internal secureGetenv utility and use it in the printf b… (#209014)
…ackend
orc_rt::secureGetenv is like getenv, but returns null when the process
is running with elevated privileges (e.g. a set-user-ID or set-group-ID
program), so that a variable in an attacker-controlled environment
cannot influence a privileged host. On libcs where privilege can't be
checked (anything other than glibc or the BSDs/macOS), it fails secure
and returns null, so those environment variables are ignored until a
branch for the platform is added.
Switch the printf logging backend to read ORC_RT_LOG and
ORC_RT_LOG_OUTPUT through secureGetenv, so a redirected log file or
level can't be forced via the environment in a privileged process.
Note that running the ORC runtime in a process with elevated privileges
is extremely risky (since the JIT'd code will typically inherit these
elevated privileges), and expected to be rare. Exercise extreme caution
with such setups.
Commit: a259ffb45c84f930d3ad810dd4ddde50c2667766
https://github.com/llvm/llvm-project/commit/a259ffb45c84f930d3ad810dd4ddde50c2667766
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
Log Message:
-----------
[SLP][NFC]Add tests for copyables in minmax int intrinsics, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209021
Commit: 7206149c21b420a3aa5a0c9a78f1a1ad6ff8ed89
https://github.com/llvm/llvm-project/commit/7206149c21b420a3aa5a0c9a78f1a1ad6ff8ed89
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
Log Message:
-----------
[NFC][clang] Adjust PPMemoryAllocationsTest threshold for ASan (#209024)
PPMemoryAllocationsTest.PPMacroDefinesAllocations measures the memory
footprint of the preprocessor allocator and asserts a strict threshold
of 130.0 bytes per define.
When built with ASan, the allocator adds redzones to allocations,
which increases the total memory reported by `getTotalMemory()` and
causes the test to fail (reporting ~136.8 bytes per define).
Adjust the threshold to 145.0 bytes per define when built with ASan
(detected via `LLVM_ADDRESS_SANITIZER_BUILD`) to account for this
overhead while maintaining the strict limit for standard builds.
Assisted-by: Gemini
Commit: 97e24c8d1cfd7259733ef4b3476f4429402415fb
https://github.com/llvm/llvm-project/commit/97e24c8d1cfd7259733ef4b3476f4429402415fb
Author: darkbuck <michael.hliao at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
Log Message:
-----------
[CIR] Fix lit tests after is.fpclass pretty printing. NFC (#209026)
Commit: 715cf355b1324117a4456cd79bd05df39f65643c
https://github.com/llvm/llvm-project/commit/715cf355b1324117a4456cd79bd05df39f65643c
Author: savchart <metaartem at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/include/macro.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/subdir/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-macro-argument.cpp
Log Message:
-----------
[clang-tidy] Fix identifier-naming style lookup in macro arguments (#206809)
Problem statement: the var lambda parameter was written inside a macro
argument. The declaration location was treated as a macro location, and
the filename lookup returned an empty filename for that location.
Fix: use a file location for the style lookup. Alternative options
considered were spelling location and expansion location.
Fixes #154957
Assisted-by: GPT
---------
Co-authored-by: Zeyi Xu <mitchell.xu2 at gmail.com>
Co-authored-by: Baranov Victor <bar.victor.2002 at gmail.com>
Commit: 4e15b551e06b188f8280c752b29e13ac53ddb70a
https://github.com/llvm/llvm-project/commit/4e15b551e06b188f8280c752b29e13ac53ddb70a
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/include/lld/Common/BPSectionOrdererBase.inc
M lld/test/ELF/bp-section-orderer.s
M lld/test/MachO/bp-section-orderer-errs.s
Log Message:
-----------
[lld] Report missing --irpgo-profile file instead of asserting (#209028)
When --irpgo-profile names a missing file, takeError() asserts
```
ld.lld: error: No such file or directory
ld.lld: Error.h:686: ... Assertion `!HasError && "Cannot get value when an error exists!"' failed.
```
Check the Expected before use. Fixes #203761
Co-authored-by: Peter Chen J. <peter941221 at gmail.com>
Co-authored-by: Peter Chen J. <peter941221 at gmail.com>
Commit: 5790cc0f6c7f1570f8cca222c19801a6c7c2f076
https://github.com/llvm/llvm-project/commit/5790cc0f6c7f1570f8cca222c19801a6c7c2f076
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/IR/Instructions.cpp
Log Message:
-----------
[IR] Use constant 64-bit indices for Extract/InsertElement (#208996)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement
Commit: ede6a16b1bc4a870ff6180caeb87b727699cd9c1
https://github.com/llvm/llvm-project/commit/ede6a16b1bc4a870ff6180caeb87b727699cd9c1
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
Log Message:
-----------
[PowerPC] Use constant 64-bit indices for Extract/InsertElement (#209015)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement and InsertElement.
Commit: 66e9ac6aeab326e5d4f6e0c1cbdbc31bda5dec0e
https://github.com/llvm/llvm-project/commit/66e9ac6aeab326e5d4f6e0c1cbdbc31bda5dec0e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Log Message:
-----------
[InstCombine] Use constant 64-bit indices for InsertElement (#209017)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in InsertElement.
Commit: 83d95d89c520656306130b461252cd0ed9b4f542
https://github.com/llvm/llvm-project/commit/83d95d89c520656306130b461252cd0ed9b4f542
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Log Message:
-----------
[SimplifyLibCalls] Use constant 64-bit indices for ExtractElement (#209020)
The canonical form preferred by instCombine is to use 64-bit values for
constant index in ExtractElement.
Commit: 3a27d292c353328a9a03422319ff1c0b9264648b
https://github.com/llvm/llvm-project/commit/3a27d292c353328a9a03422319ff1c0b9264648b
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move markUsedLocalSymbols from Writer to markLive. NFC (#209035)
markUsedLocalSymbols (https://reviews.llvm.org/D77807) sets the USED
flag on local symbols referenced by relocations so that -r/--emit-relocs
with --discard-{locals,all} preserves them in the symbol table.
Move the scan into markLive's !gcSections branch to be closer to
MarkLive::resolveReloc. The scan now iterates sections via relsOrRelas,
handling CREL uniformly, and runs in parallel.
This is a step toward fixing #160789
Commit: 937ac000a69012546d851638b1410cfe9f07980f
https://github.com/llvm/llvm-project/commit/937ac000a69012546d851638b1410cfe9f07980f
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Debuginfod/BuildIDFetcher.cpp
M llvm/lib/HTTP/HTTPClient.cpp
A llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
M llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
A llvm/test/tools/llvm-debuginfod-find/timeout.test
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
Log Message:
-----------
[llvm][HTTP] Apply WinHTTP timeout setting after WinHttpOpen (#188969)
`setTimeout()` required the session handle, but it was only created
inside `HTTPClient::perform()`. This patch stores the incoming value and
applies it after the session handle is created with `WinHttpOpen()`.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: fafd0de9e4a84921cce55ea8c6da05b515006fa2
https://github.com/llvm/llvm-project/commit/fafd0de9e4a84921cce55ea8c6da05b515006fa2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect add/sub operands reorder, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209039
Commit: 2fdc877f7209a32d9632aafe75d2d61199a7089f
https://github.com/llvm/llvm-project/commit/2fdc877f7209a32d9632aafe75d2d61199a7089f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
Log Message:
-----------
[SLP] Fix miscompile from unsafe operand-order normalization
IsCommutative(MainOp) is also true for a Sub/FSub feeding only
fabs/icmp-eq-0, but that doesn't make every lane swappable: a
converted Add/FAdd lane's operand order is fixed to preserve its
value, and swapping it into a native Sub/FSub's layout negates it.
Re-check each lane before swapping instead of trusting MainOp's.
Fixes #208944
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209041
Commit: 5485d624eb95bb7a753c6088e452d32d0bd0c03d
https://github.com/llvm/llvm-project/commit/5485d624eb95bb7a753c6088e452d32d0bd0c03d
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
M lld/test/ELF/emit-relocs-discard-locals.s
Log Message:
-----------
[ELF] --discard-{locals,all}: mark local symbols referenced by retained non-SHF_ALLOC sections (#209042)
With --gc-sections, mark() does not scan relocations of retained
non-SHF_ALLOC sections, so local symbols referenced only by such
sections (e.g. .L symbols in .debug_str_offsets referenced by
.debug_info) do not get the USED flag.
-r/--emit-relocs with --discard-{locals,all} would discard the symbols
and rewrite relocations to reference the null symbol, corrupting DWARF
in the output. This is common on RISC-V, where
RISCVELFObjectWriter::needsRelocateWithSymbol returns true, but is also
possible on other targets with --reloc-section-sym=none.
Call markUsedLocalSymbols from the retention loop (introduced by
#209035)
to set the flag.
Fix #160789
Commit: 36876394a96b053a03aecacec566eadc292d7053
https://github.com/llvm/llvm-project/commit/36876394a96b053a03aecacec566eadc292d7053
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
Log Message:
-----------
[llvm][HTTP] Increase request handler sleep (#209038)
Fixup for
https://github.com/llvm/llvm-project/pull/188969#issuecomment-4952185708.
The issue is likely the same as I described in
https://github.com/llvm/llvm-project/pull/192061#issuecomment-4926882131
where WinHTTP doesn't time out immediately but adds some delay. The fix
here is to increase the sleep in the mock server.
Commit: 65735abd4d0af888840929be6356628a05eaa179
https://github.com/llvm/llvm-project/commit/65735abd4d0af888840929be6356628a05eaa179
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect nuw propagation in add/sub vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209045
Commit: 927878dab67545e7448a82921446e339b6b55f79
https://github.com/llvm/llvm-project/commit/927878dab67545e7448a82921446e339b6b55f79
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
Log Message:
-----------
[SLP] Drop nuw when add/sub interchange negates a nonzero constant
sub nuw X, C requires X u>= C, but add nuw X, -C requires X u< C, so
nuw must always be dropped on interchange.
Fixes #209023
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209047
Commit: b8d37cbc139a5adcd56611c21850e02600e560f2
https://github.com/llvm/llvm-project/commit/b8d37cbc139a5adcd56611c21850e02600e560f2
Author: David Green <david.green at arm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add an OPERAND_IMM_UINT8 operand type. (#209050)
This helps verify that certain operands are in the correct range, in
this case
0-255.
Commit: 5566928ef0b0788da6582ea3bcc8ab9ae416e80f
https://github.com/llvm/llvm-project/commit/5566928ef0b0788da6582ea3bcc8ab9ae416e80f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
A llvm/test/Analysis/LoopAccessAnalysis/wide-pointer-index-distance.ll
Log Message:
-----------
[LAA] Bail out of dependence analysis when distance exceeds 64 bits. (#209052)
isDependent extracts the dependence distance into 64 bit integers.
Bail out conservatively when the constant distance or the signed minimum
distance needs more than 64 bits.
Commit: 349542f7e122b8fda1d60f0b37c8f92ad65635d6
https://github.com/llvm/llvm-project/commit/349542f7e122b8fda1d60f0b37c8f92ad65635d6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
Log Message:
-----------
[VPlan] Add strided access test with disjoint or. (NFC) (#209051)
Currently this is missed by VPlan SCEV due to disjoint OR not being
handled.
Commit: 62377815c4cc03130608158a8d51cc37e4549288
https://github.com/llvm/llvm-project/commit/62377815c4cc03130608158a8d51cc37e4549288
Author: David Green <david.green at arm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Log Message:
-----------
[AArch64] Add an OPERAND_IMM_UINT5 operand type. (#209057)
This helps verify that certain operands are in the correct range, in
this case
0-31.
Commit: fd6524963bf1ec6b4d2c688337af8f9f41562575
https://github.com/llvm/llvm-project/commit/fd6524963bf1ec6b4d2c688337af8f9f41562575
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/outer-loop-atomic.ll
Log Message:
-----------
[VPlan] Handle AtomicRMW/AtomicCmpXchg/Fence in outer loop creation. (#209031)
Teach VPInstruction::getNumOperandsForOpcode about AtomicRMW,
AtomicCmpXchg and Fence, so VPlan construction over an outer loop that
still contains these operations does not crash before later legality
rejects the loop.
Fixes crashes in the added tests.
Commit: bb4aea6303e7470be3ccd37db9398fc9b8f03f50
https://github.com/llvm/llvm-project/commit/bb4aea6303e7470be3ccd37db9398fc9b8f03f50
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
M llvm/test/Transforms/GVN/ptrtoaddr.ll
A llvm/test/Transforms/IndVarSimplify/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
Log Message:
-----------
[SCEV,GVN] Add additional ptrtoaddr tests (NFC) (#209049)
Extend test coverage with files with mixied ptrtoaddr/ptrtoint, as well
as wide pointers.
Extra test coverage for
https://github.com/llvm/llvm-project/pull/180244.
Commit: d036d309eebee3ac0b8077f0cc6e3a318bc0e6ab
https://github.com/llvm/llvm-project/commit/d036d309eebee3ac0b8077f0cc6e3a318bc0e6ab
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/MachO/bp-section-orderer-errs.s
Log Message:
-----------
[test] Add REQUIRES: aarch64 (#209058)
Commit: 0188651ae4a0d38f014fc315f182aa813a73dfbe
https://github.com/llvm/llvm-project/commit/0188651ae4a0d38f014fc315f182aa813a73dfbe
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect const trunc in signed compare, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209059
Commit: fe85b5be435add42d83d85e09059ae2e6e0896e4
https://github.com/llvm/llvm-project/commit/fe85b5be435add42d83d85e09059ae2e6e0896e4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
Log Message:
-----------
[SLP] Fix miscompile from truncating signed icmp constant
getActiveBits() ignores sign, so a positive constant needing the
narrower type's top bit was truncated to a negative value. Use
getSignificantBits() for signed comparisons.
Fixes #209010
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209061
Commit: 9083925dadb45d99836b75ac0354265d6cbd46ab
https://github.com/llvm/llvm-project/commit/9083925dadb45d99836b75ac0354265d6cbd46ab
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/test/ELF/retain-symbols-file.s
M lld/test/ELF/retain-und.s
Log Message:
-----------
[ELF,test] Modernize --retain-symbols-file tests (#209062)
Switch to llvm-readelf, compact FileCheck directives, and
split-file-style naming. Prepares for a --retain-symbols-file behavior
change.
Commit: b6e77d6af14b6b4d0d98248c1579b1be0194187a
https://github.com/llvm/llvm-project/commit/b6e77d6af14b6b4d0d98248c1579b1be0194187a
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/unittests/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointersExtractorTest.cpp
Log Message:
-----------
[Clang][Test] Fix -Wctad-maybe-unsupported in OperatorNewDeletePointersExtractorTest.cpp (#209012)
Fix warning: `'std::set' may not intend to support class template
argument deduction [-Wctad-maybe-unsupported]`, which is error under
-Werror.
std::set{*PtrId} does implicitly deduce to std::set<EntityId>, but it
is not explicit or user-defined CATD guide. Opt-in warning
-Wctad-maybe-unsupported flags it as maybe unsafe and unintended. The
warning is enabled at
https://github.com/llvm/llvm-project/blob/9083925dadb4/llvm/cmake/modules/HandleLLVMOptions.cmake#L977
Relates to #206600.
Commit: c847ddf8f18d3edde84fa99bf9d15511a7978cdd
https://github.com/llvm/llvm-project/commit/c847ddf8f18d3edde84fa99bf9d15511a7978cdd
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M lld/ELF/Writer.cpp
M lld/unittests/AsLibELF/CMakeLists.txt
A lld/unittests/AsLibELF/OutputStream.cpp
Log Message:
-----------
[ELF] Write the output to lld::outs() when -o is - (#209064)
When the output file is "-", write the image to lld::outs() (the
stdoutOS
argument of lld::elf::link()) instead of committing the
FileOutputBuffer,
which writes to the process's stdout. This lets lld used as a library
capture
the output in a raw_ostream without an open syscall.
This reimplements the stale #72061 and adds a unittest.
Commit: 7d24dfa5f29e1794e452aadaa27f994f15568763
https://github.com/llvm/llvm-project/commit/7d24dfa5f29e1794e452aadaa27f994f15568763
Author: Fangrui Song <i at maskray.me>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/docs/ReleaseNotes.rst
Log Message:
-----------
ReleaseNotes: add lld/ELF notes (#209066)
Summarize `git log origin/release/22.x..main` entries, excluding
cherry-picked notes `git rev-list main..origin/release/22.x -- lld/ELF`,
following the style of my previous release notes.
Commit: c7812f661d843e666c6ab3ab9c4a33b83e930c29
https://github.com/llvm/llvm-project/commit/c7812f661d843e666c6ab3ab9c4a33b83e930c29
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/copyable-repeated-operand-partial-commutativity.ll
Log Message:
-----------
[SLP] Fix crash from repeated operand with mixed commutativity
A value used as both a commutable and non-commutable operand of the
same call got double-counted in dependency tracking, adding a
dependency scheduling never releases and tripping an assertion.
Fixes #209005
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209067
Commit: 692d89dc02deb30d14bcaa2dbb2ed91ea8f88acd
https://github.com/llvm/llvm-project/commit/692d89dc02deb30d14bcaa2dbb2ed91ea8f88acd
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Host/freebsd/Host.cpp
Log Message:
-----------
[LLDB][FreeBSD] Fill pgid and sid in ProcessInfo (#209009)
These two fields are required by HostTest.cpp. Although I don't see any
usecase, we add these two fields to prevent failure.
Commit: 461f0b699c8dbcafaec0e4b2d171d42ee05f6999
https://github.com/llvm/llvm-project/commit/461f0b699c8dbcafaec0e4b2d171d42ee05f6999
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
Log Message:
-----------
[LLDB] Fix use-after-free destroying a Binder from its OnClosed handler (#209019)
transport::Binder::OnClosed() holds m_mutex (a recursive_mutex) while
invoking m_disconnect_handler. In the MCP server, that handler removes
the disconnected client, which owns the transport and therefore the
Binder itself. As a result, the Binder -- and its m_mutex -- are
destroyed while the scoped_lock in OnClosed still holds the lock.
This is a use-after-free everywhere, as the lock guard later unlocks
freed memory.
Move the disconnect handler out of the critical section and release the
lock before invoking it, so the Binder can be safely destroyed without
holding or destroying a locked mutex.
Commit: 171ba71128eec9f1859bb995c597dcff296ee730
https://github.com/llvm/llvm-project/commit/171ba71128eec9f1859bb995c597dcff296ee730
Author: Thrrreeee <shijinrui at bytedance.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/dwarf4-cross-cu-ranges.test
M bolt/test/X86/dwarf5-debug-names-cross-cu.s
Log Message:
-----------
[BOLT] fix DIE traversal incorrect loop termination condition. (#208450)
The DIE traversal loop in partitionCUs() used an incorrect termination
condition, causing it to read past the end of the CU. Fix the loop to
stop at NextCUOffset so traversal no longer runs beyond the unit's
boundary.
Fixed [#208440](https://github.com/llvm/llvm-project/issues/208440).
Commit: e6673bd0377104b681ad9f456f3b7742c8f3a9a9
https://github.com/llvm/llvm-project/commit/e6673bd0377104b681ad9f456f3b7742c8f3a9a9
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
Log Message:
-----------
[SLP][Modularization][NFC] Extract type and constant helpers into SLPUtils (1/3) (#206881)
As we discussed on RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
This patch introduces the SLPVectorizer/ subdirectory and adds
SLPUtils.{h,cpp} under namespace llvm::slpvectorizer, then moves the
type and constant query helpers into it:
- isConstant
- isVectorLikeInstWithConstOps
- isSplat
- allConstant
- allSameBlock
- allSameType
- allSameOpcode
- getNumElements
- getPartNumElems
- getNumElems
- getInsertExtractIndex
- getExtractIndex
Commit: d91a1e88891d9737535198137c73632f57cc629a
https://github.com/llvm/llvm-project/commit/d91a1e88891d9737535198137c73632f57cc629a
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
Log Message:
-----------
[libc++] Switch use llvm-premerge-libcxx-runner (#208928)
Signed-off-by: yronglin <yronglin777 at gmail.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: d8df9b5e925c580f076779e5cbfe2bffc451c3b6
https://github.com/llvm/llvm-project/commit/d8df9b5e925c580f076779e5cbfe2bffc451c3b6
Author: ejose02 <ejose at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
A flang/test/Semantics/call48.f90
Log Message:
-----------
[Flang] Fix for the spurious error for VOLATILE actual argument in implicit interface CALL (#192605)
Fixes #191343
Replaced the error with warning. Now it permits calling an external
procedure with implicit interface and passing a volatile argument. There
will be a warning that the procedure should have an explicit interface.
In addition to fixing the VOLATILE error, I updated the semantic check
for the ASYNCHRONOUS attribute. Both attributes were incorrectly
throwing a hard error when used as actual arguments in an implicit
interface call. According to the Fortran 2018 standard, an explicit
interface is only mandatory when the dummy argument has the VOLATILE or
ASYNCHRONOUS attribute. Since the standard doesn't restrict actual
arguments in this scenario, I downgraded both to emit a
-Wimplicit-interface-actual warning instead.
Commit: b1c56fb53a9c76d6b045ede49083b647ae049ffe
https://github.com/llvm/llvm-project/commit/b1c56fb53a9c76d6b045ede49083b647ae049ffe
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Logging_oslog.cpp
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/logging/os_log/delivery.test
A orc-rt/test/regression/logging/os_log/lit.local.cfg
A orc-rt/test/regression/logging/os_log/no-printf-output.test
M orc-rt/test/tools/orc-rt-log-check.cpp
Log Message:
-----------
[orc-rt] Add os_log logging backend (Darwin only) (#209081)
Implement the os_log backend, selected with ORC_RT_LOG_BACKEND=os_log.
With this backend selected, the ORC_RT_LOG macros expand at the call
site to os_log_with_type. Each ORC runtime log level maps to an
os_log_type_t (error -> ERROR, warning -> DEFAULT, info -> INFO, debug
-> DEBUG). The compile-time ORC_RT_LOG_LEVEL floor still applies, but
runtime filtering is left to the system (e.g. `log config`), so the
printf backend's ORC_RT_LOG and ORC_RT_LOG_OUTPUT have no effect.
Records go to the "org.llvm.orc-rt" subsystem with the category as the
os_log category. (Per-category handles are created on first use and
cached).
Add regression tests under test/regression/logging/os_log:
no-printf-output.test checks that the backend produces no console
output, and an opt-in delivery test (llvm-lit --param
run-os-log-tests=1) scrapes `log show` to confirm records reach the
expected subsystem and category.
Commit: 9b9f44d1c55ca4f3e8d6d5d9350ef872e000df0a
https://github.com/llvm/llvm-project/commit/9b9f44d1c55ca4f3e8d6d5d9350ef872e000df0a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
A llvm/include/llvm/ADT/Eytzinger.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/EytzingerTest.cpp
Log Message:
-----------
[ADT] Introduce EytzingerTableSpan (#208885)
This patch introduces EytzingerTableSpan, a non-owning view of a buffer
formatted as a complete binary search tree in Eytzinger (breadth-first)
order.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antigravity
Commit: fd17f88189525a81488294912bff8b9f429585a2
https://github.com/llvm/llvm-project/commit/fd17f88189525a81488294912bff8b9f429585a2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
Log Message:
-----------
[RISCV][P-ext] Replace RISCVISD::PPAIRE_DB with RISCVISD::PPAIRE. NFC (#208980)
This replaces RISCVISD::PPAIRE_DB with the RISCVISD::PPAIRE added by
#208763.
This adds two CONCAT_VECTORS and two EXTRACT_SUBVECTORs during lowering
instead of waiting until isel to form the GPR pairs.
Commit: 11112ed9b7eb7deb69b97178a0c4921e6222049c
https://github.com/llvm/llvm-project/commit/11112ed9b7eb7deb69b97178a0c4921e6222049c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/src/__support/CPP/expected.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/expected_test.cpp
Log Message:
-----------
[libc] Make cpp::expected::operator bool explicit (#208681)
Without explicit, expected<T, E> implicitly converts to bool in all
sorts of unexpected contexts (e.g. `EXPECT_EQ(ErrorOr<int>(47), 1)`),
and also deviates from std::expected in C++23.
While in there, add basic unit tests for expected and unexpected (we
didn't have any tests for this utility yet), and update the file header.
Assisted by Gemini.
Commit: 26e34c6896626f0874a1eface84b8fb25111f4b0
https://github.com/llvm/llvm-project/commit/26e34c6896626f0874a1eface84b8fb25111f4b0
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/TailCallElim/accum_recursion.ll
M llvm/test/Transforms/TailCallElim/tre-minmax-intrinsic.ll
Log Message:
-----------
[IR] Handle vector tys in ConstantExpr::getIntrinsicIdentity for smin/max. (#208367)
The code was using getIntegerBitWidth() when it should have been using
getScalarSizeInBits(). This resulted in an assert in debug builds, and
who-knows-what in opt builds.
Reproducer:
```
define <4 x i32> @f(<4 x i32> %a, i32 %b) {
%c = call <4 x i32> @f(<4 x i32> %a, i32 %b)
%m = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %c, <4 x i32> %a)
ret <4 x i32> %m
}
$ opt -passes=tailcallelim repro.ll
Casting.h:572: Assertion `isa<To>(Val) && "cast<Ty>() argument of
incompatible type!"' failed.
```
Bug found and fixed by Claude Mythos 5.
Commit: 3f80df8698145f0188f305b748e60e70bf942d3d
https://github.com/llvm/llvm-project/commit/3f80df8698145f0188f305b748e60e70bf942d3d
Author: Sergey Shcherbinin <sscherbinin at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
A llvm/test/tools/llvm-profgen/AArch64/aarch64-disassemble-all-features.test
A llvm/test/tools/llvm-profgen/AArch64/lit.local.cfg
A llvm/test/tools/llvm-profgen/ARM/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/ARM/etm-arch.test
A llvm/test/tools/llvm-profgen/ARM/etm-opencsd.test
A llvm/test/tools/llvm-profgen/ARM/lit.local.cfg
R llvm/test/tools/llvm-profgen/Inputs/artificial-branch.perfscript
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfbin
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.exe
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.pdb
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cold-profile-trimming.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfbin
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-interrupt.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-invalid-ret-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfbin
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfscript
R llvm/test/tools/llvm-profgen/Inputs/css-pgo-perf.script
R llvm/test/tools/llvm-profgen/Inputs/dap-perf-trace.txt
R llvm/test/tools/llvm-profgen/Inputs/dap-pie.bin
R llvm/test/tools/llvm-profgen/Inputs/dap.bin
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/Inputs/external-address.perfscript
R llvm/test/tools/llvm-profgen/Inputs/filter-ambiguous-profile.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfbin
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfscript
R llvm/test/tools/llvm-profgen/Inputs/invalid-range.perfscript
R llvm/test/tools/llvm-profgen/Inputs/lbr-perf-for-dap.script
R llvm/test/tools/llvm-profgen/Inputs/missing-dwarf.exe
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfbin
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.mmap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/out-of-bounds.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/pie-dap-perf.txt
R llvm/test/tools/llvm-profgen/Inputs/pie-lbr-perf.script
R llvm/test/tools/llvm-profgen/Inputs/profile-density-cs.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/profile-density.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.exe
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.o.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.dwo.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.exe
R llvm/test/tools/llvm-profgen/Inputs/symbolize.ll
R llvm/test/tools/llvm-profgen/Inputs/symbolize.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.ll
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/artificial-branch.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.pdb
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cold-profile-trimming.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-interrupt.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-invalid-ret-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/css-pgo-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-perf-trace.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-pie.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/dap.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/external-address.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/filter-ambiguous-profile.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/invalid-range.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/lbr-perf-for-dap.script
A llvm/test/tools/llvm-profgen/X86/Inputs/missing-dwarf.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.mmap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/out-of-bounds.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-dap-perf.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-lbr-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density-cs.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.o.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.dwo.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable-pie.test
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable.test
A llvm/test/tools/llvm-profgen/X86/callback-external-addr.test
A llvm/test/tools/llvm-profgen/X86/coff-profile.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming-symbolized.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming.test
A llvm/test/tools/llvm-profgen/X86/context-depth.test
A llvm/test/tools/llvm-profgen/X86/coroutine.test
A llvm/test/tools/llvm-profgen/X86/cs-extbinary.test
A llvm/test/tools/llvm-profgen/X86/cs-external-address.test
A llvm/test/tools/llvm-profgen/X86/cs-interrupt.test
A llvm/test/tools/llvm-profgen/X86/cs-invalid-ret-addr.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-cost.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-sample-profile.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline.test
A llvm/test/tools/llvm-profgen/X86/cs-tailcall.test
A llvm/test/tools/llvm-profgen/X86/disassemble.test
A llvm/test/tools/llvm-profgen/X86/etm-non-arm.test
A llvm/test/tools/llvm-profgen/X86/filter-ambiguous-profile.test
A llvm/test/tools/llvm-profgen/X86/fname-canonicalization.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator-probe.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator.test
A llvm/test/tools/llvm-profgen/X86/func-split.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-force-dwarf.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe2.test
A llvm/test/tools/llvm-profgen/X86/inline-probe-afdo.test
A llvm/test/tools/llvm-profgen/X86/inline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/invalid-perfscript.test
A llvm/test/tools/llvm-profgen/X86/invalid-range.test
A llvm/test/tools/llvm-profgen/X86/lit.local.cfg
A llvm/test/tools/llvm-profgen/X86/merge-cold-profile.test
A llvm/test/tools/llvm-profgen/X86/missing-dwarf.test
A llvm/test/tools/llvm-profgen/X86/mmapEvent.test
A llvm/test/tools/llvm-profgen/X86/multi-load-segs.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/profile-density.test
A llvm/test/tools/llvm-profgen/X86/pseudo-probe-desc-mismatch.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding-discriminator.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-noprobe.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/separate-debuginfo-binary.test
A llvm/test/tools/llvm-profgen/X86/split-dwarf.test
A llvm/test/tools/llvm-profgen/X86/symbolize.test
A llvm/test/tools/llvm-profgen/X86/truncated-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/update-samples.test
R llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable-pie.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable.test
R llvm/test/tools/llvm-profgen/callback-external-addr.test
R llvm/test/tools/llvm-profgen/coff-profile.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming-symbolized.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming.test
R llvm/test/tools/llvm-profgen/context-depth.test
R llvm/test/tools/llvm-profgen/coroutine.test
R llvm/test/tools/llvm-profgen/cs-extbinary.test
R llvm/test/tools/llvm-profgen/cs-external-address.test
R llvm/test/tools/llvm-profgen/cs-interrupt.test
R llvm/test/tools/llvm-profgen/cs-invalid-ret-addr.test
R llvm/test/tools/llvm-profgen/cs-preinline-cost.test
R llvm/test/tools/llvm-profgen/cs-preinline-sample-profile.test
R llvm/test/tools/llvm-profgen/cs-preinline.test
R llvm/test/tools/llvm-profgen/cs-tailcall.test
R llvm/test/tools/llvm-profgen/disassemble.test
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
R llvm/test/tools/llvm-profgen/filter-ambiguous-profile.test
R llvm/test/tools/llvm-profgen/fname-canonicalization.test
R llvm/test/tools/llvm-profgen/fs-discriminator-probe.test
R llvm/test/tools/llvm-profgen/fs-discriminator.test
R llvm/test/tools/llvm-profgen/func-split.test
R llvm/test/tools/llvm-profgen/inline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/inline-force-dwarf.test
R llvm/test/tools/llvm-profgen/inline-noprobe.test
R llvm/test/tools/llvm-profgen/inline-noprobe2.test
R llvm/test/tools/llvm-profgen/inline-probe-afdo.test
R llvm/test/tools/llvm-profgen/inline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/invalid-perfscript.test
R llvm/test/tools/llvm-profgen/invalid-range.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
R llvm/test/tools/llvm-profgen/merge-cold-profile.test
R llvm/test/tools/llvm-profgen/missing-dwarf.test
R llvm/test/tools/llvm-profgen/mmapEvent.test
R llvm/test/tools/llvm-profgen/multi-load-segs.test
R llvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/noinline-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/profile-density.test
R llvm/test/tools/llvm-profgen/pseudo-probe-desc-mismatch.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding-discriminator.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test
R llvm/test/tools/llvm-profgen/recursion-compression-noprobe.test
R llvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
R llvm/test/tools/llvm-profgen/separate-debuginfo-binary.test
R llvm/test/tools/llvm-profgen/split-dwarf.test
R llvm/test/tools/llvm-profgen/symbolize.test
R llvm/test/tools/llvm-profgen/truncated-pseudoprobe.test
R llvm/test/tools/llvm-profgen/update-samples.test
Log Message:
-----------
[llvm-profgen][test] Split tests by target architecture (#207724)
The top-level llvm-profgen lit configuration previously disabled the
entire test directory unless the X86 target was registered. As a result,
target-independent tests and tests for ARM and AArch64 also implicitly
depended on X86.
Split target-specific tests and inputs into X86, ARM, and AArch64
directories with per-directory lit.local.cfg files. Leave help.test at
the top level because it is target-independent. Existing X86 tests
remain guarded by X86 and run as before, while ARM and AArch64 tests no
longer require the X86 target. The X86 non-ARM ETM rejection case also
no longer requires the ARM target; it only requires X86 and OpenCSD.
Split the former etm-arch.test into ARM/etm-arch.test, containing the
two ARM-specific checks, and X86/etm-non-arm.test, containing the
existing X86 rejection check. The tested inputs and expected diagnostics
are preserved.
Update match-blocks-with-pseudo-probes-inline.test,
pseudoprobe-decoding-inline.test, and pseudoprobe-decoding-noinline.test
in BOLT to refer to the relocated X86 inputs. All other llvm-profgen
tests and inputs are pure renames.
This does not change llvm-profgen runtime behavior; it only removes
unnecessary cross-target dependencies from its test suite.
This is a preparatory change for extending llvm-profgen profiling
support to AArch64 and for introducing the universal profile-guided
automatic software loop data prefetcher described in the RFC:
https://discourse.llvm.org/t/rfc-universal-profile-guided-automatic-software-loop-data-prefetcher-for-llvm/90916
Commit: 6e7afc10170d711659cbbf0dc25e81f457bda409
https://github.com/llvm/llvm-project/commit/6e7afc10170d711659cbbf0dc25e81f457bda409
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Remove doxygen comments from logging implemenetation APIs (#209086)
These APIs are intended for internal consumption by the ORC runtime's
logging system: plain comments are more appropriate here than doxygen
comments.
Commit: 2bcb848904ae3a2bd7bd3bfb8a8f562529ccb318
https://github.com/llvm/llvm-project/commit/2bcb848904ae3a2bd7bd3bfb8a8f562529ccb318
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt-c/Logging.h
Log Message:
-----------
[orc-rt] Require ORC_RT_LOG format strings to be string literals (#209090)
os_log needs the format string as a literal (it builds format metadata
at the call site), while the none and printf backends accept a runtime
const char*. That mismatch let a non-literal format compile on
none/printf and fail only on an os_log build. Enforce the literal
requirement uniformly in the ORC_RT_LOG macro via an unevaluated
sizeof("" ...) check, so it is caught at the call site on every backend.
Commit: a0f98011c4a82aab540fe9efa68aafb251a3b1b7
https://github.com/llvm/llvm-project/commit/a0f98011c4a82aab540fe9efa68aafb251a3b1b7
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-12 (Sun, 12 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/CodeGen/RISCV/xqci-macro-fusions.mir
Log Message:
-----------
[RISCV] Fuse QC_E_LI to Loads/Store (#208134)
The QC Access relocations require the `qc.e.li` to be adjacent to its
load/store. This ensures that happens, and allows more relaxation
opportunities.
Commit: fb8c7da5b86b9911e1ae677e147bead6e9b115b8
https://github.com/llvm/llvm-project/commit/fb8c7da5b86b9911e1ae677e147bead6e9b115b8
Author: Matthias Wippich <mfwippich at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/TokenKinds.h
Log Message:
-----------
[clang][NFC] move TokenKey to TokenKinds.h (#208867)
This patch moves the `TokenKey` enum closer to where it's actually used.
This is in preparation to generate it from tablegen once the definition
has been moved.
Commit: ca970f3bb3ce41365dfc85049db44489c88cb0a5
https://github.com/llvm/llvm-project/commit/ca970f3bb3ce41365dfc85049db44489c88cb0a5
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
Log Message:
-----------
[VPlan] Simplify reverses through unary ops (fneg) (#208257)
By marking fneg as elementwise
Commit: f97cdc4aaad6990f6c9adfad50f67acf9c5349ac
https://github.com/llvm/llvm-project/commit/f97cdc4aaad6990f6c9adfad50f67acf9c5349ac
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/test/Transforms/Inline/PowerPC/inline-target-attr.ll
Log Message:
-----------
[PowerPC] Specify inlining behavior in TableGen (#206938)
Remove the custom areInlineCompatible() implementation and specify the
inlining behavior in TableGen instead.
I've tried to classify these to the best of my ability. Most features
stay at InlineDefault with the usual "caller can have more features than
callee" semantics. Tuning features are InlineIgnore. This includes all
the directive features, which, as far as I can tell, are only used for
tuning heuristics.
I also marked a few InlineMustMatch/InlineInverse, though I'm not
particularly confident on which ones are required to match.
Commit: 2119e359b1f968da94ff27a4078d569e18903aef
https://github.com/llvm/llvm-project/commit/2119e359b1f968da94ff27a4078d569e18903aef
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/gnu-build-attributes.s
Log Message:
-----------
[lld][ELF] Concatenate .gnu.build.attributes.* sections (#208737)
ld.bfd/ld.gold have been concatenating the GNU build attribute sections
since 2018:
https://gitlab.com/gnutools/binutils-gdb/-/commit/7d8a31665739412395f6dd370d2279acd322e78e
Do the same in LLD. These do not have a dedicated section type or flags,
so this is handled by the name-based logic. (Peculiarly, there used to
be SHF_GNU_BUILD_NOTE, but it was removed again.)
Not concatenating these results in a huge number of sections, which
breaks tools like `file`.
Commit: 56e62e539eb65ebe4ec9fc6de0328fea21ae86fd
https://github.com/llvm/llvm-project/commit/56e62e539eb65ebe4ec9fc6de0328fea21ae86fd
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/simd-arith.ll
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmax.ll
M llvm/test/CodeGen/WebAssembly/simd-relaxed-fmin.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
Log Message:
-----------
[WebAssembly] Use generic pseudo_fmin/pseudo_fmax opcodes (#208454)
The pmin/pmax instructions are equivalent to these with operands
swapped.
The existing matching code for these instructions was incorrect, because
it failed to handle signed zeros and NaNs properly. You can't treat
strict and non-strict comparisons the same in this context.
Commit: 32f3f9dfce7ba9042ebfe7b42e72139454d29672
https://github.com/llvm/llvm-project/commit/32f3f9dfce7ba9042ebfe7b42e72139454d29672
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
Log Message:
-----------
[SLP][NFC] Pre-commit tests for select IR-flag/metadata propagation (#208150)
Pre-commits regression tests for an upcoming SLPVectorizer fix (see
#207982). These IR shapes are currently vectorized by SLP, and the
vectorization is functionally correct but when a bundle of
scalar`select` instructions is vectorized, the resulting vector `select`
drops the fast-math flags (and other IR flags/metadata such as
`!unpredictable`) that were common to every scalar lane.
This NFC patch records the current (buggy) behavior so that the
follow-up fix's diff is limited to the behavioural change: `select_nnan`
currently loses `nnan` on the vectorized select, while
`select_not_all_nnan` (one lane missing `nnan`) correctly has none.
Co-authored-by: Ayush Rai <Ayush.Rai at amd.com>
Commit: 2de67c330a9739e559f88de9874d4cba3ffc50ca
https://github.com/llvm/llvm-project/commit/2de67c330a9739e559f88de9874d4cba3ffc50ca
Author: David Green <david.green at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
Log Message:
-----------
[AArch64] Clear kill flags from visitINSvi64lane (#209096)
If we replace a reg, we can have more uses meaning the kill flags are no
longer
valid. Make sure we remove them in case.
Commit: f48baca733790625d08b7bbfb64ada65516c06f3
https://github.com/llvm/llvm-project/commit/f48baca733790625d08b7bbfb64ada65516c06f3
Author: Alon Filler <alonfiller at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lld/docs/NewLLD.rst
Log Message:
-----------
[Docs][NFC] Fix a few typos in NewLLD.rst (#193569)
Commit: c47d1cf955f607fea1d089b9e05aedf8867231ff
https://github.com/llvm/llvm-project/commit/c47d1cf955f607fea1d089b9e05aedf8867231ff
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Fir/derived-type-aliases.fir
Log Message:
-----------
[flang][FIR] implement asm alias interface for fir.type under option (#208665)
FIR is extremely verbose with derived types because the type lists all
the component names and types, so in case of nested derived type, the
type length in the assembly may grow over thousands of characters.
This patch implements the `getAlias` that allows using the fir.type name
as the MLIR type alias. This significantly reduce the IR size in
application with derived type.
I am planning to enable this by default, but there will be some churn in
the lit test, so I am first adding it under a developer option.
Assisted-by: Cursor
Commit: 3a61e727bc056024bdf4960e914ec6651fd41a72
https://github.com/llvm/llvm-project/commit/3a61e727bc056024bdf4960e914ec6651fd41a72
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/test/CodeGen/ARM/estimate-size-copy.mir
Log Message:
-----------
[ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (#203318)
The estimate of a function size now includes (what I hope are) upper
bounds on the size of the prologue and epilogue; adds size estimates for
some pseudo-instructions that were previously counted as 0; and
increases the estimates for things that were previously optimistic, such
as assuming no constant pool entry ever needs to be duplicated. The
estimation function is also passed extra information to use for
adjusting its estimates, such as the BigFrameOffsets flag which makes
some pseudos have much longer expansions.
Background:
EstimateFunctionSizeInBytes is supposed to estimate how large a Thumb1
function will end up, in advance of actually doing the full code
generation. It must overestimate rather than underestimating, because
large functions need a special precaution (namely, making sure LR is
stacked, so that BL can be used for an intra-function long branch). In
multiple cases recently it has underestimated, leading to a crash later
in code generation, when ARMConstantIslandsPass needs to insert an
intra-function BL and finds that it isn't safe to corrupt LR.
Discussion on Discourse suggested that it's OK to overestimate by quite
a large factor, because any significantly large function won't be badly
impacted by a push of LR that turns out to be unnecessary. The main
place where we want to leave out those unnecessary pushes is _really_
small leaf functions, where the extra push and pop might be a
significant fraction of the whole call.
Commit: 1651159f32cfcf82ecbb364dbf879e97b53d8060
https://github.com/llvm/llvm-project/commit/1651159f32cfcf82ecbb364dbf879e97b53d8060
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/tools/mlir-irdl-to-cpp/CMakeLists.txt
M mlir/tools/mlir-src-sharder/CMakeLists.txt
Log Message:
-----------
[MLIR] Install missing standalone helper tools (#205066)
Standalone MLIR installs CMake package files that can reference helper
executables needed by downstream builds. Most helper tools already have
install paths available through existing LLVM tool and utility install
options, but `mlir-src-sharder` does not pass an install destination to
`add_tablegen` and `mlir-irdl-to-cpp` does not define an install rule.
Install those two missing helpers.
Co-authored-by: Luca Fancellu <luca.fancellu at arm.com>
Commit: 6e8a4ce8343f2d489f5ecdca5cd443a584f77e71
https://github.com/llvm/llvm-project/commit/6e8a4ce8343f2d489f5ecdca5cd443a584f77e71
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/docs/resources/build.md
Log Message:
-----------
[lldb][docs] Make it clear that we require SWIG >= 4 (#208687)
We said this in "Preliminaries", but later had a note about SWIG < 4. So
if you hadn't read
the first part properly, it looked like we allow < 4.
We do not, so I've removed the note about < 4 and
added SWIG to the "Optional Dependencies" table
for extra emphasis.
Commit: cec7cf4c3dd71068495245111553e4fba3d35c5e
https://github.com/llvm/llvm-project/commit/cec7cf4c3dd71068495245111553e4fba3d35c5e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bug-deadlanes.ll
M llvm/test/CodeGen/AMDGPU/bug-multi-operands-to-update-after-fold.mir
M llvm/test/CodeGen/AMDGPU/bug-pk-f32-imm-fold.mir
M llvm/test/CodeGen/AMDGPU/bug-sdag-emitcopyfromreg.ll
M llvm/test/CodeGen/AMDGPU/bug-sdag-scheduler-cycle.ll
M llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
M llvm/test/CodeGen/AMDGPU/bug-v4f64-subvector.ll
M llvm/test/CodeGen/AMDGPU/bug-vopc-commute.ll
M llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/build_vector.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/bundle-breaks-phy-liveness.mir
M llvm/test/CodeGen/AMDGPU/bundle-latency.mir
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
M llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-bfloat.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/call-waw-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/callbr.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-entry.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-sgpr-over-limit.ll
M llvm/test/CodeGen/AMDGPU/cc-update.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-smem.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/chain-node-divergence-update-crash-issue-173885.ll
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads-postra.mir
M llvm/test/CodeGen/AMDGPU/cluster-flat-loads.mir
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
M llvm/test/CodeGen/AMDGPU/coalesce-identity-copies-undef-subregs.mir
M llvm/test/CodeGen/AMDGPU/coalesce-into-dead-subreg-copies.mir
M llvm/test/CodeGen/AMDGPU/coalesce-liveout-undef-copy.mir
M llvm/test/CodeGen/AMDGPU/coalesce-vgpr-alignment.ll
M llvm/test/CodeGen/AMDGPU/coalescer-avoid-coalesce-class-with-no-registers.ll
M llvm/test/CodeGen/AMDGPU/coalescer-avoid-coalesce-class-with-no-registers.mir
M llvm/test/CodeGen/AMDGPU/coalescer-extend-pruned-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-remat-dead-use.mir
M llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subranges-prune-kill-copy.mir
M llvm/test/CodeGen/AMDGPU/coalescer-undef-subreg-use-invalid-lanemask.mir
M llvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coalescing-subreg-was-undef-but-became-def.mir
M llvm/test/CodeGen/AMDGPU/coalescing-with-subregs-in-loop-bug.mir
M llvm/test/CodeGen/AMDGPU/coalescing_makes_lanes_undef.mir
M llvm/test/CodeGen/AMDGPU/code-object-v3.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
M llvm/test/CodeGen/AMDGPU/code-size-estimate.mir
M llvm/test/CodeGen/AMDGPU/codegen-internal-only-func.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrmode-sext.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null-vector.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/coexec-rewrite-mfma.ll
M llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
M llvm/test/CodeGen/AMDGPU/coexec-sched-warning.mir
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
M llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps_nnan.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (#208893)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
https://github.com/llvm/llvm-project/commit/6e42e25efa9856d360fb38ef3a6e7a7c3334dd33
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/combine-ftrunc.ll
M llvm/test/CodeGen/AMDGPU/combine-vload-extract.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/commute-frame-index-operand.mir
M llvm/test/CodeGen/AMDGPU/commute-op-sel.mir
M llvm/test/CodeGen/AMDGPU/commute-shifts.ll
M llvm/test/CodeGen/AMDGPU/commute-vop3.mir
M llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll
M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
M llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
M llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/convergence-laneops.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/copy-hoist-no-spills.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
M llvm/test/CodeGen/AMDGPU/copy-to-reg-frameindex.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg.ll
M llvm/test/CodeGen/AMDGPU/copy-vgpr-clobber-spill-vgpr.mir
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/copy_to_scc.ll
M llvm/test/CodeGen/AMDGPU/copysign-simplify-demanded-bits.ll
M llvm/test/CodeGen/AMDGPU/copysign-to-disjoint-or-combine.ll
M llvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/cse-phi-incoming-val.ll
M llvm/test/CodeGen/AMDGPU/csr-gfx10.ll
M llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
M llvm/test/CodeGen/AMDGPU/ctls.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/dag-preserve-disjoint-flag.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-extract-vec-elt-different-sizes.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-mullohi.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-multi-memop.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-v1i8-extractvecelt-crash.ll
M llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll
M llvm/test/CodeGen/AMDGPU/dbg-value-ends-sched-region.mir
M llvm/test/CodeGen/AMDGPU/dbg-value-starts-sched-region.mir
M llvm/test/CodeGen/AMDGPU/dead-frame-index-dbg-value.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
M llvm/test/CodeGen/AMDGPU/dead_bundle.mir
M llvm/test/CodeGen/AMDGPU/dead_copy.mir
M llvm/test/CodeGen/AMDGPU/debug-frame.ll
M llvm/test/CodeGen/AMDGPU/debug-independence-dead-mi-elimination.mir
M llvm/test/CodeGen/AMDGPU/debug-independence-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler-liveins.mir
M llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
M llvm/test/CodeGen/AMDGPU/debug.ll
M llvm/test/CodeGen/AMDGPU/default-flat-work-group-size-overrides-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/disable_form_clauses.ll
M llvm/test/CodeGen/AMDGPU/div-rem-by-constant-64.ll
M llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-extra-formal-args.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/diverge-switch-default.ll
M llvm/test/CodeGen/AMDGPU/divergence-at-use.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
M llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine-true16.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx11.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine_gfx1250.mir
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (#208894)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 9e8b030aa80b78abaa054b5f75c36f51d1995088
https://github.com/llvm/llvm-project/commit/9e8b030aa80b78abaa054b5f75c36f51d1995088
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/flatten-elementwise.mlir
M mlir/test/Dialect/Linalg/flatten-unsupported.mlir
Log Message:
-----------
[MLIR][Linalg] Fix FlattenElementwiseOp on broadcasted linalgs (#207005)
Applying FlattenElementwiseLinalgOp on Broadcasted linalg would break.
This transformation is not valid for those usecase, so I added a
condition to exit gracefully instead.
Commit: abd72b0eb7807a98c261a6cac35a969f954a76cd
https://github.com/llvm/llvm-project/commit/abd72b0eb7807a98c261a6cac35a969f954a76cd
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A offload/test/offloading/fortran/target-teams-if-runtime-init.f90
M openmp/device/src/Kernel.cpp
Log Message:
-----------
[OpenMP] Publish target-init team state with acq_rel barrier (#208701)
In __kmpc_target_init, thread 0 initializes the team state in LDS
(HasThreadState = 0, ThreadStates = nullptr) and then releases the other
threads with synchronize::threadsAligned(atomic::relaxed). Because the
relaxed ordering emits no memory fence, the initializing LDS stores are
not guaranteed to be visible to the worker threads before they proceed.
A worker thread can then read the uninitialized team state and produce
wrong results or crash. This is the flow that causes the race as I
understand it.
```
__kmpc_target_init (Kernel.cpp:107)
-> initializeRuntime (Kernel.cpp:38)
-> state::init (State.cpp:286)
-> TeamState.init(IsSPMD) (State.cpp:295)
-> HasThreadState = false (State.cpp:248) // <-- the value later read stale
ThreadStates = nullptr (State.cpp:296)
-> synchronize::threadsAligned(atomic::relaxed) (Kernel.cpp:115) // <-- insufficient barrier:
// relaxed emits no fence, so the state stores above are not published to the other threads
... worker threads continue past the barrier ...
__kmpc_parallel_60 (Parallelism.cpp:143)
if (OMP_UNLIKELY(!if_expr || state::HasThreadState || ...)) (Parallelism.cpp:158)
^ reads HasThreadState from LDS; a stale/unpublished value (!= 0)
diverts the worker onto the wrong (serialized) path
```
The fix changes the barrier at Kernel.cpp:115 from atomic::relaxed to
atomic::acq_rel so that the memory fences are emitted.
Reproducing the problem requires an `if` clause with a non-constant
condition on the target region. The worker's read of HasThreadState
originates from the serialized-region check in __kmpc_parallel_60. When
the `if` condition is constant (or absent), the optimizer can prove that
branch is dead and eliminates the HasThreadState load entirely, so the
race has nothing to observe. A non-constant `if` keeps if_expr, and
hence the LDS read alive, exposing the problem.
I have added a Fortran offload regression test that launches a target
region many times to make the timing-dependent race likely to surface.
Fixes https://github.com/llvm/llvm-project/issues/208698.
Assisted-by: Cursor
Commit: 3de2e4a3f11390db0c026f54edf86bd8f6997947
https://github.com/llvm/llvm-project/commit/3de2e4a3f11390db0c026f54edf86bd8f6997947
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/literals.cpp
Log Message:
-----------
[clang][bytecode] diagnose reads from non-constant local variables... (#208990)
... if we're in the bottom frame.
Commit: 13dbff365eabc45fcc26a36ef077f52b6e168347
https://github.com/llvm/llvm-project/commit/13dbff365eabc45fcc26a36ef077f52b6e168347
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/unroll-partial01.f90
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Dialect/OpenMP/cli-unroll-partial.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial01.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial02.mlir
Log Message:
-----------
[Flang][Openmp] Implement support for partial in unroll construct (#206642)
As described in section 9.2.2 of openmp 5.2 spec, the patch implements
support for partial in unroll construct.
Commit: e3e15695a0e9b1acd3a4821cdeea353ce951f5da
https://github.com/llvm/llvm-project/commit/e3e15695a0e9b1acd3a4821cdeea353ce951f5da
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/dpp64_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp64_combine.mir
M llvm/test/CodeGen/AMDGPU/dpp_combine.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine.mir
M llvm/test/CodeGen/AMDGPU/drop-mem-operand-move-smrd.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-large-stride.ll
M llvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/ds-read2-write2-debug-info.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/ds-vectorization-alignment.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/ds_permute_a_v.ll
M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_offset_order.ll
M llvm/test/CodeGen/AMDGPU/ds_read2_superreg.ll
M llvm/test/CodeGen/AMDGPU/ds_read2st64.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
M llvm/test/CodeGen/AMDGPU/ds_write2st64.ll
M llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
M llvm/test/CodeGen/AMDGPU/dual-source-blend-export.ll
M llvm/test/CodeGen/AMDGPU/dummy-regalloc-priority-advisor.mir
M llvm/test/CodeGen/AMDGPU/dumpcode.ll
M llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-indirect.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16.ll
M llvm/test/CodeGen/AMDGPU/dvgpr_sym_fail_too_many_block_size_16_anon.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert-cost.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/early-inline-alias.ll
M llvm/test/CodeGen/AMDGPU/early-inline.ll
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/early-tailduplicator-nophis.mir
M llvm/test/CodeGen/AMDGPU/early-tailduplicator-terminator.mir
M llvm/test/CodeGen/AMDGPU/early-term.mir
M llvm/test/CodeGen/AMDGPU/eh_frame.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-xnack.ll
M llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
M llvm/test/CodeGen/AMDGPU/elf-note-null-terminator.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/elf.metadata.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/emit-high-vgprs.mir
M llvm/test/CodeGen/AMDGPU/empty-function.ll
M llvm/test/CodeGen/AMDGPU/empty-text.ll
M llvm/test/CodeGen/AMDGPU/enable-scratch-only-dynamic-stack.ll
M llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-atomicrmw-syncscope.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling-no-outstanding.ll
M llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling.ll
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
M llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx1250.mir
M llvm/test/CodeGen/AMDGPU/export-cluster-postra.mir
M llvm/test/CodeGen/AMDGPU/extend-bit-ops-i16.ll
M llvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
M llvm/test/CodeGen/AMDGPU/extend-wwm-virt-reg-liveness.mir
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
M llvm/test/CodeGen/AMDGPU/extra-sroa-after-unroll.ll
M llvm/test/CodeGen/AMDGPU/extract-i8-codegen.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-binop-build-vector.ll
M llvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs-known-signbit-combine-fast-fdiv-lowering.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (#208895)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b4698d8d53e9b228bd84676ae83637b52a30d0e9
https://github.com/llvm/llvm-project/commit/b4698d8d53e9b228bd84676ae83637b52a30d0e9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fadd64.ll
M llvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
M llvm/test/CodeGen/AMDGPU/fast-regalloc-bundles.mir
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
M llvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir
M llvm/test/CodeGen/AMDGPU/fastregalloc-sgpr-only.mir
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcmp64.ll
M llvm/test/CodeGen/AMDGPU/fconst64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
M llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fdot2.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/fence-barrier.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/finalizebundle.mir
M llvm/test/CodeGen/AMDGPU/fix-crash-valu-hazard.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-ptr-reg-copy-livein.ll
M llvm/test/CodeGen/AMDGPU/fix-frame-reg-in-custom-csr-spills.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-fake16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-gfx12-true16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-block-end-iterator-debugloc.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-av-classes.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-readfirstlane-av-register-regression.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-vgpr16-to-spgr32.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wmma-scale-lo256.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-wwm.mir
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-error-unsupported-gpu-hsa.ll
M llvm/test/CodeGen/AMDGPU/flat-for-global-subtarget-feature.ll
M llvm/test/CodeGen/AMDGPU/flat-load-clustering.mir
M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/flat-offset-bug.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-alloca-issue-155902.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-fold-fi.mir
M llvm/test/CodeGen/AMDGPU/flat-scratch-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fma-mix.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fma.ll
M llvm/test/CodeGen/AMDGPU/fmac.sdwa.ll
M llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
M llvm/test/CodeGen/AMDGPU/fmamk_fmaak-t16.mir
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (#208896)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b5e94d5ffca8fe3d7b063af48d9535d7b13af66a
https://github.com/llvm/llvm-project/commit/b5e94d5ffca8fe3d7b063af48d9535d7b13af66a
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/test/Lower/MIF/image_index.f90
Log Message:
-----------
[flang][MIF] Fix lowering sub argument in IMAGE_INDEX #208318 (#208544)
This PR fixes issue #208318, which did not correctly prepare the SUB
argument for IMAGE_INDEX in the correct type.
Commit: d097c2b764460284b186636b547573d309eaba8d
https://github.com/llvm/llvm-project/commit/d097c2b764460284b186636b547573d309eaba8d
Author: disservin <disservin.social at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR][NFC] Add parentheses around logical AND (#208512)
Fixes a `-Wparentheses` warning about unclear priority of operators.
Commit: d62c903ffd049da2a80acc7f0c0671447adc76f7
https://github.com/llvm/llvm-project/commit/d62c903ffd049da2a80acc7f0c0671447adc76f7
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Refactor the string benchmarks (#185397)
Fixes #179696
Commit: 95f1eab03f35545eb308246376541a7150a7a4e4
https://github.com/llvm/llvm-project/commit/95f1eab03f35545eb308246376541a7150a7a4e4
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/RISCV/double-previous-failure.ll
A llvm/test/CodeGen/RISCV/jump-cond-merging-optsize.ll
M llvm/test/CodeGen/RISCV/jump-is-expensive.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/rvv/pr93587.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop-shl-zext-opt.ll
M llvm/test/CodeGen/RISCV/select-and.ll
M llvm/test/CodeGen/RISCV/select-or.ll
M llvm/test/CodeGen/RISCV/setcc-logic.ll
Log Message:
-----------
[RISCV] Add getJumpConditionMergingParams to support branch condition merging (#206897)
Override `getJumpConditionMergingParams` so that
`shouldKeepJumpConditionsTogether`
can decide whether to keep `br (and/or cond1, cond2)` merged into a
single
branch or split it into two branches, based on a configurable cost
threshold.
Previously RISC-V used the default cost `{-1, -1, -1}`, which always
split
the conditions. Now it returns a base cost calculated from
`MispredictPenalty`
(via scaling it down by an assumed misprediction rate 25%).
These values are controllable via
`riscv-br-merging-base-cost/-likely-bias/-unlikely-bias`.
This is another approach to #191158 when `TuneJumpIsExpensive` is not
set.
Commit: f8b07132c195ce2823f6a54cd978301af8c6d551
https://github.com/llvm/llvm-project/commit/f8b07132c195ce2823f6a54cd978301af8c6d551
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
Log Message:
-----------
[NFC][SPIR-V] Add emitSimpleExecutionMode helper to dedup single imm OpExecutionMode emission (#208674)
Commit: d0ac84b54b90c03f0ba54b7f1b75b43941d7a6b1
https://github.com/llvm/llvm-project/commit/d0ac84b54b90c03f0ba54b7f1b75b43941d7a6b1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
Log Message:
-----------
[lldb][test] Fix XML register info test (#209124)
Missed by #208838, which is a follow up to #188049 which changed the
alignment rules.
Some of these tests have incorrect outputs now
and I will fix that later. For now at least
they pass again.
XML related tests are not being run in CI,
which I will also address later.
Commit: dc8ee15f2bbc5b18316f071c5ae746bd95609ade
https://github.com/llvm/llvm-project/commit/dc8ee15f2bbc5b18316f071c5ae746bd95609ade
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM conversion for SNegate (#206950)
Commit: 19f997320131c3d01e8ee32e1f22ee98a1ee0ec7
https://github.com/llvm/llvm-project/commit/19f997320131c3d01e8ee32e1f22ee98a1ee0ec7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
Log Message:
-----------
[NFC][SPIR-V] Remove unused LowLevelType parameter from buildLoadInst (#208428)
Commit: 717615829bba4035897a4ebdbdef919f31529762
https://github.com/llvm/llvm-project/commit/717615829bba4035897a4ebdbdef919f31529762
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/typeid.cpp
Log Message:
-----------
[clang][bytecode] Improve diagnostics on typeid field access (#209101)
Do some extra work to extract the requested field name.
Commit: da138053e78c5af7b83f49674b4e190e1803102d
https://github.com/llvm/llvm-project/commit/da138053e78c5af7b83f49674b4e190e1803102d
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN rcp builtins (#197447)
Adds codegen for the following AMDGCN reciprocal builtins:
- __builtin_amdgcn_rcp (double)
- __builtin_amdgcn_rcpf (float)
- __builtin_amdgcn_rcph (half)
- __builtin_amdgcn_rcp_bf16 (bfloat16)
These are lowered to the corresponding `llvm.amdgcn.rcp` intrinsic.
Commit: a0df86deb4295ff9ebebe54eb515bc49a7fb65f8
https://github.com/llvm/llvm-project/commit/a0df86deb4295ff9ebebe54eb515bc49a7fb65f8
Author: Mark Zhuang <mark.zhuang at spacemit.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add TuneNoDefaultUnroll to spacemit-x100 (#209069)
In the spec2k6int tests, some subtests improved while others
regressed. The overall score shows a 0.7% gain. Given that
most OoO CPUs enable this feature by default, also enable
it by default for X100.
Commit: cb71fefb2258fdd00747043a9c322f95d684b000
https://github.com/llvm/llvm-project/commit/cb71fefb2258fdd00747043a9c322f95d684b000
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
M llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/pr125278.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/replace-first-order-recurrence-by-versioned-iv.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
Log Message:
-----------
[VPlan] Expand SCEV min/max via scalar intrinsic VPInstructions. (#207842)
Use the VPInstruction::Intrinsic opcode to expand min/max SCEV
expressions to LLVM min/max intrinsics as VPInstructions.
The operands are chained in reverse order, matching SCEVExpander's
expansion of min/max expressions.
This helps to clean up another set of duplicated vscale calls.
Depends on https://github.com/llvm/llvm-project/pull/207541
Depends on https://github.com/llvm/llvm-project/pull/207836
PR: https://github.com/llvm/llvm-project/pull/207842
Commit: 6461bd3749dc09698b76c3349e7b4befab7f7f9b
https://github.com/llvm/llvm-project/commit/6461bd3749dc09698b76c3349e7b4befab7f7f9b
Author: Le Gia Bao <legiabao7300 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M polly/lib/Support/ScopHelper.cpp
A polly/test/CodeGen/issue205137.ll
Log Message:
-----------
[Polly] Fix infinite recursion in `ScopExpander::visitAddRecExpr` (#206063)
visitUnknown follow VMap, call GenSE.getSCEV() on the mapped value, and
get back the original AddRec, recursing visitAddRecExpr infinitely.
Insert the result into SCEVCache before calling visit() to cut
recursion.
Fixes #205137.
Commit: 5db1f5442ef0c9bcb2f4ca362361daaf2a76acfb
https://github.com/llvm/llvm-project/commit/5db1f5442ef0c9bcb2f4ca362361daaf2a76acfb
Author: maflcko <6399679+maflcko at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/make_signed.h
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/wrappers.h
A compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
Log Message:
-----------
compiler-rt: ubsan: Add suppressions test for nested functions (#206962)
This is a test-only change to increase the test coverage of UBSan to
clarify that named suppressions only apply to the function itself and do
not cover (possibly inlined) called functions.
The background is that, while trying to fix
https://github.com/llvm/llvm-project/issues/132533, I discovered missing
test coverage and possibly confused myself into a wrong fix in
https://github.com/llvm/llvm-project/pull/206735#discussion_r3505816693
So I think it could make sense to add test coverage for the case that I
broke, which serves as a reference baseline ground truth.
---------
Co-authored-by: MarcoFalke <*~=`'#}+{/-|&$^_ at 721217.xyz>
Commit: 6d026ea1d89795532c7ead1e57676bd1d1018afb
https://github.com/llvm/llvm-project/commit/6d026ea1d89795532c7ead1e57676bd1d1018afb
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard-attrs.mir
Log Message:
-----------
[AMDGPU] Remove option to disable SGPR hazard waits (#208720)
This was useful when initially implemented, but probably be removed now.
Commit: 13e9cc22ce4edfd4b1347d6bed9cd95868e2d4f4
https://github.com/llvm/llvm-project/commit/13e9cc22ce4edfd4b1347d6bed9cd95868e2d4f4
Author: LiqinWeng <liqin.weng at spacemit.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Driver/print-enabled-extensions/riscv-spacemit-a100.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrFormatsSpacemitV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXSpacemiT.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/features-info.ll
A llvm/test/MC/RISCV/xsmtvdotii-invalid.s
A llvm/test/MC/RISCV/xsmtvdotii-valid.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Support spacemit vsmtvdotii extensions (#202533)
SPEC: https://github.com/spacemit-com/docs-ai/blob/main/en/architecture/ime_extension.md
Commit: 8cb0e63054ce96860b12d68218eb67c97bc6c378
https://github.com/llvm/llvm-project/commit/8cb0e63054ce96860b12d68218eb67c97bc6c378
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[AArch64][llvm][tablegen] Restrict luti6 assembly (4 regs, 8-bit) to 0 <= Zn <= 7 (#200751)
The `luti6` instruction (four registers, 8-bit) should only allow
assembly of `0 <= Zn <= 7`, since there's only 3 bits for `Zn`. It
actually allows > 7:
```
luti6 { z0.b - z3.b }, zt0, { z8 - z10 }
```
which produces a duplicate encoding to the following:
```
luti6 { z0.b - z3.b }, zt0, { z0 - z2 }
```
Update tablegen to handle the inferred register-class naming
collision caused by adding the explicit z0-z7 ZPR3 class.
Commit: 3966381ccbd135e34b44a746187ac6c5140df4cd
https://github.com/llvm/llvm-project/commit/3966381ccbd135e34b44a746187ac6c5140df4cd
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
Log Message:
-----------
[lldb] Correct alignment of register fields (#209140)
In #188049 the alignment of register names for the raw value part "pc =
0x..." changed.
This resulted in many register fields being 2 spaces off where they
should be, because the stream we were printing to had a 2 space indent
set where it had none before.
This is actually a bug in the original field formatting code. It assumed
the stream had no indent level of its own. So the fix is to indent using
the stream (the 2 spaces), then indent to where the register name ends.
Commit: 6c009ff4b39ec2a0233c40c87f8f3709e9dc2eff
https://github.com/llvm/llvm-project/commit/6c009ff4b39ec2a0233c40c87f8f3709e9dc2eff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
M llvm/test/CodeGen/AMDGPU/fmax3.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fmul64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fncall-implicitdef.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.legal.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.si.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-v2f32.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-fold-legalize-dag-increase-insts.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-agpr-phis.mir
M llvm/test/CodeGen/AMDGPU/fold-cndmask-wave32.mir
M llvm/test/CodeGen/AMDGPU/fold-commute-sgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fmaak-bug.ll
M llvm/test/CodeGen/AMDGPU/fold-freeze-fmul-to-fma.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-copy-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fold-literal-multiple-gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple-commute.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple.mir
M llvm/test/CodeGen/AMDGPU/fold-omod-crash.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index-agpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-order.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-remove-m0-redef.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-s-add-copy-to-vgpr.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-scalar-fmac.mir
M llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-reload-into-m0.mir
M llvm/test/CodeGen/AMDGPU/fold-restore-undef-use.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir
M llvm/test/CodeGen/AMDGPU/fold-short-64-bit-literals.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-vgpr-phyreg.mir
M llvm/test/CodeGen/AMDGPU/fold-zero-high-bits-clear-kill-flags.mir
M llvm/test/CodeGen/AMDGPU/fold-zero-high-bits-skips-non-reg.mir
M llvm/test/CodeGen/AMDGPU/fold_acc_copy_into_valu.mir
M llvm/test/CodeGen/AMDGPU/folding-of-i32-as-i64.mir
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll
M llvm/test/CodeGen/AMDGPU/force-wait-after-always-gds.mir
M llvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp32_to_bf16.ll
M llvm/test/CodeGen/AMDGPU/fp_trunc_store_fp64_to_bf16.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13) (#208897)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: d76f677c075b71e2a5c2ee35539992d753258e2a
https://github.com/llvm/llvm-project/commit/d76f677c075b71e2a5c2ee35539992d753258e2a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fpenv.ll
M llvm/test/CodeGen/AMDGPU/fpext-free.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui_uitofp.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-lowering-fp-adjusted.mir
M llvm/test/CodeGen/AMDGPU/frame-setup-without-sgpr-to-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/freeze-binary.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/frexp-constant-fold.ll
M llvm/test/CodeGen/AMDGPU/fshl-scalar-shift-zero.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/fsub64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.f64.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/function-alignment.ll
M llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/function-args.ll
M llvm/test/CodeGen/AMDGPU/function-call-relocs.ll
M llvm/test/CodeGen/AMDGPU/function-esm2-prologue-epilogue.ll
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
M llvm/test/CodeGen/AMDGPU/gcn-reg-pressure-true16-integer-overflow.mir
M llvm/test/CodeGen/AMDGPU/gds-allocation.ll
M llvm/test/CodeGen/AMDGPU/gds-atomic.ll
M llvm/test/CodeGen/AMDGPU/gds-unsupported.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/gep-flags-stack-offsets.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx10-vop-literal.ll
M llvm/test/CodeGen/AMDGPU/gfx10plus-wavefront-sgpr-count.ll
M llvm/test/CodeGen/AMDGPU/gfx11-sgpr-hazard-latency.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll
M llvm/test/CodeGen/AMDGPU/gfx942-hazards.mir
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14) (#209117)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b0158bbd4fec69feda78752270573e505d53ddcf
https://github.com/llvm/llvm-project/commit/b0158bbd4fec69feda78752270573e505d53ddcf
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/init.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/tools/CMakeLists.txt
A orc-rt/tools/ogre/CMakeLists.txt
A orc-rt/tools/ogre/ogre.cpp
R orc-rt/tools/orc-executor/CMakeLists.txt
R orc-rt/tools/orc-executor/orc-executor.cpp
Log Message:
-----------
[orc-rt] Rename orc-executor to ogre (#209143)
The ORC Generic Runtime Environment (OGRE) will serve as our canonical
"blank executor" program: A program that simply listens for an ORC
controller connection, then runs whatever program is provided to it by
the controller.
Commit: 3081049a69f85dd4079a959c4e50c6ccf9f691d0
https://github.com/llvm/llvm-project/commit/3081049a69f85dd4079a959c4e50c6ccf9f691d0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/include/lldb/Core/Opcode.h
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/unittests/Disassembler/CMakeLists.txt
A lldb/unittests/Disassembler/x86/TestGetOpcodeOversized.cpp
Log Message:
-----------
[lldb] Don't build an opcode from a failed disassembly (#208279)
lldb does not check if the instruction was decoded correctly. This
causes the following assert to hit:
https://github.com/llvm/llvm-project/blob/06499c927e5012166f4553c58f8af593521ea14d/lldb/include/lldb/Core/Opcode.h#L214
due to a buffer overflow. This happens when starting `lldb-dap` on
Windows with `lldb-server`.
This patch clamps the instruction size to the maximum possible
instruction size possible to avoid the assert to hit. It also adds a
regression test.
Related:
- https://github.com/llvm/llvm-project/pull/208277.
Commit: efd160260d8437710714d8a3ba9301f45d61ee95
https://github.com/llvm/llvm-project/commit/efd160260d8437710714d8a3ba9301f45d61ee95
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/single_early_exit_zext_trip_count.ll
Log Message:
-----------
[SCEV][NFC] Address post-merge comments on precommit test (#209094)
Drop unnecessary atomic/unordered loads, unify block label naming.
Follow-up to b33af86b032e (#208784).
Commit: a5fc1d68f995744af71b91663e9f46910d9345ca
https://github.com/llvm/llvm-project/commit/a5fc1d68f995744af71b91663e9f46910d9345ca
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/markdown/BUILD.gn
Log Message:
-----------
[gn] port cc048e80b670 more (#209156)
00cd65638a7cf attempted this, but it was incomplete.
Commit: a4364df185433cd37b793aa4ff64cba1c72dcbda
https://github.com/llvm/llvm-project/commit/a4364df185433cd37b793aa4ff64cba1c72dcbda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Handle invalid function in CXXInheritedCtorInitExpr (#209138)
Commit: db28e48d67e3b0c44d88be9ea2d28eca2d239a9a
https://github.com/llvm/llvm-project/commit/db28e48d67e3b0c44d88be9ea2d28eca2d239a9a
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/bitwise-shift-common.c
M clang/test/Analysis/constant-folding.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/string.c
Log Message:
-----------
[analyzer] Smarter range inference for {+,-,*} (#209048)
SymbolicRangeInferrer previously fell back to the full range of the
result type for BO_Add, BO_Sub and BO_Mul, discarding any constraints
known about the operands.
This caused a false positive in optin.taint.TaintedAlloc: a bounded
tainted value multiplied by a constant
(e.g. `malloc(groups * sizeof(gid_t))` with `groups` bounded) was
treated as unbounded whenever the multiplication was done in a wide
(e.g. 64-bit size_t) type, because the operand's range was lost. A
32-bit multiplication accidentally avoided the warning only because the
narrow result type already bounds the value below SIZE_MAX/4. Fixes
#173113
---
With `inferFromCorners` we compute the smallest and largest possible
outcome of the two range sets for `LHS {+,-,*} RHS`. If fails for some
reason, it falls back to the previous behavior and takes [MIN, MAX] for
type T - the most conservative range.
This patch also covers some pre-existing FIXMEs in the tests. I didn't
evaluate this change - however, I think it's harmless.
Assisted-by: Claude Opus 4.8
Commit: 3ae6937d0491665c2f47505e71e53ce5ef758424
https://github.com/llvm/llvm-project/commit/3ae6937d0491665c2f47505e71e53ce5ef758424
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 1b879464b362 (#209147)
Commit: 7a9bbe00493434ad70bd3de0840c980fd88abde6
https://github.com/llvm/llvm-project/commit/7a9bbe00493434ad70bd3de0840c980fd88abde6
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
A clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/Analysis/z3/z3-unarysymexpr.c
Log Message:
-----------
[analyzer] Fix unary/binary op support for SMT symbolic execution (#205078)
SMT symbolic execution:
The patch fixes unary op support, converts operands of logical operators
to boolean in getBinExpr, and clears the hasComparison flag in
getSymExpr when a boolean operand is converted to a non-bool integer.
This PR allows C functions like
```
int f(int x, int y) {
if (~(x && y))
return 0;
return 1;
}
```
to be analyzed with `-cc1 -analyze -analyzer-checker=core
-analyzer-constraints=z3`
Fixes #205037.
Assisted-by: Codex
Commit: cc11dd4aa650abce746953c4c243427c2a6d16cc
https://github.com/llvm/llvm-project/commit/cc11dd4aa650abce746953c4c243427c2a6d16cc
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
Log Message:
-----------
[gn build] Port 3bc47c8dc927 (#209148)
Commit: fb0563958e113bf9d384284ec2be1a73cfe7ff3e
https://github.com/llvm/llvm-project/commit/fb0563958e113bf9d384284ec2be1a73cfe7ff3e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port 640079288c5e (#209149)
Commit: af30b76228e315fac32b8cf0b8282841d839c365
https://github.com/llvm/llvm-project/commit/af30b76228e315fac32b8cf0b8282841d839c365
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port 9b9f44d1c55c (#209150)
Commit: ff331ac51c37746f5f3ea9679f791992e3d93918
https://github.com/llvm/llvm-project/commit/ff331ac51c37746f5f3ea9679f791992e3d93918
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
Log Message:
-----------
[gn build] Port c847ddf8f18d (#209151)
Commit: 6da5260422379a53aadc0aedacded102fcff3fac
https://github.com/llvm/llvm-project/commit/6da5260422379a53aadc0aedacded102fcff3fac
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
Log Message:
-----------
[gn build] Port d09048a46401 (#209152)
Commit: d9a5286ac41e54ed8aa73b61a8f173a9d0460085
https://github.com/llvm/llvm-project/commit/d9a5286ac41e54ed8aa73b61a8f173a9d0460085
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
Log Message:
-----------
[gn build] Port d1dbd484ada2 (#209153)
Commit: 4df8add1fd27371378285cd68cbfd3474e3f84b5
https://github.com/llvm/llvm-project/commit/4df8add1fd27371378285cd68cbfd3474e3f84b5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port e6673bd03771 (#209154)
Commit: e2dee8e8d047f858b03d451c37b3cc21dcefe69c
https://github.com/llvm/llvm-project/commit/e2dee8e8d047f858b03d451c37b3cc21dcefe69c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port f99f2a582e94 (#209155)
Commit: 477bb26c7c0c5eee0491ce058968ce3c4b89623b
https://github.com/llvm/llvm-project/commit/477bb26c7c0c5eee0491ce058968ce3c4b89623b
Author: Joel Walker <theagingboy05 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sat.mir
Log Message:
-----------
[GlobalISel] Add G_SADDSAT/G_UADDSAT/G_SSUBSAT/G_USUBSAT to computeKnownBits (#209075)
Add known-bits handling for the saturating arithmetic opcodes G_SADDSAT,
G_UADDSAT, G_SSUBSAT and G_USUBSAT in GISelValueTracking, using the
existing
`KnownBits::{sadd,uadd,ssub,usub}_sat` helpers - the same ones
ValueTracking
uses for the corresponding IR intrinsics. (On the SelectionDAG side only
`ISD::USUBSAT` is currently handled.)
The new test covers exact constant folding, all four saturation clamps
(255, 127, 0, -128), partially known operands, a vector case, and fully
unknown operands. Without the change, all of these results are unknown.
Part of #150515.
---
Assisted by Claude (Anthropic).
Commit: 308393ede14cc8533d1be122b5df88bf9ba4173b
https://github.com/llvm/llvm-project/commit/308393ede14cc8533d1be122b5df88bf9ba4173b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/load-cast-context.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
Log Message:
-----------
[LV] Allow scalable epilogue VFs matching the MainLoop VF (#208686)
This effectively limited scalable epilogue VFs to the MainLoopVF/2, as
all VFs are powers-of-two. This restriction does not exist for fixed
vector VFs. This could result in worse VF selections for scalable
epilogues (at high interleave counts), or in many cases only fixed
vectors selected (as there would be no allowed scalable VF in
ProfitableVFs).
Commit: 8a337c88d64e8d3fe918ae9fdc740fadbba2368c
https://github.com/llvm/llvm-project/commit/8a337c88d64e8d3fe918ae9fdc740fadbba2368c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
Revert "[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)" (#209162)
This reverts commit 503f0ca19cfcc9c0c88d6918939a2c0038ad0498.
This is obviously incorrect on big endian architectures.
Commit: 16bd5ce1184bb5683ea96290478e5912cf2975b9
https://github.com/llvm/llvm-project/commit/16bd5ce1184bb5683ea96290478e5912cf2975b9
Author: Alex Bradbury <asb at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
Log Message:
-----------
Reland [AArch64] Copy x4/x5 vararg payload into the x64 stack in Arm64EC exit thunks (#208453)
Reland llvm/llvm-project#190933, which was reverted by
llvm/llvm-project#198540 due to an EXPENSIVE_CHECKS build failure.
The fix relative to the reverted patch is to do the memcpy before the
final CALLSEQ_START for the dispatch call, avoiding nested call-frame
pseudos if memcpy lowers to a call.
Original commit message:
Currently the x4/x5 in a variadic Arm64EC exit thunks are treated by
LLVM like any other outgoing arguments. x4/x5 contain a pointer to the
first stack parameter and the size of the parameters passed on the
stack, and the generated exit thunk must memcpy these to the x86-64
stack. Current MSVC does this correctly.
Rather than introducing a new entry to the CallingConv enum, we mark the
call as vararg in AArch64ArmECCallLowering so that the lowering logic in
AArch64ISelLowering.cpp can recognise this case, perform the necessary
memcpy, and drop the x4/x5 arguments.
LLVM should additionally ensure that x0-x3 are mirrored to f0-f3 in
order to match the Windows x86-64 vararg ABI, but that change is left
for a follow-up patch.
Commit: 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
https://github.com/llvm/llvm-project/commit/5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Author: Jean-Didier PAILLEUX <jean-didier.pailleux at sipearl.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/test/Fir/basic-program.fir
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
Log Message:
-----------
[Flang][MIF] Allocation of NON-ALLOCATABLE SAVE coarray (#205847)
The goal of this PR is to add support for allocating NON-allocatable
coarrays that are not in the `Main` program.
All allocations will be performed in a function called
`__mif_save_coarrays_allocate`. If this function exists, then
LLVM::GlobalCtors is created (or modified).
The initialization of the MIF with `mif.init` is moved too in a
GlobalCtors with a priority of 0 to ensure that the initialization takes
place before any MIF allocations.
---------
Co-authored-by: Dan Bonachea <dobonachea at lbl.gov>
Commit: 40f2fda52c4b3b110f38acded24521217473d106
https://github.com/llvm/llvm-project/commit/40f2fda52c4b3b110f38acded24521217473d106
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
Log Message:
-----------
[lldb-dap] Migrate all DAP variables test. (#208215)
migrate TestDAP_variables and TestDAP_variables_children.
Commit: fff064e93d144a6499efcf091e1f226d144e514f
https://github.com/llvm/llvm-project/commit/fff064e93d144a6499efcf091e1f226d144e514f
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
M clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Interpreter/execute-pch.cpp
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
Log Message:
-----------
[Clang][Interpreter] Enable PIC to avoid 32-bit relocation overflows (#201286)
In clang-repl, R_*_32 relocations are emitted as direct 32-bit
PC-relative references. A conventional static linker can resolve
references to external symbols through the GOT or copy relocations, but
clang-repl directly mmaps shared objects into memory, bypassing the
static linker.
As a result, these relocations may exceed their 32-bit range if a
referenced symbol is located more than 2 GB away from the JIT
allocation, which can occur on FreeBSD.
Enable PIC to force accesses to external data through the GOT, avoiding
the generation of direct 32-bit relocations that are subject to the 2 GB
addressing limit.
Commit: a624d9999cf1ac83aa1fe0820c9311de8106175e
https://github.com/llvm/llvm-project/commit/a624d9999cf1ac83aa1fe0820c9311de8106175e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
Log Message:
-----------
[orc-rt] Remove redundant [[nodiscard]] from runFinalizeActions. NFC. (#209163)
runFinalizeActions returns an Expected, which already carries a
nodiscard attribute.
Commit: 9325f22f1cf17a6f192519163dd449d684700d2a
https://github.com/llvm/llvm-project/commit/9325f22f1cf17a6f192519163dd449d684700d2a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/cmake/modules/CMakeLists.txt
Log Message:
-----------
[MLIR] Normalize path separator in MLIRConfig.cmake (#208659)
Under Windows, the paths may contain `\` path separators.
`MLIR_TABLEGEN_EXE` is added into MLIRConfig.cmake where backslashes are
interpreted as escape characters. This results in syntax errors during
`find_package(MLIR)`.
Fix by using CMake-normalized paths (`/` separator under all platforms).
LLVM/Clang do not put their tablegen paths in their config files.
Commit: 1884c7565155b603ec3946718801f53b276876bb
https://github.com/llvm/llvm-project/commit/1884c7565155b603ec3946718801f53b276876bb
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
Log Message:
-----------
[mlir][tosa] Validate variable element types (#205873)
I changed the TOSA validation path so unsupported types report a normal
diagnostic instead of crashing.
Fixes #205710
Commit: 0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
https://github.com/llvm/llvm-project/commit/0f69d2804b9b2542fde2ecafbb23f1e8a8b48d86
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__iterator/segmented_iterator.h
Log Message:
-----------
[libc++][NFC] Remove unused includes from <__iterator/segmented_iterator.h> (#209105)
Commit: d4c6c8623e9bf9aa75ad049f55423223228116b3
https://github.com/llvm/llvm-project/commit/d4c6c8623e9bf9aa75ad049f55423223228116b3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP] Support memory runtime alias checks
Vectorize straight-line code blocked by runtime-checkable may-alias
dependencies by versioning the block. Drop the deps, and if the tree is
profitable, emit base-object address-range overlap checks branching to a
vector fast path or an original-order scalar fallback.
Fixes #201534
Reviewers: RKSimon, bababuck, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/203631
Commit: 7f35300f0deb972606082122e4c7d76dda03203c
https://github.com/llvm/llvm-project/commit/7f35300f0deb972606082122e4c7d76dda03203c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Compiler.h
M orc-rt/include/orc-rt/Error.h
Log Message:
-----------
[orc-rt] Replace ORC_RT_NODISCARD with [[nodiscard]]. NFCI. (#209169)
The ORC runtime requires C++17, so we can use the C++17 [[nodiscard]]
attribute directly, rather than going through a macro.
Commit: dc1273beba1c70cb74d03c760958ee625d8aecf5
https://github.com/llvm/llvm-project/commit/dc1273beba1c70cb74d03c760958ee625d8aecf5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (#209135)
Previously the link compatibilty was based on a raw string match of the
triple + cpu name. Start parsing the triple, and use the compatibility
function. Start using AMDGPU::TargetID from TargetParser, as a step
towards removing clang's redundant TargetID handling.
Co-authored-by: Claude (Opus 4.8)
Commit: 254472bc2edd6d8ec536656368869e36c386a339
https://github.com/llvm/llvm-project/commit/254472bc2edd6d8ec536656368869e36c386a339
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang][CMake] Use LLVM-declared LLVM_EXTERNAL_LIT (#208680)
LLVM_EXTERNAL_LIT is already declared by
https://github.com/llvm/llvm-project/blob/99fb741b6e0da866bf3c6000531104bff347d787/llvm/cmake/modules/AddLLVM.cmake#L2175.
Flang's redeclaration in standalone builds is redundant and breaks on
Windows because the filename there is `llvm-lit.py`.
Commit: a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
https://github.com/llvm/llvm-project/commit/a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
Revert "[SLP] Support memory runtime alias checks"
This reverts commit d4c6c8623e9bf9aa75ad049f55423223228116b3 to address
postcommit review https://github.com/llvm/llvm-project/pull/203631?email_source=notifications&email_token=ABI45DXYNFIHECEWI5IGYJT5ETMNLA5CNFSNUABKM5UWIORPF5TWS5BNNB2WEL2QOVWGYUTFOF2WK43UKJSXM2LFO4XTINRYGQ4TAMRWGAZ2M4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#pullrequestreview-4684902603
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209173
Commit: da0045a12dbc6cc5b07534ca9ddcceaef49f05de
https://github.com/llvm/llvm-project/commit/da0045a12dbc6cc5b07534ca9ddcceaef49f05de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
M llvm/test/CodeGen/AMDGPU/greedy-instruction-split-subrange.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/half-alloca-promotion.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hard-clause-limit-attr.mir
M llvm/test/CodeGen/AMDGPU/hard-clause-limit.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-load-monitor.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
M llvm/test/CodeGen/AMDGPU/hazard-getreg-waitalu.mir
M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-func-align.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-asan.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-images.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-uniform-workgroup-size-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-extract-cost-comparison.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (#209118)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b719e2e27ce121bec3afcf96f4806c0592ce95a1
https://github.com/llvm/llvm-project/commit/b719e2e27ce121bec3afcf96f4806c0592ce95a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2-test.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
M llvm/test/CodeGen/AMDGPU/iglp.opt.reentry.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
M llvm/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint-err.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-parse.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/inst-prefetch-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (#209119)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx>
to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa),
dropping the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: db87fc87c7fd70f9e429439aeebbf9cd014dde54
https://github.com/llvm/llvm-project/commit/db87fc87c7fd70f9e429439aeebbf9cd014dde54
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
Log Message:
-----------
[libc][RISC-V] Enable additional entrypoints and headers (#208927)
Bring most of the already enabled libs for x86_64 to riscv.
Also, move two libs in x86_64 entrypoints.txt to keep the file sorted
alphabetically.
Commit: 62b7c7f547da4af492e85aa09b6feafc9b513f23
https://github.com/llvm/llvm-project/commit/62b7c7f547da4af492e85aa09b6feafc9b513f23
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5595710 (#209165)
This fixes 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9e014de2d3cc674b548e321013bfe42e6f5485ab
https://github.com/llvm/llvm-project/commit/9e014de2d3cc674b548e321013bfe42e6f5485ab
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
Log Message:
-----------
[Clang] Fixed missing sentinel attribute diagnostic discrepancy with explicit object parameters (#208842)
When using the sentinel attribute on a variadic function with an
explicit object parameter, the missing sentinel attribute diagnostic
takes into account the explicit object parameter as an argument. It was
diagnosing `missing sentinel in function call` instead of `not enough
variable arguments in '%0' declaration to fit a sentinel`, compared to
other similar variadic functions.
Fixes #200007
Commit: 90d8af8caac360dca0fa28abbb5804dcbe694ef1
https://github.com/llvm/llvm-project/commit/90d8af8caac360dca0fa28abbb5804dcbe694ef1
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
Log Message:
-----------
[Clang][AArch64] Add ACLE _n variants for svdot intrinsics (#208694)
Add missing _n variants for the svdot ACLE
intrinsics in arm_sve.td
Add CodeGen tests in acle_sve2p1_dot.c to verify
correct intrinsics are generated
List of Intrinsics:
- svdot_n_s32_s16
- svdot_n_u32_u16
- svdot_n_f32_f16
Commit: 7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
https://github.com/llvm/llvm-project/commit/7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][Hexagon] Save/restore full r0-r7 in getcontext/jumpto (#208753)
The Hexagon save and restore routines dropped GPRs, producing an
incomplete context.
UnwindRegistersSave.S (__unw_getcontext): save r0-r7 (stores began at
__r[8]), drop a dead "r1 = memw(r30)" before the PC store, and return
UNW_ESUCCESS instead of a stale non-zero value.
UnwindRegistersRestore.S (jumpto): restore the missing r2-r7 (r0/r1 and
r8-r31 were already handled), and fix the stale "pointer is in r2"
comment (it is r0).
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: ff599bba9d370bf58e4a34f9f29b4fb6234013f0
https://github.com/llvm/llvm-project/commit/ff599bba9d370bf58e4a34f9f29b4fb6234013f0
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Hexagon] Enable init-array by default for picolibc (#208639)
Picolibc uses the modern .init_array/.fini_array mechanism rather than
legacy .init/.fini sections. Extend UseInitArrayDefault in
HexagonToolChain::addClangTargetOptions to also return true when
--cstdlib=picolibc is selected, preventing -fno-use-init-array from
being passed to cc1.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
https://github.com/llvm/llvm-project/commit/fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port SelectionDAGISel to NewPM
Similar to other targets, for getting the NewPM rolling.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/208982
Commit: c31455cd07c43ed02445f5b1f1057037f0503552
https://github.com/llvm/llvm-project/commit/c31455cd07c43ed02445f5b1f1057037f0503552
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/src/filesystem/operations.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
Log Message:
-----------
[libc++] Fix filesystem::remove_all bug with read-only nested directory (#197104)
Consider a directory `parent/child`, where `parent` has read-only
permissions. Calling `remove_all` on `parent` is expected to fail with a
permission error, however it fails with a different error depending on
the platform (such as "error file exists" on AIX).
During the recursive removal, `unlinkat` is first called on the child
and fails with a permission error. Rather than returning, the function
continues and tries `unlinkat` on the parent and fails with a different
error depending on the platform. This error is returned instead of the
permission error. This PR makes the first encountered error be returned
instead.
According to the standard [fs.op.remove.all]:
> Effects: Recursively deletes the contents of p if it exists, then
> deletes file p itself, as if by POSIX remove.
The word "then" implies an ordering where deleting the contents of p
should be successful before deleting file p itself.
Fixes #197100.
Commit: 52511761bc80e96b7d07b4da71bb08c8f498dee1
https://github.com/llvm/llvm-project/commit/52511761bc80e96b7d07b4da71bb08c8f498dee1
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (#208300)
…e scope
SIMemOpAccess::constructFromMIWithMMO merged multiple MMO sync scopes by
calling isSyncScopeInclusion(A, B) and blindly overwriting SSID with B
when it returned false. This was correct when B strictly subsumes A, but
isSyncScopeInclusion returned false for both "A < B" and "A and B are
incomparable" -- e.g. agent-one-as (one-AS, agent level) vs workgroup
(cross-AS, workgroup level) live on different branches of the
two-dimensional scope lattice and neither subsumes the other. In the
incomparable case the resulting SSID depended on MMO order, silently
dropping agent-scope cache-management requirements.
Fix: replace isSyncScopeInclusion (std::optional<bool>) with
getMergedSyncScopeID (std::optional<SyncScope::ID>) which returns the
smallest scope inclusive of both inputs. The merged level is
max(level_A, level_B); if either input is cross-AS the result is also
cross-AS, since dropping cross-AS ordering would silently lose the
ordering guarantee for address spaces not covered by a one-AS scope.
Add tests in memory-legalizer-multiple-mem-operands-atomics.mir
verifying that a FLAT_ATOMIC_ADD with agent-one-as and workgroup MMOs
produces agent-scope cache ops (BUFFER_WBINVL1_VOL) regardless of MMO
order.
Commit: c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
https://github.com/llvm/llvm-project/commit/c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][NFC] Skip macro source-location check for names that can't warn (#208862)
While profiling Linux headers, I noticed that
`Preprocessor::CheckMacroName` performs expensive source-location
queries for every macro, even when no diagnostic is possible. We can
avoid this overhead by only performing these checks when the macro name
is actually a reserved identifier or keyword, skipping them entirely for
ordinary macros.
| | basket Ir |
| --- | --- |
| before | 10,690,004,315 |
| after | 10,649,181,540 |
| **Δ** | **−40.8M (−0.38%)** |
this is a follow up to #137306 and #139492
Commit: aab2ff0b9096df1d5168e293c81b6653e759890d
https://github.com/llvm/llvm-project/commit/aab2ff0b9096df1d5168e293c81b6653e759890d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
Log Message:
-----------
[SDAG][X86] Form pseudo fmin/fmax from select_cc (#208717)
Create PSEUDO_FMIN/PSEUDO_FMAX from SELECT_CC in addition to
SELECT/VSELECT.
Unfortunately we can't just do this in the common SimplifySelectCC()
helper because of the StrictFP handling and need to handle all three
cases explicitly.
I ran into this trying to use the ops on s390x, but there are also some
avx512 cases that benefit, so I split out this generalization.
Commit: 592953beff733a1e28f6c6e5e39f948fb035a329
https://github.com/llvm/llvm-project/commit/592953beff733a1e28f6c6e5e39f948fb035a329
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clang][Diagnostics] Only record lexer check points when colors are enabled (#204926)
Only build lexer check points when colored diagnostics are enabled,
since that's the only case where they're ever used,
This should reduce the cost on larger builds.
| Commit | Basket Ir | Delta |
|---|---|---|
| 863b2c84 (Parent) | 30,240,576,150 | — |
| 718aac9f (Commit) | 30,336,607,185 | +0.318% |
| **+ this pr** | **30,279,772,621** | **+0.130%** |
**synthetic error file (12.3k lines, 300 errors):**
| Build | Error-TU Ir (colors on) | Δ vs commit |
|---|---|---|
| 718aac9f (Commit) | 1,386,488,658 | — |
| **+ this pr** | **1,387,140,588** | **+0.05%** |
Resolves #203764
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ee71eb831b6090897df8ae4f843f4b14370131d5
https://github.com/llvm/llvm-project/commit/ee71eb831b6090897df8ae4f843f4b14370131d5
Author: StoeckOverflow <95052643+StoeckOverflow at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
Log Message:
-----------
[APINotes] Match function-like Where.Parameters in Sema (#205307)
This PR teaches Sema to apply function-like `Where.Parameters` selectors
for API notes.
It builds on #204147 by using the serialized `Where.Parameters` selector
keys in Sema. For each `FunctionDecl` / `CXXMethodDecl`, Sema derives an
exact parameter selector from the declaration’s `FunctionProtoType`.
Broad name-only API notes lookup still runs first, preserving existing
behavior. If Clang can form a parameter selector, Sema then performs an
exact selector lookup and applies that result second, allowing
overload-specific notes to refine same-name broad notes.
Tests:
- Adds end-to-end module APINotes Sema coverage (`.apinotes` source ->
binary APINotes -> reader lookup -> Sema matching -> AST result)
- Covers core matching behavior for global functions and C++ methods,
including same-name overloads, exact empty selectors, broad-plus-exact
coexistence and mismatched selectors
- Covers important edge cases: default arguments, static methods, alias
spellings remaining non-canonicalized, by-value `const`, namespaced
functions, and overloaded operators.
This PR does not add duplicate-selector or unmatched-selector
diagnostics. Those remain for a follow-up diagnostics PR.
**Note**: this PR was originally stacked on top of #204147. It has now
been rebased on top of main containing those changes, so the remaining
diff should reflect only the top commit specific to this PR.
Reviewers: @Xazax-hun @j-hui @egorzhdan
---------
Co-authored-by: John Hui <updog at j-hui.com>
Commit: 42aaca2c4a6d69b6334be102e41d185526915f8b
https://github.com/llvm/llvm-project/commit/42aaca2c4a6d69b6334be102e41d185526915f8b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ReportErrorsViaSession utility. (#209177)
ReportErrorsViaSession is a function object constructed from a Session&
that forwards Errors to that Session's reportError method. It will be
used in upcoming patches to simplify some error reporting plumbing.
Commit: f88150e1d5fc8591b0d71619d02e5b553161c1f8
https://github.com/llvm/llvm-project/commit/f88150e1d5fc8591b0d71619d02e5b553161c1f8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed transposed transfer_read/write (#197281)
The problem was that adjustStridesForPermutation() permutes strides, but
they are required to compute base offset from transfer read indices.
Added optional argument to computeMemrefMeta() to preserve the original
strides.
Commit: 4c519c6e558a0cccf80c072ccf0822488968cbaf
https://github.com/llvm/llvm-project/commit/4c519c6e558a0cccf80c072ccf0822488968cbaf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (#209181)
Commit: 290601ed3e08a7e90b81b0b17cf45e1a435783a7
https://github.com/llvm/llvm-project/commit/290601ed3e08a7e90b81b0b17cf45e1a435783a7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Make timeout for HTTP send/receive in SymbolLocatorSymStore configurable (#192061)
This patch adds the `plugin.symbol-locator.symstore.timeout` setting and
keeps the previously hard-coded value of 60 sections as the default. It
adds a test to check that the breakpoint doesn't resolve and we get the
correct warning message if the timeout hits.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: da1e5f1f6c096f360abe39ad2f7d235b6d270a70
https://github.com/llvm/llvm-project/commit/da1e5f1f6c096f360abe39ad2f7d235b6d270a70
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UncheckedLocalVarsChecker] Improve the warning text (#208855)
This PR aligns UncheckedLocalVarsChecker and its variant's warning
message with the new warning format in
https://github.com/llvm/llvm-project/pull/202724.
Commit: ac370b8e838ada3dd482560c4b8a568e760f95b5
https://github.com/llvm/llvm-project/commit/ac370b8e838ada3dd482560c4b8a568e760f95b5
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
Log Message:
-----------
[MLIR][Linalg] Fix LinalgSpecializeGenericOpsPass for scalar inputs (#208466)
The test case added would crash because the Ranked Tensor-ness of
operands was assumed but never checked. This crash only happened when there
were multiple inputs as it must bail out somewhere else when there is only
1 input.
Commit: 24df1d13d9090e075b162bf81d1a34a408e54924
https://github.com/llvm/llvm-project/commit/24df1d13d9090e075b162bf81d1a34a408e54924
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
Reapply "[Clang] Transform lambda's constraints when instantiating parameter mapping (#207966)
This reapplies https://github.com/llvm/llvm-project/pull/195995
The last approach caused a regression because sometimes we transformed
the constraints of lambda expression too aggressively when we should
have preserved it.
The basic idea of this patch is to transform constraints of lambda
expressions when we instantiate the parameter mapping, thus the
evaluation can be emancipated from preserving outer template arguments.
Claude is used to help reduce the test case from #199209
Fixes https://github.com/llvm/llvm-project/issues/193944
Fixes https://github.com/llvm/llvm-project/issues/199209
Fixes https://github.com/llvm/llvm-project/issues/202957
Commit: fb0ffb1f5131018926e46a918744868c0d07abd7
https://github.com/llvm/llvm-project/commit/fb0ffb1f5131018926e46a918744868c0d07abd7
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (#207198)
The lowering code tries to implement splitting by keeping two source
values SrcVal and SrcVal2 for the Lo/Hi part respectively.
This is a bit awkward, because SrcVal2 may not be set. It makes more
sense to generating new DAG nodes that will be lowered separately by the
lowering mechanism, which revisits the newly added (split sourceval)
nodes for lowering.
Commit: ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
https://github.com/llvm/llvm-project/commit/ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-reverse.ll
Log Message:
-----------
[RISCV][P-ext] Improve RV64 v2i16 reverse codegen (#208664)
On RV64, v2i16 is widened to v4i16 before shuffle lowering. Recognize
the widened low-half reverse and select ppairoe.h directly instead of
rev16 followed by srli.
Commit: 695238ffaa64ac8f49e7da36d36c5170509007cc
https://github.com/llvm/llvm-project/commit/695238ffaa64ac8f49e7da36d36c5170509007cc
Author: Ariel-Burton <arielburton at yahoo.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Write original source language when writing and reading AST (#208115)
FAIL: Clang :: Frontend/ast-main.c
FAIL: Clang :: Frontend/ast-main.cpp
were failing on z/OS; this change fixes these lit failures.
The issue here is that on z/OS the original source code language needs
to be passed through to the IR so that the backend can encode this
information in the PPA2 in the object file. That means that it needs to
be exported to the AST so that going from saved AST -> IR will carry the
language through.
Commit: c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
https://github.com/llvm/llvm-project/commit/c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang] Multi-config CMake output paths in standalone builds (#208690)
When using a multi-config generator with CMake (such as "Ninja
Multi-Config" or any Visual Studio generator), the output path must be
specific to each config by having it include `${CMAKE_CFG_INTDIR}`.
`CMAKE_CFG_INTDIR` will just be `.` in single-config generators. Use the
same path as used by LLVM:
https://github.com/llvm/llvm-project/blob/cd662a7c4fb03a88d0e429a7fc8d8b470a812e2b/llvm/CMakeLists.txt#L562-L563
`LLVM_LIBDIR_SUFFIX` was seemingly forgotten in one of the paths.
This is not complete support (neither has LLVM). More paths would need
to be config-specific. In particular, `check-flang` does not work, but
at least one can build the executables.
Commit: cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
https://github.com/llvm/llvm-project/commit/cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
M libcxx/include/span
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/deduct.pass.cpp
Log Message:
-----------
[libc++] Backport P3029R1 Better `mdspan`'s CTAD to C++20/23 (#208132)
Also backport
- support for `T::value` of a reference type in `integral-constant-like`
from P2781R9 `std::constant_wrapper`, and
- LWG4351 _`integral-constant-like`_ needs more `remove_cvref_t`.
P3029R1 (and its further fixes) should be treated as a Defect Report
against C++20/23 to avoid behavior difference in different modes. Other
implementations will do or are already doing the same.
Commit: 31ccbe7007691bc6d2eb628dcd4ad1f264215322
https://github.com/llvm/llvm-project/commit/31ccbe7007691bc6d2eb628dcd4ad1f264215322
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/masked-store-with-profile-info.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
Log Message:
-----------
[LV] Extend test coverage with branch probabilities (NFC). (#209182)
Add tests with branch probabilities, including cost printing tests for
replicate regions, VPlan printing tests and masked stores with
probabilities.
Commit: a1a806bb371550661aaee787d2a3622d9e84d528
https://github.com/llvm/llvm-project/commit/a1a806bb371550661aaee787d2a3622d9e84d528
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
Log Message:
-----------
[memref] Support non-scalar copies in `reinterpret_cast` elision (#203873)
Extends `memref-elide-reinterpret-cast` from scalar-only copy
transformation to also handle copies of effectively 1D and static
multidimensional regions.
The rewrite is limited to cases where each non-unit `reinterpret_cast`
result dimension maps directly to a distinct identity-layout source
dimension with the same stride and sufficient static size. This lets the
rewrite use each loop IV
directly as a source memref index. Cases where result strides do not
match source identity strides are left untouched because they would
require linearization/delinearization across source dimensions.
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.
## Examples
Scalar copy, unchanged(*) behavior:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [1], sizes: [1, 1], strides: [1, 1]
: memref<1x108xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
memref.copy %src, %view : memref<1x1xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
// AFTER
%v = memref.load %src[%c0, %c0] : memref<1x1xf32>
memref.store %v, %dst[%c0, %c1] : memref<1x108xf32>
```
Effectively 1D copy:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [0], sizes: [1, 33, 1], strides: [1386, 42, 1]
: memref<1x33x42xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
memref.copy %src, %view : memref<1x33x1xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
// AFTER
scf.for %i = %c0 to %c33 step %c1 {
%v = memref.load %src[%c0, %i, %c0] : memref<1x33x1xf32>
memref.store %v, %dst[%c0, %i, %c0] : memref<1x33x42xf32>
}
```
Static 2D copy with offset becomes a nested loop with the static offset
folded into the `reinterpret_cast` source store indices.
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [16], sizes: [1, 33, 4], strides: [1386, 42, 1]
: memref<1x33x42xf32>
to memref<1x33x4xf32, strided<[1386, 42, 1], offset: 16>>
memref.copy %src, %view
// AFTER
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c16 = arith.constant 16 : index
%c33 = arith.constant 33 : index
scf.for %i = %c0 to %c33 step %c1 {
scf.for %j = %c0 to %c4 step %c1 {
%v = memref.load %src[%c0, %i, %j]
memref.store %v, %dst[%c0, %i, %c16 + %j]
}
}
```
## Scope
Supported:
- ranked, static-shape copy source and `reinterpret_cast` source/result
memrefs
- identity-layout `reinterpret_cast` sources
- rank-preserving `reinterpret_cast`s
- scalar copies, including dynamic result strides because all result
indices are zero
- non-scalar copies where every non-unit result dimension has a static
stride matching a distinct source dimension with sufficient static size
- static offsets, delinearized into source indices
- dynamic offsets only when the `reinterpret_cast` source has at most
one non-unit dimension and the result has at most one mapped non-unit
dimension
Not addressed:
- unranked or dynamic-shape copy/reinterpret_cast operands
- non-identity-layout `reinterpret_cast` sources
- rank-changing `reinterpret_cast`s
- dynamic strides on non-unit result dimensions
- result dimensions whose strides do not match source identity strides
- result dimensions that reuse a source dimension or cross source
dimension boundaries
- dynamic offsets requiring runtime div/rem delinearization
## Correctness
Result indices are translated to source indices by direct dimension
mapping: each non-unit result dimension must have the same stride as a
distinct source dimension.
Static offsets are delinearized into source indices before rewriting.
Dynamic offsets are only accepted when they can be used directly in the
single non-unit source dimension.
Cases assumed invalid by `reinterpret_cast`/`copy` semantics are guarded
with assertions.
(*) NFC to scalar copy case, we're now only creating zero constants for
indices once.
Commit: 158938ccba7a91e709a2bd8c607eaefd271a102b
https://github.com/llvm/llvm-project/commit/158938ccba7a91e709a2bd8c607eaefd271a102b
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-ppa1-name.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
Change zos-ppa1-name attr to be the name used in ppa1 (#208870)
Change the meaning of the `zos-ppa1-name` attribute to pass the name of
the function to use in the PPA1. The symbol name used in the PAA1 will
be:
- if the function has the `zos-ppa1-name` attribute, use that value. An
empty string will be mean don't add the name to the PPA1
- otherwise use the function name.
The behaviour for asm labels and `#pragma map` (PR coming shortly) is to
use the function name used in the source code in the PPA1. A follow on
PR for clang will set `zos-ppa1-name` to the mangled name ignoring asm
label to implement the non-empty string part of the first bullet.
Commit: ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
https://github.com/llvm/llvm-project/commit/ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Allow devirtualization involving array subscripts with constant indices when the pointee type is known [CWG1504] (#207540)
By C++17 [expr.add]/6, if the array element type and the pointee type
are not similar, behavior is undefined.
Commit: 5b169798db9fc312f397e219f54253266fd518f3
https://github.com/llvm/llvm-project/commit/5b169798db9fc312f397e219f54253266fd518f3
Author: Liza Burakova <liza at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__thread/thread.h
Log Message:
-----------
[libc++] Add missing include to thread.h (#208740)
Change #195509 removed unused transitive includes, but missed adding
<__type_traits/is_integral.h> to thread.h. This caused errors
to Chromium rolls for libc++ as they caught the missing import.
Commit: cc048f0d5516923ea29e9887eb92da0456eeb331
https://github.com/llvm/llvm-project/commit/cc048f0d5516923ea29e9887eb92da0456eeb331
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
R flang/test/Lower/OpenMP/Todo/declare-variant.f90
A flang/test/Lower/OpenMP/declare-variant-call.f90
A flang/test/Lower/OpenMP/declare-variant-construct.f90
A flang/test/Lower/OpenMP/declare-variant-device.f90
A flang/test/Lower/OpenMP/declare-variant-implementation.f90
A flang/test/Lower/OpenMP/declare-variant-module.f90
A flang/test/Lower/OpenMP/declare-variant-target-device.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
Log Message:
-----------
[flang][OpenMP] Lowering support for declare variant. (#206988)
Add lowering support for OpenMP DECLARE VARIANT. Each directive is
recorded on its base procedure during the structure checks. During call
lowering, best variant is picked based on recorded selecter and context.
Note: this PR does not include module-file support for DECLARE VARIANT,
so cross-module variant resolution is not yet available; it will be
added in a follow-up PR.
Assisted by: Cursor
Commit: 6c632847812cba9b13a4e9d79187fb0026276521
https://github.com/llvm/llvm-project/commit/6c632847812cba9b13a4e9d79187fb0026276521
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
Log Message:
-----------
[analyzer] Fix stale z3 analyzer-constraints name in test z3-logicalexpr-eval.c (#209185)
z3 was recently renamed to unsupported-z3.
Change the analyzer-constraints to unsupported-z3 in the test file
z3-logicalexpr-eval.c
Commit: 13dcad3571ecf0fb72486a52db9ce2231577a457
https://github.com/llvm/llvm-project/commit/13dcad3571ecf0fb72486a52db9ce2231577a457
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
Log Message:
-----------
[clang][OpenMP][test] Use -fopenmp=libomp explicitly in clang driver test (#209082)
Explicitly pass -fopenmp=libomp in the test to make it robust against
downstream configurations where the default OpenMP runtime is set to
something else (e.g., libgomp). Seems this is in alignment with other
tests in `clang/test/Driver`.
Commit: 03801323f6d9021469c9ece5442c526fc891447a
https://github.com/llvm/llvm-project/commit/03801323f6d9021469c9ece5442c526fc891447a
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb][test] Fix TestStatusline path resolution in symlinked environments (#209083)
Fixes a test timeout in TestStatusline.py introduced in commit
a35565161078 (#208609) when running in environments with symlinked
source paths.
Commit: 3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
https://github.com/llvm/llvm-project/commit/3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[analyzer][docs] CSA release notes for clang-23 (#207433)
The commits were gathered using:
```sh
git log --reverse --oneline llvmorg-23-init..llvm/main \
clang/lib/StaticAnalyzer clang/include/clang/StaticAnalyzer | \
grep -v NFC | grep -v OpenACC | grep -v -i revert | grep -v -i "webkit"
```
I used the `LLVM_ENABLE_SPHINX=ON` and `LLVM_ENABLE_DOXYGEN=ON` cmake
options to enable the `docs-clang-html` build target, which generates
the html into `build/tools/clang/docs/html/ReleaseNotes.html` of which I
attach the screenshots to let you judge if it looks all good or not.
I've swapped the PR links to the issue links when a PR was fixing an
open GitHub issue. Those issues anyway have a link to the PR inside.
Assisted-by: Claude Opus 4.8
Commit: 5e98ee7f78dd4febc473e338e929b1646082a4cb
https://github.com/llvm/llvm-project/commit/5e98ee7f78dd4febc473e338e929b1646082a4cb
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
Log Message:
-----------
[mlir][acc] Preserve shared data operations during if-clause lowering (#208771)
Example:
```fortran
!$acc kernels present(grid, c) if(offload_on)
do nc = 1, grid%rc%ncol
c(1,nc) = 0
end do
c(1,1) = 0
!$acc end kernels
```
In this code, kernels restructuring can create compute constructs that
share data-entry operations with an enclosing data region. If-clause
lowering could rewrite or erase these shared operations, producing
invalid IR or duplicate erasure.
Fix: Preserve externally owned data operations, deduplicate cleanup, and
retain duplicate operand ordering while cloning local operations once.
Commit: 8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
https://github.com/llvm/llvm-project/commit/8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
Author: Prajwal KP <prajwal.kp.1817 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fminimum.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
Log Message:
-----------
[ExpandReductions] Expand fmaximum/fminimum reductions (#195169)
fixes #195111
Commit: 3f12bb1f25b88e338679c42ccaea11fe204a0e1c
https://github.com/llvm/llvm-project/commit/3f12bb1f25b88e338679c42ccaea11fe204a0e1c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add scs multilib for -fsanitize=shadow-call-stack (#208833)
musl hexagon targets already select msan/asan library variants based on
the sanitizer in use; do the same for shadow-call-stack so that
-fsanitize=shadow-call-stack picks up usr/lib/scs.
Commit: d0ad2c694caf05793b243b0b3a8425c5ef78abdf
https://github.com/llvm/llvm-project/commit/d0ad2c694caf05793b243b0b3a8425c5ef78abdf
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang] Reuse driver option strings in CompilerInvocation (#202632)
CompilerInvocation emits a second copy of clang/Options/Options.inc with
OPTTABLE_STR_TABLE_CODE only to implement lookupStrInTable(). The driver
OptTable already owns the identical string table.
On an arm64 Release build, fully stripped standalone clang shrinks from
94,570,224 to 94,537,216 bytes, saving 33,008 bytes (0.035%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 3ee76834fc9484080eee38964b4ebcb60442c8f8
https://github.com/llvm/llvm-project/commit/3ee76834fc9484080eee38964b4ebcb60442c8f8
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/invalid.fir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
Log Message:
-----------
[Flang][Fir] Set default alignment to 64 on inlineAllocation for arrays (#208781)
In https://github.com/llvm/llvm-project/pull/206525 the runtime was set
to default alloctable and pointer arrays to 64byte alignment. In this commit
the inlineallocation case is handled.
The same approach was taken and an alignment attribute was added,
with logic to promote to aligned_alloc or posixMemalign for apple
targets, when requested alignment is greater than 16.
Of note alignof(std::max_align_t)) was not used as the runtime target
may be different than the compile target, so 16 was hardcoded as when to
use aligned_alloc
Assisted-by: Opus 4.8
Commit: bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
https://github.com/llvm/llvm-project/commit/bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
Log Message:
-----------
[SystemZ][z/OS] Move emission of PPA1 (#208543)
There is an interesting restriction during emission: emitting debug
information closes the text section. As result, emitting the delayed
PPA1 data does not work in the current place together with emitting
debug information. Since the PPA1 information is constant data, the
solution is to emit the data in the target strreamer, in
`emitConstantPools()`.
Commit: 2a74b20bb612c3f6695f30eb3648da33bfcf10a3
https://github.com/llvm/llvm-project/commit/2a74b20bb612c3f6695f30eb3648da33bfcf10a3
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Basic/Attributes.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
[Basic] Fix crash computing the spelling index of an unknown scoped attribute (#208909)
AttributeCommonInfo::getAttributeSpellingListIndex() aborts for an
unknown attribute that has a scope, such as [[ns::foo]]. It calls
calculateAttributeSpellingListIndex(), which runs name/scope
string-switches generated for the known attributes. Those switches
intentionally have no default: getScopeFromNormalizedScopeName() falls
off the end and hits llvm_unreachable ("Fell off the end of a
string-switch") for the unknown scope.
Any caller that asks a scoped unknown attribute for its spelling index
therefore crashes. An unrecognized attribute has no entry in those
tables and carries a single no-spelling, so short-circuit
calculateAttributeSpellingListIndex() for UnknownAttribute and return
index 0 before the switches run.
Add a unit test that constructs an unknown scoped AttributeCommonInfo
and asks for its spelling index; it aborts without the fix.
Commit: 4538987e5e9241af58246df18e625bfd7809cd04
https://github.com/llvm/llvm-project/commit/4538987e5e9241af58246df18e625bfd7809cd04
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[Polly] Cast delinearization terms to matching types (#206711)
#204146 revealed that Polly can call `SCEVDivision::divide` with a
numerator and denominator of different types. I believe such divisions
are not meaningful and should be avoided. As far as I can tell, the root
cause is that `SCEVRemoveMax::rewrite` may collect terms whose types
differ from that of the original expression.
Before this patch, the terms gathered by `SCEVRemoveMax::rewrite` were
used for delinearization as they are. This patch applies
`getTruncateOrSignExtend` to them to matching their types with that of
the original expression.
Commit: 6ce86d47ca095f1f2c911520bc2c845ff09c5fba
https://github.com/llvm/llvm-project/commit/6ce86d47ca095f1f2c911520bc2c845ff09c5fba
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
Log Message:
-----------
[NFC][AMDGPU] Simplify scratch address materialization in SVS frame index fallback (#208624)
The flat scratch SVS frame index fallback folded the offset in with
V_ADD_U32_e32 writing into FrameReg (an SGPR, an illegal VALU
destination) and added it to FrameReg instead of the scavenged
VGPR used as vaddr, so the offset never reached the address.
This commit asserts that there is no frame register in this block, and
simplifies code accordingly. Correctly materialize the offset into the
scavenged VGPR and emit a scratch instruction in SVS form.
Commit: 6733bc3026401bf84c391301313c7ea131bd9904
https://github.com/llvm/llvm-project/commit/6733bc3026401bf84c391301313c7ea131bd9904
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
Log Message:
-----------
[flang] Replace FlangOMPContext with OmpVariantMatchContext. (#209220)
The `FlangOMPContext` got replaced in 8e8e4e50f501b.
This fixes build after https://github.com/llvm/llvm-project/pull/206988.
Commit: ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
https://github.com/llvm/llvm-project/commit/ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
Log Message:
-----------
[AMDGPU] Implement int div/rem by fp recip more efficiently (#204950)
Integer division q = a/b can be implemented by fp reciprocal with:
`fq = fa * recip(fb)`
fq is truncated to produce q. Due to fp rounding and reciprocal accuracy
issues fq can be too small and truncation can produce a value too small
by one.
If abs(a)<=0x400000, this underestimate can be guarded more efficiently
by calculating:
`fq=fa+1ulp/b`
If abs(a)<=0x400000, adding 1 ulp will increase a by at most 0.5, so the
calculated q will be the same. Adding 1ulp can be done with one integer
add.
Incrementing `fa` by 1 ulp was exhaustively tested for all dividend and
divisor combinations with values between [-0x400000,0x3FFFFF] with no
errors.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 9d34596f7338ca057ea94078c31bde6c8c9c60af
https://github.com/llvm/llvm-project/commit/9d34596f7338ca057ea94078c31bde6c8c9c60af
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
Log Message:
-----------
[clang][UncheckedLocalVarsChecker][NFC] Add missing headers (#209217)
After #208855 this fails compiling headers standalone due to incomplete
types, e.g. `error: member access into incomplete type 'ASTContext'`. It
works fine building the `.cpp` files but is not a
[standalone](https://llvm.org/docs/CodingStandards.html#self-contained-headers)
header.
Commit: f56c5d68b19376f27da236456861a462bcd8a973
https://github.com/llvm/llvm-project/commit/f56c5d68b19376f27da236456861a462bcd8a973
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Improve the warning text (#209198)
This PR aligns webkit.UncountedLambdaCapturesChecker and its variant's
warning message with the new warning format in other checkers.
Commit: d2bf3af65d920de29a31f764959d67769f3587c6
https://github.com/llvm/llvm-project/commit/d2bf3af65d920de29a31f764959d67769f3587c6
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/Lexer.cpp
A clang/test/Preprocessor/GH101342.c
Log Message:
-----------
[Clang] Detects invalid unicode characters in token formed by `##` (#208757)
When parsing identifiers with invalid (non-xid_continue), we would emit
a diagnostics and continue, in an effort to improve recovery.
However, in raw mode we would not emit a diagnostic, but still continue.
So identifiers formed in raw mode could be gibberish.
We fixed that by not-continuing on error in raw mode.
Fixes #101342
Commit: c59378289002e1d12d649ef47708b900332141c7
https://github.com/llvm/llvm-project/commit/c59378289002e1d12d649ef47708b900332141c7
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
Log Message:
-----------
[clang][CodeGen] Evaluate `typeid` operands which are the most derived objects (#208470)
Before this patch, `typeid` operands are not evaluated if they are the
most derived objects.
Before #196544, only `typeid(non-reference-var)` is considered to be the
most derived object, which doesn't have side effects obviously. So there
was no miscompilation.
Fixes #202051.
Commit: 6c5332d2d76df720a441bbbd1b0601f01114b4e3
https://github.com/llvm/llvm-project/commit/6c5332d2d76df720a441bbbd1b0601f01114b4e3
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
Log Message:
-----------
[NFC][AMDGPU] Add tests for eliminateFrameIndex (#208612)
Add MIR tests to cover all instances where a Vgpr needs to be scavenged
and used due to Sgpr scarcity, during elimination of frame indices.
Commit: 9bf20bdfc685477e349f335d1b128403342fc361
https://github.com/llvm/llvm-project/commit/9bf20bdfc685477e349f335d1b128403342fc361
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
Log Message:
-----------
[clang][ssaf] Add --ssaf-include-local-entities flag (#209225)
This option allows including local entities in summaries.
This means that ContributorFinder can optionally include block-scope
(function-local) variables.
Parameters are intentionally skipped: they are exposed via their parent
function's USR + a parameter-index suffix in getEntityName, so
registering
them as independent contributors would be redundant.
Part §2 of rdar://179151023
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
https://github.com/llvm/llvm-project/commit/fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilo-addr-regimm26.ll
Log Message:
-----------
[RISCV] Add SelectAddrRegImm26 isel complex pattern for Xqcilo 26-bit load/store (#207363)
Introduce a dedicated SelectAddrRegImm26 ComplexPattern for the Qualcomm
Xqcilo large-offset load/store instructions (qc.e.lw/qc.e.sw), whose
offset
field is 26 bits wide, and use it in the QC48LdPat/QC48StPat patterns
instead
of the generic AddLike + simm26_nosimm12 match.
SelectAddrRegImm26 handles addresses of the form:
- simm12 offsets are left to the standard (shorter/compressible)
load/store.
- 26-bit (non-simm12) offsets fold directly into qc.e.lw/qc.e.sw.
- Offsets just outside the 26-bit range are split with ADDI plus a
folded 26-bit remainder.
Assisted by claude
Commit: 38033e2c2316dbb264264d9fb8be5c3b543b5c1e
https://github.com/llvm/llvm-project/commit/38033e2c2316dbb264264d9fb8be5c3b543b5c1e
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[clang][ssaf][NFC] Add unittests for PointerFlow and UnsafeBufferUsage about local entities (#209227)
Part §6 of rdar://179151023
Depends on #209225.
Approved in #205351.
---------
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
https://github.com/llvm/llvm-project/commit/15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
Log Message:
-----------
[clang][ssaf] Add FIXME that CallGraphExtractor does not honor IncludeLocalEntities (#209228)
Currently, CallGraph extractor does not honor IncludeLocalEntities and
it emits entities for block-scope callees - irrespective of what the
option is set to, such as:
- function-local declared lambdas
- function-local declared classes and their member functions
The new test file ensures that PointerFlow and UnsafeBufferUsage honors
the IncludeLocalEntities option.
Part §3 and §5 of rdar://179151023
Depends on #209225 and #209227.
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: c5d5988520d90c77dfc279e86b1e052703d86960
https://github.com/llvm/llvm-project/commit/c5d5988520d90c77dfc279e86b1e052703d86960
Author: Rito Takeuchi <licht-t at outlook.jp>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
Log Message:
-----------
[X86][CostModel] Add vXi64 divide/remainder-by-constant costs (#208491)
### What this does
Follow-up to #206983, which lowered `vXi64` `MULHU`/`MULHS`. Modified
the cost model to enable the vectorization:
1. `SDIV`/`SREM` for `v4i64`/`v8i64`, gated on AVX512DQ
`MULHS`'s low multiply is `vpmullq`. Without DQ, it scalarizes and can
be a performance regression. So, this PR adds
`AVX512DQ{UniformConst,Const}` tables which are consulted before the
AVX512/AVX2 ones. Then, non-DQ targets fall through to the scalarized
cost.
2. `UDIV`/`UREM` for `v4i64`/`v8i64` in the AVX2 and AVX512
For `UREM`, the multiply-back in the remainder `x - (x/C)*C` is a single
`vpmullq` with DQ, but another `vpmuludq` schoolbook without it. So, the
cheap DQ `UREM` entries in `AVX512DQ{UniformConst,Const}` overrides more
expensive AVX512/AVX2 ones.
Part of #37771.
### AI Usage Disclosure
This PR was prepared with the assistance of Claude Code.
Commit: 28366bc273fb734027a10dad2a6245665ac138f6
https://github.com/llvm/llvm-project/commit/28366bc273fb734027a10dad2a6245665ac138f6
Author: Luan Rabelo <96793857+Lu4nScr1pt1ng at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Sema/enum.c
Log Message:
-----------
[clang] [Sema] Widen enumerators that overflow a _BitInt type (C23) (#208230)
When an enumerator has no explicit value and the previous enumerator has
a
_BitInt type whose maximum is reached, incrementing should widen to a
suitably sized standard integer type (C23 6.7.3.3p12 excludes
bit-precise
types from the widening). Clang instead kept the _BitInt type and let
the
value wrap around, with a misleading "not representable in the largest
integer type" warning.
The problem is in getNextLargerIntegralType: it compared candidate types
against the storage size of the previous type. A _BitInt(33) is stored
in
64 bits, so no standard type looked larger and the widening never
happened.
Comparing against the value width (getIntWidth) fixes it: the enumerator
now gets the next standard type that can hold the value, and the
behavior
matches GCC (verified against GCC 15.2).
For standard integer types getIntWidth equals getTypeSize, so this
changes
behavior only for bit-precise types.
The new tests in enum.c check the widened type and the value from inside
the enum definition, like the reproducer in the issue; they fail without
this change. Incrementing the max of a _BitInt(64) still warns, since no
standard type can hold that value, and that case is covered too.
Fixes #208163
Commit: 46951909a77676a30a285e60426ff897684703c1
https://github.com/llvm/llvm-project/commit/46951909a77676a30a285e60426ff897684703c1
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
R clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Revert "Write original source language when writing and reading AST (#208115)" (#209230)
This reverts commit 695238ffaa64ac8f49e7da36d36c5170509007cc.
The new test is flaky, see comment on
https://github.com/llvm/llvm-project/pull/208115
Commit: 1d9a3c069b0b882e6651ece3f05bcb492c66567b
https://github.com/llvm/llvm-project/commit/1d9a3c069b0b882e6651ece3f05bcb492c66567b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9bf20bd (#209238)
This fixes 9bf20bdfc685477e349f335d1b128403342fc361.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bf20bdfc685477e349f335d1b128403342fc361
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 633be471e811aea4c258afe4280db82393b4c484
https://github.com/llvm/llvm-project/commit/633be471e811aea4c258afe4280db82393b4c484
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "[CMake] Use minimum python version of 3.8 everywhere" (#209233)
Reverts llvm/llvm-project#208822.
We should avoid raising toolchain requirements immediately before
branching. Revert this now so it can be reapplied after branching.
Commit: c4076b002b072c73f781b191ae0ccc6c075df1d7
https://github.com/llvm/llvm-project/commit/c4076b002b072c73f781b191ae0ccc6c075df1d7
Author: Madhur Kumar <152476790+MadhurKumar004 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Combine rcp(sqrt(x)) into rsq for pseudo-scalar instructions (#198785)
This fixes "TODO: GlobalISel should generate v_s_rsq." give in file
"llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll"
Commit: ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
https://github.com/llvm/llvm-project/commit/ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/Verifier/arbitrary-fp-convert.ll
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[Verifier] Clarify supported storage bit width for apfloat conversions (#209174)
Allow i4 for FP4, i6 for FP6 and i8 for FP8.
Assisted-by: Claude Code Opus 4.8
Commit: 62facd1645b504c95f2a82dd8a211f1c23e13b07
https://github.com/llvm/llvm-project/commit/62facd1645b504c95f2a82dd8a211f1c23e13b07
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/timeout.test
Log Message:
-----------
[llvm][HTTP] Relax check for timeout error message (#209240)
When LLVM used curl to do HTTP requests, the timeout test failed even
though the request correctly timed out
(https://github.com/llvm/llvm-project/pull/188969#issuecomment-4960193683).
On curl, we prepend the error with `curl_easy_perform() failed: `
whereas with WinHTTP, the error is fixed as "Timeout was reached".
This PR relaxes the check to allow for the prefix in the curl case.
Commit: 83e914e56acb7795875be41bcbe9c7c036e897c4
https://github.com/llvm/llvm-project/commit/83e914e56acb7795875be41bcbe9c7c036e897c4
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[offload][test] Add fallback to legacy AMDGPU triple library dir (#209131)
After the amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa rename, look up the
device runtime libraries in the legacy directory when the runtime was
built under the old triple name.
Claude assisted with this patch.
Commit: 3122e20cfc7c1b8d103b435ecba27fc3172cb581
https://github.com/llvm/llvm-project/commit/3122e20cfc7c1b8d103b435ecba27fc3172cb581
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
Log Message:
-----------
[OpenACC] add isEffectivelySerial() to acc.parallel and acc.kernels (#209192)
Mirror the isEffectivelySerial() function in acc.compute_region to
acc.parallel and acc.kernel so this check is unified anywhere it needs
to be used, namely before ACCComputeLowering. Should be NFC
Commit: 690aacbf9d15569ec26843d6367f5cf6d5b26969
https://github.com/llvm/llvm-project/commit/690aacbf9d15569ec26843d6367f5cf6d5b26969
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/ptrtoaddr.ll
Log Message:
-----------
[GVN] Reuse dominating PtrToInt for PtrToAddr. (#209164)
A ptrtoaddr and a ptrtoint of the same pointer compute the same value
when the address width equals the pointer representation width. Reuse
a dominating ptrtoint in place of a ptrtoaddr.
This fixes a few end-to-end regressions with
https://github.com/llvm/llvm-project/pull/180244.
PR: https://github.com/llvm/llvm-project/pull/209164
Commit: f3671a14e499e376709fb68ae6b2bdd76fe91fdc
https://github.com/llvm/llvm-project/commit/f3671a14e499e376709fb68ae6b2bdd76fe91fdc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[AMDGPU] Fix cache files and builds after amdgcn->amdgpu conversion (#209247)
Summary:
Quite important that this works before the fork. The problem is that
CMake takes the string literally while rewriting it to amdgpu/
internally so the amdgcn/ directories do not appear.
Commit: 9cfd0411138b33ea11bfce22e41cd026e92120ca
https://github.com/llvm/llvm-project/commit/9cfd0411138b33ea11bfce22e41cd026e92120ca
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
A llvm/test/Transforms/LoopVectorize/interleaved-accesses-dead-member.ll
M llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
Log Message:
-----------
[VPlan] Don't bail creating interleave group if it has dead members (#208415)
This is an alternative to both #203555 and #205584.
To recap the issue:
1) The legacy cost model has the invariant that all CM_Interleave
widened groups will eventually be converted to a VPInterleaveGroup, so
it marks the addresses as uniform.
2) After #190191 a CM_Interleave isn't guaranteed to be converted to a
VPInterleaveGroup if it has dead members, and it breaks this assumption
in 1). So addresses aren't properly widened due to the uniform
assumption.
Rather than try to fix up the address, this just maintains the invariant
that a CM_Interleave will become a VPInterleaveGroup by not skipping
over groups with dead members.
While there's slightly less code involved, the main benefit of this
approach vs the others is that it keeps generating interleaved groups
instead of falling back to gathers/scatters, so we don't get a codegen
regression against 22.x.
Co-authored-by: Mel Chen <mel.chen at sifive.com>
Commit: ddd76138de9630eb018de68ef5cc0c9f486cb659
https://github.com/llvm/llvm-project/commit/ddd76138de9630eb018de68ef5cc0c9f486cb659
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/zext-add-nsw-fold.ll
Log Message:
-----------
[SCEV][NFC] Add tests for generalized A + zext(C + X) fold (#209219)
Related to #208778
Commit: 7dd8867515732d1bc4a837edf6fe0658189398d3
https://github.com/llvm/llvm-project/commit/7dd8867515732d1bc4a837edf6fe0658189398d3
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/cmake/modules/AddLLDB.cmake
Log Message:
-----------
[lldb] Enforce usage of LINK_COMPONENTS and CLANG_LIBS (#208860)
LINK_COMPONENTS and CLANG_LIBS exist to correctly support the LLVM/Clang
dylib build configuration. Failure to enforce this will break LLDB when
built against libLLVM.dylib.
Commit: fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
https://github.com/llvm/llvm-project/commit/fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
M llvm/unittests/CodeGen/DIETest.cpp
Log Message:
-----------
[CodeGen] Fix IntrusiveBackList::deleteNode (#207783)
Issue #207411 reported that IntrusiveBackList::deleteNode does not
delete the correct node if the deleted node is the last node of the
list. Fix by not short circuiting on `Last == &N`.
Additionally, fix three other minor defects: (1) Do not loop infinitely
if node is not in list. Check for sentinel edge. (2) Reset intrusive
list on deleted node to point to itself with sentinel edge. (3) Avoid
multiple template instantiations of the implementation of deleteNode by
moving it to its base class.
Closes #207411.
Commit: 54a1ef1cceb90ac9db6639d0a400afef1328995b
https://github.com/llvm/llvm-project/commit/54a1ef1cceb90ac9db6639d0a400afef1328995b
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Report PHI as opcode in getOpcodeOrIntrinsicID (#209250)
Avoid reporting Instruction::PHI as an intrinsic ID, fixing a bug
exposed in downstream CHERIoT.
Reported-by: Owen Anderson <resistor at mac.com>
Commit: de754b87a6c57b7d5ebb4cbd0fd9ef0c8ba7512d
https://github.com/llvm/llvm-project/commit/de754b87a6c57b7d5ebb4cbd0fd9ef0c8ba7512d
Author: Umang Yadav <29876643+umangyadav at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
Log Message:
-----------
[MLIR][ROCm] Build mlir_rocm_runtime STANDALONE (#205651)
Build `mlir_rocm_runtime` as a standalone runtime library by removing
its last
source-level dependency on LLVM support utilities.
`mlir_rocm_runtime` is intended to be loaded dynamically by tools such
as
`mlir-runner` via `--shared-libs`. However, `add_mlir_library` links
`LLVMSupport` by default unless the target is marked `STANDALONE`. The
ROCm
runtime was previously left on `DISABLE_PCH_REUSE` as a workaround
because
`RocmRuntimeWrappers.cpp` still used `llvm::SmallVector` and
`llvm::ArrayRef`
inside `mgpuMemHostRegisterMemRef`.
This patch replaces that small LLVM ADT use with equivalent plain C++
logic and
marks `mlir_rocm_runtime` `STANDALONE`, matching the CUDA runtime.
## Motivation
This follows the direction from prior upstream changes:
-
[`4edc9e2acf1d`](https://github.com/llvm/llvm-project/commit/4edc9e2acf1d9350ce4da77c93e8869f774a24e2)
/
[D108684](https://reviews.llvm.org/D108684), by Uday Bondhugula, removed
the
same `SmallVector`/`ArrayRef` dependency from CUDA's
`mgpuMemHostRegisterMemRef`, noting that the dependency on `LLVMSupport`
adds
unnecessary complexity for external users linking or loading the
runtime.
-
[`351ae0ca550c`](https://github.com/llvm/llvm-project/commit/351ae0ca550c791b0c504dfb7dcb4fd08480d98b)
/
[#182850](https://github.com/llvm/llvm-project/pull/182850) made several
dlopen-able MLIR runtime libraries `STANDALONE`, including
`mlir_cuda_runtime`, and left `mlir_rocm_runtime` on `DISABLE_PCH_REUSE`
only
because it still depended on `LLVMSupport`.
-
[`78f259fcc14b`](https://github.com/llvm/llvm-project/commit/78f259fcc14bb0a567d45ba394fcde48de2bc299)
/
[#182942](https://github.com/llvm/llvm-project/pull/182942) applied the
same
cleanup pattern to `mlir_levelzero_runtime` by removing a small
remaining LLVM
dependency and marking the runtime `STANDALONE`.
With the remaining LLVM ADT use removed from the ROCm wrapper, the
workaround is
no longer needed.
## Testing
Verified and tested downstream in rocMLIR.
No new upstream test is added. This is a build/linkage cleanup for a
runtime
library that is already exercised by the ROCm integration tests when
`MLIR_ENABLE_ROCM_RUNNER` is enabled.
The rewritten dense-stride computation in `mgpuMemHostRegisterMemRef` is
equivalent to the previous implementation and matches the existing CUDA
runtime
implementation.
## AI Assistance Disclosure
Assisted-by: GPT-5.5
I reviewed the generated content and verified the changes before
submitting,
including testing them downstream in rocMLIR.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 84804d9a0bd7fcdaf8d218d3385b58d012c1129e
https://github.com/llvm/llvm-project/commit/84804d9a0bd7fcdaf8d218d3385b58d012c1129e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/expand-vector-rot.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/ARM/funnel-shift-rot.ll
M llvm/test/CodeGen/Mips/funnel-shift-rot.ll
M llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
M llvm/test/CodeGen/PowerPC/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
Log Message:
-----------
[LegalizeTypes] Improve promotion of variable rotates. (#208610)
If the promoted type is at least 2x the original type, we can
concat the value with itself into the promoted bits and use a
shl/srl. This is easier than negating the shift amount for the
(or (shl), (srl)) expansion. This is what we do for promoting
funnel shifts and really a rotate is a special case of funnel shift.
Commit: 6a91acc642db38a6e214f1b917882c75d6fb728b
https://github.com/llvm/llvm-project/commit/6a91acc642db38a6e214f1b917882c75d6fb728b
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Lower/OpenMP/declare-mapper-hermetic.f90
Log Message:
-----------
[flang][OpenMP] Keep hermetic embedded module parse tree alive (#207491)
Fix a use-after-free when lowering materializes an imported declare mapper or
declare reduction owned by a module embedded in a hermetic module file
(-fhermetic-module-files).
ModFileReader::Read resolved the embedded modules from a local parser::Program
that was destroyed when Read returned, leaving the symbols resolved from it
dangling. MapperDetails and UserReductionDetails hold raw parse-tree pointers, so
a consumer that later materializes such an imported declaration dereferenced
freed memory.
Retain the embedded parse tree in the SemanticsContext with SaveParseTree, as the
primary module's tree already is, so those pointers stay valid through lowering.
The new test covers materializing an imported declare mapper from an embedded
module.
Assisted-by: Claude Opus 4.8, GPT-5.5.
Commit: 3688619bd98b36a72da219cec5f44ecbe4bbfa97
https://github.com/llvm/llvm-project/commit/3688619bd98b36a72da219cec5f44ecbe4bbfa97
Author: Matt <MattPD at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/OpenMP/declare-reduction-operator-modfile-reexport.f90
Log Message:
-----------
[flang][OpenMP] Do not emit a use-only item for an operator reduction in a module file (#207492)
Stop writing a module file that cannot be re-parsed (reading it crashes) when a
module re-exports a USE-associated user-defined operator declare reduction.
Such a reduction is represented by an internal symbol whose name is the mangled
operator (e.g. "op.remote." or "op.+"), which is not valid Fortran. The
module-file writer emitted it as a `use MODULE, only: op.remote.` item, which the
reader cannot parse. This affected both a plain re-export facade and an embedded
module in a hermetic module file.
Skip the use-only item for a reduction whose operator is itself re-exported (a
defined operator, or an intrinsic operator with a user interface): the reduction
is re-exported implicitly with that operator, which is emitted, and the reduction
resolver recovers it from there (FindUserReductionSymbol). This covers a
derived-type `operator(+)` reduction as well as a defined operator like
`.remote.`.
The test checks the re-exporting module file round-trips and that a consumer
reading it resolves the reduction through the operator.
Assisted-by: Claude Opus 4.8, GPT-5.5.
Commit: 67ebc4b221c3e94028b33004cd5cd08deee95048
https://github.com/llvm/llvm-project/commit/67ebc4b221c3e94028b33004cd5cd08deee95048
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/release-binaries-all.yml
Log Message:
-----------
workflows/release-binaries-all: Test PRs that modify build_llvm_release.bat (#208769)
Commit: eb5bc2694a05229bb9270eb141cd8fa499a185c1
https://github.com/llvm/llvm-project/commit/eb5bc2694a05229bb9270eb141cd8fa499a185c1
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__memory/unique_ptr.h
A libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/non_pointable.single.verify.cpp
Log Message:
-----------
[libc++][unique_ptr] Implement LWG 4144: Disallow unique_ptr<T&, D> (#209018)
Implement [LWG 4144](https://cplusplus.github.io/LWG/issue4144) by
explicitly rejecting `unique_ptr<T, D>` when `T*` is not a valid type.
This adds a pointability check and tests reference and abominable
function types.
Fixes #118359
Commit: 7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
https://github.com/llvm/llvm-project/commit/7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang-tools-extra/clang-doc/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/Markdown.cpp
R clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/MarkdownParserTest.cpp
Log Message:
-----------
[clang-doc] Remove Markdown library implementation (#209257)
The current implementation is unsatisfactory in many ways, and it is now
unclear if development of this library will continue any time soon. To
reduce maintenance and build cost, we should just remove it now before
the branch point, and come up with a more thoughtful design that
addresses the requirements for clang and clang-doc more completely.
This reverts commit cc048e80b670a5262500612069d1c2d065b53f15 and commit
b6976d223eeb40091685e3b20e9c41f42f6bd6e0.
Commit: cc615d117c7f942a508ceecedd519f2fe9921493
https://github.com/llvm/llvm-project/commit/cc615d117c7f942a508ceecedd519f2fe9921493
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/test/Sema/attr-nonblocking-constraints.cpp
Log Message:
-----------
[clang][Sema] Function effect analysis was missing the implicit call to the destructor in a CXXDeleteExpr. (#184460)
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Commit: 9c8bdc79908f9b34207caa738185f877b6cae93e
https://github.com/llvm/llvm-project/commit/9c8bdc79908f9b34207caa738185f877b6cae93e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7633d1e (#209268)
This fixes 7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=7633d1e7a0f33630e6d10c5640bf4ad35dc2c23d
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 172464f2b665bd169658fbafb10e61c1882042ff
https://github.com/llvm/llvm-project/commit/172464f2b665bd169658fbafb10e61c1882042ff
Author: Paul Osmialowski <pawel.osmialowski at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalExecutor.cpp
R clang/test/Interpreter/emulated-tls.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
Log Message:
-----------
Revert "Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (#208413)" (#209260)
This causes the failures on various CIs with various archs a day before
branching.
Commit: 39fefb706834fa8e171b0c699b6e91e4d4a0d831
https://github.com/llvm/llvm-project/commit/39fefb706834fa8e171b0c699b6e91e4d4a0d831
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
M llvm/test/CodeGen/AArch64/ptrauth-elf-got-function-symbols.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
Log Message:
-----------
[PAC][clang] Fix ptrauth module flags behavior (#204226)
The `Error` merge behavior only has effect when module flags values
mismatch, while it allows the flag being present in one module and
absent in another one. Thus, we were previously incorrectly treating
modules as compatible in case of presence of
`ptrauth-elf-got`/`ptrauth-sign-personality` in one module (meaning the
corresponding ptrauth feature is enabled) and its absence in another
module (meaning the corresponding ptrauth feature is disabled). Similar
problem was present for `aarch64-elf-pauthabi-{platform|version}` flags
as well.
This patch introduces the following.
1. Always emit `ptrauth-elf-got` module flag for AArch64 ELF targets and
`ptrauth-sign-personality` module flag for AArch64 Linux targets. The
value of the flags is either 0 or 1.
2. Always emit `aarch64-elf-pauthabi-platform` and
`aarch64-elf-pauthabi-version` module flags for AArch64 Linux targets
(with `aarch64-elf-pauthabi-platform` set to
`AARCH64_PAUTH_PLATFORM_LLVM_LINUX` constant). Previously, these were
only emitted with `aarch64-elf-pauthabi-version != 0` (0 value stands
for no ptrauth features enabled). To keep emitted binaries unchanged in
case of version value of 0, this case is filtered out by backend in
`AArch64AsmPrinter::emitStartOfAsmFile`.
Commit: d7063b00431358c0202a04e67f4824e20244b26f
https://github.com/llvm/llvm-project/commit/d7063b00431358c0202a04e67f4824e20244b26f
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a crash on triple-bracket input like `[[[a]]` (#199103)
## Summary
`clang-format` aborts on triple-bracket input like `[[[a]]` with
`Assertion 'Left.isNot(tok::l_square)' failed.` This patch fixes the
crash by rejecting the C++ attribute classification when the candidate
`[[` is itself preceded by another `[`.
## Solution
Add one defensive check to `isCppAttribute` that mirrors the existing
ObjC-array-literal exclusion: bail out when `Tok.Previous` is another
`[`.
Fixes #199010
Commit: c3452bee412e97178ab04b924300f3953b4690f5
https://github.com/llvm/llvm-project/commit/c3452bee412e97178ab04b924300f3953b4690f5
Author: lntue <lntue at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/test/src/sys/socket/linux/socketopt_test.cpp
M libc/test/src/sys/socket/linux/socketpair_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
Log Message:
-----------
[libc] Update some syscall tests to be more tolerance to QEMU behaviors. (#208920)
Also expand ErrnoSetterMatcher to allow multiple errnos.
This will allow us to enable riscv64 qemu precommit CI.
To be revisited next year to see whether those are still needed by then:
https://github.com/llvm/llvm-project/issues/209273
Assisted-by: Gemini 3.5 Flash
Commit: 69c3406d985a1d15bf537574c1a217f2b72b578e
https://github.com/llvm/llvm-project/commit/69c3406d985a1d15bf537574c1a217f2b72b578e
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/ci/openmp-offload-amdgpu-runtime.py
Log Message:
-----------
[OpenMP][AMDGPU][CI] Update build scripts for AMDGPU bots (#209274)
This should fix the error in bot:
https://lab.llvm.org/buildbot/#/builders/10/builds/31765
Commit: a9804ae41bceff2f169affa5b35506606a965880
https://github.com/llvm/llvm-project/commit/a9804ae41bceff2f169affa5b35506606a965880
Author: arhwx <arahwrm at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaCXX/atomic-constexpr.cpp
Log Message:
-----------
[clang] Fix crash on subobject access through _Atomic in constant evaluation (#208923)
`findSubobject()` didn't look through `AtomicType` while walking a
designator, so reaching a subobject of an object wrapped in `_Atomic`
crashed: a null `CXXRecordDecl` deref for base classes (the segfault in
the issue) and a `cast<RecordType>` assertion for fields. The value of
an atomic object is already represented like a value of the underlying
type, so it's enough to look through the wrapper before dispatching on
the subobject kind.
The crash goes back to clang 9, and the new bytecode interpreter already
handles this correctly, but the test covers both evaluators anyway, at
C++14 (the earliest standard that can hit the crash) and at C++20 (so
`constinit` can verify the initializers are indeed constant).
Fixes #203328
Commit: 55f4be56082a4eed9a6ec7e163378255892ce824
https://github.com/llvm/llvm-project/commit/55f4be56082a4eed9a6ec7e163378255892ce824
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M .github/workflows/release-binaries-all.yml
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/test/X86/dwarf4-cross-cu-ranges.test
M bolt/test/X86/dwarf5-debug-names-cross-cu.s
M bolt/test/X86/match-blocks-with-pseudo-probes-inline.test
M bolt/test/X86/pseudoprobe-decoding-inline.test
M bolt/test/X86/pseudoprobe-decoding-noinline.test
M clang-tools-extra/clang-doc/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/CMakeLists.txt
R clang-tools-extra/clang-doc/markdown/Markdown.cpp
R clang-tools-extra/clang-doc/markdown/Markdown.h
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.h
M clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto-parameters.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-auto.cpp
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-lambdas.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-pointers.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-pointer-as-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-templates.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-transform-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-values.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/include/macro.h
A clang-tools-extra/test/clang-tidy/checkers/readability/Inputs/identifier-naming-macro-argument/subdir/.clang-tidy
A clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-macro-argument.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
M clang-tools-extra/unittests/clang-doc/CMakeLists.txt
R clang-tools-extra/unittests/clang-doc/MarkdownParserTest.cpp
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.md
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
A clang/include/clang/Basic/AtomicLineLogger.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/OpenCLOptions.h
M clang/include/clang/Basic/TokenKinds.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Scope.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConstraintManager.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprConstant.cpp
A clang/lib/Basic/AtomicLineLogger.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/Basic/CMakeLists.txt
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CodeGen/CGClass.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Rewrite/HTMLRewrite.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/Scope.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpand.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaFunctionEffects.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenCL.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
A clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
M clang/lib/StaticAnalyzer/Checkers/UseAfterLifetimeEnd.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BasicValueFactory.cpp
M clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
M clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp
M clang/lib/StaticAnalyzer/Core/Z3CrosscheckVisitor.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/typeid.cpp
M clang/test/Analysis/ArrayBound/assumption-reporting.c
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
M clang/test/Analysis/bitwise-shift-common.c
A clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/constant-folding.c
M clang/test/Analysis/debug-lifetime-bound.cpp
A clang/test/Analysis/html_diagnostics/variable-popups-eol.c
M clang/test/Analysis/lifetime-bound.cpp
M clang/test/Analysis/malloc.c
A clang/test/Analysis/string-search-modeling.c
M clang/test/Analysis/string.c
A clang/test/Analysis/z3/z3-logicalexpr-eval.c
M clang/test/Analysis/z3/z3-unarysymexpr.c
M clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
M clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
M clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/elf-pauthabi.c
M clang/test/CodeGen/AArch64/fp8-intrinsics/acle_neon_fp8_reinterpret.c
M clang/test/CodeGen/AArch64/neon-2velem.c
M clang/test/CodeGen/AArch64/neon-extract.c
M clang/test/CodeGen/AArch64/neon-intrinsics-constrained.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-ldst-one-rcpc3.c
M clang/test/CodeGen/AArch64/neon-ldst-one.c
M clang/test/CodeGen/AArch64/neon-misc.c
M clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem-constrained.c
M clang/test/CodeGen/AArch64/neon-vcmla.c
M clang/test/CodeGen/AArch64/neon/fused-multiply.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/strictfp-builtins.c
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M clang/test/CodeGen/X86/strictfp_builtins.c
M clang/test/CodeGen/arm-neon-vst.c
M clang/test/CodeGen/arm64_vdupq_n_f64.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGen/builtin_float.c
M clang/test/CodeGen/builtin_float_strictfp.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/cx-complex-range-real.c
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/ptrauth-module-flags.c
M clang/test/CodeGen/strictfp_builtins.c
M clang/test/CodeGenCXX/cxx2a-destroying-delete.cpp
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/test/CodeGenCXX/microsoft-abi-structors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors.cpp
M clang/test/CodeGenCXX/microsoft-vector-deleting-dtors2.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scalar-array-split.cpp
A clang/test/CodeGenCXX/msvc-global-delete-scope-no-dtor.cpp
A clang/test/CodeGenCXX/msvc-no-global-delete-forwarding.cpp
M clang/test/CodeGenCXX/msvc-vector-deleting-dtors-sized-delete.cpp
M clang/test/CodeGenCXX/pfp-memcpy.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/Driver/print-enabled-extensions/riscv-spacemit-a100.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.c
M clang/test/Headers/amdgcn-openmp-device-math-complex.cpp
M clang/test/Headers/hip-header.hip
M clang/test/Headers/nvptx_device_math_complex.c
M clang/test/Headers/nvptx_device_math_complex.cpp
M clang/test/Headers/openmp_device_math_isnan.cpp
M clang/test/Interpreter/cxx20-modules.cppm
R clang/test/Interpreter/emulated-tls.cpp
M clang/test/Interpreter/execute-pch.cpp
A clang/test/Interpreter/pch-pic-mismatch.cpp
A clang/test/Interpreter/pcm-pic-mismatch.cpp
M clang/test/Modules/glob-delete-with-virtual-dtor.cpp
M clang/test/Modules/msvc-vector-deleting-destructors.cpp
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/test/PCH/cxx20-template-args.cpp
M clang/test/PCH/glob-delete-with-virtual-dtor.cpp
M clang/test/PCH/msvc-vector-deleting-destructors.cpp
M clang/test/Parser/c2x-auto.c
A clang/test/Preprocessor/GH101342.c
M clang/test/Sema/attr-nonblocking-constraints.cpp
M clang/test/Sema/enum.c
A clang/test/SemaCXX/atomic-constexpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
M clang/test/SemaCXX/auto-cxx0x.cpp
M clang/test/SemaCXX/class.cpp
M clang/test/SemaCXX/static-data-member.cpp
M clang/test/SemaOpenCL/access-qualifier.cl
M clang/test/SemaOpenCL/fp64-fp16-options.cl
M clang/test/SemaOpenCL/storageclass.cl
M clang/test/SemaOpenCL/unsupported-image.cl
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/AST/AttrTest.cpp
A clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Lex/PPMemoryAllocationsTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointersExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/utils/TableGen/ClangOpcodesEmitter.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/test/builtins/Unit/compiler_rt_scalbn_test.c
M compiler-rt/test/builtins/Unit/compiler_rt_scalbnf_test.c
M compiler-rt/test/lit.common.cfg.py
A compiler-rt/test/sanitizer_common/TestCases/Linux/dlopen_image_base.c
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/make_signed.h
A compiler-rt/test/ubsan/TestCases/Integer/Inputs/wrappers.h
A compiler-rt/test/ubsan/TestCases/Integer/suppressions-nested-calls.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang/CMakeLists.txt
M flang/include/flang/Lower/MultiImageFortran.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIRTypes.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/EmitMIFGlobalCtors.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/mod-file.cpp
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/basic-program.fir
A flang/test/Fir/derived-type-aliases.fir
M flang/test/Fir/invalid.fir
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
M flang/test/Lower/MIF/image_index.f90
M flang/test/Lower/OpenACC/acc-declare.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
R flang/test/Lower/OpenMP/Todo/declare-variant.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
A flang/test/Lower/OpenMP/declare-mapper-hermetic.f90
A flang/test/Lower/OpenMP/declare-variant-call.f90
A flang/test/Lower/OpenMP/declare-variant-construct.f90
A flang/test/Lower/OpenMP/declare-variant-device.f90
A flang/test/Lower/OpenMP/declare-variant-implementation.f90
A flang/test/Lower/OpenMP/declare-variant-module.f90
A flang/test/Lower/OpenMP/declare-variant-target-device.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
A flang/test/Lower/OpenMP/unroll-partial01.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
A flang/test/Semantics/OpenMP/declare-reduction-operator-modfile-reexport.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
A flang/test/Semantics/call48.f90
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/__support/CPP/expected.h
M libc/test/UnitTest/ErrnoSetterMatcher.h
M libc/test/src/__support/CPP/CMakeLists.txt
A libc/test/src/__support/CPP/expected_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
M libc/test/src/sys/mman/linux/madvise_test.cpp
M libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/sys/mman/linux/mlock_test.cpp
M libc/test/src/sys/mman/linux/mremap_test.cpp
M libc/test/src/sys/mman/linux/posix_madvise_test.cpp
M libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/test/src/sys/socket/linux/socketopt_test.cpp
M libc/test/src/sys/socket/linux/socketpair_test.cpp
M libc/test/src/unistd/pread_pwrite_test.cpp
M libc/test/src/unistd/read_write_test.cpp
M libcxx/docs/ReleaseNotes/22.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__iterator/segmented_iterator.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__thread/thread.h
M libcxx/include/mdspan
M libcxx/include/span
M libcxx/src/filesystem/operations.cpp
M libcxx/src/include/overridable_function.h
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
M libcxx/test/libcxx/algorithms/pstl.nodiscard.verify.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/pstl.reverse_copy.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/deduct.pass.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
A libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/non_pointable.single.verify.cpp
M libcxx/utils/ci/images/libcxx_runners.txt
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SPARCV9.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/RelocScan.h
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.h
M lld/ELF/Writer.cpp
M lld/docs/NewLLD.rst
M lld/docs/ReleaseNotes.rst
M lld/include/lld/Common/BPSectionOrdererBase.inc
M lld/test/ELF/aarch64-reloc-pauth.s
M lld/test/ELF/bp-section-orderer.s
M lld/test/ELF/emit-relocs-discard-locals.s
A lld/test/ELF/gnu-build-attributes.s
M lld/test/ELF/i386-tls-ie-shared.s
A lld/test/ELF/linkerscript/tbss-addr-expr.s
M lld/test/ELF/pack-dyn-relocs-relr-loop.s
M lld/test/ELF/retain-symbols-file.s
M lld/test/ELF/retain-und.s
M lld/test/MachO/bp-section-orderer-errs.s
M lld/unittests/AsLibELF/CMakeLists.txt
A lld/unittests/AsLibELF/OutputStream.cpp
M lldb/cmake/modules/AddLLDB.cmake
M lldb/docs/resources/build.md
M lldb/include/lldb/Core/Debugger.h
M lldb/include/lldb/Core/Opcode.h
M lldb/include/lldb/DataFormatters/TypeCategoryMap.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Protocol/MCP/Client.h
M lldb/include/lldb/Protocol/MCP/Server.h
M lldb/include/lldb/Utility/Policy.h
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/source/Core/DumpRegisterValue.cpp
M lldb/source/DataFormatters/TypeCategoryMap.cpp
M lldb/source/Host/freebsd/Host.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/source/Protocol/MCP/Client.cpp
M lldb/source/Protocol/MCP/Server.cpp
M lldb/source/Utility/Policy.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
M lldb/test/API/functionalities/statusline/TestStatusline.py
A lldb/test/API/functionalities/statusline/statusline_flood.py
M lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
M lldb/test/API/symstore/TestSymStore.py
M lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
M lldb/test/API/tools/lldb-dap/variables/children/TestDAP_variables_children.py
M lldb/tools/lldb-mcp/Multiplexer.cpp
M lldb/tools/lldb-mcp/Multiplexer.h
M lldb/tools/lldb-mcp/lldb-mcp.cpp
M lldb/unittests/Disassembler/CMakeLists.txt
A lldb/unittests/Disassembler/x86/TestGetOpcodeOversized.cpp
M lldb/unittests/Host/JSONTransportTest.cpp
M lldb/unittests/Protocol/MCPServerInfoTest.cpp
M lldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
M lldb/unittests/tools/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/CMakeLists.txt
A lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
M llvm/CMakeLists.txt
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetBuildBM.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.md
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/APFloat.h
A llvm/include/llvm/ADT/Eytzinger.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/Debuginfod/BuildIDFetcher.cpp
M llvm/lib/ExecutionEngine/Orc/Layer.cpp
M llvm/lib/HTTP/HTTPClient.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/PowerPC/PPC.td
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrFormatsSpacemitV.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSpacemiT.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVMacroFusion.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/UnifyLoopExits.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
A llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
A llvm/test/Analysis/LoopAccessAnalysis/wide-pointer-index-distance.ll
A llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
M llvm/test/Analysis/ScalarEvolution/zext-add-nsw-fold.ll
A llvm/test/Assembler/print-formatted.ll
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
M llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll
M llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
M llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
M llvm/test/CodeGen/AArch64/arm64ec-exit-thunks.ll
M llvm/test/CodeGen/AArch64/arm64ec-hybrid-patchable.ll
M llvm/test/CodeGen/AArch64/basic-pic.ll
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/build-attributes-pauthabi.ll
M llvm/test/CodeGen/AArch64/elf-globals-pic.ll
M llvm/test/CodeGen/AArch64/expand-vector-rot.ll
M llvm/test/CodeGen/AArch64/extend_inreg_of_concat_subvectors.ll
M llvm/test/CodeGen/AArch64/extern-weak.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
M llvm/test/CodeGen/AArch64/got-abuse.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/note-gnu-property-elf-pauthabi.ll
M llvm/test/CodeGen/AArch64/peephole-insert-subreg.mir
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
A llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll
M llvm/test/CodeGen/AArch64/ptrauth-elf-got-function-symbols.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
M llvm/test/CodeGen/AArch64/tagged-globals-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-pic.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
M llvm/test/CodeGen/AArch64/verify-imm.mir
M llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-ds-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/aa-as-infer.ll
M llvm/test/CodeGen/AMDGPU/aa-points-to-constant-memory.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/abs_i16.ll
M llvm/test/CodeGen/AMDGPU/abs_i32.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
M llvm/test/CodeGen/AMDGPU/add-debug.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/add.i16.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/add3.ll
M llvm/test/CodeGen/AMDGPU/add64-low-32-bits-known-zero.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/add_shl.ll
M llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir
M llvm/test/CodeGen/AMDGPU/add_u64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-captured.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
M llvm/test/CodeGen/AMDGPU/addsub64_carry.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-cse.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-invalid-copy.ll
M llvm/test/CodeGen/AMDGPU/adjust-writemask-vectorized.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
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M llvm/test/CodeGen/AMDGPU/agpr-copy-propagation.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
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M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/agpr-remat.ll
M llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx908.mir
M llvm/test/CodeGen/AMDGPU/alloc-aligned-tuples-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/alloc-all-regs-reserved-in-class.mir
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-load-offset-from-reg.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
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M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fdiv.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-libcall-sincos-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-max-num-workgroups-load-annotate.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-no-agprs-violations.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-ceil.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-log2.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pown.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-powr.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.sin.cos.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-exp2.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-log2.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-tdo-tgamma.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-trunc.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
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M llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-wwm-single-lane.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-unroll-threshold.ll
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M llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdhsa-trap-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp-on.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
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M llvm/test/CodeGen/AMDGPU/amdpal-usersgpr-init.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
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M llvm/test/CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
M llvm/test/CodeGen/AMDGPU/and-gcn.ll
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M llvm/test/CodeGen/AMDGPU/and_or.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/andorxorinvimm.ll
M llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
M llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
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M llvm/test/CodeGen/AMDGPU/annotate-noclobber.ll
M llvm/test/CodeGen/AMDGPU/anonymous-gv.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/AMDGPU/are-loads-from-same-base-ptr.ll
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M llvm/test/CodeGen/AMDGPU/artificial-terminators.mir
M llvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce.ll
M llvm/test/CodeGen/AMDGPU/ashr64_reduce_flags.ll
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M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
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M llvm/test/CodeGen/AMDGPU/asyncmark-waitcnt.mir
M llvm/test/CodeGen/AMDGPU/at-least-one-def-value-assert.mir
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M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
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M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_single_lane.ll
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M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
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M llvm/test/CodeGen/AMDGPU/atomics-cas-remarks-gfx90a.ll
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M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
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M llvm/test/CodeGen/AMDGPU/attr-amdgpu-align.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll
M llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
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M llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-vgpr.ll
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M llvm/test/CodeGen/AMDGPU/attr-amdgpu-waves-per-eu.ll
M llvm/test/CodeGen/AMDGPU/attr-unparseable.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior2.ll
M llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
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M llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
M llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
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M llvm/test/CodeGen/AMDGPU/bad-agpr-vgpr-regalloc-priority.mir
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M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
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M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
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M llvm/test/CodeGen/AMDGPU/bf16-ops.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
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M llvm/test/CodeGen/AMDGPU/bfe-i8-i16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
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M llvm/test/CodeGen/AMDGPU/bitcast-v4f16-v4i16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitcast_vector_bigint.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
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M llvm/test/CodeGen/AMDGPU/buffer-atomic-fadd.v2f16-rtn.ll
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M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_sat.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-unsupported-errors.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
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M llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
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M llvm/test/CodeGen/AMDGPU/call-return-types.ll
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M llvm/test/CodeGen/AMDGPU/captured-frame-index.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
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M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
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M llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
M llvm/test/CodeGen/AMDGPU/computeNumSignBits-mul.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
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M llvm/test/CodeGen/AMDGPU/div_i128.ll
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M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-i8-nested-add.ll
M llvm/test/Transforms/LoadStoreVectorizer/X86/vectorize-redund-loads.ll
M llvm/test/Transforms/LoadStoreVectorizer/int_sideeffect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/load-cast-context.ll
A llvm/test/Transforms/LoopVectorize/AArch64/masked-store-with-profile-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vscale-fixed.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-too-many-deps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dbg-tail-folding-by-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
M llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-bin-unary-ops-args.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-iv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-masked-loadstore.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-safe-dep-distance.ll
M llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-vp-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
A llvm/test/Transforms/LoopVectorize/interleaved-accesses-dead-member.ll
M llvm/test/Transforms/LoopVectorize/invalidate-scev-at-scope-after-vectorization.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/is_fpclass.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv_outside_user.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-atomic.ll
M llvm/test/Transforms/LoopVectorize/pr125278.ll
M llvm/test/Transforms/LoopVectorize/pr37248.ll
M llvm/test/Transforms/LoopVectorize/pr38697.ll
M llvm/test/Transforms/LoopVectorize/reduction-small-size.ll
M llvm/test/Transforms/LoopVectorize/replace-first-order-recurrence-by-versioned-iv.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
M llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/scev-exit-phi-invalidation.ll
M llvm/test/Transforms/LoopVectorize/scev-predicate-reasoning.ll
M llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_zext_trip_count.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
M llvm/test/Transforms/LoopVectorize/vplan-native-path-inner-loop-with-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/commute.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div-like-mixed-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extractelements-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-conversion-multi-use-guard.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmulladd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/matmul.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-inst-abs-sub-copyable-value.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reorder-fmuladd-crash.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reused-scalar-repeated-in-node.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/shuffle-vectors-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-extval-struct-operand-no-scalar-reuse.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-loop-backedge.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-noreturn-block.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-loads.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/transpose-with-constants.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/unique_values.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/uselistorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/packed-math.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/fmuladd_width_prop.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-insert-point-restore.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/loads-ordering.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/non-commutative-second-arg-only-copyable.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remark-zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-interleaved-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reversed-strided-node-with-external-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/scatter-vectorize-reversed.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/shuffled-gather-casted.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smax-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-reduction-unsigned-missing-sign.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/split-vectorize-parent-for-copyables.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-indices.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-with-external-use-ptr.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-unsupported-type.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/trunc-bv-multi-uses.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-icmp-signed-op.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/unsigned-node-trunc-with-signed-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/cmp-ptr-minmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-alt-node-must-ext.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/ext-not-resized-op-resized.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-root-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/minbitwidth-trunc.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/non-power-2-subvector-extract.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fadd.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmin-fmax.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reductions-fmul.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/reuse-non-power-of-2-reorder.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/vec-elt-insertion.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/simd-splat-shuffle-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_1.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35628_2.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll
M llvm/test/Transforms/SLPVectorizer/X86/add-sub-nsw-intmin.ll
A llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-cmp-swapped-pred.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-opcode-strict-bitwidth-than-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/barriercall.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast-load-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll
M llvm/test/Transforms/SLPVectorizer/X86/broadcast_long.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-same-lane-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-schedule-for-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle-with-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-store-chains.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-parent-phi-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvectors-with-same-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-root-part-of-graph.ll
M llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/call.ll
M llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-after-intrinsic-call-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp-as-alternate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/cmp_sel.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-member-in-non-commutable-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutativity.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-node-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll
M llvm/test/Transforms/SLPVectorizer/X86/complex-fma-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/control-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll
A llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-child-node-used-outside.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-non-inst-in-stores.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operand-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-used-non-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll
A llvm/test/Transforms/SLPVectorizer/X86/copyable-repeated-operand-partial-commutativity.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-used-outside-with-immediate-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-non-scheduled-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-with-used-outside-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyables-with-parent-scalars-in-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_clear_undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_cmpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_mandeltext.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_vectorizeTree.ll
M llvm/test/Transforms/SLPVectorizer/X86/cse.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-counter.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-inst-reduction-attempt.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-node-with-copyable-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond.ll
M llvm/test/Transforms/SLPVectorizer/X86/diamond_broadcast_extra_shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-different-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/entries-shuffled-diff-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/entry-no-bundle-but-extra-use-on-vec.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-binop-doesnotneedschedule-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/expanded-operand-already-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/expected-prof-consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/X86/ext-used-scalar-different-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-reduced-value-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/external_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-scalar-from-undef.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-used-in-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractcost.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multi-register-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multiple-uses.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-subnodes-same-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-with-undef-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelemets-extended-by-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracts-non-extendable.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs-cost-softfp.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-match-with-poison-scalar.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-matched-bv-with-subvectors.ll
M llvm/test/Transforms/SLPVectorizer/X86/full-non-schedulable-overlap.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-move-out-of-loop.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-with-cmp-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-delayed-nodes-with-reused-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-node-with-in-order-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/hoist.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/icmp-altopcode-after-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/identity-match-splat-less-defined.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
M llvm/test/Transforms/SLPVectorizer/X86/in-tree-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
M llvm/test/Transforms/SLPVectorizer/X86/insert-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertelement-with-copyable-args.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll
M llvm/test/Transforms/SLPVectorizer/X86/inst_size_bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing-pad-for-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/loopinvariant.ll
M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/many-uses-parent-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-bv-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-gather-part-of-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-nodes-updated.ll
M llvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-gather-nodes-phi-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/matching-insert-point-for-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-cast.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-drop-wrapping-flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbw-bitcast-to-fp.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/minmax-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-for-copyable-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-reuse-in-bv.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-node-user-with-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-nodes-to-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi-use-bitcasted-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/multi_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-commutative-op-in-commutative-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-2-num-elems-reused.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-bswap.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-reduced-select-of-bits.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-before-main.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-instructions-become-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-user-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-extern-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-scheduled-inst-reused-as-last-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-vectorizable-inst-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
M llvm/test/Transforms/SLPVectorizer/X86/opaque-ptr.ll
M llvm/test/Transforms/SLPVectorizer/X86/operand-reorder-with-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-root-deleted.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordered-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/ordering-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-node-split-non-schedulable.ll
M llvm/test/Transforms/SLPVectorizer/X86/parent-phi-node-reordered.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-bitwidt-op-not.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-node-with-cycle.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi3.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_landingpad.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi_overalignedtype.ll
M llvm/test/Transforms/SLPVectorizer/X86/phis-different-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr27163.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr40522.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr42022.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr44067.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate-mmra.ll
M llvm/test/Transforms/SLPVectorizer/X86/propagate_ir_flags.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-non-scheduled-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-bswap-with-larger-reduced-type.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-val-extracted-and-externally-used.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-value-stored.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-across-different-bb.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-bool-logic-op-inside.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-copyable-reused-scalars.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-shl1-add-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction-with-removed-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark-partial-loads-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_gather-load-redux-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/remark_not_all_parts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-reused-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_diamond_match.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/replaced-external-in-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reschedule-only-scheduled.ll
M llvm/test/Transforms/SLPVectorizer/X86/resized-bv-values-non-power-of2-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extract-scalar-lanes.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-extracts.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-last-instruction-in-split-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-mask-with-poison-index.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-undefs.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-fma-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-non-power-2-to-power-2-large-vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-replace-extractelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-scalar-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-last-instruction-different-parents.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-operands-but-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/saxpy.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder-non-empty.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/schedule_budget.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-reduction-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-compatible-with-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation.ll
M llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation5.ll
M llvm/test/Transforms/SLPVectorizer/X86/shuffle-mask-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/sibling-loops-mismatched-tripcount.ll
M llvm/test/Transforms/SLPVectorizer/X86/simplebb.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-minbitwidth-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-throttle.ll
M llvm/test/Transforms/SLPVectorizer/X86/small-graph-diff-block-instructions.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2_unord_geps.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-full-match.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-last-inst-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-no-reorder-copy.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-parent-operands-in-spill.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reduce-root.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vector-operand-with-reuses.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-vectorize-gathered-def-after-use.ll
M llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll
M llvm/test/Transforms/SLPVectorizer/X86/store-load-forward-conflict.ll
M llvm/test/Transforms/SLPVectorizer/X86/stores_vectorize.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-extract-dominance.ll
M llvm/test/Transforms/SLPVectorizer/X86/struct-return-ordering-stress.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunc-store-value-ty-not-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunced-buildvector-scalar-extended.ll
M llvm/test/Transforms/SLPVectorizer/X86/uitofp-with-signed-value-bitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-node-with-same-last-instr.ll
M llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-gather-some-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll
M llvm/test/Transforms/SLPVectorizer/X86/whole-registers-compare.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-combined-opcode.ll
M llvm/test/Transforms/SLPVectorizer/X86/xor-with-zero-and-incompat.ll
M llvm/test/Transforms/SLPVectorizer/abs-overflow-incorrect-minbws.ll
M llvm/test/Transforms/SLPVectorizer/alt-cmp-vectorize.ll
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-non-profitable.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/crash_extractelement_poison.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
M llvm/test/Transforms/SLPVectorizer/ext-after-phi-node.ll
M llvm/test/Transforms/SLPVectorizer/ext-int-reduced-not-operand.ll
M llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
M llvm/test/Transforms/SLPVectorizer/external-user-instruction-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
M llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
M llvm/test/Transforms/SLPVectorizer/freeze-signedness-missed.ll
M llvm/test/Transforms/SLPVectorizer/gather_extract_from_vectorbuild.ll
M llvm/test/Transforms/SLPVectorizer/gathered-consecutive-loads-different-types.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
M llvm/test/Transforms/SLPVectorizer/insert-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-across-zero.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
M llvm/test/Transforms/SLPVectorizer/insertelement-uses-vectorized-index.ll
M llvm/test/Transforms/SLPVectorizer/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/is_fpclass.ll
M llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/last-buildvector-node.ll
M llvm/test/Transforms/SLPVectorizer/materialize-vector-of-consts.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/minbitwidth-user-not-min.ll
M llvm/test/Transforms/SLPVectorizer/multi-node-vectorized-insts.ll
M llvm/test/Transforms/SLPVectorizer/multi-uses-with-deps-in-first.ll
M llvm/test/Transforms/SLPVectorizer/operand-is-reduced-val.ll
M llvm/test/Transforms/SLPVectorizer/partial-register-extract.ll
M llvm/test/Transforms/SLPVectorizer/phi-undef-input.ll
M llvm/test/Transforms/SLPVectorizer/postponed_gathers.ll
M llvm/test/Transforms/SLPVectorizer/reduced-gathered-vectorized.ll
M llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/reordered-top-scalars.ll
M llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/reschedule.ll
M llvm/test/Transforms/SLPVectorizer/resized-alt-shuffle-after-minbw.ll
M llvm/test/Transforms/SLPVectorizer/return.ll
M llvm/test/Transforms/SLPVectorizer/reudction-or-non-poisoned.ll
M llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SLPVectorizer/root-trunc-extract-reuse.ll
M llvm/test/Transforms/SLPVectorizer/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
M llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
M llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
M llvm/test/Transforms/SLPVectorizer/shufflebuilder-bug.ll
M llvm/test/Transforms/SLPVectorizer/slp-deleted-inst.ll
M llvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll
M llvm/test/Transforms/SLPVectorizer/splat-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/stores-non-ordered.ll
M llvm/test/Transforms/SLPVectorizer/unknown-entries.ll
M llvm/test/Transforms/SLPVectorizer/vectorize-reorder-alt-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SROA/basictest.ll
M llvm/test/Transforms/SROA/prefer-integer-partition.ll
M llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll
M llvm/test/Transforms/SROA/struct-to-vector-fp-store-only-tail.ll
M llvm/test/Transforms/SROA/vector-conversion.ll
M llvm/test/Transforms/SROA/vector-promotion-rmw-cannot-tree-merge.ll
M llvm/test/Transforms/SROA/vector-promotion.ll
M llvm/test/Transforms/Scalarizer/intrinsics.ll
M llvm/test/Transforms/SpeculativeExecution/spec-calls.ll
M llvm/test/Transforms/TailCallElim/accum_recursion.ll
M llvm/test/Transforms/TailCallElim/tre-minmax-intrinsic.ll
M llvm/test/Transforms/UnifyLoopExits/basic.ll
A llvm/test/Transforms/UnifyLoopExits/multiedge.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/Verifier/arbitrary-fp-convert.ll
M llvm/test/tools/llubi/intr_fp_is_fpclass.ll
A llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
M llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
A llvm/test/tools/llvm-debuginfod-find/timeout.test
A llvm/test/tools/llvm-profgen/AArch64/aarch64-disassemble-all-features.test
A llvm/test/tools/llvm-profgen/AArch64/lit.local.cfg
A llvm/test/tools/llvm-profgen/ARM/Inputs/etm-opencsd.yaml
A llvm/test/tools/llvm-profgen/ARM/etm-arch.test
A llvm/test/tools/llvm-profgen/ARM/etm-opencsd.test
A llvm/test/tools/llvm-profgen/ARM/lit.local.cfg
R llvm/test/tools/llvm-profgen/Inputs/artificial-branch.perfscript
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfbin
R llvm/test/tools/llvm-profgen/Inputs/callback-external-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.exe
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.pdb
R llvm/test/tools/llvm-profgen/Inputs/coff-profile.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cold-profile-trimming.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfbin
R llvm/test/tools/llvm-profgen/Inputs/coroutine.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-interrupt.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-invalid-ret-addr.perfscript
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfbin
R llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfscript
R llvm/test/tools/llvm-profgen/Inputs/css-pgo-perf.script
R llvm/test/tools/llvm-profgen/Inputs/dap-perf-trace.txt
R llvm/test/tools/llvm-profgen/Inputs/dap-pie.bin
R llvm/test/tools/llvm-profgen/Inputs/dap.bin
R llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
R llvm/test/tools/llvm-profgen/Inputs/external-address.perfscript
R llvm/test/tools/llvm-profgen/Inputs/filter-ambiguous-profile.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator-probe.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.perfbin
R llvm/test/tools/llvm-profgen/Inputs/fs-discriminator.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfbin
R llvm/test/tools/llvm-profgen/Inputs/func-split.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfbin
R llvm/test/tools/llvm-profgen/Inputs/inline-noprobe2.perfscript
R llvm/test/tools/llvm-profgen/Inputs/invalid-range.perfscript
R llvm/test/tools/llvm-profgen/Inputs/lbr-perf-for-dap.script
R llvm/test/tools/llvm-profgen/Inputs/missing-dwarf.exe
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfbin
R llvm/test/tools/llvm-profgen/Inputs/multi-load-segs.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noinline-tailcall-probe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.aggperfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.mmap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/out-of-bounds.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/pie-dap-perf.txt
R llvm/test/tools/llvm-profgen/Inputs/pie-lbr-perf.script
R llvm/test/tools/llvm-profgen/Inputs/profile-density-cs.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/profile-density.raw.prof
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-noprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/recursion-compression-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.exe
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-single.o.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.dwo.yaml
R llvm/test/tools/llvm-profgen/Inputs/split-dwarf-split.exe
R llvm/test/tools/llvm-profgen/Inputs/symbolize.ll
R llvm/test/tools/llvm-profgen/Inputs/symbolize.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.ll
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/truncated-pseudoprobe.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-dwarf.perfscript
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfbin
R llvm/test/tools/llvm-profgen/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/artificial-branch.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/callback-external-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.pdb
A llvm/test/tools/llvm-profgen/X86/Inputs/coff-profile.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cold-profile-trimming.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/coroutine.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-interrupt.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-invalid-ret-addr.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/css-pgo-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-perf-trace.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/dap-pie.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/dap.bin
A llvm/test/tools/llvm-profgen/X86/Inputs/external-address.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/filter-ambiguous-profile.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator-probe.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/fs-discriminator.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/func-split.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/inline-noprobe2.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/invalid-range.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/lbr-perf-for-dap.script
A llvm/test/tools/llvm-profgen/X86/Inputs/missing-dwarf.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/multi-load-segs.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-cs-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noinline-tailcall-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.aggperfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.mmap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/out-of-bounds.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-dap-perf.txt
A llvm/test/tools/llvm-profgen/X86/Inputs/pie-lbr-perf.script
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density-cs.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/profile-density.raw.prof
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-noprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe-nommap.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/recursion-compression-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-single.o.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.dwo.yaml
A llvm/test/tools/llvm-profgen/X86/Inputs/split-dwarf-split.exe
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/symbolize.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.ll
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/truncated-pseudoprobe.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-dwarf.perfscript
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfbin
A llvm/test/tools/llvm-profgen/X86/Inputs/unique-linkage-name-probe.perfscript
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable-pie.test
A llvm/test/tools/llvm-profgen/X86/afdo-with-vtable.test
A llvm/test/tools/llvm-profgen/X86/callback-external-addr.test
A llvm/test/tools/llvm-profgen/X86/coff-profile.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming-symbolized.test
A llvm/test/tools/llvm-profgen/X86/cold-profile-trimming.test
A llvm/test/tools/llvm-profgen/X86/context-depth.test
A llvm/test/tools/llvm-profgen/X86/coroutine.test
A llvm/test/tools/llvm-profgen/X86/cs-extbinary.test
A llvm/test/tools/llvm-profgen/X86/cs-external-address.test
A llvm/test/tools/llvm-profgen/X86/cs-interrupt.test
A llvm/test/tools/llvm-profgen/X86/cs-invalid-ret-addr.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-cost.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline-sample-profile.test
A llvm/test/tools/llvm-profgen/X86/cs-preinline.test
A llvm/test/tools/llvm-profgen/X86/cs-tailcall.test
A llvm/test/tools/llvm-profgen/X86/disassemble.test
A llvm/test/tools/llvm-profgen/X86/etm-non-arm.test
A llvm/test/tools/llvm-profgen/X86/filter-ambiguous-profile.test
A llvm/test/tools/llvm-profgen/X86/fname-canonicalization.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator-probe.test
A llvm/test/tools/llvm-profgen/X86/fs-discriminator.test
A llvm/test/tools/llvm-profgen/X86/func-split.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-force-dwarf.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/inline-noprobe2.test
A llvm/test/tools/llvm-profgen/X86/inline-probe-afdo.test
A llvm/test/tools/llvm-profgen/X86/inline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/invalid-perfscript.test
A llvm/test/tools/llvm-profgen/X86/invalid-range.test
A llvm/test/tools/llvm-profgen/X86/lit.local.cfg
A llvm/test/tools/llvm-profgen/X86/merge-cold-profile.test
A llvm/test/tools/llvm-profgen/X86/missing-dwarf.test
A llvm/test/tools/llvm-profgen/X86/mmapEvent.test
A llvm/test/tools/llvm-profgen/X86/multi-load-segs.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-cs-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-noprobe.test
A llvm/test/tools/llvm-profgen/X86/noinline-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/profile-density.test
A llvm/test/tools/llvm-profgen/X86/pseudo-probe-desc-mismatch.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding-discriminator.test
A llvm/test/tools/llvm-profgen/X86/pseudoprobe-decoding.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-noprobe.test
A llvm/test/tools/llvm-profgen/X86/recursion-compression-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/separate-debuginfo-binary.test
A llvm/test/tools/llvm-profgen/X86/split-dwarf.test
A llvm/test/tools/llvm-profgen/X86/symbolize.test
A llvm/test/tools/llvm-profgen/X86/truncated-pseudoprobe.test
A llvm/test/tools/llvm-profgen/X86/update-samples.test
R llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable-pie.test
R llvm/test/tools/llvm-profgen/afdo-with-vtable.test
R llvm/test/tools/llvm-profgen/callback-external-addr.test
R llvm/test/tools/llvm-profgen/coff-profile.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming-symbolized.test
R llvm/test/tools/llvm-profgen/cold-profile-trimming.test
R llvm/test/tools/llvm-profgen/context-depth.test
R llvm/test/tools/llvm-profgen/coroutine.test
R llvm/test/tools/llvm-profgen/cs-extbinary.test
R llvm/test/tools/llvm-profgen/cs-external-address.test
R llvm/test/tools/llvm-profgen/cs-interrupt.test
R llvm/test/tools/llvm-profgen/cs-invalid-ret-addr.test
R llvm/test/tools/llvm-profgen/cs-preinline-cost.test
R llvm/test/tools/llvm-profgen/cs-preinline-sample-profile.test
R llvm/test/tools/llvm-profgen/cs-preinline.test
R llvm/test/tools/llvm-profgen/cs-tailcall.test
R llvm/test/tools/llvm-profgen/disassemble.test
R llvm/test/tools/llvm-profgen/etm-arch.test
R llvm/test/tools/llvm-profgen/etm-opencsd.test
R llvm/test/tools/llvm-profgen/filter-ambiguous-profile.test
R llvm/test/tools/llvm-profgen/fname-canonicalization.test
R llvm/test/tools/llvm-profgen/fs-discriminator-probe.test
R llvm/test/tools/llvm-profgen/fs-discriminator.test
R llvm/test/tools/llvm-profgen/func-split.test
R llvm/test/tools/llvm-profgen/inline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/inline-force-dwarf.test
R llvm/test/tools/llvm-profgen/inline-noprobe.test
R llvm/test/tools/llvm-profgen/inline-noprobe2.test
R llvm/test/tools/llvm-profgen/inline-probe-afdo.test
R llvm/test/tools/llvm-profgen/inline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/invalid-perfscript.test
R llvm/test/tools/llvm-profgen/invalid-range.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
R llvm/test/tools/llvm-profgen/merge-cold-profile.test
R llvm/test/tools/llvm-profgen/missing-dwarf.test
R llvm/test/tools/llvm-profgen/mmapEvent.test
R llvm/test/tools/llvm-profgen/multi-load-segs.test
R llvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test
R llvm/test/tools/llvm-profgen/noinline-noprobe.test
R llvm/test/tools/llvm-profgen/noinline-pseudoprobe.test
R llvm/test/tools/llvm-profgen/profile-density.test
R llvm/test/tools/llvm-profgen/pseudo-probe-desc-mismatch.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding-discriminator.test
R llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test
R llvm/test/tools/llvm-profgen/recursion-compression-noprobe.test
R llvm/test/tools/llvm-profgen/recursion-compression-pseudoprobe.test
R llvm/test/tools/llvm-profgen/separate-debuginfo-binary.test
R llvm/test/tools/llvm-profgen/split-dwarf.test
R llvm/test/tools/llvm-profgen/symbolize.test
R llvm/test/tools/llvm-profgen/truncated-pseudoprobe.test
R llvm/test/tools/llvm-profgen/update-samples.test
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/EytzingerTest.cpp
M llvm/unittests/CodeGen/DIETest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-doc/BUILD.gn
A llvm/utils/gn/secondary/clang-tools-extra/clang-doc/markdown/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
M mlir/cmake/modules/CMakeLists.txt
M mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Analysis/Presburger/Matrix.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Dialect/Linalg/flatten-elementwise.mlir
M mlir/test/Dialect/Linalg/flatten-unsupported.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
A mlir/test/Dialect/OpenMP/cli-unroll-partial.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-invalid.mlir
M mlir/test/Target/LLVMIR/omptarget-record-type-with-ptr-member-host.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial01.mlir
A mlir/test/Target/LLVMIR/openmp-unroll-partial02.mlir
M mlir/tools/mlir-irdl-to-cpp/CMakeLists.txt
M mlir/tools/mlir-src-sharder/CMakeLists.txt
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/ci/openmp-offload-amdgpu-runtime.py
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
M offload/test/lit.cfg
M offload/test/offloading/fortran/declare-target-common-block-main.f90
A offload/test/offloading/fortran/map-zero-size-array.f90
A offload/test/offloading/fortran/target-teams-if-runtime-init.f90
M openmp/device/src/Kernel.cpp
M orc-rt/include/orc-rt-c/Logging.h
M orc-rt/include/orc-rt/AllocAction.h
M orc-rt/include/orc-rt/Compiler.h
M orc-rt/include/orc-rt/Error.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/Environment.cpp
A orc-rt/lib/executor/Environment.h
M orc-rt/lib/executor/Logging.cpp
A orc-rt/lib/executor/Logging_oslog.cpp
A orc-rt/lib/executor/Logging_printf.cpp
M orc-rt/test/CMakeLists.txt
M orc-rt/test/regression/init.test
M orc-rt/test/regression/lit.cfg.py
A orc-rt/test/regression/logging/lit.local.cfg
A orc-rt/test/regression/logging/os_log/delivery.test
A orc-rt/test/regression/logging/os_log/lit.local.cfg
A orc-rt/test/regression/logging/os_log/no-printf-output.test
A orc-rt/test/regression/logging/printf-backend/bad-level.test
A orc-rt/test/regression/logging/printf-backend/debug-compiled-out.test
A orc-rt/test/regression/logging/printf-backend/debug-level.test
A orc-rt/test/regression/logging/printf-backend/format.test
A orc-rt/test/regression/logging/printf-backend/level-off.test
A orc-rt/test/regression/logging/printf-backend/lit.local.cfg
A orc-rt/test/regression/logging/printf-backend/output-redirect.test
A orc-rt/test/regression/logging/printf-backend/runtime-level.test
M orc-rt/test/tools/CMakeLists.txt
A orc-rt/test/tools/orc-rt-log-check.cpp
M orc-rt/test/unit/LoggingTest.cpp
M orc-rt/test/unit/SessionTest.cpp
M orc-rt/tools/CMakeLists.txt
A orc-rt/tools/ogre/CMakeLists.txt
A orc-rt/tools/ogre/ogre.cpp
R orc-rt/tools/orc-executor/CMakeLists.txt
R orc-rt/tools/orc-executor/orc-executor.cpp
M polly/lib/Analysis/ScopDetection.cpp
M polly/lib/Support/ScopHelper.cpp
A polly/test/CodeGen/issue205137.ll
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
Merge remote-tracking branch 'origin/main' into users/ziqingluo/179151541-followup
Compare: https://github.com/llvm/llvm-project/compare/d65c37898ebe...55f4be56082a
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