[all-commits] [llvm/llvm-project] dc1273: clang-linker-wrapper: Use AMDGPU::TargetID for dev...
Daniil Kovalev via All-commits
all-commits at lists.llvm.org
Mon Jul 13 11:03:12 PDT 2026
Branch: refs/heads/users/kovdan01/ptrauth-module-flags-mismatch
Home: https://github.com/llvm/llvm-project
Commit: dc1273beba1c70cb74d03c760958ee625d8aecf5
https://github.com/llvm/llvm-project/commit/dc1273beba1c70cb74d03c760958ee625d8aecf5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
clang-linker-wrapper: Use AMDGPU::TargetID for device-image compatibility (#209135)
Previously the link compatibilty was based on a raw string match of the
triple + cpu name. Start parsing the triple, and use the compatibility
function. Start using AMDGPU::TargetID from TargetParser, as a step
towards removing clang's redundant TargetID handling.
Co-authored-by: Claude (Opus 4.8)
Commit: 254472bc2edd6d8ec536656368869e36c386a339
https://github.com/llvm/llvm-project/commit/254472bc2edd6d8ec536656368869e36c386a339
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang][CMake] Use LLVM-declared LLVM_EXTERNAL_LIT (#208680)
LLVM_EXTERNAL_LIT is already declared by
https://github.com/llvm/llvm-project/blob/99fb741b6e0da866bf3c6000531104bff347d787/llvm/cmake/modules/AddLLVM.cmake#L2175.
Flang's redeclaration in standalone builds is redundant and breaks on
Windows because the filename there is `llvm-lit.py`.
Commit: a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
https://github.com/llvm/llvm-project/commit/a9ba4d3fd27a05b31adfeaab5dcd42d8e43c1931
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
Revert "[SLP] Support memory runtime alias checks"
This reverts commit d4c6c8623e9bf9aa75ad049f55423223228116b3 to address
postcommit review https://github.com/llvm/llvm-project/pull/203631?email_source=notifications&email_token=ABI45DXYNFIHECEWI5IGYJT5ETMNLA5CNFSNUABKM5UWIORPF5TWS5BNNB2WEL2QOVWGYUTFOF2WK43UKJSXM2LFO4XTINRYGQ4TAMRWGAZ2M4TFMFZW63VMON2GC5DFL5RWQYLOM5S2KZLWMVXHJLDGN5XXIZLSL5RWY2LDNM#pullrequestreview-4684902603
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/209173
Commit: da0045a12dbc6cc5b07534ca9ddcceaef49f05de
https://github.com/llvm/llvm-project/commit/da0045a12dbc6cc5b07534ca9ddcceaef49f05de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-gfx11plus.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
M llvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics-min-max-system.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx908.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
M llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
M llvm/test/CodeGen/AMDGPU/greedy-instruction-split-subrange.mir
M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
M llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll
M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/half-alloca-promotion.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hard-clause-limit-attr.mir
M llvm/test/CodeGen/AMDGPU/hard-clause-limit.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx10.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx11.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-img-gfx12.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses-load-monitor.mir
M llvm/test/CodeGen/AMDGPU/hard-clauses.mir
M llvm/test/CodeGen/AMDGPU/hazard-buffer-store-v-interp.mir
M llvm/test/CodeGen/AMDGPU/hazard-flat-instruction-valu-check.mir
M llvm/test/CodeGen/AMDGPU/hazard-getreg-waitalu.mir
M llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
M llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
M llvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir
M llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazard-shift64.mir
M llvm/test/CodeGen/AMDGPU/hazard.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/hsa-func-align.ll
M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-register-count.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-enqueue-kernel-.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-heap-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-present-asan.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-images.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-multigrid-sync-arg-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v4.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-queueptr-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-resource-usage-function-ordering.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-uniform-workgroup-size-v5.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-wavefrontsize.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/i1-to-bf16.ll
M llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir
M llvm/test/CodeGen/AMDGPU/i8-extract-cost-comparison.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/idemponent-atomics.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15) (#209118)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: b719e2e27ce121bec3afcf96f4806c0592ce95a1
https://github.com/llvm/llvm-project/commit/b719e2e27ce121bec3afcf96f4806c0592ce95a1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot2-test.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4-test.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/iglp-no-clobber.ll
M llvm/test/CodeGen/AMDGPU/iglp.opt.reentry.ll
M llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
M llvm/test/CodeGen/AMDGPU/image-schedule.ll
M llvm/test/CodeGen/AMDGPU/img-nouse-adjust.ll
M llvm/test/CodeGen/AMDGPU/imm.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/immv216.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
M llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
M llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si-gfx9.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
M llvm/test/CodeGen/AMDGPU/infer-addrpace-pipeline.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-agpr-negative-tests.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir
M llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av.mir
M llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-large.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-leaf.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count-use-inactive.ll
M llvm/test/CodeGen/AMDGPU/init-whole-wave-vgpr-count.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint-err.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-av-constraint.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-reserved-regs.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-range-unsupported-width.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-vgpr-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-attr.ll
M llvm/test/CodeGen/AMDGPU/inline-constraints.ll
M llvm/test/CodeGen/AMDGPU/inline-maxbb.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-fake16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16-true16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-16.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-packed.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-v16.ll
M llvm/test/CodeGen/AMDGPU/insert-branch-w32.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-attr.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-literal.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-parse.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-wmma-xdl.mir
M llvm/test/CodeGen/AMDGPU/insert-delay-alu.mir
M llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx1250.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-callee.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-fence-soft.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-hang.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_subreg.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/inst-prefetch-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
Log Message:
-----------
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16) (#209119)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx>
to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa),
dropping the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: db87fc87c7fd70f9e429439aeebbf9cd014dde54
https://github.com/llvm/llvm-project/commit/db87fc87c7fd70f9e429439aeebbf9cd014dde54
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
Log Message:
-----------
[libc][RISC-V] Enable additional entrypoints and headers (#208927)
Bring most of the already enabled libs for x86_64 to riscv.
Also, move two libs in x86_64 entrypoints.txt to keep the file sorted
alphabetically.
Commit: 62b7c7f547da4af492e85aa09b6feafc9b513f23
https://github.com/llvm/llvm-project/commit/62b7c7f547da4af492e85aa09b6feafc9b513f23
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5595710 (#209165)
This fixes 5595710093f7f8b9cdb0ff4f8d7400e58bde09b2.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5595710093f7f8b9cdb0ff4f8d7400e58bde09b2
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 9e014de2d3cc674b548e321013bfe42e6f5485ab
https://github.com/llvm/llvm-project/commit/9e014de2d3cc674b548e321013bfe42e6f5485ab
Author: Tony Guillot <tony.guillot at protonmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/attr-sentinel.cpp
Log Message:
-----------
[Clang] Fixed missing sentinel attribute diagnostic discrepancy with explicit object parameters (#208842)
When using the sentinel attribute on a variadic function with an
explicit object parameter, the missing sentinel attribute diagnostic
takes into account the explicit object parameter as an argument. It was
diagnosing `missing sentinel in function call` instead of `not enough
variable arguments in '%0' declaration to fit a sentinel`, compared to
other similar variadic functions.
Fixes #200007
Commit: 90d8af8caac360dca0fa28abbb5804dcbe694ef1
https://github.com/llvm/llvm-project/commit/90d8af8caac360dca0fa28abbb5804dcbe694ef1
Author: Kieran B <kieran.bailey at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
Log Message:
-----------
[Clang][AArch64] Add ACLE _n variants for svdot intrinsics (#208694)
Add missing _n variants for the svdot ACLE
intrinsics in arm_sve.td
Add CodeGen tests in acle_sve2p1_dot.c to verify
correct intrinsics are generated
List of Intrinsics:
- svdot_n_s32_s16
- svdot_n_u32_u16
- svdot_n_f32_f16
Commit: 7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
https://github.com/llvm/llvm-project/commit/7a8b26271b273ea36c1d68c97f4c87b63de4a2bd
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind][Hexagon] Save/restore full r0-r7 in getcontext/jumpto (#208753)
The Hexagon save and restore routines dropped GPRs, producing an
incomplete context.
UnwindRegistersSave.S (__unw_getcontext): save r0-r7 (stores began at
__r[8]), drop a dead "r1 = memw(r30)" before the PC store, and return
UNW_ESUCCESS instead of a stale non-zero value.
UnwindRegistersRestore.S (jumpto): restore the missing r2-r7 (r0/r1 and
r8-r31 were already handled), and fix the stale "pointer is in r2"
comment (it is r0).
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: ff599bba9d370bf58e4a34f9f29b4fb6234013f0
https://github.com/llvm/llvm-project/commit/ff599bba9d370bf58e4a34f9f29b4fb6234013f0
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Hexagon] Enable init-array by default for picolibc (#208639)
Picolibc uses the modern .init_array/.fini_array mechanism rather than
legacy .init/.fini sections. Extend UseInitArrayDefault in
HexagonToolChain::addClangTargetOptions to also return true when
--cstdlib=picolibc is selected, preventing -fno-use-init-array from
being passed to cc1.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
https://github.com/llvm/llvm-project/commit/fc9a4afa9bdc406f1ce4e0dbc078734025ab2d9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
Log Message:
-----------
[WebAssembly] Port SelectionDAGISel to NewPM
Similar to other targets, for getting the NewPM rolling.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/208982
Commit: c31455cd07c43ed02445f5b1f1057037f0503552
https://github.com/llvm/llvm-project/commit/c31455cd07c43ed02445f5b1f1057037f0503552
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/src/filesystem/operations.cpp
A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
Log Message:
-----------
[libc++] Fix filesystem::remove_all bug with read-only nested directory (#197104)
Consider a directory `parent/child`, where `parent` has read-only
permissions. Calling `remove_all` on `parent` is expected to fail with a
permission error, however it fails with a different error depending on
the platform (such as "error file exists" on AIX).
During the recursive removal, `unlinkat` is first called on the child
and fails with a permission error. Rather than returning, the function
continues and tries `unlinkat` on the parent and fails with a different
error depending on the platform. This error is returned instead of the
permission error. This PR makes the first encountered error be returned
instead.
According to the standard [fs.op.remove.all]:
> Effects: Recursively deletes the contents of p if it exists, then
> deletes file p itself, as if by POSIX remove.
The word "then" implies an ordering where deleting the contents of p
should be successful before deleting file p itself.
Fixes #197100.
Commit: 52511761bc80e96b7d07b4da71bb08c8f498dee1
https://github.com/llvm/llvm-project/commit/52511761bc80e96b7d07b4da71bb08c8f498dee1
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
Log Message:
-----------
[AMDGPU] Fix SSID merge in SIMemoryLegalizer to use smallest inclusiv… (#208300)
…e scope
SIMemOpAccess::constructFromMIWithMMO merged multiple MMO sync scopes by
calling isSyncScopeInclusion(A, B) and blindly overwriting SSID with B
when it returned false. This was correct when B strictly subsumes A, but
isSyncScopeInclusion returned false for both "A < B" and "A and B are
incomparable" -- e.g. agent-one-as (one-AS, agent level) vs workgroup
(cross-AS, workgroup level) live on different branches of the
two-dimensional scope lattice and neither subsumes the other. In the
incomparable case the resulting SSID depended on MMO order, silently
dropping agent-scope cache-management requirements.
Fix: replace isSyncScopeInclusion (std::optional<bool>) with
getMergedSyncScopeID (std::optional<SyncScope::ID>) which returns the
smallest scope inclusive of both inputs. The merged level is
max(level_A, level_B); if either input is cross-AS the result is also
cross-AS, since dropping cross-AS ordering would silently lose the
ordering guarantee for address spaces not covered by a one-AS scope.
Add tests in memory-legalizer-multiple-mem-operands-atomics.mir
verifying that a FLAT_ATOMIC_ADD with agent-one-as and workgroup MMOs
produces agent-scope cache ops (BUFFER_WBINVL1_VOL) regardless of MMO
order.
Commit: c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
https://github.com/llvm/llvm-project/commit/c42c7b47a634ab3f4455b0e8b17f2bbc3be022af
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Lex/PPDirectives.cpp
Log Message:
-----------
[clang][NFC] Skip macro source-location check for names that can't warn (#208862)
While profiling Linux headers, I noticed that
`Preprocessor::CheckMacroName` performs expensive source-location
queries for every macro, even when no diagnostic is possible. We can
avoid this overhead by only performing these checks when the macro name
is actually a reserved identifier or keyword, skipping them entirely for
ordinary macros.
| | basket Ir |
| --- | --- |
| before | 10,690,004,315 |
| after | 10,649,181,540 |
| **Δ** | **−40.8M (−0.38%)** |
this is a follow up to #137306 and #139492
Commit: aab2ff0b9096df1d5168e293c81b6653e759890d
https://github.com/llvm/llvm-project/commit/aab2ff0b9096df1d5168e293c81b6653e759890d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
Log Message:
-----------
[SDAG][X86] Form pseudo fmin/fmax from select_cc (#208717)
Create PSEUDO_FMIN/PSEUDO_FMAX from SELECT_CC in addition to
SELECT/VSELECT.
Unfortunately we can't just do this in the common SimplifySelectCC()
helper because of the StrictFP handling and need to handle all three
cases explicitly.
I ran into this trying to use the ops on s390x, but there are also some
avx512 cases that benefit, so I split out this generalization.
Commit: 592953beff733a1e28f6c6e5e39f948fb035a329
https://github.com/llvm/llvm-project/commit/592953beff733a1e28f6c6e5e39f948fb035a329
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clang][Diagnostics] Only record lexer check points when colors are enabled (#204926)
Only build lexer check points when colored diagnostics are enabled,
since that's the only case where they're ever used,
This should reduce the cost on larger builds.
| Commit | Basket Ir | Delta |
|---|---|---|
| 863b2c84 (Parent) | 30,240,576,150 | — |
| 718aac9f (Commit) | 30,336,607,185 | +0.318% |
| **+ this pr** | **30,279,772,621** | **+0.130%** |
**synthetic error file (12.3k lines, 300 errors):**
| Build | Error-TU Ir (colors on) | Δ vs commit |
|---|---|---|
| 718aac9f (Commit) | 1,386,488,658 | — |
| **+ this pr** | **1,387,140,588** | **+0.05%** |
Resolves #203764
---------
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ee71eb831b6090897df8ae4f843f4b14370131d5
https://github.com/llvm/llvm-project/commit/ee71eb831b6090897df8ae4f843f4b14370131d5
Author: StoeckOverflow <95052643+StoeckOverflow at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/APINotes/APINotesReader.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/Sema/SemaAPINotes.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
Log Message:
-----------
[APINotes] Match function-like Where.Parameters in Sema (#205307)
This PR teaches Sema to apply function-like `Where.Parameters` selectors
for API notes.
It builds on #204147 by using the serialized `Where.Parameters` selector
keys in Sema. For each `FunctionDecl` / `CXXMethodDecl`, Sema derives an
exact parameter selector from the declaration’s `FunctionProtoType`.
Broad name-only API notes lookup still runs first, preserving existing
behavior. If Clang can form a parameter selector, Sema then performs an
exact selector lookup and applies that result second, allowing
overload-specific notes to refine same-name broad notes.
Tests:
- Adds end-to-end module APINotes Sema coverage (`.apinotes` source ->
binary APINotes -> reader lookup -> Sema matching -> AST result)
- Covers core matching behavior for global functions and C++ methods,
including same-name overloads, exact empty selectors, broad-plus-exact
coexistence and mismatched selectors
- Covers important edge cases: default arguments, static methods, alias
spellings remaining non-canonicalized, by-value `const`, namespaced
functions, and overloaded operators.
This PR does not add duplicate-selector or unmatched-selector
diagnostics. Those remain for a follow-up diagnostics PR.
**Note**: this PR was originally stacked on top of #204147. It has now
been rebased on top of main containing those changes, so the remaining
diff should reflect only the top commit specific to this PR.
Reviewers: @Xazax-hun @j-hui @egorzhdan
---------
Co-authored-by: John Hui <updog at j-hui.com>
Commit: 42aaca2c4a6d69b6334be102e41d185526915f8b
https://github.com/llvm/llvm-project/commit/42aaca2c4a6d69b6334be102e41d185526915f8b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
Log Message:
-----------
[orc-rt] Add ReportErrorsViaSession utility. (#209177)
ReportErrorsViaSession is a function object constructed from a Session&
that forwards Errors to that Session's reportError method. It will be
used in upcoming patches to simplify some error reporting plumbing.
Commit: f88150e1d5fc8591b0d71619d02e5b553161c1f8
https://github.com/llvm/llvm-project/commit/f88150e1d5fc8591b0d71619d02e5b553161c1f8
Author: Andrey Pavlenko <andrey.a.pavlenko at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
Log Message:
-----------
[MLIR][XeGPU][VectorToXeGPU] Fixed transposed transfer_read/write (#197281)
The problem was that adjustStridesForPermutation() permutes strides, but
they are required to compute base offset from transfer read indices.
Added optional argument to computeMemrefMeta() to preserve the original
strides.
Commit: 4c519c6e558a0cccf80c072ccf0822488968cbaf
https://github.com/llvm/llvm-project/commit/4c519c6e558a0cccf80c072ccf0822488968cbaf
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn] port 375cc88b510150d (AMDGPU -gisel-extended-llt) (#209181)
Commit: 290601ed3e08a7e90b81b0b17cf45e1a435783a7
https://github.com/llvm/llvm-project/commit/290601ed3e08a7e90b81b0b17cf45e1a435783a7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStore.cpp
M lldb/source/Plugins/SymbolLocator/SymStore/SymbolLocatorSymStoreProperties.td
M lldb/test/API/symstore/TestSymStore.py
Log Message:
-----------
[lldb] Make timeout for HTTP send/receive in SymbolLocatorSymStore configurable (#192061)
This patch adds the `plugin.symbol-locator.symstore.timeout` setting and
keeps the previously hard-coded value of 60 sections as the default. It
adds a test to check that the breakpoint doesn't resolve and we get the
correct warning message if the timeout hits.
---------
Co-authored-by: Nerixyz <nerixdev at outlook.de>
Commit: da1e5f1f6c096f360abe39ad2f7d235b6d270a70
https://github.com/llvm/llvm-project/commit/da1e5f1f6c096f360abe39ad2f7d235b6d270a70
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
Log Message:
-----------
[alpha.webkit.UncheckedLocalVarsChecker] Improve the warning text (#208855)
This PR aligns UncheckedLocalVarsChecker and its variant's warning
message with the new warning format in
https://github.com/llvm/llvm-project/pull/202724.
Commit: ac370b8e838ada3dd482560c4b8a568e760f95b5
https://github.com/llvm/llvm-project/commit/ac370b8e838ada3dd482560c4b8a568e760f95b5
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
Log Message:
-----------
[MLIR][Linalg] Fix LinalgSpecializeGenericOpsPass for scalar inputs (#208466)
The test case added would crash because the Ranked Tensor-ness of
operands was assumed but never checked. This crash only happened when there
were multiple inputs as it must bail out somewhere else when there is only
1 input.
Commit: 24df1d13d9090e075b162bf81d1a34a408e54924
https://github.com/llvm/llvm-project/commit/24df1d13d9090e075b162bf81d1a34a408e54924
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
Reapply "[Clang] Transform lambda's constraints when instantiating parameter mapping (#207966)
This reapplies https://github.com/llvm/llvm-project/pull/195995
The last approach caused a regression because sometimes we transformed
the constraints of lambda expression too aggressively when we should
have preserved it.
The basic idea of this patch is to transform constraints of lambda
expressions when we instantiate the parameter mapping, thus the
evaluation can be emancipated from preserving outer template arguments.
Claude is used to help reduce the test case from #199209
Fixes https://github.com/llvm/llvm-project/issues/193944
Fixes https://github.com/llvm/llvm-project/issues/199209
Fixes https://github.com/llvm/llvm-project/issues/202957
Commit: fb0ffb1f5131018926e46a918744868c0d07abd7
https://github.com/llvm/llvm-project/commit/fb0ffb1f5131018926e46a918744868c0d07abd7
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] NFCI: Simplify LowerVectorFP_TO_INT_SAT (part 1) (#207198)
The lowering code tries to implement splitting by keeping two source
values SrcVal and SrcVal2 for the Lo/Hi part respectively.
This is a bit awkward, because SrcVal2 may not be set. It makes more
sense to generating new DAG nodes that will be lowered separately by the
lowering mechanism, which revisits the newly added (split sourceval)
nodes for lowering.
Commit: ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
https://github.com/llvm/llvm-project/commit/ada4f7cffcff8eba94a193cf85fe1fa828ed9ec5
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-reverse.ll
Log Message:
-----------
[RISCV][P-ext] Improve RV64 v2i16 reverse codegen (#208664)
On RV64, v2i16 is widened to v4i16 before shuffle lowering. Recognize
the widened low-half reverse and select ppairoe.h directly instead of
rev16 followed by srli.
Commit: 695238ffaa64ac8f49e7da36d36c5170509007cc
https://github.com/llvm/llvm-project/commit/695238ffaa64ac8f49e7da36d36c5170509007cc
Author: Ariel-Burton <arielburton at yahoo.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Write original source language when writing and reading AST (#208115)
FAIL: Clang :: Frontend/ast-main.c
FAIL: Clang :: Frontend/ast-main.cpp
were failing on z/OS; this change fixes these lit failures.
The issue here is that on z/OS the original source code language needs
to be passed through to the IR so that the backend can encode this
information in the PPA2 in the object file. That means that it needs to
be exported to the AST so that going from saved AST -> IR will carry the
language through.
Commit: c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
https://github.com/llvm/llvm-project/commit/c4cb2c0e763c304071e950e47dd0c25a7dcfbbca
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/CMakeLists.txt
Log Message:
-----------
[Flang] Multi-config CMake output paths in standalone builds (#208690)
When using a multi-config generator with CMake (such as "Ninja
Multi-Config" or any Visual Studio generator), the output path must be
specific to each config by having it include `${CMAKE_CFG_INTDIR}`.
`CMAKE_CFG_INTDIR` will just be `.` in single-config generators. Use the
same path as used by LLVM:
https://github.com/llvm/llvm-project/blob/cd662a7c4fb03a88d0e429a7fc8d8b470a812e2b/llvm/CMakeLists.txt#L562-L563
`LLVM_LIBDIR_SUFFIX` was seemingly forgotten in one of the paths.
This is not complete support (neither has LLVM). More paths would need
to be config-specific. In particular, `check-flang` does not work, but
at least one can build the executables.
Commit: cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
https://github.com/llvm/llvm-project/commit/cb6bccc33f46cba5bbdba5f3883acde1a1f4f83e
Author: A. Jiang <de34 at live.cn>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Papers.csv
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/mdspan.h
M libcxx/include/mdspan
M libcxx/include/span
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/views.span/span.cons/deduct.pass.cpp
Log Message:
-----------
[libc++] Backport P3029R1 Better `mdspan`'s CTAD to C++20/23 (#208132)
Also backport
- support for `T::value` of a reference type in `integral-constant-like`
from P2781R9 `std::constant_wrapper`, and
- LWG4351 _`integral-constant-like`_ needs more `remove_cvref_t`.
P3029R1 (and its further fixes) should be treated as a Defect Report
against C++20/23 to avoid behavior difference in different modes. Other
implementations will do or are already doing the same.
Commit: 31ccbe7007691bc6d2eb628dcd4ad1f264215322
https://github.com/llvm/llvm-project/commit/31ccbe7007691bc6d2eb628dcd4ad1f264215322
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/masked-store-with-profile-info.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
Log Message:
-----------
[LV] Extend test coverage with branch probabilities (NFC). (#209182)
Add tests with branch probabilities, including cost printing tests for
replicate regions, VPlan printing tests and masked stores with
probabilities.
Commit: a1a806bb371550661aaee787d2a3622d9e84d528
https://github.com/llvm/llvm-project/commit/a1a806bb371550661aaee787d2a3622d9e84d528
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
Log Message:
-----------
[memref] Support non-scalar copies in `reinterpret_cast` elision (#203873)
Extends `memref-elide-reinterpret-cast` from scalar-only copy
transformation to also handle copies of effectively 1D and static
multidimensional regions.
The rewrite is limited to cases where each non-unit `reinterpret_cast`
result dimension maps directly to a distinct identity-layout source
dimension with the same stride and sufficient static size. This lets the
rewrite use each loop IV
directly as a source memref index. Cases where result strides do not
match source identity strides are left untouched because they would
require linearization/delinearization across source dimensions.
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.
## Examples
Scalar copy, unchanged(*) behavior:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [1], sizes: [1, 1], strides: [1, 1]
: memref<1x108xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
memref.copy %src, %view : memref<1x1xf32> to memref<1x1xf32, strided<[1, 1], offset: 1>>
// AFTER
%v = memref.load %src[%c0, %c0] : memref<1x1xf32>
memref.store %v, %dst[%c0, %c1] : memref<1x108xf32>
```
Effectively 1D copy:
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [0], sizes: [1, 33, 1], strides: [1386, 42, 1]
: memref<1x33x42xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
memref.copy %src, %view : memref<1x33x1xf32> to memref<1x33x1xf32, strided<[1386, 42, 1]>>
// AFTER
scf.for %i = %c0 to %c33 step %c1 {
%v = memref.load %src[%c0, %i, %c0] : memref<1x33x1xf32>
memref.store %v, %dst[%c0, %i, %c0] : memref<1x33x42xf32>
}
```
Static 2D copy with offset becomes a nested loop with the static offset
folded into the `reinterpret_cast` source store indices.
```mlir
// BEFORE
%view = memref.reinterpret_cast %dst
to offset: [16], sizes: [1, 33, 4], strides: [1386, 42, 1]
: memref<1x33x42xf32>
to memref<1x33x4xf32, strided<[1386, 42, 1], offset: 16>>
memref.copy %src, %view
// AFTER
%c0 = arith.constant 0 : index
%c1 = arith.constant 1 : index
%c4 = arith.constant 4 : index
%c16 = arith.constant 16 : index
%c33 = arith.constant 33 : index
scf.for %i = %c0 to %c33 step %c1 {
scf.for %j = %c0 to %c4 step %c1 {
%v = memref.load %src[%c0, %i, %j]
memref.store %v, %dst[%c0, %i, %c16 + %j]
}
}
```
## Scope
Supported:
- ranked, static-shape copy source and `reinterpret_cast` source/result
memrefs
- identity-layout `reinterpret_cast` sources
- rank-preserving `reinterpret_cast`s
- scalar copies, including dynamic result strides because all result
indices are zero
- non-scalar copies where every non-unit result dimension has a static
stride matching a distinct source dimension with sufficient static size
- static offsets, delinearized into source indices
- dynamic offsets only when the `reinterpret_cast` source has at most
one non-unit dimension and the result has at most one mapped non-unit
dimension
Not addressed:
- unranked or dynamic-shape copy/reinterpret_cast operands
- non-identity-layout `reinterpret_cast` sources
- rank-changing `reinterpret_cast`s
- dynamic strides on non-unit result dimensions
- result dimensions whose strides do not match source identity strides
- result dimensions that reuse a source dimension or cross source
dimension boundaries
- dynamic offsets requiring runtime div/rem delinearization
## Correctness
Result indices are translated to source indices by direct dimension
mapping: each non-unit result dimension must have the same stride as a
distinct source dimension.
Static offsets are delinearized into source indices before rewriting.
Dynamic offsets are only accepted when they can be used directly in the
single non-unit source dimension.
Cases assumed invalid by `reinterpret_cast`/`copy` semantics are guarded
with assertions.
(*) NFC to scalar copy case, we're now only creating zero constants for
indices once.
Commit: 158938ccba7a91e709a2bd8c607eaefd271a102b
https://github.com/llvm/llvm-project/commit/158938ccba7a91e709a2bd8c607eaefd271a102b
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-ppa1-name.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
Log Message:
-----------
Change zos-ppa1-name attr to be the name used in ppa1 (#208870)
Change the meaning of the `zos-ppa1-name` attribute to pass the name of
the function to use in the PPA1. The symbol name used in the PAA1 will
be:
- if the function has the `zos-ppa1-name` attribute, use that value. An
empty string will be mean don't add the name to the PPA1
- otherwise use the function name.
The behaviour for asm labels and `#pragma map` (PR coming shortly) is to
use the function name used in the source code in the PPA1. A follow on
PR for clang will set `zos-ppa1-name` to the mangled name ignoring asm
label to implement the non-empty string part of the first bullet.
Commit: ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
https://github.com/llvm/llvm-project/commit/ee24ac00d874ce82eaf36431f9aeb2ad744bc3b8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/DeclCXX.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] Allow devirtualization involving array subscripts with constant indices when the pointee type is known [CWG1504] (#207540)
By C++17 [expr.add]/6, if the array element type and the pointee type
are not similar, behavior is undefined.
Commit: 5b169798db9fc312f397e219f54253266fd518f3
https://github.com/llvm/llvm-project/commit/5b169798db9fc312f397e219f54253266fd518f3
Author: Liza Burakova <liza at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libcxx/include/__thread/thread.h
Log Message:
-----------
[libc++] Add missing include to thread.h (#208740)
Change #195509 removed unused transitive includes, but missed adding
<__type_traits/is_integral.h> to thread.h. This caused errors
to Chromium rolls for libc++ as they caught the missing import.
Commit: cc048f0d5516923ea29e9887eb92da0456eeb331
https://github.com/llvm/llvm-project/commit/cc048f0d5516923ea29e9887eb92da0456eeb331
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Lower/OpenMP.h
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
R flang/test/Lower/OpenMP/Todo/declare-variant.f90
A flang/test/Lower/OpenMP/declare-variant-call.f90
A flang/test/Lower/OpenMP/declare-variant-construct.f90
A flang/test/Lower/OpenMP/declare-variant-device.f90
A flang/test/Lower/OpenMP/declare-variant-implementation.f90
A flang/test/Lower/OpenMP/declare-variant-module.f90
A flang/test/Lower/OpenMP/declare-variant-target-device.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
Log Message:
-----------
[flang][OpenMP] Lowering support for declare variant. (#206988)
Add lowering support for OpenMP DECLARE VARIANT. Each directive is
recorded on its base procedure during the structure checks. During call
lowering, best variant is picked based on recorded selecter and context.
Note: this PR does not include module-file support for DECLARE VARIANT,
so cross-module variant resolution is not yet available; it will be
added in a follow-up PR.
Assisted by: Cursor
Commit: 6c632847812cba9b13a4e9d79187fb0026276521
https://github.com/llvm/llvm-project/commit/6c632847812cba9b13a4e9d79187fb0026276521
Author: rdevshp <rdevshp at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
Log Message:
-----------
[analyzer] Fix stale z3 analyzer-constraints name in test z3-logicalexpr-eval.c (#209185)
z3 was recently renamed to unsupported-z3.
Change the analyzer-constraints to unsupported-z3 in the test file
z3-logicalexpr-eval.c
Commit: 13dcad3571ecf0fb72486a52db9ce2231577a457
https://github.com/llvm/llvm-project/commit/13dcad3571ecf0fb72486a52db9ce2231577a457
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
Log Message:
-----------
[clang][OpenMP][test] Use -fopenmp=libomp explicitly in clang driver test (#209082)
Explicitly pass -fopenmp=libomp in the test to make it robust against
downstream configurations where the default OpenMP runtime is set to
something else (e.g., libgomp). Seems this is in alignment with other
tests in `clang/test/Driver`.
Commit: 03801323f6d9021469c9ece5442c526fc891447a
https://github.com/llvm/llvm-project/commit/03801323f6d9021469c9ece5442c526fc891447a
Author: Kyungtak Woo <kevinwkt at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/test/API/functionalities/statusline/TestStatusline.py
Log Message:
-----------
[lldb][test] Fix TestStatusline path resolution in symlinked environments (#209083)
Fixes a test timeout in TestStatusline.py introduced in commit
a35565161078 (#208609) when running in environments with symlinked
source paths.
Commit: 3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
https://github.com/llvm/llvm-project/commit/3c8b4f94584e6d03e8445a70e9e8d8be7912afb7
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[analyzer][docs] CSA release notes for clang-23 (#207433)
The commits were gathered using:
```sh
git log --reverse --oneline llvmorg-23-init..llvm/main \
clang/lib/StaticAnalyzer clang/include/clang/StaticAnalyzer | \
grep -v NFC | grep -v OpenACC | grep -v -i revert | grep -v -i "webkit"
```
I used the `LLVM_ENABLE_SPHINX=ON` and `LLVM_ENABLE_DOXYGEN=ON` cmake
options to enable the `docs-clang-html` build target, which generates
the html into `build/tools/clang/docs/html/ReleaseNotes.html` of which I
attach the screenshots to let you judge if it looks all good or not.
I've swapped the PR links to the issue links when a PR was fixing an
open GitHub issue. Those issues anyway have a link to the PR inside.
Assisted-by: Claude Opus 4.8
Commit: 5e98ee7f78dd4febc473e338e929b1646082a4cb
https://github.com/llvm/llvm-project/commit/5e98ee7f78dd4febc473e338e929b1646082a4cb
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
Log Message:
-----------
[mlir][acc] Preserve shared data operations during if-clause lowering (#208771)
Example:
```fortran
!$acc kernels present(grid, c) if(offload_on)
do nc = 1, grid%rc%ncol
c(1,nc) = 0
end do
c(1,1) = 0
!$acc end kernels
```
In this code, kernels restructuring can create compute constructs that
share data-entry operations with an enclosing data region. If-clause
lowering could rewrite or erase these shared operations, producing
invalid IR or duplicate erasure.
Fix: Preserve externally owned data operations, deduplicate cleanup, and
retain duplicate operand ordering while cloning local operations once.
Commit: 8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
https://github.com/llvm/llvm-project/commit/8eb718e1185ff72ff9fb8944b1f3f2f6c8cde292
Author: Prajwal KP <prajwal.kp.1817 at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fminimum.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
Log Message:
-----------
[ExpandReductions] Expand fmaximum/fminimum reductions (#195169)
fixes #195111
Commit: 3f12bb1f25b88e338679c42ccaea11fe204a0e1c
https://github.com/llvm/llvm-project/commit/3f12bb1f25b88e338679c42ccaea11fe204a0e1c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-linux.c
Log Message:
-----------
[Hexagon] Add scs multilib for -fsanitize=shadow-call-stack (#208833)
musl hexagon targets already select msan/asan library variants based on
the sanitizer in use; do the same for shadow-call-stack so that
-fsanitize=shadow-call-stack picks up usr/lib/scs.
Commit: d0ad2c694caf05793b243b0b3a8425c5ef78abdf
https://github.com/llvm/llvm-project/commit/d0ad2c694caf05793b243b0b3a8425c5ef78abdf
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang] Reuse driver option strings in CompilerInvocation (#202632)
CompilerInvocation emits a second copy of clang/Options/Options.inc with
OPTTABLE_STR_TABLE_CODE only to implement lookupStrInTable(). The driver
OptTable already owns the identical string table.
On an arm64 Release build, fully stripped standalone clang shrinks from
94,570,224 to 94,537,216 bytes, saving 33,008 bytes (0.035%).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 3ee76834fc9484080eee38964b4ebcb60442c8f8
https://github.com/llvm/llvm-project/commit/3ee76834fc9484080eee38964b4ebcb60442c8f8
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/invalid.fir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-mixed.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
Log Message:
-----------
[Flang][Fir] Set default alignment to 64 on inlineAllocation for arrays (#208781)
In https://github.com/llvm/llvm-project/pull/206525 the runtime was set
to default alloctable and pointer arrays to 64byte alignment. In this commit
the inlineallocation case is handled.
The same approach was taken and an alignment attribute was added,
with logic to promote to aligned_alloc or posixMemalign for apple
targets, when requested alignment is greater than 16.
Of note alignof(std::max_align_t)) was not used as the runtime target
may be different than the compile target, so 16 was hardcoded as when to
use aligned_alloc
Assisted-by: Opus 4.8
Commit: bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
https://github.com/llvm/llvm-project/commit/bd27a8dd906a0cd5c56fe2117ced98ad6eae14e6
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
Log Message:
-----------
[SystemZ][z/OS] Move emission of PPA1 (#208543)
There is an interesting restriction during emission: emitting debug
information closes the text section. As result, emitting the delayed
PPA1 data does not work in the current place together with emitting
debug information. Since the PPA1 information is constant data, the
solution is to emit the data in the target strreamer, in
`emitConstantPools()`.
Commit: 2a74b20bb612c3f6695f30eb3648da33bfcf10a3
https://github.com/llvm/llvm-project/commit/2a74b20bb612c3f6695f30eb3648da33bfcf10a3
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Basic/Attributes.cpp
M clang/unittests/AST/AttrTest.cpp
Log Message:
-----------
[Basic] Fix crash computing the spelling index of an unknown scoped attribute (#208909)
AttributeCommonInfo::getAttributeSpellingListIndex() aborts for an
unknown attribute that has a scope, such as [[ns::foo]]. It calls
calculateAttributeSpellingListIndex(), which runs name/scope
string-switches generated for the known attributes. Those switches
intentionally have no default: getScopeFromNormalizedScopeName() falls
off the end and hits llvm_unreachable ("Fell off the end of a
string-switch") for the unknown scope.
Any caller that asks a scoped unknown attribute for its spelling index
therefore crashes. An unrecognized attribute has no entry in those
tables and carries a single no-spelling, so short-circuit
calculateAttributeSpellingListIndex() for UnknownAttribute and return
index 0 before the switches run.
Add a unit test that constructs an unknown scoped AttributeCommonInfo
and asks for its spelling index; it aborts without the fix.
Commit: 4538987e5e9241af58246df18e625bfd7809cd04
https://github.com/llvm/llvm-project/commit/4538987e5e9241af58246df18e625bfd7809cd04
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M polly/lib/Analysis/ScopDetection.cpp
Log Message:
-----------
[Polly] Cast delinearization terms to matching types (#206711)
#204146 revealed that Polly can call `SCEVDivision::divide` with a
numerator and denominator of different types. I believe such divisions
are not meaningful and should be avoided. As far as I can tell, the root
cause is that `SCEVRemoveMax::rewrite` may collect terms whose types
differ from that of the original expression.
Before this patch, the terms gathered by `SCEVRemoveMax::rewrite` were
used for delinearization as they are. This patch applies
`getTruncateOrSignExtend` to them to matching their types with that of
the original expression.
Commit: 6ce86d47ca095f1f2c911520bc2c845ff09c5fba
https://github.com/llvm/llvm-project/commit/6ce86d47ca095f1f2c911520bc2c845ff09c5fba
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
Log Message:
-----------
[NFC][AMDGPU] Simplify scratch address materialization in SVS frame index fallback (#208624)
The flat scratch SVS frame index fallback folded the offset in with
V_ADD_U32_e32 writing into FrameReg (an SGPR, an illegal VALU
destination) and added it to FrameReg instead of the scavenged
VGPR used as vaddr, so the offset never reached the address.
This commit asserts that there is no frame register in this block, and
simplifies code accordingly. Correctly materialize the offset into the
scavenged VGPR and emit a scratch instruction in SVS form.
Commit: 6733bc3026401bf84c391301313c7ea131bd9904
https://github.com/llvm/llvm-project/commit/6733bc3026401bf84c391301313c7ea131bd9904
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
Log Message:
-----------
[flang] Replace FlangOMPContext with OmpVariantMatchContext. (#209220)
The `FlangOMPContext` got replaced in 8e8e4e50f501b.
This fixes build after https://github.com/llvm/llvm-project/pull/206988.
Commit: ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
https://github.com/llvm/llvm-project/commit/ba61e4d1c110199ef07d7ef4c34c23bcc64b4b54
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
Log Message:
-----------
[AMDGPU] Implement int div/rem by fp recip more efficiently (#204950)
Integer division q = a/b can be implemented by fp reciprocal with:
`fq = fa * recip(fb)`
fq is truncated to produce q. Due to fp rounding and reciprocal accuracy
issues fq can be too small and truncation can produce a value too small
by one.
If abs(a)<=0x400000, this underestimate can be guarded more efficiently
by calculating:
`fq=fa+1ulp/b`
If abs(a)<=0x400000, adding 1 ulp will increase a by at most 0.5, so the
calculated q will be the same. Adding 1ulp can be done with one integer
add.
Incrementing `fa` by 1 ulp was exhaustively tested for all dividend and
divisor combinations with values between [-0x400000,0x3FFFFF] with no
errors.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 9d34596f7338ca057ea94078c31bde6c8c9c60af
https://github.com/llvm/llvm-project/commit/9d34596f7338ca057ea94078c31bde6c8c9c60af
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
Log Message:
-----------
[clang][UncheckedLocalVarsChecker][NFC] Add missing headers (#209217)
After #208855 this fails compiling headers standalone due to incomplete
types, e.g. `error: member access into incomplete type 'ASTContext'`. It
works fine building the `.cpp` files but is not a
[standalone](https://llvm.org/docs/CodingStandards.html#self-contained-headers)
header.
Commit: f56c5d68b19376f27da236456861a462bcd8a973
https://github.com/llvm/llvm-project/commit/f56c5d68b19376f27da236456861a462bcd8a973
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Improve the warning text (#209198)
This PR aligns webkit.UncountedLambdaCapturesChecker and its variant's
warning message with the new warning format in other checkers.
Commit: d2bf3af65d920de29a31f764959d67769f3587c6
https://github.com/llvm/llvm-project/commit/d2bf3af65d920de29a31f764959d67769f3587c6
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Lex/Lexer.cpp
A clang/test/Preprocessor/GH101342.c
Log Message:
-----------
[Clang] Detects invalid unicode characters in token formed by `##` (#208757)
When parsing identifiers with invalid (non-xid_continue), we would emit
a diagnostics and continue, in an effort to improve recovery.
However, in raw mode we would not emit a diagnostic, but still continue.
So identifiers formed in raw mode could be gibberish.
We fixed that by not-continuing on error in raw mode.
Fixes #101342
Commit: c59378289002e1d12d649ef47708b900332141c7
https://github.com/llvm/llvm-project/commit/c59378289002e1d12d649ef47708b900332141c7
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-14 (Tue, 14 Jul 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
Log Message:
-----------
[clang][CodeGen] Evaluate `typeid` operands which are the most derived objects (#208470)
Before this patch, `typeid` operands are not evaluated if they are the
most derived objects.
Before #196544, only `typeid(non-reference-var)` is considered to be the
most derived object, which doesn't have side effects obviously. So there
was no miscompilation.
Fixes #202051.
Commit: 6c5332d2d76df720a441bbbd1b0601f01114b4e3
https://github.com/llvm/llvm-project/commit/6c5332d2d76df720a441bbbd1b0601f01114b4e3
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
Log Message:
-----------
[NFC][AMDGPU] Add tests for eliminateFrameIndex (#208612)
Add MIR tests to cover all instances where a Vgpr needs to be scavenged
and used due to Sgpr scarcity, during elimination of frame indices.
Commit: 9bf20bdfc685477e349f335d1b128403342fc361
https://github.com/llvm/llvm-project/commit/9bf20bdfc685477e349f335d1b128403342fc361
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
Log Message:
-----------
[clang][ssaf] Add --ssaf-include-local-entities flag (#209225)
This option allows including local entities in summaries.
This means that ContributorFinder can optionally include block-scope
(function-local) variables.
Parameters are intentionally skipped: they are exposed via their parent
function's USR + a parameter-index suffix in getEntityName, so
registering
them as independent contributors would be redundant.
Part §2 of rdar://179151023
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
https://github.com/llvm/llvm-project/commit/fd3d20f13f4d29eb99ada5fb9c6c87c6dee6ed17
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
A llvm/test/CodeGen/RISCV/xqcilo-addr-regimm26.ll
Log Message:
-----------
[RISCV] Add SelectAddrRegImm26 isel complex pattern for Xqcilo 26-bit load/store (#207363)
Introduce a dedicated SelectAddrRegImm26 ComplexPattern for the Qualcomm
Xqcilo large-offset load/store instructions (qc.e.lw/qc.e.sw), whose
offset
field is 26 bits wide, and use it in the QC48LdPat/QC48StPat patterns
instead
of the generic AddLike + simm26_nosimm12 match.
SelectAddrRegImm26 handles addresses of the form:
- simm12 offsets are left to the standard (shorter/compressible)
load/store.
- 26-bit (non-simm12) offsets fold directly into qc.e.lw/qc.e.sw.
- Offsets just outside the 26-bit range are split with ADDI plus a
folded 26-bit remainder.
Assisted by claude
Commit: 38033e2c2316dbb264264d9fb8be5c3b543b5c1e
https://github.com/llvm/llvm-project/commit/38033e2c2316dbb264264d9fb8be5c3b543b5c1e
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[clang][ssaf][NFC] Add unittests for PointerFlow and UnsafeBufferUsage about local entities (#209227)
Part §6 of rdar://179151023
Depends on #209225.
Approved in #205351.
---------
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
https://github.com/llvm/llvm-project/commit/15d8e43e7d1efa0d0a86589e1e2c28dbe011e226
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
Log Message:
-----------
[clang][ssaf] Add FIXME that CallGraphExtractor does not honor IncludeLocalEntities (#209228)
Currently, CallGraph extractor does not honor IncludeLocalEntities and
it emits entities for block-scope callees - irrespective of what the
option is set to, such as:
- function-local declared lambdas
- function-local declared classes and their member functions
The new test file ensures that PointerFlow and UnsafeBufferUsage honors
the IncludeLocalEntities option.
Part §3 and §5 of rdar://179151023
Depends on #209225 and #209227.
Approved in #205351.
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: c5d5988520d90c77dfc279e86b1e052703d86960
https://github.com/llvm/llvm-project/commit/c5d5988520d90c77dfc279e86b1e052703d86960
Author: Rito Takeuchi <licht-t at outlook.jp>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
Log Message:
-----------
[X86][CostModel] Add vXi64 divide/remainder-by-constant costs (#208491)
### What this does
Follow-up to #206983, which lowered `vXi64` `MULHU`/`MULHS`. Modified
the cost model to enable the vectorization:
1. `SDIV`/`SREM` for `v4i64`/`v8i64`, gated on AVX512DQ
`MULHS`'s low multiply is `vpmullq`. Without DQ, it scalarizes and can
be a performance regression. So, this PR adds
`AVX512DQ{UniformConst,Const}` tables which are consulted before the
AVX512/AVX2 ones. Then, non-DQ targets fall through to the scalarized
cost.
2. `UDIV`/`UREM` for `v4i64`/`v8i64` in the AVX2 and AVX512
For `UREM`, the multiply-back in the remainder `x - (x/C)*C` is a single
`vpmullq` with DQ, but another `vpmuludq` schoolbook without it. So, the
cheap DQ `UREM` entries in `AVX512DQ{UniformConst,Const}` overrides more
expensive AVX512/AVX2 ones.
Part of #37771.
### AI Usage Disclosure
This PR was prepared with the assistance of Claude Code.
Commit: 28366bc273fb734027a10dad2a6245665ac138f6
https://github.com/llvm/llvm-project/commit/28366bc273fb734027a10dad2a6245665ac138f6
Author: Luan Rabelo <96793857+Lu4nScr1pt1ng at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDecl.cpp
M clang/test/Sema/enum.c
Log Message:
-----------
[clang] [Sema] Widen enumerators that overflow a _BitInt type (C23) (#208230)
When an enumerator has no explicit value and the previous enumerator has
a
_BitInt type whose maximum is reached, incrementing should widen to a
suitably sized standard integer type (C23 6.7.3.3p12 excludes
bit-precise
types from the widening). Clang instead kept the _BitInt type and let
the
value wrap around, with a misleading "not representable in the largest
integer type" warning.
The problem is in getNextLargerIntegralType: it compared candidate types
against the storage size of the previous type. A _BitInt(33) is stored
in
64 bits, so no standard type looked larger and the widening never
happened.
Comparing against the value width (getIntWidth) fixes it: the enumerator
now gets the next standard type that can hold the value, and the
behavior
matches GCC (verified against GCC 15.2).
For standard integer types getIntWidth equals getTypeSize, so this
changes
behavior only for bit-precise types.
The new tests in enum.c check the widened type and the value from inside
the enum definition, like the reproducer in the issue; they fail without
this change. Incrementing the max of a _BitInt(64) still warns, since no
standard type can hold that value, and that case is covered too.
Fixes #208163
Commit: 46951909a77676a30a285e60426ff897684703c1
https://github.com/llvm/llvm-project/commit/46951909a77676a30a285e60426ff897684703c1
Author: Nico Weber <thakis at chromium.org>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
R clang/test/CodeGen/SystemZ/zos-check-lanuage.c
Log Message:
-----------
Revert "Write original source language when writing and reading AST (#208115)" (#209230)
This reverts commit 695238ffaa64ac8f49e7da36d36c5170509007cc.
The new test is flaky, see comment on
https://github.com/llvm/llvm-project/pull/208115
Commit: 1d9a3c069b0b882e6651ece3f05bcb492c66567b
https://github.com/llvm/llvm-project/commit/1d9a3c069b0b882e6651ece3f05bcb492c66567b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9bf20bd (#209238)
This fixes 9bf20bdfc685477e349f335d1b128403342fc361.
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bf20bdfc685477e349f335d1b128403342fc361
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 633be471e811aea4c258afe4280db82393b4c484
https://github.com/llvm/llvm-project/commit/633be471e811aea4c258afe4280db82393b4c484
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Revert "[CMake] Use minimum python version of 3.8 everywhere" (#209233)
Reverts llvm/llvm-project#208822.
We should avoid raising toolchain requirements immediately before
branching. Revert this now so it can be reapplied after branching.
Commit: c4076b002b072c73f781b191ae0ccc6c075df1d7
https://github.com/llvm/llvm-project/commit/c4076b002b072c73f781b191ae0ccc6c075df1d7
Author: Madhur Kumar <152476790+MadhurKumar004 at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Combine rcp(sqrt(x)) into rsq for pseudo-scalar instructions (#198785)
This fixes "TODO: GlobalISel should generate v_s_rsq." give in file
"llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll"
Commit: ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
https://github.com/llvm/llvm-project/commit/ecf41975d04e0a7f5bb0d62dbafa7da6e4c9e3a3
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/ADT/APFloat.h
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/test/Verifier/arbitrary-fp-convert.ll
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
[Verifier] Clarify supported storage bit width for apfloat conversions (#209174)
Allow i4 for FP4, i6 for FP6 and i8 for FP8.
Assisted-by: Claude Code Opus 4.8
Commit: 62facd1645b504c95f2a82dd8a211f1c23e13b07
https://github.com/llvm/llvm-project/commit/62facd1645b504c95f2a82dd8a211f1c23e13b07
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-debuginfod-find/timeout.test
Log Message:
-----------
[llvm][HTTP] Relax check for timeout error message (#209240)
When LLVM used curl to do HTTP requests, the timeout test failed even
though the request correctly timed out
(https://github.com/llvm/llvm-project/pull/188969#issuecomment-4960193683).
On curl, we prepend the error with `curl_easy_perform() failed: `
whereas with WinHTTP, the error is fixed as "Timeout was reached".
This PR relaxes the check to allow for the prefix in the curl case.
Commit: 83e914e56acb7795875be41bcbe9c7c036e897c4
https://github.com/llvm/llvm-project/commit/83e914e56acb7795875be41bcbe9c7c036e897c4
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M offload/test/lit.cfg
Log Message:
-----------
[offload][test] Add fallback to legacy AMDGPU triple library dir (#209131)
After the amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa rename, look up the
device runtime libraries in the legacy directory when the runtime was
built under the old triple name.
Claude assisted with this patch.
Commit: 3122e20cfc7c1b8d103b435ecba27fc3172cb581
https://github.com/llvm/llvm-project/commit/3122e20cfc7c1b8d103b435ecba27fc3172cb581
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
Log Message:
-----------
[OpenACC] add isEffectivelySerial() to acc.parallel and acc.kernels (#209192)
Mirror the isEffectivelySerial() function in acc.compute_region to
acc.parallel and acc.kernel so this check is unified anywhere it needs
to be used, namely before ACCComputeLowering. Should be NFC
Commit: 690aacbf9d15569ec26843d6367f5cf6d5b26969
https://github.com/llvm/llvm-project/commit/690aacbf9d15569ec26843d6367f5cf6d5b26969
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/ptrtoaddr.ll
Log Message:
-----------
[GVN] Reuse dominating PtrToInt for PtrToAddr. (#209164)
A ptrtoaddr and a ptrtoint of the same pointer compute the same value
when the address width equals the pointer representation width. Reuse
a dominating ptrtoint in place of a ptrtoaddr.
This fixes a few end-to-end regressions with
https://github.com/llvm/llvm-project/pull/180244.
PR: https://github.com/llvm/llvm-project/pull/209164
Commit: f3671a14e499e376709fb68ae6b2bdd76fe91fdc
https://github.com/llvm/llvm-project/commit/f3671a14e499e376709fb68ae6b2bdd76fe91fdc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCArchitectures.cmake
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
Log Message:
-----------
[AMDGPU] Fix cache files and builds after amdgcn->amdgpu conversion (#209247)
Summary:
Quite important that this works before the fork. The problem is that
CMake takes the string literally while rewriting it to amdgpu/
internally so the amdgcn/ directories do not appear.
Commit: 9cfd0411138b33ea11bfce22e41cd026e92120ca
https://github.com/llvm/llvm-project/commit/9cfd0411138b33ea11bfce22e41cd026e92120ca
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
A llvm/test/Transforms/LoopVectorize/interleaved-accesses-dead-member.ll
M llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
Log Message:
-----------
[VPlan] Don't bail creating interleave group if it has dead members (#208415)
This is an alternative to both #203555 and #205584.
To recap the issue:
1) The legacy cost model has the invariant that all CM_Interleave
widened groups will eventually be converted to a VPInterleaveGroup, so
it marks the addresses as uniform.
2) After #190191 a CM_Interleave isn't guaranteed to be converted to a
VPInterleaveGroup if it has dead members, and it breaks this assumption
in 1). So addresses aren't properly widened due to the uniform
assumption.
Rather than try to fix up the address, this just maintains the invariant
that a CM_Interleave will become a VPInterleaveGroup by not skipping
over groups with dead members.
While there's slightly less code involved, the main benefit of this
approach vs the others is that it keeps generating interleaved groups
instead of falling back to gathers/scatters, so we don't get a codegen
regression against 22.x.
Co-authored-by: Mel Chen <mel.chen at sifive.com>
Commit: ddd76138de9630eb018de68ef5cc0c9f486cb659
https://github.com/llvm/llvm-project/commit/ddd76138de9630eb018de68ef5cc0c9f486cb659
Author: Aleksandr Popov <42888396+aleks-tmb at users.noreply.github.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/test/Analysis/ScalarEvolution/zext-add-nsw-fold.ll
Log Message:
-----------
[SCEV][NFC] Add tests for generalized A + zext(C + X) fold (#209219)
Related to #208778
Commit: 7dd8867515732d1bc4a837edf6fe0658189398d3
https://github.com/llvm/llvm-project/commit/7dd8867515732d1bc4a837edf6fe0658189398d3
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M lldb/cmake/modules/AddLLDB.cmake
Log Message:
-----------
[lldb] Enforce usage of LINK_COMPONENTS and CLANG_LIBS (#208860)
LINK_COMPONENTS and CLANG_LIBS exist to correctly support the LLVM/Clang
dylib build configuration. Failure to enforce this will break LLDB when
built against libLLVM.dylib.
Commit: fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
https://github.com/llvm/llvm-project/commit/fa4cbcd7e8b912a85f96c61b6d6e332822d22e7e
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
M llvm/unittests/CodeGen/DIETest.cpp
Log Message:
-----------
[CodeGen] Fix IntrusiveBackList::deleteNode (#207783)
Issue #207411 reported that IntrusiveBackList::deleteNode does not
delete the correct node if the deleted node is the last node of the
list. Fix by not short circuiting on `Last == &N`.
Additionally, fix three other minor defects: (1) Do not loop infinitely
if node is not in list. Check for sentinel edge. (2) Reset intrusive
list on deleted node to point to itself with sentinel edge. (3) Avoid
multiple template instantiations of the implementation of deleteNode by
moving it to its base class.
Closes #207411.
Commit: 0f8272f67cd930c09112634304c61800dc42c660
https://github.com/llvm/llvm-project/commit/0f8272f67cd930c09112634304c61800dc42c660
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/APINotes/APINotesReader.h
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/APINotes/APINotesFormat.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Basic/Attributes.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Lex/Lexer.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/DiagOutputUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.apinotes
A clang/test/APINotes/Inputs/Headers/WhereParametersSema.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
A clang/test/APINotes/where-parameters-sema.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-checked-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/local-vars-counted-const-member.cpp
M clang/test/Analysis/Checkers/WebKit/member-function-pointer-crash.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/unchecked-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures-decl-protects-this-crash.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures-arc.mm
M clang/test/Analysis/Checkers/WebKit/unretained-lambda-captures.mm
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M clang/test/Analysis/Checkers/WebKit/unretained-local-vars.mm
A clang/test/Analysis/Scalable/call-graph-local-entities.cpp
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/local-entities.cpp
M clang/test/Analysis/z3/z3-logicalexpr-eval.c
A clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
M clang/test/CXX/drs/cwg15xx.cpp
M clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dot.c
M clang/test/CodeGen/SystemZ/zos-ppa1-name.c
M clang/test/CodeGenCXX/devirtualize-virtual-function-calls.cpp
M clang/test/CodeGenCXX/typeid-most-derived.cpp
M clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
M clang/test/Driver/hexagon-toolchain-linux.c
M clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
A clang/test/Preprocessor/GH101342.c
M clang/test/Sema/enum.c
M clang/test/SemaCXX/attr-sentinel.cpp
M clang/test/SemaTemplate/concepts-lambda.cpp
M clang/test/SemaTemplate/concepts.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/AST/AttrTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/www/cxx_dr_status.html
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang/CMakeLists.txt
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Optimizer/Dialect/FIROps.td
A flang/include/flang/Semantics/omp-declare-variant.h
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/CMakeLists.txt
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/Builder/MutableBox.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Semantics/check-omp-variant.cpp
A flang/test/Fir/alloc-aligned-device.fir
A flang/test/Fir/alloc-aligned-omp.fir
A flang/test/Fir/alloc-aligned.fir
M flang/test/Fir/invalid.fir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
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A flang/test/Lower/OpenMP/Todo/declare-variant-structured-trait-property.f90
A flang/test/Lower/OpenMP/Todo/declare-variant-target-device.f90
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A flang/test/Lower/OpenMP/declare-variant-device.f90
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M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
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A libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.remove_all/bad_perms_parent.pass.cpp
M libunwind/src/UnwindRegistersRestore.S
M libunwind/src/UnwindRegistersSave.S
M lldb/cmake/modules/AddLLDB.cmake
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M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/CodeGen/ExpandReductions.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
M llvm/lib/Target/WebAssembly/WebAssembly.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
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M llvm/test/CodeGen/AMDGPU/av-invalid-scope.ll
M llvm/test/CodeGen/AMDGPU/divrem24-assume.ll
A llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-svs.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
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M llvm/test/CodeGen/AMDGPU/global-directive.ll
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M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global-i16-load-store.ll
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M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global-smrd-unknown.ll
M llvm/test/CodeGen/AMDGPU/global-variable-relocs.ll
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M llvm/test/CodeGen/AMDGPU/greedy-broken-ssa-verifier-error.mir
M llvm/test/CodeGen/AMDGPU/greedy-global-heuristic.mir
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M llvm/test/CodeGen/AMDGPU/greedy-liverange-priority.mir
M llvm/test/CodeGen/AMDGPU/greedy-remark-crash-unassigned-reg.mir
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M llvm/test/CodeGen/AMDGPU/group-image-instructions.ll
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M llvm/test/CodeGen/AMDGPU/gv-offset-folding.ll
M llvm/test/CodeGen/AMDGPU/gws-hazards.mir
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/half-alloca-promotion.ll
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M llvm/test/CodeGen/AMDGPU/hard-clause-limit.mir
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M llvm/test/CodeGen/AMDGPU/hazard-inlineasm.mir
M llvm/test/CodeGen/AMDGPU/hazard-kill.mir
M llvm/test/CodeGen/AMDGPU/hazard-lds-addtid.mir
M llvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
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M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
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M llvm/test/CodeGen/AMDGPU/hsa-globals.ll
M llvm/test/CodeGen/AMDGPU/hsa-group-segment.ll
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M llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
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M llvm/test/CodeGen/AMDGPU/hsa-metadata-hostcall-v4.ll
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M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-nosaddr.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.subtest-saddr.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
M llvm/test/CodeGen/AMDGPU/inst-prefetch-hint.ll
M llvm/test/CodeGen/AMDGPU/inst-prefetch-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/integer-canonicalizing-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/integer-select-src-modifiers.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/RISCV/rvp-reverse.ll
A llvm/test/CodeGen/RISCV/xqcilo-addr-regimm26.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fmaximum.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/llvm-vector-reduce/fminimum.ll
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
A llvm/test/CodeGen/SystemZ/zos-ppa1-name.ll
M llvm/test/CodeGen/SystemZ/zos-ppa1.ll
M llvm/test/CodeGen/WebAssembly/vector-reduce.ll
M llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
M llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
M llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/X86/vector-reduce-fminimum.ll
M llvm/test/Transforms/GVN/ptrtoaddr.ll
A llvm/test/Transforms/LoopVectorize/AArch64/masked-store-with-profile-info.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-chained.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
A llvm/test/Transforms/LoopVectorize/interleaved-accesses-dead-member.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
A llvm/test/Transforms/LoopVectorize/replicate-region-cost-probability.ll
M llvm/test/Transforms/LoopVectorize/versioning-dead-load.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadi8.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
M llvm/test/Verifier/arbitrary-fp-convert.ll
M llvm/test/tools/llvm-debuginfod-find/timeout.test
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/CodeGen/DIETest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/Linalg/Transforms/DecomposeGenericByUnfoldingPermutation.cpp
M mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
M mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
M mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
M offload/cmake/caches/AMDGPUBot.cmake
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/cmake/caches/FlangOffload.cmake
M offload/cmake/caches/Offload.cmake
M offload/test/lit.cfg
M orc-rt/include/orc-rt/Session.h
M orc-rt/test/unit/SessionTest.cpp
M polly/lib/Analysis/ScopDetection.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/kovdan01/ptrauth-module-flags-mismatch
Compare: https://github.com/llvm/llvm-project/compare/dd686bc09f68...0f8272f67cd9
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