[all-commits] [llvm/llvm-project] c5d598: [X86][CostModel] Add vXi64 divide/remainder-by-con...
Rito Takeuchi via All-commits
all-commits at lists.llvm.org
Mon Jul 13 09:39:22 PDT 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: c5d5988520d90c77dfc279e86b1e052703d86960
https://github.com/llvm/llvm-project/commit/c5d5988520d90c77dfc279e86b1e052703d86960
Author: Rito Takeuchi <licht-t at outlook.jp>
Date: 2026-07-13 (Mon, 13 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/div.ll
M llvm/test/Analysis/CostModel/X86/rem.ll
A llvm/test/Transforms/LoopVectorize/X86/idiv-by-const.ll
A llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
Log Message:
-----------
[X86][CostModel] Add vXi64 divide/remainder-by-constant costs (#208491)
### What this does
Follow-up to #206983, which lowered `vXi64` `MULHU`/`MULHS`. Modified
the cost model to enable the vectorization:
1. `SDIV`/`SREM` for `v4i64`/`v8i64`, gated on AVX512DQ
`MULHS`'s low multiply is `vpmullq`. Without DQ, it scalarizes and can
be a performance regression. So, this PR adds
`AVX512DQ{UniformConst,Const}` tables which are consulted before the
AVX512/AVX2 ones. Then, non-DQ targets fall through to the scalarized
cost.
2. `UDIV`/`UREM` for `v4i64`/`v8i64` in the AVX2 and AVX512
For `UREM`, the multiply-back in the remainder `x - (x/C)*C` is a single
`vpmullq` with DQ, but another `vpmuludq` schoolbook without it. So, the
cheap DQ `UREM` entries in `AVX512DQ{UniformConst,Const}` overrides more
expensive AVX512/AVX2 ones.
Part of #37771.
### AI Usage Disclosure
This PR was prepared with the assistance of Claude Code.
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