[all-commits] [llvm/llvm-project] ca970f: [VPlan] Simplify reverses through unary ops (fneg)...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ca970f3bb3ce41365dfc85049db44489c88cb0a5
      https://github.com/llvm/llvm-project/commit/ca970f3bb3ce41365dfc85049db44489c88cb0a5
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-07-13 (Mon, 13 Jul 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll

  Log Message:
  -----------
  [VPlan] Simplify reverses through unary ops (fneg) (#208257)

By marking fneg as elementwise



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