[all-commits] [llvm/llvm-project] 349542: [VPlan] Add strided access test with disjoint or. ...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 349542f7e122b8fda1d60f0b37c8f92ad65635d6
      https://github.com/llvm/llvm-project/commit/349542f7e122b8fda1d60f0b37c8f92ad65635d6
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-07-12 (Sun, 12 Jul 2026)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll

  Log Message:
  -----------
  [VPlan] Add strided access test with disjoint or. (NFC) (#209051)

Currently this is missed by VPlan SCEV due to disjoint OR not being
handled.



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