[all-commits] [llvm/llvm-project] fe4bb0: [AArch64][SVE] Support lowering masked loads of <4...

[Shanzhi Chen via All-commits]

  Branch: refs/heads/users/chenshanzhi/fix-bf16-masked-load
  Home:   https://github.com/llvm/llvm-project
  Commit: fe4bb07ec2e748f9bfd8aeb4838e0242e9ee5357
      https://github.com/llvm/llvm-project/commit/fe4bb07ec2e748f9bfd8aeb4838e0242e9ee5357
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-10 (Fri, 10 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sve-fixed-length-masked-64-128bit-loads.ll

  Log Message:
  -----------
  [AArch64][SVE] Support lowering masked loads of <4 x bf16> and <8 x bf16>

Add support for lowering masked loads of <4 x bf16> and <8 x bf16> when
target features contain "+sve".


  Commit: 9a3cde782d98797769db233ca6ba4d40bffe593e
      https://github.com/llvm/llvm-project/commit/9a3cde782d98797769db233ca6ba4d40bffe593e
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-10 (Fri, 10 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  fixup! [AArch64][SVE] Support lowering masked loads of <4 x bf16> and <8 x bf16>


  Commit: 23d4b850a27b01a4a7452bd1d37725cdae4cd48a
      https://github.com/llvm/llvm-project/commit/23d4b850a27b01a4a7452bd1d37725cdae4cd48a
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-10 (Fri, 10 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  fixup! [AArch64][SVE] Support lowering masked loads of <4 x bf16> and <8 x bf16>


  Commit: f3b83ffde5ad5f4024e6a267c27f0795f5bead7c
      https://github.com/llvm/llvm-project/commit/f3b83ffde5ad5f4024e6a267c27f0795f5bead7c
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-10 (Fri, 10 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  fixup! [AArch64][SVE] Support lowering masked loads of <4 x bf16> and <8 x bf16>


  Commit: e924ff2b23a2a9753d8aae84ee464fc0c8e547c4
      https://github.com/llvm/llvm-project/commit/e924ff2b23a2a9753d8aae84ee464fc0c8e547c4
  Author: Shanzhi Chen <chenshanzhi at huawei.com>
  Date:   2026-07-11 (Sat, 11 Jul 2026)

  Changed paths:
    M llvm/test/CodeGen/AArch64/sve2p1-vector-shuffles.ll

  Log Message:
  -----------
  fixup! [AArch64][SVE] Support lowering masked loads of <4 x bf16> and <8 x bf16>


Compare: https://github.com/llvm/llvm-project/compare/fe4bb07ec2e7%5E...e924ff2b23a2

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