[all-commits] [llvm/llvm-project] 375cc8: AMDGPU/GlobalISel: Switch to extended LLTs (#207419)

Petar Avramovic via All-commits all-commits at lists.llvm.org
Fri Jul 10 05:41:14 PDT 2026 

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 375cc88b510150db5524055f9866bcc9b4feb277
      https://github.com/llvm/llvm-project/commit/375cc88b510150db5524055f9866bcc9b4feb277
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2026-07-10 (Fri, 10 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-binop-s64-with-s32-mask.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-abs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.class.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fcmp.constants.w64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.readfirstlane.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitreverse.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctlz-zero-poison.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-cttz-zero-poison.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs-err.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extendedLLTs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fceil.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.gfx11plus-fake16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.gfx11plus.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fexp2.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ffloor.s64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-i1-copy.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-intrinsic-trunc.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-old-legalization.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pseudo-scalar-transcendental.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sextload-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax-64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin-64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax-64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin-64.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zextload-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/known-fpclass-phi.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-abs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaximum.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminimum.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2darraymsaa.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.a16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
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    M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
    M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
    M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
    M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
    M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
    M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
    M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
    M llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
    M llvm/test/CodeGen/AMDGPU/literal64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier-bundle.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.async.to.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.store.async.from.lds.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ptr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.prefetch.data.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.index.gfx1250.w32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
    M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
    M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
    M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
    M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
    M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
    M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
    M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
    M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/lrint.ll
    M llvm/test/CodeGen/AMDGPU/lround.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix.ll
    M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
    M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
    M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
    M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
    M llvm/test/CodeGen/AMDGPU/minmax.ll
    M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
    M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
    M llvm/test/CodeGen/AMDGPU/roundeven.ll
    M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
    M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
    M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
    M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
    M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
    M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
    M llvm/test/CodeGen/AMDGPU/v_pack.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
    M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
    M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Switch to extended LLTs (#207419)

IRtranslator now translates bfloat. Switch tablegen to use extendedLLTs.
Around 300 regression tests fail to inst-select because GIM_SwitchType
does not accept LLT::scalar. Around 100 mir inst select tests had input
updated to i32/f32 and select successfully. Then there are 24 various
crashes, mostly combiner or machine-verifier, those tests are disabled.

Most problems come from mixing s32 with i32/f32 and the way operator==
works with extendedLLTs compared to GIM_SwitchType.
In general, for inst-select fixes, I think it would be best to avoid
explicit use of LLT::scalar in lowering to avoid mixing it with
LLT::integer/LLT::float See inst-select-extendedLLTs.mir and
inst-select-extendedLLTs-err.mir.



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