[all-commits] [llvm/llvm-project] 35e47c: AMDGPU/GlobalISel: Switch RegBankLegalize lowering...

Petar Avramovic via All-commits all-commits at lists.llvm.org
Wed Jul 8 10:06:38 PDT 2026 

  Branch: refs/heads/users/petar-avramovic/extendedLLT-regbanklegalize
  Home:   https://github.com/llvm/llvm-project
  Commit: 35e47c2be06efd34f4f221fa2f8c739af197b9ad
      https://github.com/llvm/llvm-project/commit/35e47c2be06efd34f4f221fa2f8c739af197b9ad
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2026-07-08 (Wed, 08 Jul 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.v2s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.kill.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.demote.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbl-b32.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and-s1.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctlz-zero-poison.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ctpop.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-cttz-zero-poison.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcmp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-regbanklegalize.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-salu-float.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sbfx.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uadde.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uaddo.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ubfx.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uniform-load-noclobber.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usube.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-usubo.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
    M llvm/test/CodeGen/AMDGPU/add-max.ll
    M llvm/test/CodeGen/AMDGPU/bfi_int.ll
    M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
    M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll
    M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/ctpop16.ll
    M llvm/test/CodeGen/AMDGPU/ctpop64.ll
    M llvm/test/CodeGen/AMDGPU/cttz.ll
    M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
    M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
    M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
    M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/fmaximum.ll
    M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
    M llvm/test/CodeGen/AMDGPU/fminimum.ll
    M llvm/test/CodeGen/AMDGPU/fminnum.ll
    M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
    M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
    M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
    M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
    M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
    M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
    M llvm/test/CodeGen/AMDGPU/literal64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
    M llvm/test/CodeGen/AMDGPU/llvm.get.rounding.ll
    M llvm/test/CodeGen/AMDGPU/llvm.modf.ll
    M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
    M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
    M llvm/test/CodeGen/AMDGPU/lrint.ll
    M llvm/test/CodeGen/AMDGPU/lround.ll
    M llvm/test/CodeGen/AMDGPU/roundeven.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
    M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
    M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
    M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
    M llvm/test/CodeGen/AMDGPU/v_pack.ll
    M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
    M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Switch RegBankLegalize lowering to extended LLTs

Stop using LLT::scalar for lowering in AMDGPURegBankLegalizeHelper
Affects integer lowering code for RegBankLLTMappingApplyID and
custom cpp for LoweringMethodID.



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