[all-commits] [llvm/llvm-project] cbf804: [RISCV][P-ext] Add codegen for packed absolute dif...
Alexis Engelke via All-commits
all-commits at lists.llvm.org
Wed Jul 8 02:41:07 PDT 2026
Branch: refs/heads/users/aengelke/spr/main.irnfc-drop-vtable-from-passconceptpassmodel
Home: https://github.com/llvm/llvm-project
Commit: cbf8048aa1427166045a602e0bc29127c1d8274c
https://github.com/llvm/llvm-project/commit/cbf8048aa1427166045a602e0bc29127c1d8274c
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add codegen for packed absolute difference sum (#207314)
The pabdsumu/pabdsumau instructions compute the sum of absolute differences
of packed unsigned bytes; pabdsumau also accumulates into rd.
Add the llvm.riscv.pabdsumu and pabdsumau intrinsics. A single-GPR source is
selected directly to pabdsumu.b/pabdsumau.b with isel patterns. A 64-bit
GPRPair source on RV32 has no paired instruction, so it is split during
lowering into two v4i8 halves: reduce the low half (folding in rd when
accumulating), then accumulate the high half into that partial sum.
Cases with a target-illegal result are handled in ReplaceNodeResults:
RV64, i32 result: reduce at i64 and truncate (a 32-bit source is
zero-extended first).
RV32, i64 result: reduce each half with pabdsumu.b and combine the
partial sums with a widening add (waddu/waddau).
Commit: 0fc9beeadf2a415553047989154a8df7f89fd8dc
https://github.com/llvm/llvm-project/commit/0fc9beeadf2a415553047989154a8df7f89fd8dc
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/adjacent_transform_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.adjacent.transform/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied [[nodiscard]] to `adjacent_transform_view` (#205900)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.adjacent.transform
Towards https://github.com/llvm/llvm-project/issues/172124
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 8992cdf458f78c5ef9b018c92234658fc78cfd80
https://github.com/llvm/llvm-project/commit/8992cdf458f78c5ef9b018c92234658fc78cfd80
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/join_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.join/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied [[nodiscard]] to `join_view` (#206838)
[[nodiscard]] should be applied to functions where discarding the return
value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.join
Towards https://github.com/llvm/llvm-project/issues/172124
Commit: 347e97f815e2b866aa07b8e0f6364a79280ad2fb
https://github.com/llvm/llvm-project/commit/347e97f815e2b866aa07b8e0f6364a79280ad2fb
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/hexagon-toolchain-picolibc.c
Log Message:
-----------
[Clang][Hexagon] Use flat library directory layout for Picolibc (#201326)
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: a6575e8ea5a638259d4051ebfb1430bf1cc2795b
https://github.com/llvm/llvm-project/commit/a6575e8ea5a638259d4051ebfb1430bf1cc2795b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Use `PtrView` in `CheckActive()` (#207756)
Commit: bc2b50fbca41852434db4c3f066989e036b9b962
https://github.com/llvm/llvm-project/commit/bc2b50fbca41852434db4c3f066989e036b9b962
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-overflow.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
Log Message:
-----------
[AArch64] Add a basic i128 mul cost. (#203271)
This adds a basic cost for i128 multiply instructions, which has a basic
cost of 4 and scales n^2 with bitsize.
Commit: 08ed6acb7e0d328ee02d4c15b7b6bcdd943323e3
https://github.com/llvm/llvm-project/commit/08ed6acb7e0d328ee02d4c15b7b6bcdd943323e3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
M libc/src/__support/File/linux/dir.cpp
Log Message:
-----------
[libc] Improve Dir class safety, performance, and style (#207214)
Addressed issues in the Dir class identified during review:
* Safety: Added bounds and validation checks in Dir::read to prevent
out-of-bounds reads on corrupted input.
* Performance: Aligned the internal buffer to struct dirent to prevent
unaligned memory access, and increased the buffer size to 4096 to reduce
syscall overhead.
* Style: Replaced the system <dirent.h> include with a new proxy header
(struct_dirent.h) to avoid system dependencies, and fixed relative
includes.
* Refactoring: Moved platform-specific record length access to a
platform helper (platform_dir_reclen).
* CMake: Updated dependencies for the dir target.
Assisted-by: Automated tooling, human reviewed.
Commit: a2031641ed0db092d7f7a5371f4710b9e260ec4a
https://github.com/llvm/llvm-project/commit/a2031641ed0db092d7f7a5371f4710b9e260ec4a
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
R llvm/test/CodeGen/AArch64/arm64-2013-02-12-shufv8i8.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/bf16-shuffle.ll
M llvm/test/CodeGen/AArch64/build-vector-two-dup.ll
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/insert-subvector.ll
M llvm/test/CodeGen/AArch64/insertshuffleload.ll
M llvm/test/CodeGen/AArch64/neon-extracttruncate.ll
M llvm/test/CodeGen/AArch64/neon-shuffle-vector-tbl.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
Log Message:
-----------
[AArch64][GlobalISel] Add more shuffle test coverage. NFC (#207907)
Commit: 39f64b9045441225f6229d3ea5502ae5a03307f8
https://github.com/llvm/llvm-project/commit/39f64b9045441225f6229d3ea5502ae5a03307f8
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-07-06 (Mon, 06 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_eq.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ne.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_sge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_slt.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
Log Message:
-----------
[RISCV] Fix Predicates in SFB to MVccI (#207806)
Commit: 93509a564b4dda593766f4395873175ede1a30ed
https://github.com/llvm/llvm-project/commit/93509a564b4dda593766f4395873175ede1a30ed
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/get-rounding.ll
M llvm/test/CodeGen/LoongArch/set-rounding.ll
Log Message:
-----------
[LoongArch] Support ISD::GET_ROUNDING (llvm.get.rounding) (#207319)
Commit: c6cadf901add7de1751cb27856aec90e47849cf4
https://github.com/llvm/llvm-project/commit/c6cadf901add7de1751cb27856aec90e47849cf4
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[Fortran] Use INTERFACE targets for options and dependencies (#193469)
Use CMake INTERFACE libraries to express dependencies and common build
options.
Using INTERFACE libraries was proposed here:
https://github.com/llvm/llvm-project/pull/171610#discussion_r3122187957
Since such libraries can also propagate build options use this instead
of `target_compile_options`. Unfortunately this does not mean we can get
rid of `flang_module_target` because it also needs to set the module
output directory.
---------
Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
Commit: 1a5376e062e3f3b99ffce25e24e53182202e06b9
https://github.com/llvm/llvm-project/commit/1a5376e062e3f3b99ffce25e24e53182202e06b9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRISelLowering.cpp
A llvm/test/CodeGen/AVR/cmp-sgt-i128.ll
Log Message:
-----------
[AVR] Fix overflow in SETGT lowering (#207737)
https://github.com/llvm/llvm-project/pull/182690 fixed this for the
SETUGT case, but the same issue exists for SETGT, so fix it in the same
way.
Similar to the SETUGT case this needs a i128 comparison to reproduce,
otherwise the comparison gets folded away too early.
Commit: 47b819b866636fb1770f78da3f45ebd64d5f9875
https://github.com/llvm/llvm-project/commit/47b819b866636fb1770f78da3f45ebd64d5f9875
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
Log Message:
-----------
[LoongArch] Fix vpermi.w legalization with undef elements (#207751)
For the MaskSize==8 case, the code was comparing mask elements that
could be undef (-1). This could result in a miscompile (where -1 + 4 ==
3, which crosses from the high half to the low half) or the pattern not
matching (because -1 doesn't match the other mask element).
Fix this by explicitly handling undef elements in the code. If the high
half is undef, we can just ignore. If the low half is undef, we need to
use the value from the high half shifted down by 4. If neither are
undef, use the original check.
Commit: 5bca42d7d7cd55642e9e63fa3b4da11245d025c3
https://github.com/llvm/llvm-project/commit/5bca42d7d7cd55642e9e63fa3b4da11245d025c3
Author: Jaydeep Chauhan <chauhan.jaydeep.ashwinbhai at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/Headers/CMakeLists.txt
R clang/lib/Headers/amxtf32intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
R clang/test/CodeGen/X86/amx_tf32.c
R clang/test/CodeGen/X86/amx_tf32_api.c
R clang/test/CodeGen/X86/amx_tf32_errors.c
R clang/test/CodeGen/X86/amx_tf32_inline_asm.c
M clang/test/Driver/x86-target-features.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/x86_target_features.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
R llvm/test/CodeGen/X86/amx-tf32-internal.ll
R llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
R llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tf32.txt
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-att.s
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-intel.s
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[X86] Remove AMX-TF32 (#207673)
Per Intel Architecture Instruction Set Extensions Programming Reference
rev. 62 https://cdrdv2.intel.com/v1/dl/getContent/922690 Revision
History entry for revision -062
Commit: 5c01d66e97208cd8acf6d7db72d9cfcbb4cd883f
https://github.com/llvm/llvm-project/commit/5c01d66e97208cd8acf6d7db72d9cfcbb4cd883f
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/test/CodeGen/win64-i128.c
Log Message:
-----------
[AArch64][msvc] allow higher align than slot size in va_arg (#207591)
Fixes https://github.com/llvm/llvm-project/issues/207584
On aarch64 windows, an `__int128` argument is passed with alignment 16,
but was read with an alignment of 8. Based on the MSVC assembly and how
e.g. aarch64 darwin handles this, I think it's correct to set
`AllowHigherAlign = true`.
Commit: 57a7e7538cfc73184b8280160e8d89cedab04c5d
https://github.com/llvm/llvm-project/commit/57a7e7538cfc73184b8280160e8d89cedab04c5d
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp128-cast.ll
Log Message:
-----------
[X86][Windows] use `LowerWin64_INT128_TO_FP` for `u128` to `f128` conversion (#207285)
This change fixes an ABI issue where the signed conversion passes a
`i128` different from a `u128`, and crucially different from GCC.
https://godbolt.org/z/x3daY3rej
```diff
--- <unnamed>
+++ <unnamed>
@@ -1,15 +1,15 @@
-conv_from_i128:
+conv_from_u128:
push rsi
- sub rsp, 64
+ sub rsp, 48
mov rsi, rcx
- movaps xmm0, xmmword ptr [rdx]
- movaps xmmword ptr [rsp + 48], xmm0
+ mov rax, qword ptr [rdx]
+ mov r8, qword ptr [rdx + 8]
lea rcx, [rsp + 32]
- lea rdx, [rsp + 48]
- call __floattitf
+ mov rdx, rax
+ call __floatuntitf
movaps xmm0, xmmword ptr [rsp + 32]
movaps xmmword ptr [rsi], xmm0
mov rax, rsi
- add rsp, 64
+ add rsp, 48
pop rsi
ret
```
The signed case being correct is apparently due to a special
windows-specific path being chosen. The unsigned version bailed out too
early. So, I've changed `LowerUINT_TO_FP` to be more like
`LowerSINT_TO_FP`. In particular this moves the "Bail out when we don't
have native conversion instructions." down a bit, so that
`LowerWin64_INT128_TO_FP` is actually used.
I've then also added some testing for win64 SSE. I'm not sure if the
other target features are as relevant but I can add those too if
helpful.
This was found by running the `rust-lang/compiler-builtins` tests with a
build that includes https://github.com/llvm/llvm-project/pull/204887.
Commit: c5026e4e3332acf88bb304c37137bd247fa12b25
https://github.com/llvm/llvm-project/commit/c5026e4e3332acf88bb304c37137bd247fa12b25
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Architecture/CMakeLists.txt
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
A lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
A lldb/unittests/Architecture/CMakeLists.txt
A lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
A lldb/unittests/Architecture/RISCV/CMakeLists.txt
M lldb/unittests/CMakeLists.txt
Log Message:
-----------
[RISCV][LLDB] Add RISC-V Architecture plugin for trap validation (#207675)
Add a minimal `RISC-V Architecture` plugin and implement
`IsValidTrapInstruction` for trap opcodes. The plugin recognizes riscv32
and riscv64 targets and validates 32-bit `EBREAK` and 16-bit `C.EBREAK`.
On RISC-V, `EBREAK` traps with the PC still pointing at the `EBREAK`
instruction. A plain continue resumes from that same PC and traps again.
This issue was found while trying to run the `TestBuiltinDebugTrap` test
case locally on a `RISC-V QEMU`.
Added a cpp unit test to verify the behaviour of
`IsValidTrapInstruction`. I've chosen to verify `EBREAK` on `riscv32`
and `C.EBREAK` on `riscv64` so that there is some coverage for both
targets.
Assisted by gpt-5.5
Commit: 70646dd3eda3e64fc94b44d7403f946cd7455b92
https://github.com/llvm/llvm-project/commit/70646dd3eda3e64fc94b44d7403f946cd7455b92
Author: lianjinfeng2003 <101249452+mygitljf at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/StmtPrinter.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
M clang/unittests/AST/TypePrinterTest.cpp
Log Message:
-----------
[clang][AST] Qualify DeclRefExpr printing (#206041)
I updated DeclRefExpr printing so fully-qualified printing consistently
uses declaration ownership rather than only the written qualifier. This
also preserves existing behavior for local names and cleaned parameter
names.
The added tests cover both the direct expression printer behavior and
the original type-printing scenario that exposed the missing
qualification.
Fixes #205925
Commit: 64df722400e57118436776be2b897e70d12e8553
https://github.com/llvm/llvm-project/commit/64df722400e57118436776be2b897e70d12e8553
Author: walkerkd <keith.walker at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
Log Message:
-----------
[AArch64] C1-Nano scheduler cleanup in preparation for SME [NFC] (#207738)
Change are in preparation for a forthcoming addition of SME to the
C1-Nano scheduling model. This is restructuring of the code which does
not involve the actual SME changes. By separating out these NFC changes
it will make review of the SME specific changes easier.
- Defined resource names to match the form now used in the C1-Ultra
scheduling model which has the throughput information on the end of the
name rather than in the middle:
C1NanoWrite_1c_1r_2ALU => C1NanoWrite_1c_2ALU_1rc
- Moved definitions so that they more closely match the order they are
defined in the C1-Nano SWOG. This make it easier to match entries in the
code to the tables in the SWOG.
These changes also make the C1-Nano scheduling model more closely match
the forms and layout used in the C1-Ultra scheduling model.
Commit: ff518705c4c5d1e6e7a94d6ab7819618708d5bcd
https://github.com/llvm/llvm-project/commit/ff518705c4c5d1e6e7a94d6ab7819618708d5bcd
Author: Chandana Mudda <quic_csinderi at quicinc.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPatterns.td
A llvm/test/CodeGen/Hexagon/sext-mul-splat-v2i16.ll
Log Message:
-----------
[Hexagon] Optimize sext + mul pattern for splatted scalar sext i16 (#206893)
Extend the existing vmpyh pattern to handle the case where one operand
of a v2i32 nsw mul is a splatted scalar sext i16 value. When the splat
is hoisted out of a loop, it arrives as assertsext v2i32, i16 in the DAG
rather than sext v2i16. The existing pattern did not match this form,
causing the multiply to expand to two scalar mpyi instructions.
Add a PatFrag assertsext_v2i32_i16 to match assertsext nodes of type
v2i32 extended from i16, and two new patterns (both operand orderings)
that recover the v2i16 using A2_combine_ll before feeding into
M2_vmpy2s_s0.
Commit: adc3969513100367bd4b2cf6add8935cd308432b
https://github.com/llvm/llvm-project/commit/adc3969513100367bd4b2cf6add8935cd308432b
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Use APFloat::getOne instead of parsing "1.0" (NFC) (#207916)
Commit: 4e43cd6339934945e829ddc4ec3ef81c381a0423
https://github.com/llvm/llvm-project/commit/4e43cd6339934945e829ddc4ec3ef81c381a0423
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
Log Message:
-----------
[LV][RISCV] Enable FSub reduction for scalable VFs (#207698)
#197134 introduced a change to FAdd reduction recognition, causing fsub
instructions to be classified as FSub reductions instead of FAdd
reductions. This patch fixes the regression by enabling FSub reduction
support for scalable VFs in TTI.
Commit: ec9e62cb609a0382c817112e983c461827056dfd
https://github.com/llvm/llvm-project/commit/ec9e62cb609a0382c817112e983c461827056dfd
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
Log Message:
-----------
[MLIR][XeGPU] Move arch-specific topology under uArch check (#207449)
Commit: 503f0ca19cfcc9c0c88d6918939a2c0038ad0498
https://github.com/llvm/llvm-project/commit/503f0ca19cfcc9c0c88d6918939a2c0038ad0498
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Log Message:
-----------
[SPIR-V] Simplify and fix sign-extension bug in convertCharsToWord (#207769)
Commit: 81e317971d50396fc68a602a505eb85572c51373
https://github.com/llvm/llvm-project/commit/81e317971d50396fc68a602a505eb85572c51373
Author: DaanishD20 <daanish.dhillip at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
Log Message:
-----------
[clang] Fix constant-evaluator crash on array new with no size (#207730)
An array new-expression whose bound is neither specified nor deducible
from its initializer (for example `new int[]()`) is ill-formed and is
already diagnosed by Sema with `error: cannot determine allocated array
size from initializer`. However, the constant evaluator still tried to
evaluate the recovery expression. In
`PointerExprEvaluator::VisitCXXNewExpr`
the array size is unavailable (`E->getArraySize()` is `nullopt`), so the
allocation fell through to the scalar-new path, producing an array
`APValue` stored under a scalar type. Reading that object later asserted
in `Type::castAsArrayTypeUnsafe()` (`isa<ArrayType>(CanonicalType)`)
from
`CheckEvaluationResult`.
This patch detects an array new-expression whose size could not be
determined and bails out of constant evaluation.
Fixes #200139
Commit: d6a4a97cb7a198121e5058d6c4c6b4552259a79d
https://github.com/llvm/llvm-project/commit/d6a4a97cb7a198121e5058d6c4c6b4552259a79d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Remove dead helper `addStringImm(const StringRef &Str, IRBuilder<> &B, std::vector<Value *> &Args)` (#207923)
The helper was unused.
Commit: ee2f8649c1be2702a79d2249d2e4f7a9befb115b
https://github.com/llvm/llvm-project/commit/ee2f8649c1be2702a79d2249d2e4f7a9befb115b
Author: Luke Lau <luke at igalia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-i64-rv32.ll
A llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-i64-rv32.ll
Log Message:
-----------
[RISCV] Fix interleaved + strided costs for e64 elements on rv32 (#207927)
This is the same fix as #176105 for interleaved + strided memory op
costs.
We currently compute the cost of interleaved + strided ops as N *
scalar element memory ops, but on rv32 the scalar memory access will
be on an illegal type for 64 bit elements, even with zve64x. Prevent
it from overcosting by just using TCC_Basic.
Commit: 62cb33ee38d748e16e95bc6e90fa747ae7f6c49b
https://github.com/llvm/llvm-project/commit/62cb33ee38d748e16e95bc6e90fa747ae7f6c49b
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Log Message:
-----------
[RISCV] Enumerate all RecurKind cases in isLegalToVectorizeReduction. nfc (#207932)
Commit: 5318bd4123261b716c8a0750076495b77e3614dc
https://github.com/llvm/llvm-project/commit/5318bd4123261b716c8a0750076495b77e3614dc
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/elf.yaml
M libc/include/llvm-libc-macros/sys-auxv-macros.h
Log Message:
-----------
[libc] Add auxiliary vector and note macros to elf.h (#207914)
Added missing macros to elf.h:
* sys-auxv-macros.h: Added AT_RSEQ_FEATURE_SIZE and AT_RSEQ_ALIGN.
* elf.yaml: Added PT_AARCH64_MEMTAG_MTE, PN_XNUM, ELFCLASSNUM, EV_NUM,
and AT_* macros (via sys-auxv-macros.h). Also added NN_* and NT_* note
macros (including NT_FPREGSET and NT_SIGINFO) to match system headers.
* CMakeLists.txt: Added sys_auxv_macros dependency to elf target.
Assisted-by: Automated tooling, human reviewed.
Commit: 6e0de1cea1c8c567304e5e539ba480cada3e28f5
https://github.com/llvm/llvm-project/commit/6e0de1cea1c8c567304e5e539ba480cada3e28f5
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/async_handler.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
A libsycl/test/usm/memcpy.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/queue/CMakeLists.txt
A libsycl/unittests/queue/memcpy.cpp
Log Message:
-----------
[libsycl] Implement memcpy API (#205369)
Commit: fcd02ae7caf28f99357521cafaa6cc7be216ad02
https://github.com/llvm/llvm-project/commit/fcd02ae7caf28f99357521cafaa6cc7be216ad02
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIRVToLLVM] Add spirv.Unreachable to llvm.unreachable conversion (#207762)
Commit: d8bc45049075791aa291ef0d6298061308506346
https://github.com/llvm/llvm-project/commit/d8bc45049075791aa291ef0d6298061308506346
Author: David Spickett <david.spickett at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
Log Message:
-----------
[lldb][Linux] Show si_addr for SIGBUS signals (#207718)
The general rule is if si_addr is the same as the PC, we don't show it
because it doesn't add any new information.
SIGBUS signals are caused by an instruction trying to do something, but
si_addr is not the address of the instruction. It's some virtual
address, which is the important bit so add it to the description.
https://man7.org/linux/man-pages/man7/signal.7.html
> SIGBUS <...> Bus error (bad memory access)
Before:
```
* thread #1, name = 'test.o', stop reason = signal SIGBUS: illegal address
* frame #0: 0x0000aaaaaaaa0b80 test.o`main at test.c:42:13
```
After:
```
* thread #1, name = 'test.o', stop reason = signal SIGBUS: illegal address (fault address=0xfffff7ff6000)
* frame #0: 0x0000aaaaaaaa0b80 test.o`main at test.c:42:13
```
I am not adding test cases for this because:
* They would be architecture specific.
* Reliably generating BUS_OBJERR seems difficult.
* Signal reporting has good coverage as it is, so we know that
si_code/si_addr are handled correctly.
Commit: 3f3276ea30babdca38cbfa1188c3b8302819641f
https://github.com/llvm/llvm-project/commit/3f3276ea30babdca38cbfa1188c3b8302819641f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Use `StringRef` by value (no `const`, no `&`) (#207940)
A `StringRef` is non-modifiable and it acts as a reference, so there is
no need to declare it as `const` nor `&`.
---------
Co-authored-by: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Commit: 5aa3f7d5ca15ef942e2735555724a65358d0a30d
https://github.com/llvm/llvm-project/commit/5aa3f7d5ca15ef942e2735555724a65358d0a30d
Author: Amit Tiwari <amtiwari at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
A llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
A llvm/test/Transforms/LoopLoadElim/non-lcssa-input.ll
Log Message:
-----------
[LLE][LoopDistribution][LoopVersioning] Form LCSSA at Caller Invoking LoopVersioning Utility (#202296)
LoopVersioning utility `versionLoop()` expects the input form to be
LCSSA. However, passes like Loop distribution, Loop-load-elimination,
may invoke versioning with a non-LCSSA IR. Versioning updates exit-block
PHIs to handle both the original loop and the cloned loop. However, a
raw non-LCSSA use in the exit block (such as `switch i1 %C`) still
points to the original loop’s `%C`. On the cloned-loop path, control
reaches the exit block without executing the original `%C`, resulting in
error: `Instruction does not dominate all uses!`.
The fix is to form LCSSA at the caller pass.
Commit: d4cf0c375dadd830c27a2b16e0283c4e31beac1a
https://github.com/llvm/llvm-project/commit/d4cf0c375dadd830c27a2b16e0283c4e31beac1a
Author: David Green <david.green at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
M llvm/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
M llvm/test/CodeGen/AArch64/GlobalISel/vararg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/xro-addressing-mode-constant.mir
Log Message:
-----------
[AArch64][GlobalISel] Update some tests to use concrete types. NFC (#207960)
Commit: bc5d5f369d127f8b029a81e4fcd874d4b6454347
https://github.com/llvm/llvm-project/commit/bc5d5f369d127f8b029a81e4fcd874d4b6454347
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
M clang-tools-extra/docs/clang-tidy/checks/bugprone/command-processor.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/std-namespace-modification.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-string-to-number-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/new-delete-overloads.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/non-copyable-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/copy-constructor-mutates-argument.cpp
Log Message:
-----------
[clang-tidy][docs] Update CERT links to current SEI URLs. NFC. (#207893)
Commit: ac60c83fc60a86c01eaaafd82bb19bc41649bcfa
https://github.com/llvm/llvm-project/commit/ac60c83fc60a86c01eaaafd82bb19bc41649bcfa
Author: walkerkd <keith.walker at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
Log Message:
-----------
[AArch64] llvm-mca C1-Ultra tests: SVE instructions added by SME when not streaming [NFC] (#207948)
In the C1-Ultra llvm-mca test, moves some instructions that were
incorrectly in the test file for "Instructions available with no SME but
will be sent to CME when in streaming SVE mode" into a file specifically
for instruction that are "SVE instructions added by SME and available
when not in Streaming SVE mode".
This is in preparation for forthcoming C1-Nano SME support to the
scheduling model that currently has no information about these
instruction due to lack of information in the C1-Nano SWOG.
This change is currently NFC because the C1-Ultra is still running the
the same tests, just from different test files.
Commit: baddc8f7778881120a2a206de817454e13f762bc
https://github.com/llvm/llvm-project/commit/baddc8f7778881120a2a206de817454e13f762bc
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_args.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_cwd.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_debuggerRoot.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_disableSTDIO.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_array.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_object.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_extra_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_launch_commands_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_program.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_disabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_enabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_sourcePath.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stopOnEntry.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_version.py
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
Log Message:
-----------
[lldb-dap] Migrate DAP launch tests (#207023)
Migrate all the tests in `lldb-dap/launch` base directory only. Fixes
any grammar if needed.
Commit: 7b4fd8762aa76e8b256afb51043a1508af2646fe
https://github.com/llvm/llvm-project/commit/7b4fd8762aa76e8b256afb51043a1508af2646fe
Author: Connector Switch <c8ef at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++] Mark LWG3585 as resolved (#207717)
- Close: https://github.com/llvm/llvm-project/issues/104934.
- Commit:
https://github.com/llvm/llvm-project/commit/0d3d8de014f1012dd0b2c2c077099cf6face44e5
- Test:
https://github.com/llvm/llvm-project/blob/52271a5c11f6abde1fa1221db304212b5eb8ec7c/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp#L29-L34
Commit: 38a4eef07180d1d9a3216a7ea9d71c50ee4f3c0e
https://github.com/llvm/llvm-project/commit/38a4eef07180d1d9a3216a7ea9d71c50ee4f3c0e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
[AMDGPU] Save entry EXEC in whole-wave prologue with no WWM spills (#207924)
PR #207781 replaced the prologue S_XOR_SAVEEXEC (which set EXEC to
~entryEXEC) with a plain S_MOV EXEC, -1, but dropped the save of the
entry EXEC that the return restores from, leaving an undefined register
read
se S_OR_SAVEEXEC to both save entry EXEC and set EXEC to -1
Commit: 4db63ee847f2a9154a9869da51a8c575eb123923
https://github.com/llvm/llvm-project/commit/4db63ee847f2a9154a9869da51a8c575eb123923
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/inet-address-macros.h
M libc/include/arpa/inet.yaml
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntop.cpp
A libc/src/arpa/inet/inet_ntop.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_ntop_test.cpp
Log Message:
-----------
[libc] Add inet_ntop (#204143)
The function converts from IPv4/6 addresses to their string forms. The
complication comes from the v6 part due to address compression and
v4-mapping.
The traditional implementation of this is to sprintf the address into a
temporary buffer. We cannot do that here due to the ban on calling other
entry points. Using the lower-level constructs is possible, but a
straight forward application of IntegerToString does not result in
particularly impressive performance: 50%-100% slower than what's in this
patch (and slower than glibc). It also doesn't make the code much
smaller as the majority of it is dedicated to v6 compression.
The IPv6 implementation uses a temporary buffer, but it also has a
fast-path which skips the buffer if its size is guaranteed to be
sufficient. The IPv4 implementation also has a fast path, but the
fallback here is to compute the precise length of the string instead
(the buffer option was slower and IPv4 makes it easier to compute the
precise length).
The v6 compression code is unrolled to make it easier to optimize. While
it is possible to write a single printing loop that handles all cases,
its branchiness does not make it amenable for optimization.
The resulting function is faster than its glibc counterpart, though the
exact ratio varies depending on the input:
- random IPv4: 15% faster
- random IPv6: 6% faster
- "::": 50% faster
Commit: de348bcd5f7898dc7478fed6bbd95c97a1848d98
https://github.com/llvm/llvm-project/commit/de348bcd5f7898dc7478fed6bbd95c97a1848d98
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/MLProgram/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
Log Message:
-----------
[NFC][mlir][bufferization] Align alloc/memcpy/cast options hooks to the rest (#206966)
There are three hooks that have a different, more complicated API than
the other ones: allocationFn, memCpyFn, castFn. All three are called via
"helper" functions that check whether the hooks are set to call them and
fall back to default implementations otherwise.
Other hooks (e.g. unknownTypeConverterFn) in the bufferization options
have a different "API": they are always set to some default
implementation and can be overwritten by the user. This is a simpler API
overall and seems it can be universal.
Note for LLVM integration: BufferizationOptions::{createAlloc,
createMemCpy, createCast} functions are "replaced" with direct calls to
the underlying std::function objects. At any call-site that relied on
any of the removed APIs, a call to the respective hook should now be
used instead. The exception is the `allocationFn` hook which needs an
explicit "bufferAlignment" parameter. Beforehand, it was implicitly
taken from BufferizationOptions::bufferAlignment field, so a
non-functional migration path is to go from
`options.createAlloc(builder, loc, destType, value)` to
`options.allocationFn(builder, loc, destType, value,
options.bufferAlignment)`.
Commit: 8f7019acdd29270a0a51006a6cbdb43d6844dd20
https://github.com/llvm/llvm-project/commit/8f7019acdd29270a0a51006a6cbdb43d6844dd20
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/typeid.cpp
Log Message:
-----------
[clang][bytecode] Fix getting typeid pointers of struct fields (#207946)
`getDeclPtr()` will return the declaration pointer, which might be
unrelated to the pointer we actually care about.
Commit: f8defb1033fefe4a62e2f71540e3bea16c20e09f
https://github.com/llvm/llvm-project/commit/f8defb1033fefe4a62e2f71540e3bea16c20e09f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Remove dead helper `buildOpMemberDecorate(Register, MachineInstr &, ...)` (#207952)
Another dead helper.
Commit: b4c4fd9ee380b00000ab3fd6e71f9a8c807fb96a
https://github.com/llvm/llvm-project/commit/b4c4fd9ee380b00000ab3fd6e71f9a8c807fb96a
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[NFC][SPIRV] Make `getVacantFunctionName` static (#207954)
The function is only used inside `SPIRVUtils.cpp`.
Commit: 12c36c7abb1600638d976258c1c0d3517df59226
https://github.com/llvm/llvm-project/commit/12c36c7abb1600638d976258c1c0d3517df59226
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/net_if_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_ifreq.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/net-if-macros.h
A libc/include/llvm-libc-macros/net-if-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_ifreq.h
A libc/include/net/if.yaml
M libc/src/CMakeLists.txt
A libc/src/net/CMakeLists.txt
A libc/src/net/if_indextoname.h
A libc/src/net/if_nametoindex.h
A libc/src/net/linux/CMakeLists.txt
A libc/src/net/linux/if_indextoname.cpp
A libc/src/net/linux/if_nametoindex.cpp
M libc/test/src/CMakeLists.txt
A libc/test/src/net/CMakeLists.txt
A libc/test/src/net/linux/CMakeLists.txt
A libc/test/src/net/linux/if_indextoname_test.cpp
A libc/test/src/net/linux/if_nametoindex_test.cpp
Log Message:
-----------
[libc] Implement if_nametoindex and if_indextoname (#206082)
This patch implements if_nametoindex and if_indextoname for Linux.
Both functions work by creating a temporary AF_UNIX socket and issuing
ioctl calls (SIOCGIFINDEX and SIOCGIFNAME, respectively).
The main implementation details:
- for if_nametoindex, I check that the interface name fits within
IF_NAMESIZE before issuing the ioctl
- for if_indextoname, if the kernel returns ENODEV for an unknown index,
I map it to ENXIO to comply with POSIX requirements
- added the definition of struct ifreq to support these operations.
Similar to the other net structure definitions, I'm using an anonymous
union to avoid #defining members.
Assisted by Gemini.
Commit: 149e219bf87f31f0a209037e52b0412d0e8cb5a8
https://github.com/llvm/llvm-project/commit/149e219bf87f31f0a209037e52b0412d0e8cb5a8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Add more checks for pseudo dtors (#207959)
Rename the `EndLifetimePop` op (which was only used for pseudo dtors) to
`PseudoDtor` and call `checkDestructor()` in there, so we get the full
suite of checks.
Commit: 5506a59c7ff2a3a066d1ec6c3fb0ce69754923d4
https://github.com/llvm/llvm-project/commit/5506a59c7ff2a3a066d1ec6c3fb0ce69754923d4
Author: fengfeng <153487255+fengfeng09 at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/slsr-var-delta.ll
A llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep-sext-wrap.ll
Log Message:
-----------
[SLSR] Fix slsr gep stride delta miscompile (#204278)
Signed-off-by: feng.feng <feng.feng at iluvatar.com>
Commit: 132aa1fcb68f5bedc9e15d47a2d90b06ebf7727b
https://github.com/llvm/llvm-project/commit/132aa1fcb68f5bedc9e15d47a2d90b06ebf7727b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-av-none.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/tgsplit.ll
M llvm/test/MC/AMDGPU/hsa-tg-split.s
Log Message:
-----------
AMDGPU: Replace tgsplit subtarget feature with attribute (#204216)
This is a per-entrypoint property and has a corresponding
assembler directive, so it should not be baked into the
subtarget. I couldn't find much documentation on what this
actually does, so the description isn't great.
Fixes #204149
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 8c97a2edd20343c7729f76f7b119e024eb6530cc
https://github.com/llvm/llvm-project/commit/8c97a2edd20343c7729f76f7b119e024eb6530cc
Author: Wenju He <wenju.he at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/PCH/dllexport-ctor-closure-copy.cpp
Log Message:
-----------
[Clang] Fix null-pointer assertion reading CtorClosureDefaultArgs (#207917)
BuildCtorClosureDefaultArgs deliberately leaves the first default-arg
slot null for MS ABI copy-constructor closures (the closure itself
supplies that argument), and ASTWriterDecl.cpp serializes the null. But
e7924d50db0a deserialized it with cast<>, which asserts on null. This
only triggers under the MS C++ ABI, e.g. when throwing a class with a
non-trivial copy constructor by value across a PCH boundary, as in test
https://github.com/intel/llvm/blob/cb9b7b7/clang-tools-extra/clangd/test/sycl.test
Assisted by: Claude
Commit: e16f4895b18d4bac812326416dbb774d5b4162ad
https://github.com/llvm/llvm-project/commit/e16f4895b18d4bac812326416dbb774d5b4162ad
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
Log Message:
-----------
[SPIR-V] Avoid crash on malformed mangled builtin name length (#207939)
Replace the assert on invalid length parsing with a graceful bail-out
since malformed names can potentially come from outside, it is not
necessarily always an error
All usages of `getOclOrSpirvBuiltinDemangledName` are being checked for
emptiness where it is needed anyway
Commit: d8a9bfb0b39d2d331bd6e587016c779552caaffc
https://github.com/llvm/llvm-project/commit/d8a9bfb0b39d2d331bd6e587016c779552caaffc
Author: ayrai-gb <ayrai at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/test/CodeGen/X86/asm-modifier.ll
Log Message:
-----------
[X86] Fix inline asm modifier printing across dialects (#204558)
X86AsmPrinter handles several inline asm operand modifiers differently
depending on whether the asm block uses AT&T or Intel syntax.
For `%a` and `%A`, the scalar/register operand path used AT&T
punctuation unconditionally. In Intel-dialect inline asm this could
print invalid forms such as `(rdi)` for an address operand or `*rdi` for
an indirect call operand.
For `%P`, `PrintAsmMemoryOperand` passed `"disp-only"` to both the Intel
and AT&T memory printers, but only the Intel path honored it for
global/symbol displacements with a base register. The AT&T path could
therefore print `g(%rdi)` even though `%P` requested displacement-only
output.
Make the affected X86 asm-printer paths dialect-aware/consistent:
- print Intel `%a` register operands as `[reg]`
- print Intel `%A` register operands without AT&T `*`
- make AT&T `%P` honor `"disp-only"` for global/symbol displacements,
matching the existing Intel behavior
Found via @jlebar's X86 LLVM bug-hunt / FuzzX effort.
cc @jlebar
Co-authored-by: Ayush Rai <your-email at amd.com>
Commit: 670c3c0adc6487654d0fd857e6666fe5576f5a68
https://github.com/llvm/llvm-project/commit/670c3c0adc6487654d0fd857e6666fe5576f5a68
Author: Lang Hames <lhames at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M orc-rt/CMakeLists.txt
Log Message:
-----------
[orc-rt] Fix indentation in CMakeLists.txt. NFC. (#207980)
Commit: 17d7bf22294173609c3a711a223713780055ed66
https://github.com/llvm/llvm-project/commit/17d7bf22294173609c3a711a223713780055ed66
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Try to avoid temporaries in (compound) assignments (#207652)
This is only needed if the RHS has side-effects. If we can easily and
cheaply prove that it doesn't, avoid the temporary variable. This saves
memory and is slightly faster.
Commit: 7cb8692cc1455e983bdd7312d3bcc2f2f5222760
https://github.com/llvm/llvm-project/commit/7cb8692cc1455e983bdd7312d3bcc2f2f5222760
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-mull-acc.ll
Log Message:
-----------
[AArch64] Select SVE2 multiply-add long from mull and add/sub (#207951)
Both multiple-add long and multiple long are part of SVE2.
Commit: e0093262487e101d3c13773bf313cd3641544cd8
https://github.com/llvm/llvm-project/commit/e0093262487e101d3c13773bf313cd3641544cd8
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
A llvm/test/CodeGen/ARM/cmn-shift.ll
M llvm/test/CodeGen/ARM/cmp-peephole.ll
M llvm/test/CodeGen/ARM/umulo-32.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
Log Message:
-----------
[ARM] Swap sides of cmp/cmn based on folding ability (#191915)
If we can fold lsl, lsr, rotr, or asr into the right side of the
compare, we should do so.
Commit: 9588dfe546b81a76a79c571ca0740cab494ff707
https://github.com/llvm/llvm-project/commit/9588dfe546b81a76a79c571ca0740cab494ff707
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstCombine/select-abs-positive-mul.ll
Log Message:
-----------
[InstCombine] Recognize abs through positive-K nsw multiply. (#207539)
Generalize matchSelectPattern to also consider multiplies that do not
change sign when trying to from llvm.abs.
End-to-end, this allows vectorizing with narrower element types for code
such as below. This triggers in some ffmpeg kernels on AArch64.
```
void scaled_absdiff_u8(uint8_t * __restrict out,
const uint8_t * __restrict a,
const uint8_t * __restrict b,
size_t n) {
for (size_t i = 0; i < n; ++i) {
int32_t d = 4 * ((int32_t)a[i] - (int32_t)b[i]);
if (d < 0) d = -d;
if (d > 255) d = 255;
out[i] = (uint8_t)d;
}
}
```
Alive2 proof:
* Mul - https://alive2.llvm.org/ce/z/pGYQ36
* Shl - https://alive2.llvm.org/ce/z/WBU2mw
PR: https://github.com/llvm/llvm-project/pull/207539
Commit: 0d9f3f41d6a45e0673c04a01e64d24a76ccffe60
https://github.com/llvm/llvm-project/commit/0d9f3f41d6a45e0673c04a01e64d24a76ccffe60
Author: David Truby <david.truby at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M openmp/runtime/cmake/arm64x.cmake
M openmp/runtime/src/CMakeLists.txt
Log Message:
-----------
[openmp][arm64ec] Fix arm64x when PER_TARGET_RUNTIME_DIR=On (#207747)
This patch fixes an issue where the combination of LIBOMP_ENABLE_ARM64X
and LLVM_PER_TARGET_RUNTIME_DIR=On led to only the arm64 library being
installed. With this fix, the arm64ec and arm64 .lib files are both
installed, and the arm64x dll is the one installed to the binary dir.
Commit: 884d9277e89834a9a76a8891de6624c791e5ee08
https://github.com/llvm/llvm-project/commit/884d9277e89834a9a76a8891de6624c791e5ee08
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/PDB/MsfFile.rst
Log Message:
-----------
[docs][pdb] Fix description of FileMagic (#207972)
There are no spaces around the slash:
https://github.com/microsoft/microsoft-pdb/blob/master/PDB/msf/msf.cpp#L962
Fixes #158492
Commit: d847e2f19b7dfb63c4f73fefcc69cf328b9c18d7
https://github.com/llvm/llvm-project/commit/d847e2f19b7dfb63c4f73fefcc69cf328b9c18d7
Author: Cyrus Ding <91178148+dingcyrus at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/include/clang/Basic/IdentifierTable.h
Log Message:
-----------
[Clang] Renumber TokenKey enum values to close gap left by KEYNOZOS removal (#207906)
The previous commit (#207132) removed the unused KEYNOZOS flag
(0x4000000) but left a gap between KEYZOS (0x2000000) and KEYHLSL
(0x8000000). This patch renumbers the subsequent TokenKey values to
close the gap:
KEYHLSL: 0x8000000 -> 0x4000000
KEYFIXEDPOINT: 0x10000000 -> 0x8000000
KEYDEFERTS: 0x20000000 -> 0x10000000
KEYNOHLSL: 0x40000000 -> 0x20000000
The ~0x4000000u exclusion in KEYALL and the associated reserved-bit
comment are removed, since the renumbering eliminates the orphaned bit.
This is a follow-up to #207132, as suggested by @perry-ca.
AI assistance was used for code review analysis and CI failure
debugging.
Co-authored-by: Chenguang Ding <dingchenguang at kylinos.cn>
Commit: 91578461e8a112941afeed18679efb168b81f796
https://github.com/llvm/llvm-project/commit/91578461e8a112941afeed18679efb168b81f796
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
A clang/test/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CodeGen/builtin-cpu-is-vendor.c
R clang/test/CodeGen/builtin-cpu-is.c
A clang/test/CodeGen/builtin-cpu-supports-all.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/TargetParser/X86TargetParser.cpp
Log Message:
-----------
[X86] Sync compiler-rt cpu subtypes and vendors with libgcc and refactor internal cpu type tables in LLVM (#171172)
This is a continuation of previous PR:
https://github.com/llvm/llvm-project/pull/168750
compiler-rt was synced with libgcc on ProcessorVendor and
ProcessorSubtype fields and so was llvm. Cpu type, subtype and vendor
entries in X86TargetParser.def were refactored to use ABI_VALUE.
LLVM doesn't set the ABI_VALUE for its enums -- clang now takes care of
that by reading the ABI_VALUE.
I've removed and added some comments to better explain what is going on.
While at it, I've added tests to check that right values are passed for
vendor, subtypes, types and features (the last ones weren't added in
feature sync PR: https://github.com/llvm/llvm-project/pull/168750)
Parts of the PR (test) have been realized using Claude Code
Commit: 5343b204252d7bf5bdfcacd664e78e9f7f9fd745
https://github.com/llvm/llvm-project/commit/5343b204252d7bf5bdfcacd664e78e9f7f9fd745
Author: Martin Storsjö <martin at martin.st>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxxabi/src/CMakeLists.txt
Log Message:
-----------
[libcxxabi] Don't enable -fvisibility=hidden on Windows (#207943)
This option is supported (and hence gets added by the
target_add_compile_flags_if_supported function) on Windows, but if using
dllexport, there's no point in using hidden visibility. (However if
building both static and shared libraries at the same time, it could be
beneficial to have hidden visibilty in the static libraries.)
In asserts enabled builds of Clang, building with -fvisibility=hidden
caused errors like this:
dllexport GlobalValue must have default or protected visibility
ptr @_ZTIv
[...]
fatal error: error in backend: Broken module found, compilation aborted!
Normally, combining -fvisibility=hidden with dllexport is not a problem,
but specifically for `__cxxabiv1:: __fundamental_type_info` it does make
Clang trigger an inconsistency, visible in asserts enabled builds of
Clang - see https://github.com/llvm/llvm-project/issues/207963.
This fixes Windows builds with Clang with asserts enabled, after
cb942d009a5ed029ce20d9b75b3604f551f0cb56.
Commit: 849d90b64e2a91892d45d2fa75f405fa075d3c3d
https://github.com/llvm/llvm-project/commit/849d90b64e2a91892d45d2fa75f405fa075d3c3d
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/C/C23/n3007.c
M clang/test/Parser/c2x-auto.c
Log Message:
-----------
[C23] Allow deducing restrict and _Atomic qualifiers (#207994)
We were limiting the logic to __auto_type when it should apply to auto
as well.
Fixes #207466
Commit: 980f51a9b264a836b1a145366f17cd1b6d843f7c
https://github.com/llvm/llvm-project/commit/980f51a9b264a836b1a145366f17cd1b6d843f7c
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
Log Message:
-----------
[Hexagon] Don't use reserved identifiers (#207967)
All identifiers that begin with an underscore followed by a capital
letter or by another underscore are reserved.
Commit: 90dd76bf36f5d8c5ab4dccabee444229e461e7be
https://github.com/llvm/llvm-project/commit/90dd76bf36f5d8c5ab4dccabee444229e461e7be
Author: Barbara Mitic <bmitic at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
A llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
[AMDGPU] Select the high-half 16-bit packing idiom to v_lshl_or_b32 (#206058)
The (hi << 16) | z high-half packing idiom is not fused by the existing
(or (shl x, y), z) selection. By the time it reaches ISel the DAG
combiner has rewritten (ext i16) << 16 into bitcast(build_vector (i16
0), hi), so there is no shl node left to match and the build_vector and
or are selected separately.
Add ISel patterns that match the build_vector form directly. On the
non-real-true16 path the high-half source is a VGPR_32, so fold into
v_lshl_or_b32. On the real-true16 path the high-half source is a VGPR_16
and 16-bit ops are native, so OR it into the high half of the other
operand with v_or_b16 and assemble the result with a REG_SEQUENCE.
Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
Commit: 0ac35389e9d47fb9aa2934cbfab274aa69d05317
https://github.com/llvm/llvm-project/commit/0ac35389e9d47fb9aa2934cbfab274aa69d05317
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.general/p16-cxx20.cpp
Log Message:
-----------
[clang][bytecode] Fix `getDynamicDecl()` wrt. multiple base classes (#207722)
The previous code did not consider that the base class we're getting
might not be on the path from `TypePtr` to `TypePtr.stripBaseCasts()` at
all, because of multiple bases.
Commit: 9f4c43747f86f29efa397ad7f172d21dee5ecbe1
https://github.com/llvm/llvm-project/commit/9f4c43747f86f29efa397ad7f172d21dee5ecbe1
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
Log Message:
-----------
[NFC][AMDGPU] Fix orphaned SDAG/GISEL check prefixes in tests (#207964)
Commit: 5db2a39854f32632fb406b1b25a4b0df4842630e
https://github.com/llvm/llvm-project/commit/5db2a39854f32632fb406b1b25a4b0df4842630e
Author: unexpectedlydefined <91391114+unexpectedlydefined at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-dwarfdump.rst
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/tools/llvm-dwarfdump/CMakeLists.txt
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
Log Message:
-----------
Reapply: [llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage (#207974)
Reapplies 5f4940ef. The original patch caused failures on buildbots due to
adding uses of functions defined in LLVMCore and LLVMIRReader without
adding those libraries to the dwarfdump link components.
Patch 3 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
this RFC:
https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266
This patch adds an IR-level analysis in order to more accurately compute
the defined ranges for each variable. This avoids the problem of the
more naïve approach relying on source scopes, which overcounts as
coverable those lines where the variable is not yet defined (e.g. stack
variables).
The IR analysis requires IR to be provided to llvm-dwarfdump as a
separate `--variable-coverage-bitcode-file` argument (either textual IR
or bitcode; can be produced by various means e.g. `--save-temps
--emit-llvm`, `-ffat-lto-objects`,
[wllvm](https://github.com/travitch/whole-program-llvm)). The
recommended way to obtain a whole-program bitcode file is to use wllvm
as follows:
```sh
$ export LLVM_COMPILER=clang
$ CC=wllvm make # build as usual, but replace clang/clang++ with wllvm/wllvm++
$ extract-bc binfile # produces binfile.bc, which can be passed to llvm-dwarfdump
```
Commit: 17c9f2ea943cb65e1afd02d60c67f7928c9b36c2
https://github.com/llvm/llvm-project/commit/17c9f2ea943cb65e1afd02d60c67f7928c9b36c2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
Log Message:
-----------
[SLP][NFC]Add a new test for fadd/fsub combination, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208004
Commit: d1cd1de72a8f88c3b44c2eacb18146ffd3adee2e
https://github.com/llvm/llvm-project/commit/d1cd1de72a8f88c3b44c2eacb18146ffd3adee2e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/peephole-fold-subreg-tied-copy.mir
Log Message:
-----------
X86: Fix mishandling subregisters in ndd memory fold (#207997)
Defends against regressions in a future change.
Commit: 3c7727f1269e5986915aacf4ee1ae117843bd573
https://github.com/llvm/llvm-project/commit/3c7727f1269e5986915aacf4ee1ae117843bd573
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
Log Message:
-----------
[libc] Use the dup2 syscall wrapper in posix_spawn (#207879)
posix_spawn's local dup2 helper fell back to a bare dup3 on targets
without SYS_dup2. dup3 fails with EINVAL when oldfd == newfd, where dup2
must instead return oldfd if it is valid, so
posix_spawn_file_actions_adddup2 with equal fds misbehaved on those
targets. linux_syscalls::dup2 already implements the correct fallback,
so call it directly and drop the local helper.
Commit: e16c737a52fa9c5144299282f4da519e898af2a5
https://github.com/llvm/llvm-project/commit/e16c737a52fa9c5144299282f4da519e898af2a5
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-call.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow-zeroinitializer.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow.ll
A llvm/test/CodeGen/SPIRV/instructions/select-freeze-aggregate-with-overflow.ll
Log Message:
-----------
[SPIRV] Expand aggregate instructions with mutated-type uses (#206835)
This is a workaround for the problem in GH issue
https://github.com/llvm/llvm-project/issues/203586.
The problem is that we need to mutate aggregate-typed PHI nodes to
`i32`, however that means all incoming values need to have a matching
type, but we can't always easily mutate the incoming types to i32, as in
the case in the GH issue with a math intrinsic that returns a struct
by-value.
We do the same mutation for some other cases like `freeze`, the
workaround is the same.
The workaround is to expand the incoming values to a form that will also
be mutated to i32 so the types match. An example transformation is
below:
Before
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
br label %epilog
...
%2 = phi { i64, i1 } [ %1, %bb0 ], [ %0, %bb1 ]
```
After
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
%1 = extractvalue { i64, i1 } %0, 0
%2 = insertvalue { i64, i1 } poison, i64 %1, 0
%3 = extractvalue { i64, i1 } %0, 1
%4 = insertvalue { i64, i1 } %2, i1 %3, 1
br label %epilog
...
%10 = phi { i64, i1 } [ %9, %bb0 ], [ %4, %bb1 ]
```
`insertvalue` get replaced with a SPIR-V intrinsic later in the pass
which is also type-mutated, so the IR is correct:
```
...
bb1: ; preds = %entry
%0 = call { i64, i1 } @llvm.usub.with.overflow.i64(i64 %a, i64 %b)
call void @llvm.spv.value.md(metadata !0)
call void (...) @llvm.fake.use({ i64, i1 } %0)
%1 = extractvalue { i64, i1 } %0, 0
call void @llvm.spv.assign.type.i64(i64 %1, metadata i64 poison)
call void @llvm.spv.assign.type.i32(i32 undef, metadata { i64, i1 } poison)
%2 = call i32 (i32, i64, ...) @llvm.spv.insertv.i64(i32 undef, i64 %1, i32 0)
call void @llvm.spv.assign.type.i32(i32 %2, metadata { i64, i1 } poison)
%3 = extractvalue { i64, i1 } %0, 1
call void @llvm.spv.assign.type.i1(i1 %3, metadata i1 poison)
%4 = call i32 (i32, i1, ...) @llvm.spv.insertv.i1(i32 %2, i1 %3, i32 1)
call void @llvm.spv.assign.type.i32(i32 %4, metadata { i64, i1 } poison)
br label %epilog
...
%10 = phi i32 [ %9, %bb0 ], [ %4, %bb1 ]
```
This is the simplest change I could come up with, my other ideas were
much more complicated and/or risky.
This fix is important for us because this pattern comes up in libc's
implementation on FMA, so this is blocking SPIR-V libc support.
Fixes: https://github.com/llvm/llvm-project/issues/203586
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: cb668bb3632d06bbcd736ec8999811c8b6b06dd5
https://github.com/llvm/llvm-project/commit/cb668bb3632d06bbcd736ec8999811c8b6b06dd5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/capability-Int64Atomics-weak-cmpxchg.ll
Log Message:
-----------
[SPIR-V] Add missing Int64Atomics requirement for OpAtomicCompareExchangeWeak (#207965)
Commit: 250a554f05e54f2bf4f2c2ba736ed2e06429aba2
https://github.com/llvm/llvm-project/commit/250a554f05e54f2bf4f2c2ba736ed2e06429aba2
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpeq.ll
Log Message:
-----------
[AArch64][InstCombine] Fold xor(cmpeq, pg) to cmpne (#207759)
Extend the existing xor(cmpne(pg, lhs, rhs), pg) fold to also handle
cmpeq to cmpne
Commit: 999b3cfbe21747aa952f79814e7dfd1a7b3fd891
https://github.com/llvm/llvm-project/commit/999b3cfbe21747aa952f79814e7dfd1a7b3fd891
Author: Ankit Kumar Tiwari <141545455+ankit-cybertron at users.noreply.github.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-add-constant-fold.ll
Log Message:
-----------
[SelectionDAG] Fold VECREDUCE_ADD of a constant BUILD_VECTOR (#207560)
This PR implements constant folding for ISD::VECREDUCE_ADD when the
input is a BUILD_VECTOR of integer constants. The fold computes the sum
at compile time using APInt arithmetic and returns a folded constant
scalar, instead of emitting real vector materialization and reduction
instructions for a value that's already known.
Folding is skipped if any element is undef or opaque, since the result
can't be assumed at compile time in that case.
Fixes #206743
Commit: 047b145c0cfe2ebcf73694f0ab39a0fc11dc9d09
https://github.com/llvm/llvm-project/commit/047b145c0cfe2ebcf73694f0ab39a0fc11dc9d09
Author: hulxv <hulxxv at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/shared/builtins.h
A libc/shared/builtins/mulsf3.h
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/mulsf3.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
Log Message:
-----------
[libc] add shared mulsf3 builtin (#205678)
Re-exposes LLVM-libc's `__mulsf3` as `shared::mulsf3` for reuse by
compiler-rt's builtins.
Stacked change - merge these first:
- #200094
- #205669
- #205670
- #205671
- #205672
- #205673
- #205674
- #205675
- #205676
- #205677
Part of #197824
Commit: 2f7a3a032cb0ff5347135c59914733fc04b20d35
https://github.com/llvm/llvm-project/commit/2f7a3a032cb0ff5347135c59914733fc04b20d35
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
Log Message:
-----------
[SPIR-V] Fix crash on direct aggregate return of an intrinsic call result (#206491)
Commit: 012523d96b30a9a6d7148825fe307919a9c4753c
https://github.com/llvm/llvm-project/commit/012523d96b30a9a6d7148825fe307919a9c4753c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
Log Message:
-----------
[VPlan] Support VPInstruction for intrinsic calls in live-in folding. (#207836)
Use getIntrinsicID in getOpcodeOrIntrinsicID. This enables constant
folding for VPInstructions calling intrinsics.
PR: https://github.com/llvm/llvm-project/pull/207836
Commit: 3a6d3f77960b4dded18d15e28eaa3f953be18faa
https://github.com/llvm/llvm-project/commit/3a6d3f77960b4dded18d15e28eaa3f953be18faa
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add arithmetic fence intrinsic op (#207975)
Add a generated LLVM dialect op for llvm.arithmetic.fence, including
LLVM IR import and export coverage for scalar and vector floating-point
forms.
Assisted-by: Codex
Commit: 43ccdbc84774da0ae4cb5131f2245a9633d977b9
https://github.com/llvm/llvm-project/commit/43ccdbc84774da0ae4cb5131f2245a9633d977b9
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/FirToSCF/do-loop.fir
Log Message:
-----------
[FIRToSCF] propagate acc.par_dims during fir.do_loop conversion (#207973)
Copy any OpenACC parallel dimensions from the fir.do_loop to the scf op
Commit: 35db7fd565138b4756193b36750f052e27359baf
https://github.com/llvm/llvm-project/commit/35db7fd565138b4756193b36750f052e27359baf
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Stop adding implicit def of superreg in copyPhysReg (#125255)
Previously when copyPhysReg expanded a COPY into multiple MOV
instructions it added an implicit def of the destination superreg to the
first MOV. Removing these does not cause any liveness verification
problems and still passes Vulkan CTS for correctness testing.
Commit: 863be135eb5261fc85007492a5f26de926802a81
https://github.com/llvm/llvm-project/commit/863be135eb5261fc85007492a5f26de926802a81
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/stdio/printf_core/float_hex_converter.h
Log Message:
-----------
[libc] Fix build failure with ASSUME_ROUND_NEAREST_ONLY (#207991)
Commit 03c62ca40d19ba0 moved some local variables of
`convert_float_hex_exp` into a struct called `properties`, but didn't
edit the #ifdef branch for `LIBC_MATH_HAS_ASSUME_ROUND_NEAREST_ONLY`, so
builds with that definition failed.
Commit: 5ee85101a70dd2628d5b65a6a8a1e5d697d6c757
https://github.com/llvm/llvm-project/commit/5ee85101a70dd2628d5b65a6a8a1e5d697d6c757
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP][NFC]Add tests with mul to shl transformations, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208020
Commit: 31fc40b0904861d33b926dfd6ea04432e7690c49
https://github.com/llvm/llvm-project/commit/31fc40b0904861d33b926dfd6ea04432e7690c49
Author: Benjamin Luke <benjamin.luke at sony.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/X86/mmx-inline-asm-error.c
A clang/test/CodeGen/target-avx-abi-diag-knr.c
M clang/test/CodeGen/target-builtin-error-3.c
M clang/test/CodeGen/target-features-error-2.c
A clang/test/CodeGenCXX/target-avx-abi-diag.cpp
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[clang][X86] Emit AVX level mismatch psABI warnings on function definitions (#199091)
Emit -WpsABI for x86_64 function definitions whose return type or
parameter type uses a vector wider than 128 bits without the required
ABI feature enabled. 256-bit vectors require avx, and 512-bit vectors
require avx512f.
Previously this diagnostic was only emitted at call sites, so
definitions with wide vector signatures could be introduced without a
warning until they were called. Use the function feature map so
attribute(target("avx/avx512f")) definitions are accepted, and emit no
warnings for prototype-only declarations.
Commit: e702ecb84930e1d7d8ed1869c713566de2262a63
https://github.com/llvm/llvm-project/commit/e702ecb84930e1d7d8ed1869c713566de2262a63
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
Revert "[SLP][NFC]Add tests with mul to shl transformations, NFC"
This reverts commit 5ee85101a70dd2628d5b65a6a8a1e5d697d6c757, incorrect
checks in the test
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208022
Commit: e390e6b7a64353c72dbe1ff3f4bd3382412daca5
https://github.com/llvm/llvm-project/commit/e390e6b7a64353c72dbe1ff3f4bd3382412daca5
Author: sohail <sohailraj.satapathy at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/docs/headers/stdfix.rst
R libc/src/stdfix/bitusk.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/IdivFxTest.h
R libc/test/src/stdfix/IdivTest.h
M libc/test/src/stdfix/idivk_test.cpp
M libc/test/src/stdfix/idivlk_test.cpp
M libc/test/src/stdfix/idivlr_test.cpp
M libc/test/src/stdfix/idivr_test.cpp
M libc/test/src/stdfix/idivuk_test.cpp
M libc/test/src/stdfix/idivulk_test.cpp
M libc/test/src/stdfix/idivulr_test.cpp
M libc/test/src/stdfix/idivur_test.cpp
Log Message:
-----------
[libc][stdfix] Fix idiv* doc table, rename idivfx test helpers and remove duplicate bitsuk source (#206729)
Two small cleanups in libc/src/stdfix.
1. `idiv*` in `stdfix.rst` was marked as implemented for all 12 type
variants but only the 8 non-short width variants (ur, r, ulr, lr, uk, k,
ulk, lk) exist in the directory and are built. Updated the table to
match.
2. Removed `bitusk.cpp` which is an orphaned duplicate of `bitsuk.cpp`
with a typo in the file name. It isn't referenced in the CMakeLists.txt
and has no corresponding .h file.
3. Rename the idivfx test header and helpers.
Commit: c1822d6104d7b2cb2093a5273d6ceccd9ebb2fb1
https://github.com/llvm/llvm-project/commit/c1822d6104d7b2cb2093a5273d6ceccd9ebb2fb1
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Sema/SemaCXXScopeSpec.cpp
Log Message:
-----------
[clang][Sema][NFC] Improve readability in `computeDeclContext` (#208010)
Split off from #190495.
Co-authored-by: Matheus Izvekov <mizvekov at gmail.com>
Commit: 93ff6992c68766a1def33a8a074f9bce544fc102
https://github.com/llvm/llvm-project/commit/93ff6992c68766a1def33a8a074f9bce544fc102
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP][NFC]Add tests with mul to shl transformations, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208027
Commit: cde011852d0b7d08c820f7d623655e5f354a50c8
https://github.com/llvm/llvm-project/commit/cde011852d0b7d08c820f7d623655e5f354a50c8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
Log Message:
-----------
[SLP] Drop nsw when mul by INT_MIN is converted to shl
mul nsw X, INT_MIN is valid, but shl X, BW-1 is not nsw-safe. Drop nsw on
the vector shl when a mul lane with INT_MIN is unified into shl during
opcode interchange.
Fixes #207990
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208028
Commit: 94a8d4cbf13810e9f4fee03488312dee8869c074
https://github.com/llvm/llvm-project/commit/94a8d4cbf13810e9f4fee03488312dee8869c074
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
Log Message:
-----------
[AMDGPU] Clear DS aggregate in inverted sched_barrier mask when LDSDMA allowed (#207779)
The DS clause was missing the LDSDMA check that the VMEM clause has
Commit: 6053d19eb3bc2391fcab76eb20a8ea0462568224
https://github.com/llvm/llvm-project/commit/6053d19eb3bc2391fcab76eb20a8ea0462568224
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-ordered-values-update.ll
Log Message:
-----------
[SLP] Retune look-ahead scores for constants
Rescale LookAheadHeuristics scores and add ScoreSameConstants /
ScoreConstantScaleFactor so identical constants no longer score the
same as same-opcode instruction matches, fixing suboptimal operand
reordering around repeated constants (shift amounts, splat values).
Also retry a SplitVectorize alt-shuffle build for copyable-element
bundles when scheduling fails, instead of always falling back to a
gather, to fix regressions.
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/207548
Commit: a00f7be392d9468779af59d86bed12d17aa578c0
https://github.com/llvm/llvm-project/commit/a00f7be392d9468779af59d86bed12d17aa578c0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
Log Message:
-----------
[SLP]Use poor-throughput instructions as vectorization seeds
Seed vectorization from expensive poor-throughput ops (fdiv/frem/fsqrt
and target-expensive calls) even when they do not feed a store or reduction.
Compile time effect https://llvm-compile-time-tracker.com/compare.php?from=8cdf6346f46c505928a9fb9d3ef9e8ce125a2108&to=27a3f0a5c0489c91bf386e480289fdcc9dc9c8b7&stat=instructions:u
These compile time regressions are the side effects of the vectorization
vectorization gains and cannot be reduced further (note Bullet).
Fixes #38780
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/206518
Commit: 29f1a71a8d3f12232ccd53bca2442e35396a11a3
https://github.com/llvm/llvm-project/commit/29f1a71a8d3f12232ccd53bca2442e35396a11a3
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M openmp/runtime/src/kmp_dispatch.h
Log Message:
-----------
[OpenMP] Remove internal linkage from __kmp_wait template (NFC) (#207983)
__kmp_wait in kmp_dispatch.h is a static function template in a header,
so any TU that includes it without instantiating it trips
-Wunused-template (kmp_runtime.cpp, kmp_affinity.cpp, kmp_global.cpp,
kmp_settings.cpp). It is used by kmp_dispatch.cpp and
kmp_dispatch_hier.h. Drop static, which the comment above it already
suggests.
Part of #202945
Commit: 72e1037c32e22759b682a0e973af6b95b0630a01
https://github.com/llvm/llvm-project/commit/72e1037c32e22759b682a0e973af6b95b0630a01
Author: AnthonyCalandraGeotab <anthonycalandra at geotab.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/include/__configuration/attributes.h
M libcxx/include/__mutex/lock_guard.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/mutex
M libcxx/include/shared_mutex
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.pass.cpp
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.verify.cpp
Log Message:
-----------
[libc++][ThreadSafety] Add thread safety annotations for variadic std::scoped_lock (#204462)
The thread safety annotations on std::scoped_lock were previously only
applied to the empty and single-mutex specializations. The general
variadic specialization carried no annotations, so -Wthread-safety
considered none of the mutexes held inside a multi-mutex scoped_lock
block and reported the guarded data accessed there as unprotected.
Now that Clang supports pack expansion inside thread safety attributes
(landed for Clang 21), annotate the variadic scoped_lock with
acquire_capability/requires_capability on its constructors,
release_capability on its destructor, and scoped_lockable on the class.
Fixes #42000.
Co-authored-by: Anthony Calandra <anthony at anthony-calandra.com>
Commit: e4e2a9346b60e3805b63cec888f6de022db5b271
https://github.com/llvm/llvm-project/commit/e4e2a9346b60e3805b63cec888f6de022db5b271
Author: Jacob Crawley <jacob.crawley at arm.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/CodeGen/AArch64/sve-interleave-low-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-access-low-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
Log Message:
-----------
[AArch64][LV] Cost low-VF interleaved access (#205844)
Adds a case to getInterleavedMemoryOpCost to cost scalable interleaved
memory accesses where the interleave factor is larger than the VF.
Previously for these cases, memory operations would be costed as
individual gathers and scatters, which may result in the LoopVectorizer
choosing a wider VF than necessary.
This changes proposes an alternative approach of using a contiguous
load/store of the interleaved vector followed by shuffles to get
the elements into place.
Commit: 1045d1ebca559d7e6dee49b002142e52bb61b49e
https://github.com/llvm/llvm-project/commit/1045d1ebca559d7e6dee49b002142e52bb61b49e
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/include/__ranges/zip_view.h
M libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.zip/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range_adaptor_types.h
Log Message:
-----------
[libc++][ranges] Applied `[[nodiscard]]` to `zip_view` (#207667)
`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.
- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.zip
Towards #172124
Commit: 3046fb3de4b067179bcb8f933942aafea2c0d46f
https://github.com/llvm/llvm-project/commit/3046fb3de4b067179bcb8f933942aafea2c0d46f
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A offload/test/Inputs/declare-target-common-block-sub.f90
A offload/test/offloading/fortran/declare-target-common-block-2.f90
A offload/test/offloading/fortran/declare-target-common-block-main.f90
Log Message:
-----------
[Flang][OpenMP][Offload] Add Flang offload tests for common block and declare target (#202949)
This PR adds a couple of tests revolving around the usage of common
block with declare target in Fortran OpenMP.
Commit: 3b3f6b56dba47ce53afa6340b27355a94a483e8c
https://github.com/llvm/llvm-project/commit/3b3f6b56dba47ce53afa6340b27355a94a483e8c
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
Log Message:
-----------
[AMDGPU] SIFoldOperands: Print instructions/operands in debug output (NFC) (#207945)
Print instructions/operands instead of their addresses in debug output.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: da9377fad1764dd7f654676aba1fef49205ccc6d
https://github.com/llvm/llvm-project/commit/da9377fad1764dd7f654676aba1fef49205ccc6d
Author: UebelAndre <github at uebelandre.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Sort bazel_deps into 'compat floor' and 'latest' sections (#207605)
Some dependencies have big knock-on effects and to the benefit of
consumers should best be tracked as min-supported-version. This change
divides the `MODULE.bazel` file into two sections where one contains
known sensitive dependencies that should only be bumped as needed and
the second are flex dependencies that can freely be updated with minimal
impact to external consumers.
Commit: 2bb0c2d1e86c6bd008c3dc23040fb9081289deff
https://github.com/llvm/llvm-project/commit/2bb0c2d1e86c6bd008c3dc23040fb9081289deff
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Use SmallVector for tracking operands instead of DenseMap (#208034)
This is just tracking registers by operand index, which doesn't
need a heavy map.
Commit: 301060211315e9eadb39e17872c2b9d696d72fd6
https://github.com/llvm/llvm-project/commit/301060211315e9eadb39e17872c2b9d696d72fd6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Fix querying TargetInstrInfo from PPCInstrInfo (#208030)
Commit: 3a9778bbf2d78d95bd1d330390187922c6956c78
https://github.com/llvm/llvm-project/commit/3a9778bbf2d78d95bd1d330390187922c6956c78
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/bindings/python/get-python-config.py
Log Message:
-----------
Revert "[lldb] Change Python site-packages path" (#207910)
Reverts llvm/llvm-project#207771.
`/usr/lib/pythonN.M/site-packages` is a standard path that everyone uses
to install python modules on posix systems. There is no such thing as
`/usr/lib/site-packages`. This change breaks lldb packaging for Linux
distros.
Commit: 17e8068444b58be6935b05200961c984e52989cb
https://github.com/llvm/llvm-project/commit/17e8068444b58be6935b05200961c984e52989cb
Author: Ivo Popov <popov.ivo at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ASTContext.cpp
A clang/test/Modules/modules-using-enum-class-scope.cppm
Log Message:
-----------
[clang][Modules] Support ODR merging of `UsingEnumDecl` (#207071)
Fixes https://github.com/llvm/llvm-project/issues/207066.
`UsingEnumDecl` (representing C++20 `using enum` declarations)
was not handled in `ASTContext::isSameEntity`.
Consequently, identical class definitions containing
a `using enum` statement failed to merge, resulting in spurious ODR
mismatch errors such as: `error: 'MyStruct::MyEnum' from module
'ModuleB' is not present in definition of 'MyStruct' in module
'ModuleA'`.
This patch implements merging support for `UsingEnumDecl` in
`ASTContext::isSameEntity` by comparing the nested-name-specifier
qualifiers and the underlying `EnumDecl` target.
---------
Co-authored-by: ipopov <ipopov at google.com>
Commit: 87a5682c92f69c87704487670d49db4ca65db21c
https://github.com/llvm/llvm-project/commit/87a5682c92f69c87704487670d49db4ca65db21c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
Log Message:
-----------
[SLP][NFC]Update test checks, add some more tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208048
Commit: 221cd6295224c93bed2bdfcc113eba5b64325c06
https://github.com/llvm/llvm-project/commit/221cd6295224c93bed2bdfcc113eba5b64325c06
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
A llvm/test/CodeGen/WebAssembly/f128-minmax.ll
Log Message:
-----------
[WebAssembly] support `f{min, max}imum.f128` and `f{min, max}imumnum.f128` (#207160)
fixes https://github.com/llvm/llvm-project/issues/207100
As far as I can see `wasi-libc` does not currently export the dedicated
libcalls, so I went with a custom expansion. It emits more code, but
will work without any linker errors etc.
The `long double` type is actually `f128` for webassembly, so at least
the libcalls should work.
Commit: 24688c6a67dc5293c2e75ca9ec991dd0c2a23e59
https://github.com/llvm/llvm-project/commit/24688c6a67dc5293c2e75ca9ec991dd0c2a23e59
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Log Message:
-----------
PPC: Fix querying TargetRegisterInfo in PPCInstrInfo (#208031)
Use the direct PPCRegisterInfo member
Commit: 9e22a5950e51ace7f50729d7f556ca99d06fa8bb
https://github.com/llvm/llvm-project/commit/9e22a5950e51ace7f50729d7f556ca99d06fa8bb
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
M llvm/test/Transforms/GVN/invariant-load-intrinsic.ll
M llvm/test/Transforms/InstCombine/invariant-load-like-sink.ll
M llvm/test/Transforms/Sink/invariant-load.ll
A llvm/test/Verifier/invariant-load-metadata-invalid.ll
Log Message:
-----------
[llvm] Support invariant.load on readonly intrinsics (#205916)
Update passes and analyses that look at invariant.load (ex. MemorySSA)
to also consider the possibility that `!invariant.load` may be present
on intrinsic calls.
Updates the verifier to indicate that `!invariant.load` is only legal
for loads and readonly intrinsics (and moves the definition of the
metadata out of the definition of `load`).
This has not been extended to arbitrary function calls since it's less
clear what the semantics of !invariant.load on them would be.
Furthermore, extension to read/write intrinsics like memcpy() is planned
as a followup.
This PR also deletes tests that were pre-committed in
https://github.com/llvm/llvm-project/pull/205894 but that become invalid
with the verifier changes in this PR
AI disclosure: I've reviewed the code but all the actual generation was
done by AI.
---------
Co-authored-by: Codex <codex at openai.com>
Commit: dda9dc50945006189f5fabe08a165640c289f0e7
https://github.com/llvm/llvm-project/commit/dda9dc50945006189f5fabe08a165640c289f0e7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++] Use a median-of-3 for the A/B comparison benchmarking job (#208023)
After a bit of testing, I think this provides a good tradeoff between
resource utilization and noise reduction. Furthermore, the comparison
script (which produces the output) will be augmented to surface the
variability of the results in a separate PR.
Commit: 0fba09ca6c856f7ec043689c62198166a0b0321e
https://github.com/llvm/llvm-project/commit/0fba09ca6c856f7ec043689c62198166a0b0321e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
Log Message:
-----------
[SLP][NFC]Add an extra test with ashr vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208057
Commit: 100a1fb9d628dc9969ca8f7aef774f61e168f9e9
https://github.com/llvm/llvm-project/commit/100a1fb9d628dc9969ca8f7aef774f61e168f9e9
Author: Chi-Chun, Chen <chichun.chen at hpe.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-dsa.h
M flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering (#207826)
Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA
into the public openmp-dsa header next to GetSymbolDSA, and share the
DSA flag set through a single GetDataSharingAttributeFlags().
This lets an upcoming metadirective lowering change reuse the helper to
set the predetermined DSA of the loop induction variables of a selected
variant. A loop-associated variant is resolved during lowering, so the
usual semantic DSA resolution never runs on its loop nest and lowering
must set those flags itself.
Assisted with Copilot.
Commit: 5da6b3c590792a069c40d8982c8b0fb3557f241a
https://github.com/llvm/llvm-project/commit/5da6b3c590792a069c40d8982c8b0fb3557f241a
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] DynamicRegisterInfo::Dump should take a Stream argument (#207863)
Otherwise, it creates its own Stream dumping to stdout.
Commit: 29495e193f67cb88704f97bae906c21464148c7d
https://github.com/llvm/llvm-project/commit/29495e193f67cb88704f97bae906c21464148c7d
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
A .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx-run-benchmarks.yml
Log Message:
-----------
[libc++][NFC] Rename workflow file for libc++ A/B performance comparisons (#208070)
I want to introduce another workflow that allows running benchmarks on
historical commits of libc++ for LNT submission, so having an
unambiguous name is desirable.
Commit: 6d1566cecf40143012674376f5c9250316c29634
https://github.com/llvm/llvm-project/commit/6d1566cecf40143012674376f5c9250316c29634
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Revert "[clang] Reland: fix getTemplateInstantiationArgs" (#208064)
Reverts llvm/llvm-project#207825 since it's causing a crash in Clang.
Commit: 585f04f2bf11c84367641f62a5e280a0241a71de
https://github.com/llvm/llvm-project/commit/585f04f2bf11c84367641f62a5e280a0241a71de
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Support/CrashRecoveryContext.cpp
Log Message:
-----------
[Support] Add missing include for MacOS defines (#208065)
https://github.com/llvm/llvm-project/pull/142733 removed several
includes, including
llvm/Support/ProgramStack.h. This was indirectly including headers that
defined
PRIO_DARWIN_THREAD and PRIO_DARWIN_BG.
Add back sys/resource.h to define them locally.
Commit: d8f56af5fecb3d431efa801b80a87a6547638fd8
https://github.com/llvm/llvm-project/commit/d8f56af5fecb3d431efa801b80a87a6547638fd8
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
Log Message:
-----------
[lldb] Support MS style `struct`/`class` in C++ name parser (#196525)
If a type is declared as a `class` or a `struct` is part of the mangled
name in the Microsoft ABI. This is also reflected in the demangled name.
There, it shows up before the qualified name. For example, you could
have `class ns1::ns2::MyClass`. It will show up like this in return
types and function/template arguments.
This adds a check in `CPlusPlusNameParser::ParseFullNameImpl` for these
cases.
Commit: c098e41b8de197330454afd5ce8cf05ee8e57b39
https://github.com/llvm/llvm-project/commit/c098e41b8de197330454afd5ce8cf05ee8e57b39
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[VPlan] Use StepVector without operands, VPBuilder in C++ tests (NFC) (#208075)
Update unit tests construction VScale for VPInstructions without
operands to use StepVector where possible. When VScale is needed,
construct with VPBuilder. Also update constructing other recipes in same
function to use VPBuilder, for consistency.
Split off from approved https://github.com/llvm/llvm-project/pull/207541
Commit: eba2fde4d5409ae861587552ddc8c6837de2ad82
https://github.com/llvm/llvm-project/commit/eba2fde4d5409ae861587552ddc8c6837de2ad82
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M llvm/docs/LFI.rst
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Triple.cpp
A llvm/test/CodeGen/X86/lfi-sibcall.ll
A llvm/test/MC/X86/LFI/abi-note.s
A llvm/test/MC/X86/LFI/syscall.s
A llvm/test/MC/X86/LFI/thread-pointer-errors.s
A llvm/test/MC/X86/LFI/thread-pointer.s
Log Message:
-----------
Reland: [LFI][X86] Add X86 LFI target and system instruction rewrites (#207892)
Reintroduction of #189569 using the MCRegisterClass accessor API, which
was recently modified and caused a build error when the previous PR
was merged since it was not rebased onto the latest commit.
Commit: 9a1f5b76b4af5c99f4c60456abcc95f5640b35df
https://github.com/llvm/llvm-project/commit/9a1f5b76b4af5c99f4c60456abcc95f5640b35df
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/unittests/Optimizer/CMakeLists.txt
A flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsType.h
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsType.cpp
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
Log Message:
-----------
[mlir][acc][flang] Add type sizing utilities (#208074)
Add a general acc utility for computing the size and alignment of a
type. It works for simple scalar types as well as nested and aggregate
types like arrays, tuples, and structures.
Because some types come from other dialects, the utility can hand those
off to a specialized helper that understands them. This lets sizing work
seamlessly even for mixed types, such as an aggregate whose members come
from a different dialect.
Add a Fortran-specific helper so Fortran types are sized correctly,
falling back to the general utility for everything else.
Include unit tests covering a range of scenarios, including scalars,
arrays, aggregates, and mixed-dialect types.
Commit: 9ff1d7a21e6d23088eb5dac38f95edd4329c50b7
https://github.com/llvm/llvm-project/commit/9ff1d7a21e6d23088eb5dac38f95edd4329c50b7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
R llvm/test/Transforms/SampleProfile/icp_target_feature.ll
Log Message:
-----------
Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208079)
Reverts llvm/llvm-project#192142
Now that https://github.com/llvm/llvm-project/pull/205113 has landed, we
will not inline functions with incompatible target features, even if the
callee is marked `alwaysinline`, so we can promote calls to such
functions while also removing the extra complexity from ICP.
Commit: 6d34e50b88ecce3d5e9ef7e0ed0b54e8f9818019
https://github.com/llvm/llvm-project/commit/6d34e50b88ecce3d5e9ef7e0ed0b54e8f9818019
Author: Alex Langford <alangford at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Utility/FileSpec.cpp
M lldb/source/Utility/FileSpecList.cpp
Log Message:
-----------
[lldb] Remove uses of ConstString in FileSpec methods (#206851)
After this, FileSpec only uses ConstString for storage. In a subsequent
commit, I will change FileSpec's storage.
Commit: ee745070b05e2474ea27f2268b5e7d52be933c4e
https://github.com/llvm/llvm-project/commit/ee745070b05e2474ea27f2268b5e7d52be933c4e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
Log Message:
-----------
[lldb] Give Wasm stack frames a synthetic call frame address (#208061)
UnwindWasm reported a call frame address of zero for every Wasm frame.
StackID orders frames by their CFA, assuming the stack grows downward so
that a younger frame compares below its caller. With every CFA equal to
zero that ordering collapsed, and CompareCurrentFrameToStartFrame
treated a step into a function as a step out, which silently disabled
step-in avoid-regexp and confused other thread plans.
WebAssembly keeps its call stack inside the engine and exposes no
linear-memory frame address, so synthesize a CFA from each frame's
distance to the outermost frame. That distance is invariant as frames
are pushed and popped above it, so a given frame keeps a stable, ordered
CFA across steps.
Commit: c7d45caea0faba51223feb08e2224bf845724b17
https://github.com/llvm/llvm-project/commit/c7d45caea0faba51223feb08e2224bf845724b17
Author: Adam Nemet <anemet at apple.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/unaligned_load_store_no_aeabi.ll
M llvm/utils/UpdateTestChecks/asm.py
Log Message:
-----------
[ARM] Don't try to emit AEABI libcalls for non-AEABI targets (#207813)
PR #172672 added ARMTargetLowering::LowerAEABIUnalignedLoad/Store which
lowers some of the unaligned i32/i64 stores to
__aeabi_u{read,write}{4,8}. The libcall is emitted unconditionally, with
no check whether the target environment actually has these AEABI
helpers.
We don't have it for Apple/MachO which leads to a compiler crash.
rdar://175136625
Commit: 8fbf94a21b69770091c73381be24fff43e89d93e
https://github.com/llvm/llvm-project/commit/8fbf94a21b69770091c73381be24fff43e89d93e
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/Lex/LiteralSupport.cpp
Log Message:
-----------
Silence a signed/unsigned mismatch diagnostic; NFC (#208088)
Commit: d2888890b513e757916e8e20c06146d2b9b6b4a0
https://github.com/llvm/llvm-project/commit/d2888890b513e757916e8e20c06146d2b9b6b4a0
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
Log Message:
-----------
Update AMD DWARF ext doc headers to only have a single title-level header (#208103)
This ensures no leakage of individual headings on the page to the global
TOC, see https://github.com/llvm/llvm-project/pull/184440
Commit: 4c93275445c698b4290ef48f98f256adf2a90f39
https://github.com/llvm/llvm-project/commit/4c93275445c698b4290ef48f98f256adf2a90f39
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libc/src/__support/CPP/string.h
M libc/test/src/__support/CPP/string_test.cpp
Log Message:
-----------
[libc][cpp::string] Fix off-by-one bug in resize and a memory leak (#208077)
AFAICT, `cpp::string` is only used in tests, so these bugs were mostly
inconsequential.
Commit: 448b57d52e77950e0cfc9d81fb0e65f7143c27d1
https://github.com/llvm/llvm-project/commit/448b57d52e77950e0cfc9d81fb0e65f7143c27d1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-trunc.ll
Log Message:
-----------
[X86] vector-trunc.ll - regenerate checks to add missing ADD constant pool comments (#207827)
Commit: 73867dce09789f8de6d38edcfa8101f2ae2138e4
https://github.com/llvm/llvm-project/commit/73867dce09789f8de6d38edcfa8101f2ae2138e4
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/Driver/Action.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
A clang/test/Driver/arm64x.c
M clang/test/Driver/msvc-link.c
Log Message:
-----------
[clang][ARM64X] Support compiling both native and EC objects with -marm64x (#207612)
When -marm64x is used during the assembly phase, construct jobs for both
native and EC targets and merge their outputs using llvm-objcopy.
Allow passing ArchName to computeTargetTriple on non-Darwin targets to
enable BindArchAction on other platforms. Additionally, allow passing
multiple inputs to ObjcopyJobAction and use this capability to construct
ARM64X merge jobs.
Commit: 8b93782d2da3d651a1774f96acf747c5b2181cd4
https://github.com/llvm/llvm-project/commit/8b93782d2da3d651a1774f96acf747c5b2181cd4
Author: Anshul Nigham <nigham at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
Log Message:
-----------
Add explicit anchors to deep headers for AMD DWARF ext doc (#208110)
Anchors get auto-generated only upto level 6, and
https://github.com/llvm/llvm-project/pull/208103 added another level,
causing sphinx to complain about no targets for these anchors.
Commit: 39dcb0ff91b312bb269334168d5e32be78b60417
https://github.com/llvm/llvm-project/commit/39dcb0ff91b312bb269334168d5e32be78b60417
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGen/lto-newpm-pipeline.c
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M lld/test/ELF/lto/devirt_vcall_vis_shared_def.ll
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Bitcode/BitcodeReader.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/Passes/PassBuilder.h
A llvm/include/llvm/Transforms/Utils/AssignGUID.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/IPO/ConstantMerge.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
A llvm/lib/Transforms/Utils/AssignGUID.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
R llvm/test/Analysis/CtxProfAnalysis/flatten-prethinlink-requires-guid-metadata.ll
M llvm/test/Assembler/index-value-order.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-partial-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph.ll
M llvm/test/Bitcode/thinlto-function-summary-refgraph.ll
M llvm/test/Bitcode/thinlto-function-summary.ll
M llvm/test/CodeGen/X86/fat-lto-section.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-weak-aliasee.ll
M llvm/test/Linker/funcimport2.ll
M llvm/test/Other/new-pm-O0-defaults.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/ThinLTO/AArch64/aarch64_inline.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions1.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions2.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions3.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias2.ll
M llvm/test/ThinLTO/X86/deadstrip.ll
M llvm/test/ThinLTO/X86/devirt_function_alias.ll
M llvm/test/ThinLTO/X86/devirt_function_alias2.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/distributed_import.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-exported-internal.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-unknown.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-weak.ll
M llvm/test/ThinLTO/X86/globals-import.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols-alt.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols.ll
M llvm/test/ThinLTO/X86/import-ro-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/ThinLTO/X86/linkonce_resolution_comdat.ll
M llvm/test/ThinLTO/X86/memprof-dups.ll
M llvm/test/ThinLTO/X86/memprof_callee_type_mismatch.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal2.ll
M llvm/test/ThinLTO/X86/prevailing_weak_globals_import.ll
M llvm/test/ThinLTO/X86/visibility-elf.ll
M llvm/test/ThinLTO/X86/visibility-macho.ll
M llvm/test/ThinLTO/X86/weak_resolution.ll
M llvm/test/ThinLTO/X86/windows-vftable.ll
M llvm/test/ThinLTO/X86/writeonly.ll
A llvm/test/Transforms/AssignGUID/assign_guid.ll
M llvm/test/Transforms/ConstantMerge/merge-dbg.ll
M llvm/test/Transforms/EmbedBitcode/embed-wpd.ll
M llvm/test/Transforms/EmbedBitcode/embed.ll
M llvm/test/Transforms/FunctionImport/funcimport-debug-retained-nodes.ll
M llvm/test/Transforms/FunctionImport/funcimport.ll
A llvm/test/Transforms/GlobalMerge/guid.ll
M llvm/test/Transforms/LowerTypeTests/cfi-icall-alias.ll
M llvm/test/Transforms/LowerTypeTests/export-icall.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal-typeid.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal1.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/unsplittable.ll
M llvm/test/Transforms/WholeProgramDevirt/branch-funnel-profile.ll
M llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll
M llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-interposable.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_shared_def.ll
M llvm/test/tools/gold/X86/thinlto_weak_library.ll
M llvm/test/tools/gold/X86/thinlto_weak_resolution.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
Reland "Compute GUIDs once and store in metadata" (#184065) (#201849)
This reverts #201194, thus relanding @orodley's PR #184065 (and
#200323):
> This allows us to keep GUIDs consistent across compilation phases
which may change the name or linkage type.
> See
https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801
The CFI issues that triggered the original revert are fixed by #201370,
together with the addressing of the TODOs in `LowerTypeTests.cpp` left
in the latter. The [graphite
diff](https://app.graphite.com/github/pr/llvm/llvm-project/201849/Reland-%23184065)
between this change's V1 and V2 shows what's been added:
- the `TODO`s from #201370 are done
- in LowerTypeTests.cpp, passing `!guid` when creating a new declaration
and when converting a definition to a declaration.
- `llvm/test/Transforms/LowerTypeTests/export-icall.ll` tests also the
above def->decl conversion
- removed
`test/Analysis/CtxProfAnalysis/flatten-prethinlink-requires-guid-metadata.ll`
introduced in #194383 (this was between the revert and this PR), as now
the general expectation is that GUID assignment happens appropriately
and all passes use `getGUID`, so there's no reason for `CtxProfAnalysis`
to do something different.
Currently, we reassign GUIDs when CFI promotes internal linkage symbols,
which is counter to the goal of the RFC. This is addressed in PR
#203171. The reason for this split fix can be explained on
`compiler-rt/test/cfi/icall/wrong-signature-mixed-lto.c`. Here, a module
with the exact same source path is compiled twice, under different
conditional compilation, to produce 2 objects. Each object defines an
internal linkage symbol with the same name (this is
`install_trap_loop_detection` from
`compiler-rt/test/cfi/trap_loop_signal_handler.inc` which is
`-include`\-d by both - see how `%clang_cfi` is defined). The ThinLTO
GUID of this symbol will be the same. Its name won't be - because CFI
promotes it and renames it using a hash that is based on the IR Module
content (rather than the source path). During thinlink,
`LTO::addThinLTO`will mark each of the 2 exported symbols as prevailing
in their corresponding modules. But that is done by associating their
GUID to the module. So whichever comes last wins. The other symbol will
be marked available externally and its body DCEd later in backend. But
each module will refer to its copy of `install_trap_loop_detection`, and
so we end up with a linker error.
As mentioned, the fix is in PR #203171, and this relanding PR just
maintains the existing ThinLTO behavior by rewriting the GUIDs. Since we
haven't yet leveraged the GUID mechanics for e.g. simplifying PGO, this
aspect of this change is essentially NFC.
Co-authored-by: Owen Rodley <orodley at google.com>
Commit: 2a8e0e1abbdc558f3a4b43d5a9432c07b5d01387
https://github.com/llvm/llvm-project/commit/2a8e0e1abbdc558f3a4b43d5a9432c07b5d01387
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
Log Message:
-----------
[SLP][NFC]Add tests with some preferred reassociation, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/208118
Commit: cc27a240be812f854801c24aefbea1243c5efde8
https://github.com/llvm/llvm-project/commit/cc27a240be812f854801c24aefbea1243c5efde8
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Policy.h
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/Policy.cpp
M lldb/unittests/Utility/PolicyTest.cpp
Log Message:
-----------
[lldb] Push ExpressionEvaluation policy and remove identity check fallbacks (#195775)
Push `PolicyStack::Get().PushPublicStateRunningExpression()` at all
three expression evaluation entry points
(`LLVMUserExpression::DoExecute`, `FunctionCaller::ExecuteFunction`,
`IRInterpreter`). This policy sets `can_run_breakpoint_actions=false`,
preventing recursive breakpoint callback execution during expression
eval.
Push `PolicyStack::Get().PushPrivateState()` unconditionally for all
PSTs in `RunPrivateStateThread` (not just overrides), giving every PST
the private view while keeping frame providers and recognizers enabled
for normal stop processing. Override PSTs use
`PushPrivateStateRunningExpression()` which additionally disables
providers and recognizers.
With all PSTs and expression eval sites now covered by the policy,
remove all host thread identity check fallbacks:
- `CurrentThreadPosesAsPrivateStateThread()` in `Process::GetState()`
- `CurrentThreadIsPrivateStateThread()` in `Target::GetAPIMutex()`
- `IsOnThread()` in `PrivateStateThread::GetRunLock()`
- `CurrentThreadPosesAsPrivateStateThread()` in
`SelectMostRelevantFrame()`
- `IsRunningExpression()` in `StopInfoBreakpoint::PerformAction()`
`SelectMostRelevantFrame` now checks `!can_run_frame_recognizers`
instead of `View::Private`, so recognizers run during normal PST stop
processing but are skipped during expression evaluation.
----
The following PRs are related to the Policy feature:
- #195762
- #195771
- #198897
- #195774
- #195775
rdar://176223894
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: d1ad52f0ca135b972f352b38fbc813404efb91ac
https://github.com/llvm/llvm-project/commit/d1ad52f0ca135b972f352b38fbc813404efb91ac
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M flang/include/flang/Common/constexpr-bitset.h
M flang/include/flang/Common/idioms.h
M flang/include/flang/Decimal/binary-floating-point.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/intrinsics.h
M flang/include/flang/Evaluate/rewrite.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Frontend/TextDiagnostic.h
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/ConvertExprToHLFIR.h
M flang/include/flang/Lower/ConvertType.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Lower/HostAssociations.h
M flang/include/flang/Lower/Mangler.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Builder/Todo.h
M flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/CodeGen/TypeConverter.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.h
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.h
M flang/include/flang/Optimizer/Dialect/SafeTempArrayCopyAttrInterface.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Parser/char-block.h
M flang/include/flang/Parser/char-buffer.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-state.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Parser/user-state.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/random.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Runtime/support.h
M flang/include/flang/Semantics/attr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/runtime-type-info.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/type.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Decimal/big-radix-floating-point.h
M flang/lib/Decimal/decimal-to-binary.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/variable.cpp
M flang/lib/Frontend/CodeGenOptions.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/lib/Optimizer/CodeGen/PassDetail.h
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/CodeGen/TBAABuilder.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/Dialect/CUF/Attributes/CUFAttr.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/PropagateFortranVariableAttributes.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCAttributes.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenMP/DeleteUnreachableTargets.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/OpenMP/Support/FIROpenMPAttributes.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/DataLayout.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/MemRefDataFlowOpt.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/OptimizeArrayRepacking.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/SimplifyRegionLite.cpp
M flang/lib/Optimizer/Transforms/StackReclaim.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Parser/basic-parsers.h
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/source.cpp
M flang/lib/Parser/token-parsers.h
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-data.h
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-if-stmt.cpp
M flang/lib/Semantics/check-nullify.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/check-stop.cpp
M flang/lib/Semantics/compute-offsets.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names-utils.h
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Support/LangOptions.cpp
M flang/lib/Support/Version.cpp
M flang/lib/Testing/fp-testing.cpp
Log Message:
-----------
[flang][NFC] Remove unnecessary #include directives across flang (#207640)
Audit of every #include directive in flang/lib/ and
flang/include/flang/:
- Remove 423 #include directives (293 from lib/ translation units, 23
from lib-private headers, 107 from public headers) that are not needed:
no entity declared by the removed header is used - directly or in any
conditional-compilation branch (Windows, macOS, ARM/PowerPC,
REAL(16)/REAL(2) configuration macros) - in the including file, and for
headers no consumer in flang/lib, flang/tools, flang/unittests, or
flang-rt relies on the include as a re-export. Load-bearing includes
were examined and retained: textual .inc/.def expansions, tablegen
pass-header declaration/definition pairings, dialect headers carrying
generated-op interface dependencies, config-macro providers (e.g.
float128.h ahead of matmul-instances.inc guards), and ADL formatting
machinery (Evaluate/formatting.h).
- Add 5 missing direct #includes in lib translation units that used
entities only via now-removed transitive includes, and drop one
vestigial 'using namespace Fortran::runtime;' whose declaring header no
longer arrives transitively (nothing namespace-qualified from it was
used), per the include rules in flang/docs/C++style.md.
Assisted-by: AI
Commit: aaeac36566967650fcd63797a10da065eaedd90f
https://github.com/llvm/llvm-project/commit/aaeac36566967650fcd63797a10da065eaedd90f
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/test/Fir/target-rewrite-arg-position.fir
Log Message:
-----------
[flang][TargetRewrite] Keep argument attributes consistent after ABI arg shift (#208124)
When target-rewrite expands an argument into several arguments
(for example splitting a complex value into two scalars),
the arguments after it shift to the right.
Argument attributes were only moved for a shift introduced
by result lowering, so an attribute on a later argument
(e.g. fir.host_assoc) could stay on its old index and end up
on an unrelated argument. Remap every saved argument
attribute to the new index of its argument.
This is a consistency fix and may not cause a miscompile today.
Commit: d6c0a0a6a5c762fd327001c177490ee4c49ca718
https://github.com/llvm/llvm-project/commit/d6c0a0a6a5c762fd327001c177490ee4c49ca718
Author: jinge90 <ge.jin at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
Log Message:
-----------
[libc][complex] Add basic complex ops including carg/cabs for GPU (#207887)
This PR adds carg and cabs for AMD GPU and also add all other basic
complex ops for NV GPU.
Signed-off-by: jinge90 <ge.jin at intel.com>
Commit: 478bbbeb0bdd7d186f308dccfa634280afaf0c00
https://github.com/llvm/llvm-project/commit/478bbbeb0bdd7d186f308dccfa634280afaf0c00
Author: hev <wangrui at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
A llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch][NFC] Add vector widening extends tests (#207315)
Commit: e60dc90e3134975afb1a951f792b71d4b648877f
https://github.com/llvm/llvm-project/commit/e60dc90e3134975afb1a951f792b71d4b648877f
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
Log Message:
-----------
[Hexagon] Disable restore stubs when ShadowCallStack is active (#206302)
The returning restore stubs (e.g.
__restore_r16_through_r17_and_deallocframe) perform deallocframe+jumpr
r31 internally, returning via the on-stack return address. This is
incompatible with ShadowCallStack, which must restore r31 from the
shadow stack before returning.
Fix by having useRestoreFunction() return false when the ShadowCallStack
attribute is present, forcing inline callee-saved restores so the SCS
epilogue is properly emitted.
Commit: 4708581453ead90685a55e343cc5ace1e1ddabb1
https://github.com/llvm/llvm-project/commit/4708581453ead90685a55e343cc5ace1e1ddabb1
Author: hev <wangrui at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
M llvm/test/CodeGen/LoongArch/lsx/vexth.ll
Log Message:
-----------
[LoongArch] Add DAG combines for vector widening extends (#207316)
Lower:
```
SEXT/ZEXT(High-Half-128-Bit-Lanes(vec))
```
to:
```
LSX: VEXTH.H.B, VEXTH.W.H, VEXTH.D.W
VEXTH.HU.BU, VEXTH.WU.HU, VEXTH.DU.WU
LASX: XVEXTH.H.B, XVEXTH.W.H, XVEXTH.D.W
XVEXTH.HU.BU, XVEXTH.WU.HU, XVEXTH.DU.WU
```
Commit: 63122f54df24161899609449e92589f3db556bf4
https://github.com/llvm/llvm-project/commit/63122f54df24161899609449e92589f3db556bf4
Author: Jessica Clarke <jrtc27 at jrtc27.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[NFC][ELF] Don't reimplement addReloc in MipsGotSection::addConstant (#208130)
This is a repeat of d48eb719d240 ("[NFC][ELF] Don't reimplement addReloc
in GotSection::addConstant") but for MipsGotSection. Unfortunately,
9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)") was put up for review before, and was landed
after, that commit, and I did not think to update it, so it ended up
copying the old GotSection code. Although there's no motivation to
support CHERI in this code (even though CHERI-MIPS existed it never used
the highly-specialised MipsGotSection to hold capabilities), it's still
better to use our own abstractions, and to be consistent.
Fixes: 9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)")
Commit: 5a924bf3962c7f0c84e2de46172cd1d01ae3a67d
https://github.com/llvm/llvm-project/commit/5a924bf3962c7f0c84e2de46172cd1d01ae3a67d
Author: Orphic Dreamer <160723353+Siya-05 at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
A clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
A clang/test/CIR/CodeGenCUDA/surface.cu
Log Message:
-----------
[CIR][CUDA] Support built-in CUDA surface type (#196079)
Related: #179278
This patch adds initial support for CUDA built-in surface types in CIR
for device-side compilation.
CUDA surface references are lowered to the NVPTX device-handle
representation (`i64`), matching existing Clang CodeGen behavior.
Changes
* Add `getCUDADeviceBuiltinSurfaceDeviceType()` target hook to
`TargetCIRGenInfo`
* Implement NVPTX surface lowering in `NVPTXTargetCIRGenInfo`
* Handle CUDA built-in surface types in `CIRGenTypes::convertType`
* Add CIR CUDA test coverage for device-side surface lowering
Notes
* This patch only implements device-side surface type lowering support
* Texture types remain unsupported
* TBAA handling for surface/texture types is left for follow-up work
---------
Co-authored-by: mencotton <mencotton0410 at gmail.com>
Co-authored-by: David Rivera <davidriverg at gmail.com>
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
Commit: 1cefbacdaa0156880d8363b24ae04638a8fd31c8
https://github.com/llvm/llvm-project/commit/1cefbacdaa0156880d8363b24ae04638a8fd31c8
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
[libc++] Replace the of use custom sections for detecting overriden functions (#175896)
This is a follow up to #133876 and an alternative to #120805 which
doesn't rely on aliases and works across both ELF and Mach-O. This
mechanism is preferable in baremetal environments since it doesn't
require special handling of the custom sections.
Commit: 333edde4e80e02d6fe5e866abf317969b66c0b8e
https://github.com/llvm/llvm-project/commit/333edde4e80e02d6fe5e866abf317969b66c0b8e
Author: yonghong-song <yhs at fb.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M clang/lib/CodeGen/Targets/BPF.cpp
A clang/test/CodeGen/bpf-struct-return-regs.c
A clang/test/CodeGen/bpf-struct-return.c
A llvm/test/CodeGen/BPF/aggr_ret_regs.ll
Log Message:
-----------
[BPF] Return small aggregates directly in registers (#206876)
Previously the BPF ABI always returned aggregate (struct/union) types
indirectly through an sret pointer, regardless of size. This is
inconsistent with how classifyArgumentType() already passes small
aggregates: arguments up to 128 bits are coerced into one or two 64-bit
registers, while only larger aggregates use an indirect reference.
Make classifyReturnType() mirror that convention by factoring the shared
aggregate handling into a classifyAggregateType() helper used by both:
- empty aggregates (0 bits) are ignored;
- aggregates up to 64 bits are returned directly, coerced to an integer
of the padded size;
- aggregates of 65..128 bits are returned directly as [2 x i64];
- aggregates larger than 128 bits are returned indirectly via sret.
This keeps each returned value within the backend's two-register return
convention and avoids an unnecessary memory round-trip for small
structs.
This also aligns BPF with the general-purpose C ABIs of other targets:
both x86-64 (System V, RAX:RDX) and AArch64 (AAPCS64, X0:X1) return
aggregates up to 16 bytes in a pair of registers and only fall back to
an indirect sret pointer for larger ones.
Co-authored-by: Yonghong Song <yonghong.song at linux.dev>
Commit: 2b080317511d3285c7376e25ee9668edcc41c06e
https://github.com/llvm/llvm-project/commit/2b080317511d3285c7376e25ee9668edcc41c06e
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-07-07 (Tue, 07 Jul 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Analysis/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port 9a1f5b76b4 (#208126)
Commit: 6eb35326147077a18f6fc56540059d779d7e3d4b
https://github.com/llvm/llvm-project/commit/6eb35326147077a18f6fc56540059d779d7e3d4b
Author: Shreeyash Pandey <shrpand at qti.qualcomm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libunwind/test/aarch64_za_unwind.pass.cpp
Log Message:
-----------
[libunwind] include alloca.h in test/aarch64_za_unwind.pass.cpp (#207376)
Glibc provides the alloca function as a part of stdlib.h when
_GNU_SOURCE is declared (which is the case with standard linux builds).
[1]
On non-glibc systems, this may not be the case (for example, picolibc).
These libraries may not implicitly include alloca.h as a part of the
standard lib.
[1]
https://github.com/bminor/glibc/blob/04e750e75b73957cf1c791535a3f4319534a52fc/stdlib/stdlib.h#L728
Signed-off-by: Shreeyash Pandey <shrpand at qti.qualcomm.com>
Commit: 7ca17050c766ff1a1bd4bc74525f018ba1d9a104
https://github.com/llvm/llvm-project/commit/7ca17050c766ff1a1bd4bc74525f018ba1d9a104
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/test/CodeGenCoroutines/coro-elide.cpp
M clang/test/CodeGenCoroutines/coro-halo.cpp
M clang/test/CodeGenCoroutines/pr65018.cpp
Log Message:
-----------
[CodeGen] Set attributes on coroutine wrapper functions (#207961)
Call SetInternalFunctionAttributes() so that target feature attributes
get set. This ensures that inlining works without having to reason about
target-specific inline compatibility logic.
Commit: e6525149c347a4787dd82ce5d2663bc577afd4a3
https://github.com/llvm/llvm-project/commit/e6525149c347a4787dd82ce5d2663bc577afd4a3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/special-member-functions-implicit-delete.cpp
Log Message:
-----------
[clang-tidy] Fix AllowImplicitlyDeletedCopyOrMove missing-move false positive (#207586)
The documentation for `cppcoreguidelines-special-member-functions` says
that `AllowImplicitlyDeletedCopyOrMove` suppresses diagnostics for
classes which implicitly delete copy or move operations.
In practice, the move operations are missing because the user-declared
destructor prevents their implicit declaration. This commit suppresses
that missing-move diagnostic when both copy operations are implicitly
deleted and no move operation is user-declared.
Godbolt: https://clang-tidy.godbolt.org/z/h1nT84Tee
Closes https://github.com/llvm/llvm-project/issues/196615
Commit: 70df3ccef10d336d3644df293fddb2adcb36e097
https://github.com/llvm/llvm-project/commit/70df3ccef10d336d3644df293fddb2adcb36e097
Author: Petr Hosek <phosek at google.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/src/include/overridable_function.h
Log Message:
-----------
Revert "[libc++] Replace the of use custom sections for detecting overriden functions" (#208157)
Reverts llvm/llvm-project#175896 since it broke the build of internal
symbolizer used by sanitizers.
Commit: e7195d5d23adf9336555e7244e2fcf397111c57e
https://github.com/llvm/llvm-project/commit/e7195d5d23adf9336555e7244e2fcf397111c57e
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/debug-record-after-phi.ll
Log Message:
-----------
[LoopInterchange] Fix crash when dbg_value exists right after PHI (#208147)
When enabling reduction2mem with `-loop-interchange-reduction-to-mem`
and the input IR contains `dbg_value`s immediately after a certain PHI
node, assertion failure could be triggered due to the insertion position
of newly created PHI node. This patch fixes the issue by changing
IRBuilder ctor to be called. TBH, I'm not entirely sure what the
difference is between `IRBuilder::IRBuilder(Instruction *)` and
`IRBuilder::IRBuilder(BasicBlock *, BasicBlock::iterator)`, but judging
from the generated code, the behavior with this patch seems reasonable.
Taken over from #183273
Commit: c279890c85da307abe34f10333442bbf72a60644
https://github.com/llvm/llvm-project/commit/c279890c85da307abe34f10333442bbf72a60644
Author: Haibo Jiang <jianghaibo9 at huawei.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/icp-inline.c
A bolt/test/AArch64/icp.c
M bolt/test/AArch64/unsupported-passes.test
Log Message:
-----------
[BOLT][AArch64] Support call ICP (#208158)
* extends MCPlusBuilder with comparision between registers.
* updates the ICP pass to request a scavenged register for AArch64
callsites.
* wires ICP code generation on AArch64.
Commit: 475f7026055c77007d19c708ed13465a4206dfee
https://github.com/llvm/llvm-project/commit/475f7026055c77007d19c708ed13465a4206dfee
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
Log Message:
-----------
[Clang] No longer reject call expression whose type is a not-yet-deduced auto type. (#208007)
This fixes a regression introduced in #139246
Fixes #207565
Commit: 62907d4a3bb330f79f41f548bfa836223c12735e
https://github.com/llvm/llvm-project/commit/62907d4a3bb330f79f41f548bfa836223c12735e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/test-issue-98598.ll
Log Message:
-----------
[PowerPC] Fix combineSignExtendSetCC() for large/small types (#207721)
The code should reject larger types (like i128) and zero-extend smaller
types (like i8 and i16). Consolidate the handling based on being
smaller/larger than OpVT to reduce the number of PPC64 conditions.
Commit: 35678db1b4dbf7e14ad5238eee5590bf32aebb87
https://github.com/llvm/llvm-project/commit/35678db1b4dbf7e14ad5238eee5590bf32aebb87
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[Clang][RISCV] packed absolute difference sum intrinsics (#207936)
Add the __riscv_pabdsumu/pabdsumau_* header wrappers over new
__builtin_riscv_* builtins, lowering to the
llvm.riscv.pabdsumu/pabdsumau intrinsics.
Commit: ea6d5c6a2e37705688c74167990115e535058065
https://github.com/llvm/llvm-project/commit/ea6d5c6a2e37705688c74167990115e535058065
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix blocking pass for scf.if distribution (#207060)
Commit: b5ed0ae6bc70792cb9749444b2803c3fa72276e4
https://github.com/llvm/llvm-project/commit/b5ed0ae6bc70792cb9749444b2803c3fa72276e4
Author: Javed Absar <javed.absar at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationEnums.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
A mlir/include/mlir/Dialect/Bufferization/Transforms/StaticMemoryPlanning.h
M mlir/lib/Dialect/Bufferization/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
A mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlanning.cpp
A mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-best-fit.mlir
Log Message:
-----------
[mlir][bufferization] Add best-fit algorithm to static memory planner (#207403)
Introduces an algorithm selection option to the static memory planner
pass and adds a best-fit algorithm that reuses memory from expired allocations by
finding the smallest suitable gap.
I have tested the correctness of the best-fit algorithm with an
independent randomized verifier.
Signed-off-by: mabsar <mabsar at qti.qualcomm.com>
Commit: f02b48182be73c531fb83312da15c85031fadde3
https://github.com/llvm/llvm-project/commit/f02b48182be73c531fb83312da15c85031fadde3
Author: Krisitan Erik Olsen <kristian.erik at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Analysis/AssumptionCache.cpp
A llvm/test/Transforms/DropUnnecessaryAssumes/duplicate-affected-value.ll
Log Message:
-----------
[AssumptionCache] Deduplicate affected values in removeAffectedValues (#205441)
removeAffectedValues can encounter duplicate entries in the Affected
list when a separate_storage bundle uses the same pointer for both
arguments (e.g. "separate_storage"(ptr %p, ptr %p)). The duplicate
entries share both the same value and the same bundle index. The first
iteration handles the value completely and may erase the AffectedValues
entry, causing the second iteration to fail the assertion.
This patch deduplicates entries in removeAffectedValues by (Value *,
Index) pair, matching the deduplication already done in
updateAffectedValues. This also fixes the ExpectedMatches counting in
the debug logic added by #205275, which otherwise miscounts when
duplicates are present.
Fixes #205378.
Commit: 063ac503e44ff17dda84698375091fa5b8b53557
https://github.com/llvm/llvm-project/commit/063ac503e44ff17dda84698375091fa5b8b53557
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
A llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
Log Message:
-----------
[LoongArch] Lower ANY_EXTEND to ZERO_EXTEND under LASX to avoid scalarization (#201099)
Some integer/floating-point conversion will generate ANY_EXTEND under
LASX, lowering it to ZERO_EXTEND to avoid scalarization.
Commit: 459cadfaf12cde6b1fda2fde932b277f1630c124
https://github.com/llvm/llvm-project/commit/459cadfaf12cde6b1fda2fde932b277f1630c124
Author: Emmett <emmettzhang2020 at outlook.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__chrono/duration.h
M libcxx/include/chrono
A libcxx/test/std/time/time.duration/duration.verify.cpp
Log Message:
-----------
[libc++][chrono] Implement LWG 4481: Disallow `chrono::duration<const T, P>` (#207558)
Commit: 006423944b8efdb115d8fd001cffca888605cd7f
https://github.com/llvm/llvm-project/commit/006423944b8efdb115d8fd001cffca888605cd7f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/ArithToSPIRV/fast-math.mlir
Log Message:
-----------
[mlir][SPIR-V] Lower arith.maxnumf/minnumf to spirv.GL.NMax/NMin (#205975)
The previous lowering targeted spirv.GL.FMax/FMin + NaN guards
spirv.GL.NMax/NMin natively treat NaN as missing, matching
arith.maxnumf/minnumf exactly (no guards required)
Commit: 1d387731334d04f677804a09f29e0863ca977e0c
https://github.com/llvm/llvm-project/commit/1d387731334d04f677804a09f29e0863ca977e0c
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-vscale-x-UF-step.ll
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
Log Message:
-----------
[LV] Allow setting scalable VFs for `-epilogue-vectorization-force-VF` (#205081)
Follow up to #204953. This allows replacing a unit test with an IR test.
Commit: 736771b6a017b5a18c03819a3348ff793c473261
https://github.com/llvm/llvm-project/commit/736771b6a017b5a18c03819a3348ff793c473261
Author: Chirag Patel <chirag198838 at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
Log Message:
-----------
[DAG] Adding MVT::widenIntegerElementType to widen both Scalar and Vectors of integer type. (#207148)
Adding MVT::widenIntegerElementType to widen both Scalar and Vectors of
integer type. e.g. i16 -> i32, v8i32->v8i64.
fixes #206730
Commit: e1187834d342ae7890884dbc1ef69de7b5d9fdc1
https://github.com/llvm/llvm-project/commit/e1187834d342ae7890884dbc1ef69de7b5d9fdc1
Author: zip-stack-debug <doremyalt at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/div-i256.ll
M llvm/test/CodeGen/AArch64/sbc-add-constant.ll
Log Message:
-----------
[AArch64][DAG] Port adde and sube combine to AArch64 (#202227)
Same principles apply in AArch64 as they do in ARM.
Commit: 529c7d563bac018b8ea43ea8017c113ee384c004
https://github.com/llvm/llvm-project/commit/529c7d563bac018b8ea43ea8017c113ee384c004
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/IR/PassManagerInternal.h
Log Message:
-----------
[IR][NFC] Make PassConcept immovable (#208167)
PassConcept is only ever created as a unique_ptr when added to the pass
list of a pass manager. The instances are never copied or moved. Due to
inheritance, this also wouldn't work anyway. Explicitly forbid
copying/moving and remove the dead functions.
Preliminary work for removing the vtable from PassConcept/PassModel.
Commit: 32d06af3ea6d05c0f8b5820da3f651d4e03bb80d
https://github.com/llvm/llvm-project/commit/32d06af3ea6d05c0f8b5820da3f651d4e03bb80d
Author: David Green <david.green at arm.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/test/CodeGen/Thumb2/vqabs.ll
M llvm/test/CodeGen/Thumb2/vqneg.ll
Log Message:
-----------
[ARM][MVE] Tests for new sqabs and sqneg tests. NFC (#208180)
Commit: 3451dd23d9b098e8cf7201ab303874dab2d88c19
https://github.com/llvm/llvm-project/commit/3451dd23d9b098e8cf7201ab303874dab2d88c19
Author: Ricardo Jesus <rjj at nvidia.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v1i1-setcc.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
Log Message:
-----------
[AArch64] Fold any/sign-extend of CSET. (#207414)
This is useful to enable selecting i64 CSETM when legalisation places an
extend between a CSET and sext_inreg.
Commit: 302f7aa18e0d68d9db74c2586bd66ef8e4d98e53
https://github.com/llvm/llvm-project/commit/302f7aa18e0d68d9db74c2586bd66ef8e4d98e53
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops-i1.ll
Log Message:
-----------
[VectorCombine] Fold concat(binop(a,c), binop(b,d)) -> binop(concat(a,b), concat(c,d)) for i1 vectors (#206087)
Fixes #205707
`VectorCombine::foldShuffleOfBinops` rewrites `shuffle(binop(a,c),
binop(b,d))` into `binop(shuffle(a,b), shuffle(c,d))` but only when the
new form is strictly cheaper. For concat shuffles of i1 vectors, both
forms have equal cost, so the transform was silently rejected.
This fix allows the equal-cost transform when both binops are single-use
`BinaryOperators` (not icmps, to avoid widening narrow AVX-512
comparisons), canonicalising the IR to a wider binop.
The motivating case is AVX-512 mask operations: `NOT(concat(XOR(a,c),
XOR(b,d)))` becomes `NOT(XOR(concat(a,b), concat(c,d)))`, which the
backend naturally selects as `kxnorq`, reducing `kxord + kxord +
kunpckdq + knotq` (4 instructions) to `kunpckdq + kunpckdq + kxnorq` (3
instructions).
Commit: 764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
https://github.com/llvm/llvm-project/commit/764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-shuffle-fma.ll
M llvm/test/CodeGen/X86/vector-narrow-binop.ll
M llvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
Log Message:
-----------
[SDAG][X86] Support shrinking target-independent nodes (#206721)
X86 generally tries to shrink operations to work on smaller vector sizes
if possible. This happens in
SimplifyDemandedVectorEltsForTargetNode() for target-specific opcodes,
but it's currently not possible to do this for generic opcodes.
This introduces a getPreferredShrunkVectorSize() TLI hook to allow
shrinking generic ops based on demanded elements.
The primary motivation for this is to avoid regressions due to
https://github.com/llvm/llvm-project/pull/188489, which uplifts a
previously x86-specific node to become target-independent.
This PR enables the shrinking for fsub and fmul as examples.
Unfortunately, for many other ops we get various regressions, mostly
because horizontal operations are no longer formed.
Commit: 3fc15b50c6e5b79332023fe7ccacb35b2ed5614e
https://github.com/llvm/llvm-project/commit/3fc15b50c6e5b79332023fe7ccacb35b2ed5614e
Author: Sean Clarke <sclarke at tenstorrent.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
Log Message:
-----------
[HashRecognize] Make `LHSAux` null if it is dead (#207231)
HashRecognize detects big-endian CRC loops with auxiliary data where the
bitwidth of `LHS` exceeds that of `LHSAux`. However, in this case,
`LHSAux` is zero-extended for the most significant bit check in each
iteration, and as such is effectively dead. Later optimization may even
miscompile in this case: for example, in the included
`crc16.be.tc8.zext.data` and `crc16.be.tc8.misalign` test cases,
`optimizeCRCLoop` emits `lshr i8 %crc.data.indexer, 8`, thereby creating
poison.
Since `LHSAux` is dead in this case, the user should receive a null
`LHSAux` instead.
Commit: 475cef62595255a34b795472bba330a60058abb0
https://github.com/llvm/llvm-project/commit/475cef62595255a34b795472bba330a60058abb0
Author: Keshav Vinayak Jha <31160700+keshavvinayak01 at users.noreply.github.com>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
Log Message:
-----------
[SelectionDAG][AMDGPU] Preserve known bits for demoted sret pointers (#203468)
AMDGPU marks sret pointers with high-zero known bits so stores can be
folded into MUBUF base+offset addressing. Explicit sret arguments keep
this information through an AssertZext, but implicit sret lowering
passes the hidden return pointer through `DemoteRegister` as a
`CopyToReg/CopyFromReg` pair, where the fact is not visible to
SelectionDAG known-bits queries.
Add a `TargetLowering` hook for sret pointer known bits and use a shared
helper to materialize those bits as an `AssertZext` for both explicit
and demoted sret pointers.
Validated with llvm-test-depends, the AMDGPU function-returns test, and
the full llvm/test/CodeGen suite.
Assisted-by: Codex
---------
Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
Commit: 5f8b4666e7e265c95541c2b4695ded00753c19f8
https://github.com/llvm/llvm-project/commit/5f8b4666e7e265c95541c2b4695ded00753c19f8
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-07-08 (Wed, 08 Jul 2026)
Changed paths:
A .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx-run-benchmarks.yml
M bolt/include/bolt/Core/MCPlusBuilder.h
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Target/X86/X86MCPlusBuilder.cpp
A bolt/test/AArch64/icp-inline.c
A bolt/test/AArch64/icp.c
M bolt/test/AArch64/unsupported-passes.test
M clang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/misc/ThrowByValueCatchByReferenceCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/command-processor.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/float-loop-counter.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/std-namespace-modification.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/throwing-static-initialization.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-string-to-number-conversion.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/dcl58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/env33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err52-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err58-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/fio38-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/flp30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/new-delete-overloads.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/non-copyable-objects.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-setjmp-longjmp.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-variadic-functions.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/copy-constructor-mutates-argument.cpp
A clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/special-member-functions-implicit-delete.cpp
M clang/docs/LibASTMatchersReference.html
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/BuiltinsX86_64.td
M clang/include/clang/Basic/IdentifierTable.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CMakeLists.txt
M clang/lib/CIR/CodeGen/TargetInfo.cpp
M clang/lib/CIR/CodeGen/TargetInfo.h
A clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/BPF.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Headers/CMakeLists.txt
R clang/lib/Headers/amxtf32intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaCXXScopeSpec.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/cxx2a.cpp
M clang/test/AST/ByteCode/typeid.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/C/C23/n3007.c
A clang/test/CIR/CodeGenCUDA/surface.cu
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/dcl.decl/dcl.init/dcl.init.general/p16-cxx20.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg7xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
R clang/test/CodeGen/X86/amx_tf32.c
R clang/test/CodeGen/X86/amx_tf32_api.c
R clang/test/CodeGen/X86/amx_tf32_errors.c
R clang/test/CodeGen/X86/amx_tf32_inline_asm.c
M clang/test/CodeGen/X86/mmx-inline-asm-error.c
A clang/test/CodeGen/bpf-struct-return-regs.c
A clang/test/CodeGen/bpf-struct-return.c
A clang/test/CodeGen/builtin-cpu-is-cputype.c
A clang/test/CodeGen/builtin-cpu-is-subtype.c
A clang/test/CodeGen/builtin-cpu-is-vendor.c
R clang/test/CodeGen/builtin-cpu-is.c
A clang/test/CodeGen/builtin-cpu-supports-all.c
M clang/test/CodeGen/cfi-icall-trap-recover-runtime.c
M clang/test/CodeGen/lto-newpm-pipeline.c
A clang/test/CodeGen/target-avx-abi-diag-knr.c
M clang/test/CodeGen/target-builtin-error-3.c
M clang/test/CodeGen/target-features-error-2.c
M clang/test/CodeGen/win64-i128.c
M clang/test/CodeGenCXX/cfi-vcall-trap-recover-runtime.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
A clang/test/CodeGenCXX/target-avx-abi-diag.cpp
M clang/test/CodeGenCoroutines/coro-elide.cpp
M clang/test/CodeGenCoroutines/coro-halo.cpp
M clang/test/CodeGenCoroutines/pr65018.cpp
A clang/test/Driver/arm64x.c
M clang/test/Driver/hexagon-toolchain-picolibc.c
M clang/test/Driver/msvc-link.c
M clang/test/Driver/x86-target-features.c
A clang/test/Modules/modules-using-enum-class-scope.cppm
A clang/test/PCH/dllexport-ctor-closure-copy.cpp
M clang/test/Parser/c2x-auto.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/x86_target_features.c
M clang/test/SemaCXX/GH195416.cpp
M clang/test/SemaCXX/constant-expression-cxx14.cpp
M clang/test/SemaCXX/constant-expression-cxx2a.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaCXX/member-class-11.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/fun-template-def.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/AST/StmtPrinterTest.cpp
M clang/unittests/AST/TypePrinterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M compiler-rt/lib/builtins/cpu_model/x86.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/lib/runtime/CMakeLists.txt
M flang/include/flang/Common/constexpr-bitset.h
M flang/include/flang/Common/idioms.h
M flang/include/flang/Decimal/binary-floating-point.h
M flang/include/flang/Evaluate/expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/include/flang/Evaluate/fold.h
M flang/include/flang/Evaluate/intrinsics.h
M flang/include/flang/Evaluate/rewrite.h
M flang/include/flang/Evaluate/shape.h
M flang/include/flang/Evaluate/traverse.h
M flang/include/flang/Evaluate/type.h
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Frontend/TextDiagnostic.h
M flang/include/flang/Lower/Allocatable.h
M flang/include/flang/Lower/CUDA.h
M flang/include/flang/Lower/CallInterface.h
M flang/include/flang/Lower/ConvertExprToHLFIR.h
M flang/include/flang/Lower/ConvertType.h
M flang/include/flang/Lower/DirectivesCommon.h
M flang/include/flang/Lower/HostAssociations.h
M flang/include/flang/Lower/Mangler.h
M flang/include/flang/Lower/OpenMP.h
M flang/include/flang/Lower/Runtime.h
M flang/include/flang/Lower/Support/Utils.h
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Optimizer/Builder/DirectivesCommon.h
M flang/include/flang/Optimizer/Builder/Factory.h
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/include/flang/Optimizer/Builder/MIFCommon.h
M flang/include/flang/Optimizer/Builder/Runtime/Character.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Optimizer/Builder/Todo.h
M flang/include/flang/Optimizer/CodeGen/CodeGenOpenMP.h
M flang/include/flang/Optimizer/CodeGen/TypeConverter.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.h
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.h
M flang/include/flang/Optimizer/Dialect/SafeTempArrayCopyAttrInterface.h
M flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
M flang/include/flang/Optimizer/Transforms/CUFGPUToLLVMConversion.h
M flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
M flang/include/flang/Optimizer/Transforms/MIFOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Parser/char-block.h
M flang/include/flang/Parser/char-buffer.h
M flang/include/flang/Parser/openmp-utils.h
M flang/include/flang/Parser/parse-state.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Parser/token-sequence.h
M flang/include/flang/Parser/unparse.h
M flang/include/flang/Parser/user-state.h
M flang/include/flang/Runtime/CUDA/common.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/array-constructor-consts.h
M flang/include/flang/Runtime/random.h
M flang/include/flang/Runtime/reduce.h
M flang/include/flang/Runtime/reduction.h
M flang/include/flang/Runtime/support.h
M flang/include/flang/Semantics/attr.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/openmp-dsa.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/runtime-type-info.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/type.h
M flang/include/flang/Semantics/unparse-with-symbols.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Decimal/big-radix-floating-point.h
M flang/lib/Decimal/decimal-to-binary.cpp
M flang/lib/Evaluate/expression.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/host.h
M flang/lib/Evaluate/intrinsics-library.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/real.cpp
M flang/lib/Evaluate/variable.cpp
M flang/lib/Frontend/CodeGenOptions.cpp
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendAction.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M flang/lib/Lower/Allocatable.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/CallInterface.cpp
M flang/lib/Lower/ConvertArrayConstructor.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/CustomIntrinsicCall.cpp
M flang/lib/Lower/HostAssociations.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Atomic.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/Decomposer.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Lower/Runtime.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Lower/VectorSubscripts.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Builder/MIFCommon.cpp
M flang/lib/Optimizer/Builder/Runtime/Character.cpp
M flang/lib/Optimizer/Builder/Runtime/Derived.cpp
M flang/lib/Optimizer/Builder/Runtime/Intrinsics.cpp
M flang/lib/Optimizer/Builder/Runtime/Main.cpp
M flang/lib/Optimizer/CodeGen/BoxedProcedure.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/CodeGen/FIROpPatterns.cpp
M flang/lib/Optimizer/CodeGen/PassDetail.h
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/CodeGen/TBAABuilder.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/Dialect/CUF/Attributes/CUFAttr.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
M flang/lib/Optimizer/HLFIR/IR/HLFIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIRIntrinsics.cpp
M flang/lib/Optimizer/HLFIR/Transforms/LowerHLFIROrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
M flang/lib/Optimizer/HLFIR/Transforms/PropagateFortranVariableAttributes.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
M flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
M flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
M flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCAttributes.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
M flang/lib/Optimizer/OpenMP/DeleteUnreachableTargets.cpp
M flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
M flang/lib/Optimizer/OpenMP/LowerWorkshare.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/OpenMP/Support/FIROpenMPAttributes.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/DataLayout.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/AffineDemotion.cpp
M flang/lib/Optimizer/Transforms/AffinePromotion.cpp
M flang/lib/Optimizer/Transforms/AssumedRankOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFComputeSharedMemoryOffsetsAndSize.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFLaunchAttachAttr.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/ConvertComplexPow.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.h
M flang/lib/Optimizer/Transforms/ExternalNameConversion.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/lib/Optimizer/Transforms/GenRuntimeCallsForTest.cpp
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
M flang/lib/Optimizer/Transforms/LoopVersioning.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Optimizer/Transforms/MemRefDataFlowOpt.cpp
M flang/lib/Optimizer/Transforms/MemoryAllocation.cpp
M flang/lib/Optimizer/Transforms/MemoryUtils.cpp
M flang/lib/Optimizer/Transforms/OptimizeArrayRepacking.cpp
M flang/lib/Optimizer/Transforms/PolymorphicOpConversion.cpp
M flang/lib/Optimizer/Transforms/SetRuntimeCallAttributes.cpp
M flang/lib/Optimizer/Transforms/SimplifyIntrinsics.cpp
M flang/lib/Optimizer/Transforms/SimplifyRegionLite.cpp
M flang/lib/Optimizer/Transforms/StackReclaim.cpp
M flang/lib/Optimizer/Transforms/VScaleAttr.cpp
M flang/lib/Parser/basic-parsers.h
M flang/lib/Parser/executable-parsers.cpp
M flang/lib/Parser/expr-parsers.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/openmp-utils.cpp
M flang/lib/Parser/parse-tree.cpp
M flang/lib/Parser/preprocessor.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Parser/source.cpp
M flang/lib/Parser/token-parsers.h
M flang/lib/Semantics/assignment.cpp
M flang/lib/Semantics/canonicalize-omp.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-case.cpp
M flang/lib/Semantics/check-data.cpp
M flang/lib/Semantics/check-data.h
M flang/lib/Semantics/check-deallocate.cpp
M flang/lib/Semantics/check-do-forall.cpp
M flang/lib/Semantics/check-if-stmt.cpp
M flang/lib/Semantics/check-nullify.cpp
M flang/lib/Semantics/check-select-rank.cpp
M flang/lib/Semantics/check-select-type.cpp
M flang/lib/Semantics/check-stop.cpp
M flang/lib/Semantics/compute-offsets.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/openmp-dsa.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-labels.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names-utils.h
M flang/lib/Semantics/runtime-type-info.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Support/LangOptions.cpp
M flang/lib/Support/Version.cpp
M flang/lib/Testing/fp-testing.cpp
M flang/test/Fir/FirToSCF/do-loop.fir
M flang/test/Fir/target-rewrite-arg-position.fir
M flang/unittests/Optimizer/CMakeLists.txt
A flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/headers/stdfix.rst
M libc/hdr/CMakeLists.txt
A libc/hdr/inet-address-macros.h
A libc/hdr/net_if_macros.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_ifreq.h
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
M libc/include/elf.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/net-if-macros.h
A libc/include/llvm-libc-macros/net-if-macros.h
M libc/include/llvm-libc-macros/sys-auxv-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_ifreq.h
A libc/include/net/if.yaml
M libc/shared/builtins.h
A libc/shared/builtins/mulsf3.h
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/string.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/builtins/CMakeLists.txt
A libc/src/__support/builtins/mulsf3.h
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_ntop.cpp
A libc/src/arpa/inet/inet_ntop.h
A libc/src/net/CMakeLists.txt
A libc/src/net/if_indextoname.h
A libc/src/net/if_nametoindex.h
A libc/src/net/linux/CMakeLists.txt
A libc/src/net/linux/if_indextoname.cpp
A libc/src/net/linux/if_nametoindex.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
R libc/src/stdfix/bitusk.cpp
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_builtins_test.cpp
M libc/test/src/CMakeLists.txt
M libc/test/src/__support/CPP/string_test.cpp
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_ntop_test.cpp
A libc/test/src/net/CMakeLists.txt
A libc/test/src/net/linux/CMakeLists.txt
A libc/test/src/net/linux/if_indextoname_test.cpp
A libc/test/src/net/linux/if_nametoindex_test.cpp
M libc/test/src/stdfix/CMakeLists.txt
A libc/test/src/stdfix/IdivFxTest.h
R libc/test/src/stdfix/IdivTest.h
M libc/test/src/stdfix/idivk_test.cpp
M libc/test/src/stdfix/idivlk_test.cpp
M libc/test/src/stdfix/idivlr_test.cpp
M libc/test/src/stdfix/idivr_test.cpp
M libc/test/src/stdfix/idivuk_test.cpp
M libc/test/src/stdfix/idivulk_test.cpp
M libc/test/src/stdfix/idivulr_test.cpp
M libc/test/src/stdfix/idivur_test.cpp
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/docs/Status/Cxx26Issues.csv
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__configuration/attributes.h
M libcxx/include/__mutex/lock_guard.h
M libcxx/include/__mutex/mutex.h
M libcxx/include/__ranges/adjacent_transform_view.h
M libcxx/include/__ranges/join_view.h
M libcxx/include/__ranges/zip_view.h
M libcxx/include/chrono
M libcxx/include/mutex
M libcxx/include/shared_mutex
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.pass.cpp
A libcxx/test/extensions/clang/thread/thread.mutex/thread_safety_scoped_lock.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.adjacent.transform/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.join/nodiscard.verify.cpp
M libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.zip/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range_adaptor_types.h
A libcxx/test/std/time/time.duration/duration.verify.cpp
M libcxxabi/src/CMakeLists.txt
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/async_handler.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/src/detail/offload/offload_topology.cpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/queue.cpp
A libsycl/test/usm/memcpy.cpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/mock/mock.cpp
M libsycl/unittests/queue/CMakeLists.txt
A libsycl/unittests/queue/memcpy.cpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
M lld/test/ELF/lto/devirt_vcall_vis_public.ll
M lld/test/ELF/lto/devirt_vcall_vis_shared_def.ll
M lldb/bindings/python/get-python-config.py
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Policy.h
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/IRInterpreter.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Plugins/Architecture/CMakeLists.txt
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.cpp
A lldb/source/Plugins/Architecture/RISCV/ArchitectureRISCV.h
A lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
M lldb/source/Plugins/Process/Utility/LinuxSignals.cpp
M lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/source/Utility/FileSpecList.cpp
M lldb/source/Utility/Policy.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_args.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_cwd.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_debuggerRoot.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_disableSTDIO.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_array.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_environment_with_object.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_extra_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_failing_launch_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_launch_commands_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_invalid_program.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_disabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_shellExpandArguments_enabled.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_sourcePath.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stdio_redirection_and_console.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_stopOnEntry.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_version.py
M lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
A lldb/unittests/Architecture/CMakeLists.txt
A lldb/unittests/Architecture/RISCV/ArchitectureRISCVTest.cpp
A lldb/unittests/Architecture/RISCV/CMakeLists.txt
M lldb/unittests/CMakeLists.txt
M lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
M lldb/unittests/Utility/PolicyTest.cpp
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-dwarfdump.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.rst
M llvm/docs/PDB/MsfFile.rst
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Bitcode/BitcodeReader.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGenTypes/MachineValueType.h
M llvm/include/llvm/IR/GlobalObject.h
M llvm/include/llvm/IR/GlobalValue.h
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
A llvm/include/llvm/Transforms/Utils/AssignGUID.h
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Analysis/AssumptionCache.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/HashRecognize.cpp
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/MemorySSA.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Support/CrashRecoveryContext.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCKernelDescriptor.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMInstrThumb2.td
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonPatterns.td
M llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVMetadata.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp
M llvm/lib/Target/X86/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
A llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAMX.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86LowerAMXType.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86Subtarget.h
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/IPO/ConstantMerge.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/LoopDistribute.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Scalar/StraightLineStrengthReduce.cpp
A llvm/lib/Transforms/Utils/AssignGUID.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneModule.cpp
M llvm/lib/Transforms/Utils/FunctionImportUtils.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-overflow.ll
M llvm/test/Analysis/CostModel/AArch64/arith.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
M llvm/test/Analysis/CostModel/AArch64/mul.ll
M llvm/test/Analysis/CostModel/AArch64/rem.ll
R llvm/test/Analysis/CtxProfAnalysis/flatten-prethinlink-requires-guid-metadata.ll
M llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
M llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
M llvm/test/Assembler/index-value-order.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-partial-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph.ll
M llvm/test/Bitcode/thinlto-function-summary-refgraph.ll
M llvm/test/Bitcode/thinlto-function-summary.ll
M llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
M llvm/test/CodeGen/AArch64/GlobalISel/store-wro-addressing-modes.mir
M llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir
M llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
M llvm/test/CodeGen/AArch64/GlobalISel/vararg.mir
M llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir
M llvm/test/CodeGen/AArch64/GlobalISel/xro-addressing-mode-constant.mir
R llvm/test/CodeGen/AArch64/arm64-2013-02-12-shufv8i8.ll
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/arm64-neon-v1i1-setcc.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/bf16-shuffle.ll
M llvm/test/CodeGen/AArch64/build-vector-two-dup.ll
M llvm/test/CodeGen/AArch64/div-i256.ll
M llvm/test/CodeGen/AArch64/extract-vector-cmp.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/implicitly-set-zero-high-64-bits.ll
M llvm/test/CodeGen/AArch64/insert-subvector.ll
M llvm/test/CodeGen/AArch64/insertshuffleload.ll
M llvm/test/CodeGen/AArch64/neon-extracttruncate.ll
M llvm/test/CodeGen/AArch64/neon-shuffle-vector-tbl.ll
M llvm/test/CodeGen/AArch64/neon-wide-splat.ll
M llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll
M llvm/test/CodeGen/AArch64/sbc-add-constant.ll
M llvm/test/CodeGen/AArch64/shuffle-extend.ll
M llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
M llvm/test/CodeGen/AArch64/shuffles.ll
M llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll
A llvm/test/CodeGen/AArch64/sve-interleave-low-vf.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
A llvm/test/CodeGen/AArch64/sve2-mull-acc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
M llvm/test/CodeGen/AMDGPU/agpr-copy-sgpr-no-vgprs.mir
M llvm/test/CodeGen/AMDGPU/agpr-csr.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/andorn2.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/barrier-signal-wait-latency.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/copy-overlap-sgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir
M llvm/test/CodeGen/AMDGPU/copy-phys-reg-implicit-operand-kills-subregs.mir
M llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/ds_write2_a_v.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/function-returns.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8s.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/implicit-kernarg-backend-usage.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/issue130120-eliminate-frame-index.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel-argument-dag-lowering.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bpermute.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.exp.simple.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
M llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-av-none.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-global.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence-mmra-local.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-fence.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/memory_clause.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/no-folding-imm-to-inst-with-fi.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/or.ll
A llvm/test/CodeGen/AMDGPU/pack-half-to-lshl-or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/permute_i8.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vector-dynamic-idx-bitcasts-llc.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ptradd-sdag.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
M llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/smfmac_no_agprs.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-agpr.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
M llvm/test/CodeGen/AMDGPU/swdev380865.ll
M llvm/test/CodeGen/AMDGPU/tgsplit.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/trunc.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/atomic-ops-v8.ll
A llvm/test/CodeGen/ARM/cmn-shift.ll
M llvm/test/CodeGen/ARM/cmp-peephole.ll
M llvm/test/CodeGen/ARM/umulo-32.ll
A llvm/test/CodeGen/ARM/unaligned_load_store_no_aeabi.ll
A llvm/test/CodeGen/AVR/cmp-sgt-i128.ll
A llvm/test/CodeGen/BPF/aggr_ret_regs.ll
A llvm/test/CodeGen/Hexagon/sext-mul-splat-v2i16.ll
M llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
A llvm/test/CodeGen/LoongArch/get-rounding.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
A llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-any-ext.ll
M llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
A llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
A llvm/test/CodeGen/LoongArch/lsx/vexth.ll
M llvm/test/CodeGen/LoongArch/set-rounding.ll
M llvm/test/CodeGen/PowerPC/test-issue-98598.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvv/fold-binary-reduce.ll
A llvm/test/CodeGen/RISCV/rvv/vecreduce-add-constant-fold.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_eq.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ne.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_sge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_slt.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
A llvm/test/CodeGen/SPIRV/capability-Int64Atomics-weak-cmpxchg.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-call.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow-zeroinitializer.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-aggregate-with-overflow.ll
A llvm/test/CodeGen/SPIRV/instructions/select-freeze-aggregate-with-overflow.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
A llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
M llvm/test/CodeGen/Thumb2/vqabs.ll
M llvm/test/CodeGen/Thumb2/vqneg.ll
A llvm/test/CodeGen/WebAssembly/f128-minmax.ll
R llvm/test/CodeGen/X86/amx-tf32-internal.ll
R llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
A llvm/test/CodeGen/X86/apx/peephole-fold-subreg-tied-copy.mir
M llvm/test/CodeGen/X86/asm-modifier.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512fp16-combine-shuffle-fma.ll
M llvm/test/CodeGen/X86/fat-lto-section.ll
M llvm/test/CodeGen/X86/fp128-cast.ll
A llvm/test/CodeGen/X86/lfi-sibcall.ll
M llvm/test/CodeGen/X86/vector-narrow-binop.ll
M llvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-alias.ll
M llvm/test/LTO/Resolution/X86/not-prevailing-weak-aliasee.ll
M llvm/test/Linker/funcimport2.ll
M llvm/test/MC/AMDGPU/hsa-tg-split.s
R llvm/test/MC/Disassembler/X86/AMX/x86-64-amx-tf32.txt
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-att.s
R llvm/test/MC/X86/AMX/x86-64-amx-tf32-intel.s
A llvm/test/MC/X86/LFI/abi-note.s
A llvm/test/MC/X86/LFI/syscall.s
A llvm/test/MC/X86/LFI/thread-pointer-errors.s
A llvm/test/MC/X86/LFI/thread-pointer.s
M llvm/test/Other/new-pm-O0-defaults.ll
M llvm/test/Other/new-pm-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
M llvm/test/ThinLTO/AArch64/aarch64_inline.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions1.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions2.ll
M llvm/test/ThinLTO/X86/Inputs/cache-typeid-resolutions3.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias.ll
M llvm/test/ThinLTO/X86/ctor-dtor-alias2.ll
M llvm/test/ThinLTO/X86/deadstrip.ll
M llvm/test/ThinLTO/X86/devirt_function_alias.ll
M llvm/test/ThinLTO/X86/devirt_function_alias2.ll
M llvm/test/ThinLTO/X86/devirt_pure_virtual_base.ll
M llvm/test/ThinLTO/X86/devirt_vcall_vis_public.ll
M llvm/test/ThinLTO/X86/distributed_import.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-exported-internal.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-unknown.ll
M llvm/test/ThinLTO/X86/funcattrs-prop-weak.ll
M llvm/test/ThinLTO/X86/globals-import.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols-alt.ll
M llvm/test/ThinLTO/X86/hidden-escaped-symbols.ll
M llvm/test/ThinLTO/X86/import-ro-constant.ll
M llvm/test/ThinLTO/X86/index-const-prop-alias.ll
M llvm/test/ThinLTO/X86/index-const-prop.ll
M llvm/test/ThinLTO/X86/linkonce_resolution_comdat.ll
M llvm/test/ThinLTO/X86/memprof-dups.ll
M llvm/test/ThinLTO/X86/memprof_callee_type_mismatch.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal.ll
M llvm/test/ThinLTO/X86/memprof_imported_internal2.ll
M llvm/test/ThinLTO/X86/prevailing_weak_globals_import.ll
M llvm/test/ThinLTO/X86/visibility-elf.ll
M llvm/test/ThinLTO/X86/visibility-macho.ll
M llvm/test/ThinLTO/X86/weak_resolution.ll
M llvm/test/ThinLTO/X86/windows-vftable.ll
M llvm/test/ThinLTO/X86/writeonly.ll
A llvm/test/Transforms/AssignGUID/assign_guid.ll
M llvm/test/Transforms/ConstantMerge/merge-dbg.ll
A llvm/test/Transforms/DropUnnecessaryAssumes/duplicate-affected-value.ll
M llvm/test/Transforms/EmbedBitcode/embed-wpd.ll
M llvm/test/Transforms/EmbedBitcode/embed.ll
M llvm/test/Transforms/FunctionImport/funcimport-debug-retained-nodes.ll
M llvm/test/Transforms/FunctionImport/funcimport.ll
M llvm/test/Transforms/GVN/invariant-load-intrinsic.ll
A llvm/test/Transforms/GlobalMerge/guid.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpeq.ll
M llvm/test/Transforms/InstCombine/invariant-load-like-sink.ll
M llvm/test/Transforms/InstCombine/select-abs-positive-mul.ll
A llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
M llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
A llvm/test/Transforms/LoopInterchange/debug-record-after-phi.ll
A llvm/test/Transforms/LoopLoadElim/non-lcssa-input.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
A llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-access-low-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-epilogue-vec.ll
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-vscale-x-UF-step.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
A llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-i64-rv32.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
A llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-i64-rv32.ll
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LowerTypeTests/cfi-icall-alias.ll
M llvm/test/Transforms/LowerTypeTests/export-icall.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PhaseOrdering/speculative-devirt-then-inliner.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-postpone-for-dependency.ll
M llvm/test/Transforms/SLPVectorizer/X86/buildvector-reused-with-bv-subvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/commutable-node-with-non-sched-parent.ll
M llvm/test/Transforms/SLPVectorizer/X86/debug-info-salvage.ll
M llvm/test/Transforms/SLPVectorizer/X86/delayed-gather-emission.ll
A llvm/test/Transforms/SLPVectorizer/X86/mul-shl-nsw-intmin.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-subvectors-insert.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-schedulable-parent-multi-copyables.ll
M llvm/test/Transforms/SLPVectorizer/X86/poor-throughput-seeds.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-shared-inst.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduced-ordered-values-update.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
M llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
M llvm/test/Transforms/SampleProfile/ctxsplit.ll
R llvm/test/Transforms/SampleProfile/icp_target_feature.ll
M llvm/test/Transforms/Sink/invariant-load.ll
M llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/slsr-var-delta.ll
A llvm/test/Transforms/StraightLineStrengthReduce/slsr-gep-sext-wrap.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal-typeid.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal1.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/split.ll
M llvm/test/Transforms/ThinLTOBitcodeWriter/unsplittable.ll
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops-i1.ll
M llvm/test/Transforms/WholeProgramDevirt/branch-funnel-profile.ll
M llvm/test/Transforms/WholeProgramDevirt/export-single-impl.ll
M llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-interposable.ll
A llvm/test/Verifier/invariant-load-metadata-invalid.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_public.ll
M llvm/test/tools/gold/X86/devirt_vcall_vis_shared_def.ll
M llvm/test/tools/gold/X86/thinlto_weak_library.ll
M llvm/test/tools/gold/X86/thinlto_weak_resolution.ll
M llvm/test/tools/gold/X86/v1.16/devirt_vcall_vis_export_dynamic.ll
M llvm/test/tools/llvm-dwarfdump/X86/coverage.test
M llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-sme-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Inputs/streaming-cme-instructions.s
A llvm/test/tools/llvm-mca/AArch64/Inputs/sve-sme-instructions.s
M llvm/tools/llvm-dwarfdump/CMakeLists.txt
M llvm/tools/llvm-dwarfdump/Coverage.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
M llvm/tools/llvm-link/llvm-link.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/UpdateTestChecks/asm.py
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationEnums.td
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
A mlir/include/mlir/Dialect/Bufferization/Transforms/StaticMemoryPlanning.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
A mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsType.h
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
A mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlanning.cpp
M mlir/lib/Dialect/MLProgram/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/OpenACC/Analysis/OpenACCSupport.cpp
M mlir/lib/Dialect/OpenACC/Utils/CMakeLists.txt
A mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsType.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
M mlir/test/Conversion/ArithToSPIRV/fast-math.mlir
M mlir/test/Conversion/SPIRVToLLVM/control-flow-ops-to-llvm.mlir
A mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-best-fit.mlir
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/unittests/Dialect/OpenACC/CMakeLists.txt
A mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
A offload/test/Inputs/declare-target-common-block-sub.f90
A offload/test/offloading/fortran/declare-target-common-block-2.f90
A offload/test/offloading/fortran/declare-target-common-block-main.f90
M openmp/runtime/cmake/arm64x.cmake
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp_dispatch.h
M orc-rt/CMakeLists.txt
M runtimes/cmake/config-Fortran.cmake
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Analysis/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[spr] changes introduced through rebase
Created using spr 1.3.8-wip
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/b70847f37e08...5f8b4666e7e2
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list