[all-commits] [llvm/llvm-project] 764645: [SDAG][X86] Support shrinking target-independent n...

[Nikita Popov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
      https://github.com/llvm/llvm-project/commit/764645b5ef49b18b2ca7c3efc3ca6954e1337f1b
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-07-08 (Wed, 08 Jul 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
    M llvm/test/CodeGen/X86/avx512fp16-combine-shuffle-fma.ll
    M llvm/test/CodeGen/X86/vector-narrow-binop.ll
    M llvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll

  Log Message:
  -----------
  [SDAG][X86] Support shrinking target-independent nodes (#206721)

X86 generally tries to shrink operations to work on smaller vector sizes
if possible. This happens in
SimplifyDemandedVectorEltsForTargetNode() for target-specific opcodes,
but it's currently not possible to do this for generic opcodes.

This introduces a getPreferredShrunkVectorSize() TLI hook to allow
shrinking generic ops based on demanded elements.

The primary motivation for this is to avoid regressions due to
https://github.com/llvm/llvm-project/pull/188489, which uplifts a
previously x86-specific node to become target-independent.

This PR enables the shrinking for fsub and fmul as examples.
Unfortunately, for many other ops we get various regressions, mostly
because horizontal operations are no longer formed.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications