[all-commits] [llvm/llvm-project] 07097a: [VPlan] Allow VPValue in match_fn without needing ...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Fri Jun 26 09:01:42 PDT 2026
Branch: refs/heads/users/alexey-bataev/spr/slp-initial-support-for-masked-stores
Home: https://github.com/llvm/llvm-project
Commit: 07097a56cce0602336c2437eccb80696936a30a1
https://github.com/llvm/llvm-project/commit/07097a56cce0602336c2437eccb80696936a30a1
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Allow VPValue in match_fn without needing explicit template arguments. NFC (#205748)
Currently if you want to use match_fn over a range of VPValues, you have
to explicitly write `match_fn<VPValue>` otherwise it will resolve to the
VPUser overload.
This changes the functor to be a lambda with an auto argument so
match_fn(...) works for both VPValues and VPUsers without explicit
templates. The lambda is inlined so there's no indirect function call.
vputils::getGEPFlagsForPtr is updated to use the new form.
We can't use `bind_back` since it requires we bind to exactly one
function that's known at call time.
Commit: 3dc2e179220bf4dabd96272460fcca7a1b81539d
https://github.com/llvm/llvm-project/commit/3dc2e179220bf4dabd96272460fcca7a1b81539d
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/complex-deinterleaving-reassoc-duplicates.ll
Log Message:
-----------
[ComplexDeinterleaving] Add test for duplicate reassoc addends (NFC) (#205794)
Commit: 75a256727cc5977775bc85f30fea9767f8e53b65
https://github.com/llvm/llvm-project/commit/75a256727cc5977775bc85f30fea9767f8e53b65
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Checker.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Gate annotation suggestions behind `SuggestAnnotations` opt (#205764)
Annotations suggestions expectedly fire very often and they have
recently shown significant regressions after the
https://github.com/llvm/llvm-project/pull/204045. This now gates the
suggestions behind a dedicated `SuggestAnnotations` option, preventing
unnecessary work when the relevant diagnostics are disabled.
Commit: 0c540b9dcd041a2574f744144bb894b5862344b1
https://github.com/llvm/llvm-project/commit/0c540b9dcd041a2574f744144bb894b5862344b1
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
Log Message:
-----------
[analyzer] Fix unjustified early return in processCallExit (#205656)
In `ExprEngine::processCallExit` step 3 may theoretically split the
state because it calls `removeDead`, which activates `LiveSymbols` and
`DeadSymbols` callbacks of various checkers. (However, in practice it is
likely that these checker callbacks never actually split the state -- at
least, no such state splits happen in the LIT tests.)
The nodes produced by `removeDead` are placed in the set `CleanedNodes`;
in theory the different execution paths should be handled in parallel,
independently of each other. However, the loop `for (ExplodedNode *N :
CleanedNodes)` contained an early return statement, which meant that if
the creation of `CEENode` failed for a node `N`, then the subsequent
iterations were skipped altogether.
This commit replaces the `return` with a `continue` to ensure that the
nodes in `CleanedNodes` are handled independently (if there are several
such nodes).
This logic error is present in the codebase since 2012 (!) when commit
7e53bd6fb01b062ece426252fb94c76bcce58941 introduced the `removeDead`
step into `processCallExit`.
Given that nobody noticed this error within the last 14 years, I very
strongly suspect that it doesn't have any observable functional effects,
i.e. this change is essentially NFC.
Commit: 87f7884cb69912ca812d3a0543c94e0362d395a9
https://github.com/llvm/llvm-project/commit/87f7884cb69912ca812d3a0543c94e0362d395a9
Author: t-demchuk <109612249+t-demchuk at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
A llvm/test/Transforms/NaryReassociate/nary-gep-zero-sized-element.ll
Log Message:
-----------
[NaryReassociate] Fix divide by zero crash in NaryReassociatePass (#202377)
Updates NaryReassociatePass with a safety check to guard against GEPs
into arrays with zero sized element types (eg. [0 x ptr]) to prevent
division by zero.
Commit: e0981358efdf3c630d1921fd81ba55af5e406364
https://github.com/llvm/llvm-project/commit/e0981358efdf3c630d1921fd81ba55af5e406364
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/WatchedLiteralsSolver.cpp
Log Message:
-----------
[clang][dataflow] Move expensive solver asserts under EXPENSIVE_CHECKS (#205715)
The watched-literal solver has a few invariant checks that run on every
solver iteration in assertion builds. Some of these checks rebuild and
iterate over the watched-literal state. This overhead is usually hidden,
but it becomes dominant for large flow-sensitive analyses.
While testing clang-tidy's `unchecked-optional-access` check on real
world projects (in this case, LLVM itself), we found there are a few
extreme slow analyses caused by this overhead.
| Time | File |
|---------|-----------------------------------------------------|
| 8235.7s | llvm-project/clang/utils/TableGen/RISCVVEmitter.cpp |
| 8197.2s | llvm-project/clang/lib/Driver/Multilib.cpp |
(Ran on a machine with Icelake 32cores + 128gb memory)
After moving these asserts to `EXPENSIVE_CHECKS`, the same files
complete in about 14.2 seconds and 12.2 seconds locally. That is roughly
a 580x improvement for `RISCVVEmitter.cpp` and a 673x improvement for
`Multilib.cpp`.
This can also affect clang-tidy pre-merge CI, because the pre-merge
configuration uses an assertions build and enables
`bugprone-unchecked-optional-access`.
Given this scale of improvement, I think these invariant checks are
better suited for `EXPENSIVE_CHECKS`. They remain available in dedicated
expensive-check builds, while avoiding a very large cost in regular
release+assertions builds.
Closes https://github.com/llvm/llvm-project/issues/205713
Commit: 5fdc9482989b59a4e1b2bbe75f80e12e082f9f90
https://github.com/llvm/llvm-project/commit/5fdc9482989b59a4e1b2bbe75f80e12e082f9f90
Author: Sergio Afonso <safonsof at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M offload/test/offloading/fortran/target-no-loop.f90
Log Message:
-----------
[Offload][OpenMP][Flang] Update no-loop test (#205803)
Updates to the kernel type detection logic now allow `target parallel
do` to be promoted to SPMD-No-Loop.
A currently broken offload test that was affected by this change is
updated here.
Commit: 87c11c98a2412f4aab2f7bf18d9346b016945c24
https://github.com/llvm/llvm-project/commit/87c11c98a2412f4aab2f7bf18d9346b016945c24
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
Log Message:
-----------
[libc] Add libgen.h to target public headers (#205804)
Ensure libgen.h is included in TARGET_PUBLIC_HEADERS for Linux targets
so that it gets generated and installed.
Assisted-by: Automated tooling, human reviewed.
Commit: c834d1acf130b8d98d818b60ab129f780855461f
https://github.com/llvm/llvm-project/commit/c834d1acf130b8d98d818b60ab129f780855461f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
A clang/test/AST/ByteCode/evaluate-dtor.cpp
M clang/test/CXX/expr/expr.const/p6-2a.cpp
M clang/test/CodeGenCXX/const-init-cxx2a.cpp
M clang/test/CodeGenCXX/non-const-init-cxx2a.cpp
Log Message:
-----------
[clang][bytecode] Fix `evaluateDestruction()` (#205778)
Me previous testing regarding this seems to have been insufficient. Or
this regressed some time along the way.
Now that `CLANG_USE_EXPERIMENTAL_CONST_INTERP` is used for testing I
noticed a few regressions.
We need to special-case the evaluating decl in a few places, since it's
a global variable that we're allowed to modify.
Commit: 630125ac5be7dab26fcfba8918ee091588616f21
https://github.com/llvm/llvm-project/commit/630125ac5be7dab26fcfba8918ee091588616f21
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
Log Message:
-----------
Revert "Reapply "[InstCombine] Merge consecutive assumes", round 2" (#205805)
It looks like there is still a bug with removing assumes from the
assumption cache.
Reverts llvm/llvm-project#205773
Commit: 4d4c865933e1048842f836490e02296b2cb48711
https://github.com/llvm/llvm-project/commit/4d4c865933e1048842f836490e02296b2cb48711
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[mlir][vector] add consistent stride verification to `masked load/store` and `gather/scatter` ops (#204842)
Extend negative stride checks to MaskedLoadOp, MaskedStoreOp, GatherOp,
and ScatterOp to match LoadOp and StoreOp behavior.
Depends on: #204611.
AI Disclaimer: I used AI for the tests.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: 647c29886973c7111a32702e3c7a5ccc33a9feeb
https://github.com/llvm/llvm-project/commit/647c29886973c7111a32702e3c7a5ccc33a9feeb
Author: John Brawn <john.brawn at arm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedA510.td
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-writeback.s
Log Message:
-----------
[AArch64] Correct A510 scheduling information for LDn instructions (#205518)
The latency and throughput for these instructions don't match what's in
the A510 Software Optimization Guide, so adjust them so that they do
match. Also rearrange the definitions to match how they're structured in
the optimization guide and rename things in a similar manner to how the
C1 CPUs do things, as it's much clearer.
Commit: ec574cf0444e4c3cc3f2c97a019d49445bb37ddf
https://github.com/llvm/llvm-project/commit/ec574cf0444e4c3cc3f2c97a019d49445bb37ddf
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 5314be5 (#205818)
This fixes 5314be5a740c9985b0b3ab958269b5f1824cce02.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: bef95e54674592946530fdda73e4fea7809263f3
https://github.com/llvm/llvm-project/commit/bef95e54674592946530fdda73e4fea7809263f3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdlib.yaml
M libc/src/CMakeLists.txt
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/unsetenv.cpp
A libc/src/stdlib/unsetenv.h
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/unsetenv_test.cpp
Log Message:
-----------
[libc][stdlib] Add unsetenv (#202422)
Added the POSIX unsetenv() function and its internal support.
Implemented EnvironmentManager::unset() to remove a variable by name,
free the string if allocated, and compact the array.
Updated EnvironmentManager to synchronize the public global environ
pointer when transitioning to managed storage.
Registered for x86_64, aarch64, and riscv. Integration tests cover basic
operations and edge cases.
Assisted-by: Automated tooling, human reviewed.
Commit: 755bc5c9a54de43166930585fde1c23efe8f18e1
https://github.com/llvm/llvm-project/commit/755bc5c9a54de43166930585fde1c23efe8f18e1
Author: A. Jiang <de34 at live.cn>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
Log Message:
-----------
[libc++] Add missing attribute usages to `<__memory/shared_ptr.h>` (#205776)
Since 44546e0e32077241ca9a9a90ac57f2f086f9488a, lack of
`_LIBCPP_NODEBUG` and `_LIBCPP_HIDE_FROM_ABI` are caught by clang-tidy.
This patch adds them wherever expected.
Commit: 7b54691ba96944d7a2bb2d3eb8c7654c9350be81
https://github.com/llvm/llvm-project/commit/7b54691ba96944d7a2bb2d3eb8c7654c9350be81
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/Headers/__clang_hip_libdevice_declares.h
Log Message:
-----------
clang/HIP: Remove some unused ocml function declarations (#204735)
Commit: f36745eb0a07177743ccb039a77399846a873a40
https://github.com/llvm/llvm-project/commit/f36745eb0a07177743ccb039a77399846a873a40
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/freebsd/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/headers/math/index.rst
M libc/shared/math.h
A libc/shared/math/tanbf16.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/tanbf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/tanbf16.cpp
A libc/src/math/tanbf16.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/tanbf16_test.cpp
A libc/test/src/math/tanbf16_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][math][c23] Add tanbf16 math function (#185100)
Adds tanbf16 higher math function for bfloat16 type
Commit: acff1e5417dde747ba0f18ccac1366c87de60adf
https://github.com/llvm/llvm-project/commit/acff1e5417dde747ba0f18ccac1366c87de60adf
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
Log Message:
-----------
[lldb] Don't fail scripted frame construction on WebAssembly (#205692)
Commit: b45bb83888a5cb5aaa3b7d41d446bbe797089881
https://github.com/llvm/llvm-project/commit/b45bb83888a5cb5aaa3b7d41d446bbe797089881
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
Log Message:
-----------
[LV] Regen runtime-checks-hoist.ll with newer UTC. NFC (#205831)
Fixes some noise in an upcoming test diff with labels being renamed.
Commit: 28475c218ebcbf81d581d1953e7a1cb4e91fba60
https://github.com/llvm/llvm-project/commit/28475c218ebcbf81d581d1953e7a1cb4e91fba60
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rv32p.ll
Log Message:
-----------
[RISCV][P-ext] Select signed widening add/sub accumulate to wadda/wsuba (#205475)
WADDA is rd += sext(rs1) + sext(rs2) and WSUBA is rd += sext(rs1) - sext(rs2),
the signed counterparts of WADDAU/WSUBAU added in #181396.
Add the WADDA/WSUBA SelectionDAG nodes, fold ADDD/SUBD whose addend is a
sign-extended i32 (high half == sra(lo, 31)) into them, collapse chained
accumulates into the free source slot, and select them to the wadda/wsuba
instructions.
Commit: 84c42fe09e0521b565b938411f30397df663e2bc
https://github.com/llvm/llvm-project/commit/84c42fe09e0521b565b938411f30397df663e2bc
Author: elizabethandrews <elizabeth.andrews at intel.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenSYCL/address-space-conversions.cpp
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp
M clang/test/SemaOpenCL/usm-address-spaces-conversions.cl
M clang/test/SemaSYCL/address-space-conversions.cpp
Log Message:
-----------
[clang][opencl][sycl] Deprecate opencl_global_device and opencl_global_host (#203569)
These attributes were originally introduced as part of the SYCL
upstreaming effort to enable improved performance for USM pointers on
FPGA targets. However, subsequent evaluation indicates that they are not
meaningfully used in practice. Additionally given the current shift in
focus away from FPGAs in DPC++, these attributes no longer serve an
active purpose. Their removal would simplify the codebase and reduce
ongoing maintenance burden.
RFC:
https://discourse.llvm.org/t/rfc-remove-opencl-global-device-and-opencl-global-host-address-space-attributes/90677
Commit: 0bb2b00bee4da3b3706910f14cc1641fac95fe73
https://github.com/llvm/llvm-project/commit/0bb2b00bee4da3b3706910f14cc1641fac95fe73
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/index_space_classes.hpp
A libsycl/test/basic/index_space_classes.cpp
A libsycl/test/basic/index_space_classes_negative.cpp
Log Message:
-----------
[libsycl] add operators to sycl::range and sycl::id (#203572)
This PR was assisted by GH Copilot (tests extension).
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 213c7b7634d8cc585368e5acc0e26002b3715495
https://github.com/llvm/llvm-project/commit/213c7b7634d8cc585368e5acc0e26002b3715495
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
A clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
A clang/test/CIR/CodeGenOpenMP/target-map-llvm-host.c
A clang/test/CIR/CodeGenOpenMP/target-map.c
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Log Message:
-----------
[CIR][OpenMP] Initial implementation of target region support (#195452)
This patch adds support for target regions with some basic support for map
clauses. It also changes the clause handling to make use of the OMP dialect
ClauseOps to simplify op constrution.
Assisted-by: Cursor / claude-4.6-opus-high
Commit: c1869ffacf2b756913b45468aa58e7c8828112c4
https://github.com/llvm/llvm-project/commit/c1869ffacf2b756913b45468aa58e7c8828112c4
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/__fortran_type_info.f90
M flang-rt/lib/runtime/cooperative_groups.f90
M flang-rt/lib/runtime/cudadevice.f90
M openmp/module/CMakeLists.txt
M openmp/module/omp_lib.F90.var
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[flang-rt][CMake] Avoid 'use, intrinsic ::' (#205634)
Two build failures reported after #204260
* Unix Makefiles generator stops working: The cause is that the rules
for building each OBJECT library lands in its own Makefile, e.g.
`flang_rt.mod.fortran.builtins.dir/build.make` and
`libomp-mod.dir/build.make`. Trying to inject dependencies directly for
build rules in the other file does not work.
* `__ppc_types.f90` not tracked: Forgotten in #204260 due to being only
conditionally enabled for PowerPC targets.
The solution for both is to just remove the workaround for CMake not
recognizing modules uses declared using `intrinsic` which caused these
problems. This PR promotes the `use` constructs in the module sources to
normal dependencies that are not ignored by CMake.
The `intrinsic` modifier changes the search path to only look for such a
module in `-fintrinsic-modules-path`. The difference is only
theoretical:
1. When compiling the intrinsic modules, there are no other search paths
than for the intrinsics anyway
2. Users should strongly avoid naming their modules the same as an
intrinsic module
3. Most of our intrinsic sources don't even use the `intrinsic` modifier
in the first place (e.g.
https://github.com/llvm/llvm-project/blob/1c9412432ff9f897d5fb096d31b945e50fbbb61d/flang-rt/lib/runtime/__cuda_builtins.f90#L13).
That is, if there was a problem with lookup ambiguity, these would have
already been a problem for those.
4. The checksum of used modules is only added into the .mod file (the
only reason why modules would need to be transitively rebuilt) when a
`use` statement appears. Many intrinsic modules don't explicitly use the
modules that are added implicitly by the compiler, such as
`__fortran_builtins`, and hence do not even need to be rebuilt.
I started this PR with a tested-working fix
([71c5e7f0ffcf2ebd58812d2e2812b22663be1631](https://github.com/llvm/llvm-project/pull/205634/changes/BASE..71c5e7f0ffcf2ebd58812d2e2812b22663be1631))
to the workaround code. But given the points above, there seems to be no
benefit of keeping the workaround code handling CMake version < 4.5
around just for some intrinsic modules to keep the `intrinsic` modifier
with no practical effect. A non-workaround path using CMake's
`Fortran_BUILDING_IN(S)TRINSIC_MODULES` setting had to be added in any
case for Unix Makefile generators (reported issue 1.) because injecting
dependencies is not possible with Unix Makefiles as stated, but
`Fortran_BUILDING_IN(S)TRINSIC_MODULES` also does not work with the
Ninja generator. Avoiding `use, intrinsic` keeps just one configuration
path.
I tested that modules are properly updated with Ninja and Unix
Makefiles:
* Build from scratch
* Modifying `__fortran_builtins.f90` rebuilds its dependent modules
* Modifying `iso_c_binding.f90` rebuilds its dependent modules
(omp_lib.mod)
Commit: ec6eed0b000733b865f5cc07ec5c444654d218b4
https://github.com/llvm/llvm-project/commit/ec6eed0b000733b865f5cc07ec5c444654d218b4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__locale_dir/num.h
Log Message:
-----------
[libc++] Remove __broadcast simd function (#205559)
The simd vector type in Clang already provides a conversion operator
that acts as a broadcast constructor. We can use that instead.
Commit: 17d49bc052a74e1b9d365dd8f9f3597b4a538209
https://github.com/llvm/llvm-project/commit/17d49bc052a74e1b9d365dd8f9f3597b4a538209
Author: David Spickett <david.spickett at arm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][Linux][AArch64] Get NT_ARM_ constants from llvm's ELF header (#205834)
The first thing I do for any new register set is add it to the llvm
header. So we should just use those values instead of having all these
macros to handle older kernels.
Commit: 383f8586986aac5abec446a08b1c33a0fff0a631
https://github.com/llvm/llvm-project/commit/383f8586986aac5abec446a08b1c33a0fff0a631
Author: Harry Ramsey <harry.ramsey at arm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sve2-fixed-length-sra-flag.ll
A llvm/test/CodeGen/AArch64/sve2-fixed-length-sra.ll
Log Message:
-----------
[AArch64] Preserve SDNode flags when lowering fixed vectors to scalable operations (#204616)
Preserve the original SDNode flags when LowerToScalableOp rebuilds fixed-length vector operations using their scalable container type. This allows combines to use flag information generated before the scalable was created.
Commit: ff066c745de9f00b0bac8a98d1bd9bd864034da0
https://github.com/llvm/llvm-project/commit/ff066c745de9f00b0bac8a98d1bd9bd864034da0
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/X86/vec_minmax_match.ll
M llvm/test/Transforms/InstSimplify/maxmin.ll
M llvm/test/Transforms/LoopInterchange/reductions-non-wrapped-operations.ll
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/minmax-extra-outside-users.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LowerSwitch/do-not-handle-impossible-values.ll
M llvm/test/Transforms/NaryReassociate/nary-req.ll
M llvm/test/Transforms/NaryReassociate/nary-smax.ll
M llvm/test/Transforms/NaryReassociate/nary-smin.ll
M llvm/test/Transforms/NaryReassociate/nary-umax.ll
M llvm/test/Transforms/NaryReassociate/nary-umin.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/undef_vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
Log Message:
-----------
[IR] Don't match icmp+select as min/max (#205595)
Since some time, we canonicalize integer min/max as intrinsics. Remove
the detection of icmp+select as min/max from the pattern matchers. These
matchers were quite expensive but, due to canonicalization, were almost
never hit.
Test updates are largely canonicalization of the input to use intrinics
instead of icmp+select. (Manual work, we unfortunately don't have a tool
to canonicalize the test input.)
Commit: 77b0b29955125c6caae1f88f710c4b3b41a0d37f
https://github.com/llvm/llvm-project/commit/77b0b29955125c6caae1f88f710c4b3b41a0d37f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
Log Message:
-----------
[lldb] Return an empty extractor for unmappable subset requests (#205596)
DataExtractor::GetSubsetExtractorSP always returns a valid, non-null
extractor, and every caller relies on that: they dereference the result
directly rather than checking for null. The VirtualDataExtractor
override broke this contract. When the requested range had no backing in
the lookup table (e.g. the virtual offset fell in a gap, or the range
crossed an entry boundary) it returned an empty shared_ptr, turning each
caller's dereference into a null-pointer access.
It also asserted on those cases. But the offsets passed to a subset
request are derived from parsed file contents, which may be truncated or
inconsistent. A range that cannot be mapped is therefore ordinary input,
not a programming error, and must not abort an assertions-enabled build.
Return a valid but empty extractor instead. Reads see zero bytes and the
caller's existing size checks skip the data, matching the graceful
degradation the base class already provides for out-of-range offsets.
Assisted-by: Claude
Commit: 003a7601914a5fd6ecb71d94161147cdeca59ff1
https://github.com/llvm/llvm-project/commit/003a7601914a5fd6ecb71d94161147cdeca59ff1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
Log Message:
-----------
clang/AMDGPU: Remove gizcl triples from tests (#205811)
These are a leftover from a very old migration
Commit: 03511907c7a9908f7902e18d3789371a63bb91b1
https://github.com/llvm/llvm-project/commit/03511907c7a9908f7902e18d3789371a63bb91b1
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/docs/CommandGuide/index.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/Pipeline.rst
M llvm/docs/GlobalISel/Porting.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/Reference.md
M llvm/docs/UserGuides.md
M llvm/docs/conf.py
M llvm/docs/tutorial/MyFirstLanguageFrontend/index.rst
M llvm/tools/llvm-debuginfo-analyzer/README.md
A utils/docs/llvm_sphinx/ext/checks.py
Log Message:
-----------
[docs] Enforce unambiguous toctree in llvm/docs (#203967)
It seems like using a non-`hidden` `toctree` for page navigation is a
bit of a trap, in that every doc must have a single unique path through
the global toctree to the root doc, and it is very easy to end up with
multiple.
This patch tries to address the warnings (actually infos, hence why it
does not fail the build) in llvm/docs/.
I tried to preserve the documents as-is, by hiding `toctree`s and
instead using lists of `{doc}` forms where the `toctree` was visible
before.
The only visual change in the resulting HTML is that the link is now
underlined where it wasn't before.
I also nested the `Tutorials` section in GISel Porting document, and
didn't link to it directly as the title is a bit ambiguous without the
context of the document it appears in.
I also saw warnings about a jump in heading level in
`llvm-debuginfo-analyzer/README.md` and assumed it was just a mistake,
so I collapsed the level-3 headings down to level-2.
Finally, I wrote a sphinx extension to make ambiguous toctree entries
into errors, so the docs do not regress. I hope to fix other sphinx
project in llvm-project and enable the checks for them too, assuming
this patch is accepted.
Change-Id: Icb11de69be1ea5489fba501aee4d767f5129e7e1
Commit: 94c1a8bc3e6b790ccc5723803129b3b956f11d13
https://github.com/llvm/llvm-project/commit/94c1a8bc3e6b790ccc5723803129b3b956f11d13
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
M llvm/lib/Target/NVPTX/NVPTX.h
A llvm/lib/Target/NVPTX/NVPTXAddressFolder.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
A llvm/test/CodeGen/NVPTX/address-folder.ll
A llvm/test/CodeGen/NVPTX/address-folder.mir
Log Message:
-----------
[NVPTX] Fold symbol addresses into memory operands (#202379)
SelectionDAG can fold a symbol address (a kernel parameter, global
variable, or external symbol) directly into a memory instruction's
address operand, but only within a single basic block. When the address
crosses a block boundary, ISel materializes it with `MOV_B{32,64}_sym`
and the memory instruction becomes register-relative:
```ptx
mov.b64 %rd1, kernel_param_0;
ld.param.b64 %rd2, [%rd1];
ld.param.b64 %rd3, [%rd1+8];
```
instead of:
```
ld.param.b64 %rd2, [kernel_param_0];
ld.param.b64 %rd3, [kernel_param_0+8];
```
This patch adds NVPTXAddressFolder, a pre-regalloc pass that looks for
loads and stores whose address operand is defined by `MOV_B{32,64}_sym`,
then folds the symbol back into the memory operand. The mov is erased
once it has no remaining uses; if the address also feeds arithmetic or
escapes, it is kept.
To make this generic over NVPTX memory instructions, the patch enables
named operand tables for NVPTX instructions and uses them to find `addr`
and `addsp` operands instead of hardcoding opcode-specific operand
indices.
This was motivated by a CUDA.jl performance regression where `byval`
kernel parameters stopped being pre-lowered into simple loads and
exposed the missing cross-block fold in the backend.
Disclaimer: LLMs (GPT 5.5, Opus 4.8) were used to develop this PR.
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 30b88eb862b1fe9aa532ba4501455adb9f02de29
https://github.com/llvm/llvm-project/commit/30b88eb862b1fe9aa532ba4501455adb9f02de29
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
A llvm/test/Verifier/anyptr-bad.ll
Log Message:
-----------
[LLVM][Intrinsics] Fix `llvm_anyptr_ty` to disallow vector of pointers (#205806)
`llvm_anyptr_ty` should only allow scalar pointer types and disallow
vector of pointers; fix the vector constraint for `llvm_anyptr_ty`
accordingly. This fixes a regression in `llvm_anyptr_ty` that was
introduced in https://github.com/llvm/llvm-project/pull/203506.
Added a unit test to verify that use of a vector of pointers for
`llvm_anyptr_ty` fails verification.
Commit: bb620ab07ddac0dce15cece204b647197c8073d3
https://github.com/llvm/llvm-project/commit/bb620ab07ddac0dce15cece204b647197c8073d3
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
Revert "[mlir][vector] add consistent stride verification to `masked load/store` and `gather/scatter` ops" (#205832)
Reverts llvm/llvm-project#204842. That PR breaks the following two
tests:
* `mlir/test/Integration/Dialect/SparseTensor/CPU/reshape_dot.mlir.test`
*
`mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_coo_test.mlir.test`
Commit: 9dee94ab30f9804c55f9f2cca347aa2af94f332d
https://github.com/llvm/llvm-project/commit/9dee94ab30f9804c55f9f2cca347aa2af94f332d
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/test/CodeGen/AArch64/complex-deinterleaving-reassoc-duplicates.ll
Log Message:
-----------
[ComplexDeinterleaving] Preserve duplicate reassoc addends in identifyReassocNodes (#205578)
Fixes #205197
Commit: 4feb14a494df152be1f44f80e289ffa82357ed12
https://github.com/llvm/llvm-project/commit/4feb14a494df152be1f44f80e289ffa82357ed12
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f36745e (#205837)
This fixes f36745eb0a07177743ccb039a77399846a873a40.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 76ddb39f1b18556b6de86c6cac0ebbb0ed6cb056
https://github.com/llvm/llvm-project/commit/76ddb39f1b18556b6de86c6cac0ebbb0ed6cb056
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/test/Fir/OpenACC/openacc-mappable.fir
Log Message:
-----------
[flang][acc] Avoid assert for assumed-size arrays without a descriptor (#205726)
Example:
```fortran
subroutine sub(a, n)
real(8) :: a(n, *)
integer :: n, i
!$acc data no_create(a)
!$acc parallel loop
do i = 1, n
a(1, i) = 0.0d0
end do
!$acc end data
end subroutine
```
An assumed-size dummy array (e.g. `real(8) :: a(n,*)`) has an unknown
trailing extent and is passed without a descriptor. When the OpenACC
implicit-data pass builds a data clause for such an array,
`generateSeqTyAccBounds` enters the unknown-shape branch but finds no
descriptor (`fir.box`) to recover bounds from, and hits:
assert(false && "array with unknown dimension expected to have
descriptor");
The premise is wrong: an assumed-size array legitimately has no
descriptor and no recoverable bounds.
Fix: return empty bounds instead of asserting. The caller only assigns
bounds when non-empty, so the array is mapped without bounds — the only
correct option when the extent is unknown, and sufficient for
presence-only clauses (`no_create`/`present`).
Commit: e74b6bcafb575b1548052b00854916c27e9bd4c8
https://github.com/llvm/llvm-project/commit/e74b6bcafb575b1548052b00854916c27e9bd4c8
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
A mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir
Log Message:
-----------
[mlir][acc] Run acc-specialize-for-host rewrite to convergence (#205727)
Example:
```fortran
!$acc routine worker
subroutine transform(p, n)
real*8 p(*); integer n
!$acc loop seq
do i1 = 1, n
!$acc loop seq
do i2 = 1, n
! ... a dozen+ levels of nested acc loops ...
!$acc loop vector
do i = 1, n
p(i) = p(i) + 1.0d0
end do
end do
end do
end subroutine
```
In this code, the routine becomes a `func.func` with deeply nested
orphan `acc.loop` ops. `acc-specialize-for-host` lowers them (e.g.
`acc.loop` → `scf.for`) via `applyPatternsGreedily`, but leaves
`GreedyRewriteConfig::maxIterations` at its default of 10. Since inner
loops only become rewritable after their parents convert, a nest deeper
than 10 isn't at a fixed point when the cap is hit, so the driver
returns `failure()` and the pass calls `signalPassFailure()` — a
spurious, diagnostic-less failure even though the conversion was
progressing correctly.
Fix:
Run the rewrite to convergence instead of stopping at the default cap:
```cpp
config.setMaxIterations(GreedyRewriteConfig::kNoLimit);
```
The patterns are strictly reductive (ops are lowered/erased, never
regenerated), so this is safe. Adds a regression test with a 16-deep
orphan `acc.loop` nest.
Commit: df49da3201a05f7a2ef78ad00cdcfebe09ae1308
https://github.com/llvm/llvm-project/commit/df49da3201a05f7a2ef78ad00cdcfebe09ae1308
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Semantics/openmp-utils.cpp
M flang/test/Lower/OpenMP/metadirective-construct.f90
Log Message:
-----------
[flang][OpenMP] Decompose combined construct selectors in variant matching (#205802)
The previous code resolved a `construct={...}` selector by mapping its
name to a trait through a string lookup
(`getOpenMPContextTraitSelectorKind` ->
`getOpenMPContextTraitPropertyForSelector`). That works for a standalone
leaf construct such as `parallel`, whose name matches a single construct
selector string, but not for a combined/composite directive such as
`target teams`: its name (`"target teams"`) matches no selector string,
so the lookup returns `invalid` and the selector's construct traits are
dropped.
This PR adds `AppendConstructTraitsForDirective` that walks the
directive sets and adds each leaf trait, so combined directives are no
longer reduced to a single (or dropped) trait. It also handles the
standalone `dispatch` construct trait.
Fixes https://github.com/llvm/llvm-project/issues/205664
Assisted-by: Cursor
Commit: 0e847869ab8dde02815d82b67c7f0bb834653b51
https://github.com/llvm/llvm-project/commit/0e847869ab8dde02815d82b67c7f0bb834653b51
Author: adams381 <adams at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
A clang/test/CIR/CodeGen/new-array-init.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
Log Message:
-----------
[CIR] Zero-init array-new with trivial ctor (#205611)
emitNewArrayInitializer hit errorNYI for a value-initialized array new of
a trivially-constructible element (new T[n]()), where the trailing
parentheses mean zero-initialization. Route the trivial-ctor branch
through the existing tryMemsetInitialization() helper, following classic
CodeGen: a zero-initializable element gets operator new[] plus a single
memset to 0, while a non-zero-initializable element (an array of
pointers-to-data-member, whose null value is -1) declines the memset and
falls through to the constructor loop value-initializing each element.
Also add the getParent()->isEmpty() early return. tryMemsetInitialization
builds the memset through the Address overload of createMemSet so the
destination alignment is preserved.
Found building the SPEC CPU 2026 LLVM benchmark (723.llvm_r / 823.llvm_s)
with ClangIR.
Commit: d3c00bf7b08c3746c6e62c56d6142c333b0a8d25
https://github.com/llvm/llvm-project/commit/d3c00bf7b08c3746c6e62c56d6142c333b0a8d25
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/driver.bzl
Log Message:
-----------
Bazel driver-tools build-setting simplification (#205846)
Read the validated `driver-tools` build setting directly in
`generate_driver_tools_def` instead of reconstructing tool names from
selected `CcInfo` dependency labels through `label.name`.
`generate_driver_selects` now returns the selected dependency labels, so
`select_driver_tools` is removed.
This fixes a silent issue when 2 multicall participants have the same
`label.name`.
Commit: fcc105f40c8ee7cd604c3dafb3750e8ee1db65b6
https://github.com/llvm/llvm-project/commit/fcc105f40c8ee7cd604c3dafb3750e8ee1db65b6
Author: Grigory Pastukhov <gpastukhov at meta.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ExplicitConstructorCheck.cpp
M clang-tools-extra/clang-tidy/utils/TypeTraits.cpp
M clang-tools-extra/clang-tidy/utils/TypeTraits.h
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
A clang-tools-extra/unittests/clang-tidy/TypeTraitsTest.cpp
Log Message:
-----------
[clang-tidy] Move isStdInitializerList to utils::type_traits and add unit tests (#205449)
Moves isStdInitializerList from misc/ExplicitConstructorCheck into
utils::type_traits so it can be shared, and adds unit tests for it. NFC.
Commit: 78247bf69011b35f04e0905b3cea56eab7d7831c
https://github.com/llvm/llvm-project/commit/78247bf69011b35f04e0905b3cea56eab7d7831c
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/struct-to-vector-fp-store-only-tail.ll
M llvm/test/Transforms/SROA/struct-to-vector.ll
Log Message:
-----------
[SROA] Adjust struct layout requirements for struct to vector canonicalization (#201967)
Address a bug pointed out by @bjope (thank you!)
- To perform struct to vector canonicalization, it is not enough that
the struct layout size is the same as the vector layout size, because
structs and vectors may have padding in different locations! Previously
we would promote `{ i5, i5 }` as `<i5, i5>`, which is a miscompile!
- I also relaxed another requirement. Previously we made sure that the
struct layout size is equal to the vector allocation size. This
prevented promoting `{ i32, i32, i32 }` as `<i32, i32, i32>` because the
struct layout size is 3 x i32 but the vector allocation size is 4 x i32.
So instead we should compare to the vector store size, which is 3 x i32.
Commit: d4148a8476dfb63291ca3c63bc92a3bd8a19b773
https://github.com/llvm/llvm-project/commit/d4148a8476dfb63291ca3c63bc92a3bd8a19b773
Author: hulxv <hulxxv at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A libc/docs/dev/builtin_compatibility.rst
M libc/docs/dev/index.rst
Log Message:
-----------
[libc][docs] add `builtin_compatibility` (#200539)
Document the built-in compatibility for different GCC versions since
GCC-5
Commit: 4f638ff7baf97dd16abff7fc961d76c22063dc1f
https://github.com/llvm/llvm-project/commit/4f638ff7baf97dd16abff7fc961d76c22063dc1f
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
Log Message:
-----------
[mlir][acc] Drop redundant `acc.terminator` erase that broke atomic capture under `if` (#205731)
Example:
```fortran
!$acc parallel if(cond)
!$acc atomic capture
a = a + 1
b = a
!$acc end atomic
!$acc end parallel
```
In this code, the `if` clause triggers host-fallback specialization. A
blanket `acc.terminator` erase pattern strips the implicit terminator of
the still-present `acc.atomic.capture`, so the later `getTerminator()`
trips `mightHaveTerminator()`.
Fix: remove that pattern — every ACC region op already erases its own
terminator when it unwraps/inlines, so it was redundant (and only raced
ahead to break this case). Adds a lit test.
Commit: 04450c8cd86e7bbfab42cbeb919d31d8668366a8
https://github.com/llvm/llvm-project/commit/04450c8cd86e7bbfab42cbeb919d31d8668366a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
M mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
M mlir/test/Target/SPIRV/ocl-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Add CL copysign, fdim, fmod and hypot ops (#203880)
Commit: d0373ba8b57bb2355cfed09ad4c15c315a36af8c
https://github.com/llvm/llvm-project/commit/d0373ba8b57bb2355cfed09ad4c15c315a36af8c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Add GL NMin, NMax and NClamp ops (#203878)
Commit: 4c203981fc40698bca926c9b41c98574648d537f
https://github.com/llvm/llvm-project/commit/4c203981fc40698bca926c9b41c98574648d537f
Author: hanbeom <kese111 at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-zero-test-ctpop.ll
Log Message:
-----------
[SLP] Add pre-commit tests for zero-tested OR/UMax reductions (NFC) (#205738)
Add pre-commit tests for scalar OR/UMax reductions whose result is
only used by an eq/ne-zero comparison.
Commit: 6d6475328be051b35b22c5e72a0c4aa72c3815c4
https://github.com/llvm/llvm-project/commit/6d6475328be051b35b22c5e72a0c4aa72c3815c4
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
Log Message:
-----------
[clang][bytecode] Don't ignore discarded `DeclRefExpr`s (#204165)
Check for the evaluating decl in `GetRefGlobal` so we don't fail too
early. We also need to mark the `APValue` as constexpr-unknown when
returning it, even though the backing `Descriptor` is not marked
constexpr-unknown.
This fixes the last differences in `constant-expression-p2280r4.cpp`.
Commit: cf223eb1ec5fd5430a110bbd9f3fc18b46796fa0
https://github.com/llvm/llvm-project/commit/cf223eb1ec5fd5430a110bbd9f3fc18b46796fa0
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
A mlir/lib/Dialect/OpenACC/Transforms/ACCEmitRemarksPrivate.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
A mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir
Log Message:
-----------
[OpenACC] Add pass `ACCEmitRemarksPrivate`. (#205824)
The pass emits remarks describing `acc.firstprivate` and `acc.private`
associated with OpenACC compute and loop constructs.
Assisted-by: Claude Code
Commit: 5e85dbcde1d4ca6088132de09a3a95ca99caad17
https://github.com/llvm/llvm-project/commit/5e85dbcde1d4ca6088132de09a3a95ca99caad17
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
A lldb/test/Shell/SymbolFile/DWARF/wasm-function-display-name.yaml
Log Message:
-----------
[lldb] Use the source name when the linkage name is not mangled (#205701)
When a DW_TAG_subprogram has a DW_AT_linkage_name that is not actually a
mangled name and differs from DW_AT_name, lldb used the linkage name as
the function's display name. For C++ the linkage name demangles back to
the source name, but a plain symbol such as __main_argc_argv does not,
so the function showed up under its raw linkage name in backtraces,
breakpoint locations and `image lookup`, and was not findable by its
source name.
This happens on WebAssembly: wasi-libc renames `int main(int, char**)`
to its __main_argc_argv argv-passing wrapper, keeping DW_AT_name "main"
but recording DW_AT_linkage_name "__main_argc_argv".
When the linkage name has no recognized mangling scheme, use DW_AT_name
as the display name and keep the linkage name as the symbol, so lookups
by either name still resolve.
Commit: 469e3e81c6264f61d4369246d498c587b5ac6c71
https://github.com/llvm/llvm-project/commit/469e3e81c6264f61d4369246d498c587b5ac6c71
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
A llvm/test/Transforms/LoopInterchange/transform-stop-partway.ll
Log Message:
-----------
[LoopInterchange] Add test for IR modification stops partway (#205562)
The transform phase in LoopInterchange, which actually modifies the
input IR, has several early exits. This means that if the process hits
one of them, the end result may be IR that has been left in a partially
modified state. As far as I have searched, there is only one case that
actually triggers an early exit. In that case, the final output happens
to be valid IR (though not interchanged), so I believe this is not a
correctness issue at the moment. However, the current implementation is
clearly undesirable, especially because the loop is regarded as
interchanged internally even though the transformation actually failed.
We should eliminate all such early exits.
This patch adds a test that I could find, and also adds a debug output
to make it clear which one is triggered.
Assisted-by: Claude Code
Commit: e87160eddf6d7986423209711878b26f82443009
https://github.com/llvm/llvm-project/commit/e87160eddf6d7986423209711878b26f82443009
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Log Message:
-----------
[lldb] Fix DWARFASTParserClang formatting (#205857)
In #205701, I applied Michael's suggestion and enabled auto-merge.
Despite the formatter check failing, the change still got merged. Fix
the formatting and another inconsistency in the use of braces.
Commit: f3cb7bbc0110938c78542add1f79364fa526fb8d
https://github.com/llvm/llvm-project/commit/f3cb7bbc0110938c78542add1f79364fa526fb8d
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetIteratorBM.cpp
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/unittests/ADT/ImmutableSetTest.cpp
Log Message:
-----------
[ADT] Rewrite ImmutableSet/Map in-order iterator without per-node state (#205552)
ImutAVLTreeInOrderIterator was layered on a "generic" iterator whose
stack stored a 2-bit visit-state (None/Left/Right) packed into the low
bits of each node pointer, and which was spun through several
intermediate states per in-order step.
Replace it with a single iterator that keeps a stack of plain node
pointers (the root-to-current ancestor chain) and recovers the traversal
direction by inspecting whether it is ascending from a node's left or
right child. A node's parent cannot be cached in the node itself because
these trees are persistent and structurally shared (one node may be a
child of different parents across tree versions), so the ancestor stack
is the per-traversal parent chain.
The observable contract is unchanged: same in-order sequence, same
skipSubTree() semantics (so tree canonicalization via isEqual is
unaffected), and the iterator stays bidirectional. operator== now
compares the current node rather than the whole path, which is O(1) and
correct because within a single tree a node has a unique path.
Microbenchmarks (llvm/benchmarks/ImmutableSetIteratorBM.cpp, -O2 with
assertions) show ~2x faster plain traversal and skipSubTree, and the
node-identity operator== is ~1.5x faster on comparison-heavy loops (no
change on the common compare-against-end() path).
| Test (input size) | Before | After | Speedup |
|:--|--:|--:|--:|
| Cycle `N=100` | 64.3 ms | 52.3 ms | 1.23× |
| Cycle `N=200` | 464.5 ms | 375.5 ms | 1.24× |
| Cycle `N=300` | 1540 ms | 1260 ms | 1.22× |
| Merge `N=1000` | 51.3 ms | 44.7 ms | 1.15× |
| Merge `N=2000` | 237.0 ms | 198.0 ms | 1.20× |
| Merge `N=5000` | 1710 ms | 1480 ms | 1.16× |
| Switch fan-out `N=1000` | 73.8 ms | 62.7 ms | 1.18× |
| Switch fan-out `N=2000` | 328.0 ms | 294.2 ms | 1.11× |
| Switch fan-out `N=4000` | 1420 ms | 1260 ms | 1.13× |
Assisted by: Claude Opus 4.8
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: b7c56b5b0a54a6c966a74dfe311fcddcffade521
https://github.com/llvm/llvm-project/commit/b7c56b5b0a54a6c966a74dfe311fcddcffade521
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/CMakeLists.txt
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.h
M llvm/lib/Target/NVPTX/NVPTX.h
R llvm/lib/Target/NVPTX/NVPTXAddressFolder.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrFormats.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
R llvm/test/CodeGen/NVPTX/address-folder.ll
R llvm/test/CodeGen/NVPTX/address-folder.mir
Log Message:
-----------
Revert "[NVPTX] Fold symbol addresses into memory operands" (#205852)
Reverts llvm/llvm-project#202379
check-llvm now fails on one of the new testcases
```
Failed Tests (1):
LLVM :: CodeGen/NVPTX/address-folder.ll
```
Commit: 8987645d1d42147340367f6752cac563bf2c64be
https://github.com/llvm/llvm-project/commit/8987645d1d42147340367f6752cac563bf2c64be
Author: Tamir Duberstein <tamird at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFCORE.h
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/BPF/BTFDebug.h
A llvm/test/CodeGen/BPF/BTF/struct-member-order.ll
A llvm/test/CodeGen/BPF/CORE/struct-member-order.ll
Log Message:
-----------
[BPF] Sort BTF struct members by offset (#205396)
Sort BTF structure elements by their debug offsets. Prevent
source-ordered Rust debug metadata from producing descending member
offsets after rustc chooses a different physical layout, because the
kernel rejects such BTF.
Use the sorted order for member emission, declaration-tag component
indexes, and CO-RE access strings. Keep physical offset calculations on
the original debug indexes so changing BTF order does not change
generated code.
Eliminate the need for the bpf-linker metadata rewrite by enforcing the
ordering in the LLVM BPF backend:
https://github.com/aya-rs/bpf-linker/commit/1007ec7fed03562eb7d08f3e7521094a7e698b95
Commit: aa1cc2dc42733219a91167ca2279c96c1bce58e7
https://github.com/llvm/llvm-project/commit/aa1cc2dc42733219a91167ca2279c96c1bce58e7
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[ADT] Add StringRef::nonEmptyOr (#204690)
This adds a new method to StringRef. The intended use case is for
situations when a non-empty StringRef is needed but some operation
returns an empty StringRef because of missing data or some other
exception.
This is primarily for ergonomics. I'm mainly motivated to avoid creating
a temporary StringRef in situations where a StringRef is obtained
through a long call chain. e.g.
`doAThing(my_obj.getFoo().getBar().getBaz().getStringRef().nonEmptyOr("unknown"))`
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: 32572205a08d213c6a7cb387fe384fb3d98bca6c
https://github.com/llvm/llvm-project/commit/32572205a08d213c6a7cb387fe384fb3d98bca6c
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointList.h
M lldb/source/Breakpoint/BreakpointList.cpp
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Change BreakpointList::FindBreakpointsByName to use StringRef (#205695)
It's not possible to turn a StringRef into a c-string safely without a
potential allocation. I will use this in a follow-up to remove
ConstString from BreakpointName.
Commit: eb05efcd9b035b397c907d9949fd225e40173c07
https://github.com/llvm/llvm-project/commit/eb05efcd9b035b397c907d9949fd225e40173c07
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Semantics/program-tree.cpp
A flang/test/Semantics/OpenACC/acc-routine-bad.f90
Log Message:
-----------
[flang][openacc] Ignore bare acc routine in module subprogram part instead of erroring out (#205450)
This small code below would trigger not easy to understand error like
`error: expected 'END'`. Ignore such directive and emit the standard
warning.
```
module acc_routine_bad
contains
!$acc routine
subroutine acc_routine20()
end subroutine
end module
```
Commit: e32a1c6d91a7a4e75a4a890ffdddfda068f8bd33
https://github.com/llvm/llvm-project/commit/e32a1c6d91a7a4e75a4a890ffdddfda068f8bd33
Author: Yusra Syeda <99052248+ysyeda at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/test/Driver/zos-ld.c
Log Message:
-----------
[SystemZ][z/OS] Improve link command for shared libraries (#204205)
This PR adds -e/-O CELQSTRT and improves the link command for shared
libs.
Co-authored-by: Yusra Syeda <yusra.syeda at ibm.com>
Commit: 67cc47c7f9f4a0383bc386fdca748d0330a4aaf6
https://github.com/llvm/llvm-project/commit/67cc47c7f9f4a0383bc386fdca748d0330a4aaf6
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/TargetMachine.cpp
R llvm/test/CodeGen/X86/large-implicit-section.ll
Log Message:
-----------
Revert "[x86] Handle implicit sections when determining if a global is large" (#205859)
Reverts llvm/llvm-project#204247
Causes crashes:
https://github.com/llvm/llvm-project/pull/204247#issuecomment-4799229027
Fixes #205801
Commit: bc3eb524b2d1dcc3e48161cd2eb80a2364fdc097
https://github.com/llvm/llvm-project/commit/bc3eb524b2d1dcc3e48161cd2eb80a2364fdc097
Author: adams381 <adams at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGen/builtin-atomic-is-lock-free.c
Log Message:
-----------
[CIR] Lower __atomic_is_lock_free / __c11_atomic_is_lock_free (#205862)
`__atomic_is_lock_free` and `__c11_atomic_is_lock_free` were routed to
`errorNYI` in CIRGen, so `std::atomic<T>::is_lock_free()` failed to
compile under `-fclangir` whenever the query wasn't constant-folded --
which is what the libcxx atomics lock-free tests hit.
This mirrors classic CodeGen (`CGBuiltin.cpp`): emit a call to the
runtime entry `bool __atomic_is_lock_free(size_t size, void *ptr)`.
`__atomic_is_lock_free` forwards its pointer argument;
`__c11_atomic_is_lock_free` passes a null pointer, since an `_Atomic`
object is always suitably aligned. `__atomic_test_and_set` /
`__atomic_clear` stay NYI.
The lowered call omits the `noundef`/`zeroext` argument and return
attributes classic emits, and the declaration picks up `dso_local`.
That's the existing CIR libcall attribute gap, so the test uses split
`LLVMCIR`/`OGCG` prefixes where the two diverge and a shared skeleton
where they match.
Commit: ebc2f7946ad76daa1c4db18fc9196d94845e6946
https://github.com/llvm/llvm-project/commit/ebc2f7946ad76daa1c4db18fc9196d94845e6946
Author: adams381 <adams at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
A clang/test/CIR/CodeGen/cleanup-scope-throw-caught.cpp
Log Message:
-----------
[CIR] Fix lost catch clauses on EH landing pads (#205638)
A throw caught by an enclosing handler could call std::terminate instead of
entering the handler. The smallest trigger is a try that destroys a local and
throws a new-expression whose type has a throwing constructor: two cleanups
then sit on the path to the handler and produce two cir.eh.initiate operations
that funnel into one cir.eh.dispatch. The same bug also asserted on ordinary
nested try/catch and dropped the outer handler's catch clause from the inner
landing pad on a nested throw.
ItaniumEHLowering::lowerEhInitiate derived each landing pad's catch clauses
while destructively walking the eh_token graph, tying a correctness property
to lowering order: whichever initiate lowered first tore down the shared cir.br
edges, so the other reached no dispatch and kept an empty catch_type_list -- a
cleanup-only landing pad that resumes past the handler.
lowerFunc now does a read-only walk first. For each initiate it collects every
dispatch the exception can reach (innermost first, preserving nested catch
order) and records the catch_type_list, plus the cleanup clause when a cleanup
lies on the unwind path. Each dispatch is lowered once, after every initiate has
been processed.
Follow-up to #199121, which added cleanup-scope throw handling for the
single-dispatch case.
Commit: ab3d63cc080b767f97a23f4efc6cf109be084679
https://github.com/llvm/llvm-project/commit/ab3d63cc080b767f97a23f4efc6cf109be084679
Author: Shafik Yaghmour <shafik.yaghmour at intel.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
Log Message:
-----------
[Clang-tools-extra] Add missing values to CharacteristicKindStrings (#205455)
Static analysis flagged that we were indexing CharacteristicKindStrings
in PPCallbacksTracker::FileChanged based on the values of
SrcMgr::CharacteristicKind which would access outside array bounds for
some values of the enum. As far I can see all value of the enum are
possible when calling FileChanged and so the array should indeed cover
all values. So I added the missing values to the array.
Commit: 291a2d12fec082a234cb1d800723acdb0fd32f8d
https://github.com/llvm/llvm-project/commit/291a2d12fec082a234cb1d800723acdb0fd32f8d
Author: Teresa Johnson <tejohnson at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/ThinLTO/X86/memprof-icp.ll
Log Message:
-----------
[MemProf] Make ICP test check compared target more strictly (#201656)
We intend to check that we are comparing to the original uncloned
target, but weren't checking for EOL. Add the EOL check.
Commit: 65d16616f810d22e5bcfa2abe7b769172bc260bf
https://github.com/llvm/llvm-project/commit/65d16616f810d22e5bcfa2abe7b769172bc260bf
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
Log Message:
-----------
[lldb][gdb-remote] Send QSetSTDIOWindowSize for a 0x0 size (#205772)
The client uses a 0x0 STDIO window size as a deliberate signal to the
server that there is no client terminal, so the server should redirect
the inferior's stdio over anonymous pipes instead of a ConPTY (on
Windows).
This is a follow up to https://github.com/llvm/llvm-project/pull/203562.
rdar://178725958
Commit: 99f4b63a79ecbaed60be14fcea05279e8e16e9de
https://github.com/llvm/llvm-project/commit/99f4b63a79ecbaed60be14fcea05279e8e16e9de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
Log Message:
-----------
AMDGPU: Fix wrong triple in rotate-add test (#205863)
This was overwritten by the command line anyway.
Commit: 7ede8a4c665bb999f35ebc0293dd49812329e2bd
https://github.com/llvm/llvm-project/commit/7ede8a4c665bb999f35ebc0293dd49812329e2bd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/test/CIR/CodeGen/constant-inits.cpp
M clang/test/CIR/CodeGen/record-zero-init-padding.c
Log Message:
-----------
[NFC][CIR] Fix test that used 'DAG-SAME' (#205867)
'DAG-SAME' isn't a thing in file-check, so these lines weren't being
checked. This patch just puts them all on teh same line as they should
be.
Commit: 5c561a32a5afccb42b2a44f95535dbe6ea939f44
https://github.com/llvm/llvm-project/commit/5c561a32a5afccb42b2a44f95535dbe6ea939f44
Author: Christopher Bate <cbate at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/lib/TableGen/CodeGenHelpers.cpp
A mlir/test/IR/test-successor-verifier.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/mlir-tblgen/constraint-unique.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[MLIR] Fix broken 'Successor<CPred<...>>' functionality in mlir-tblgen (#205375)
Previously, mlir-tblgen would generate incorrect C++ code when
passing a custom constraint to `Successor<...>`. The code would fail
to compile. We lacked end-to-end tests for this functionality and all
in-tree dialects only use `AnySuccessor` for their successors.
Custom C++ predicates for an Operation's successor(s) can be useful
in order to generate verification for certain conditions (e.g. that the
successor is the "next" block). This commit fixes the mlir-tblgen
functionality and adds end-to-end tests in the Test dialect for single
and variadic successors.
Assisted-by: Claude
Commit: 1254310544a8ef042b635bc15b4d70e891fae62b
https://github.com/llvm/llvm-project/commit/1254310544a8ef042b635bc15b4d70e891fae62b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/allow-check.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cttz-elts.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-copy.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-to-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze-other-uses-issue-198094.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
Log Message:
-----------
AMDGPU: Avoid using default subtarget in generated codegen tests (1/9) (#205784)
Fix codegen tests using amdgcn triples without a target-cpu. The dummy
default subtarget has always been an irritating edge case to deal with.
For unknown/mesa3d/amdpal triples, this has been a gfx600-like result
and gfx700-like result for amdhsa. Convert tests to use the explicit
target. This was performed by vibe-coded script, and covers tests
using update_{llc|mir}_test_checks. There are some minor codegen
differences to be expected, mostly due to now having a scheduling
model.
In the future we should forbid trying to codegen the default target.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 334907c294934e7f83867d96035ee3af4f0d63b6
https://github.com/llvm/llvm-project/commit/334907c294934e7f83867d96035ee3af4f0d63b6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A llvm/test/Transforms/IndVarSimplify/exit-value-gep-inbounds.ll
Log Message:
-----------
[IndVars] Add tests with exit uses of inbounds GEPs. (NFC) (#205665)
Commit: 1813ca6e98ac0159aea9ef9aa40cc441d185ec8e
https://github.com/llvm/llvm-project/commit/1813ca6e98ac0159aea9ef9aa40cc441d185ec8e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/livevars-implicitdef.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-copy-like-instrs.mir
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/mcp-use-before-def.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/perfhint.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/regcoalesce-cannot-join-failures.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
M llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir
M llvm/test/CodeGen/AMDGPU/remat-dead-subreg.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-gen.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses.mir
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/setcc-select-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/setcc-select.ll
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.mir
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
M llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
M llvm/test/CodeGen/AMDGPU/splitkit-nolivesubranges.mir
M llvm/test/CodeGen/AMDGPU/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/stop-tail-duplicate-cfg-intrinsic.mir
M llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in generated codegen tests (2/9) (#205785)
Continue migrating away from testing the dummy target, and use
real targets approximating the old behavior. Performed by script.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: a916cb6b5793ee5e853dd308fed9c14940821023
https://github.com/llvm/llvm-project/commit/a916cb6b5793ee5e853dd308fed9c14940821023
Author: Ian Anderson <iana at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Basic/DarwinSDKInfo.h
M clang/lib/Basic/DarwinSDKInfo.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/test/Driver/driverkit-path.c
M clang/test/Driver/incompatible_sysroot.c
M clang/unittests/Basic/DarwinSDKInfoTest.cpp
Log Message:
-----------
[clang][driver][darwin] DarwinSDKInfo doesn't match sufficiently modified triples, doesn't warn for unsupported architectures (#204061)
DarwinSDKInfo::getPlatformPrefix(...) is passed the effective target
triple which has undergone modifications from the original -target
value, which can sometimes even include changes to the triple's
environment. That will cause it to fail to match the platform infos, not
get a platform prefix, and get incorrect default search paths. In the
case where a triple doesn't match, check all platform infos, and if they
all have the same platform prefix, then use that.
DarwinSDKInfo::supportsTriple(...) doesn't try to match the architecture
of the triple. That makes it not emit -Wincompatible-sysroot e.g. when
trying to use arm64 against a sufficiently old macOS SDK or when still
trying to build i386 for macOS. Instead of parsing values from
SDKSettings.json into a Triple, storing the probably-relevant
components, and then comparing those against a full Triple, just store
the parsed triple and get rid of the custom comparison code. While this
does make the matching problem above a little more fragile, in practice
that's well mitigated by treating thumb* and arm* as equivalent, and it
does allow for better diagnostics and overall simpler code.
Clean up some unnecessary copies in DarwinSDKInfo and related code.
Assisted-by: Claude Code
rdar://172876443
Commit: 336aa499241da677ba5dadf055ae3b4b5affba03
https://github.com/llvm/llvm-project/commit/336aa499241da677ba5dadf055ae3b4b5affba03
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A offload/test/offloading/xteam_min_reduction_partial_wave.c
M openmp/device/src/Reduction.cpp
Log Message:
-----------
[offload][OpenMP] Fix partial warp reduction (#205861)
Don't use a full warp for the final cross-team reduction if the
reduction's thread limit is below the warp size.
Claude assisted with the test.
Commit: c6c76421d3c24a7009cffd7fcdb9022c81d9c898
https://github.com/llvm/llvm-project/commit/c6c76421d3c24a7009cffd7fcdb9022c81d9c898
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/lib/abi/CHANGELOG.TXT
Log Message:
-----------
[libc++] Add missing ABI changelog entry for #173283 (#205887)
PR #173283 (Remove numpunct_byname::__init) removed symbols but forgot
to add the relevant entry in the ABI changelog.
Commit: b8c5f6ee633cd4176acdb5153c537e5dafa61063
https://github.com/llvm/llvm-project/commit/b8c5f6ee633cd4176acdb5153c537e5dafa61063
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant64_to_sgpr.mir
M llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr.mir
Log Message:
-----------
AMDGPU: Avoid default subtarget in generated codegen tests (3/9) (#205786)
Another batch of tests updated by script.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: aa939e521d71407d5d653eb8fd6b5ce283e3e32c
https://github.com/llvm/llvm-project/commit/aa939e521d71407d5d653eb8fd6b5ce283e3e32c
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
A llvm/test/CodeGen/SPIRV/pointers/global-vars-untyped.ll
Log Message:
-----------
[SPIR-V] Avoid typed pointers for global variables (#201203)
This PR replaces typed pointers with opaque pointers for global variable
types. Since typed pointers are legal in SPIR-V, the type retrieved when
creating a global variable may be a typed pointer, causing it to leak
into the module. This will break the bitcode parsing of the serialized
module.
Commit: aca3f14c0d24d6d3ddc376ebbe1b5b0636e12ed6
https://github.com/llvm/llvm-project/commit/aca3f14c0d24d6d3ddc376ebbe1b5b0636e12ed6
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/JSON.cpp
M libc/benchmarks/JSONTest.cpp
M libc/benchmarks/LibcBenchmark.cpp
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/LibcBenchmarkTest.cpp
M libc/benchmarks/LibcFunctionPrototypes.h
M libc/benchmarks/LibcMemoryBenchmark.cpp
M libc/benchmarks/LibcMemoryBenchmark.h
M libc/benchmarks/LibcMemoryBenchmarkMain.cpp
M libc/benchmarks/LibcMemoryGoogleBenchmarkMain.cpp
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/benchmarks/MemorySizeDistributions.h
Log Message:
-----------
[libc][benchmark] allow benchmark to be built without llvm support (#200951)
Update benchmark to allow it to be built in runtimes driven mode.
It is still useful to have an in-tree benchmark suite. On my side, I am
working on some allocators related benchmarks. Due to the broken state
of this in-tree benchmark suite, I have to frequently port changes
between two workspace. Also, having benchmark suite can make it easier
to track performance change in a consistent view.
Assisted-by: AI tools, checked manually
Commit: 3021455fcc4d173a92ffad2ac39a11a5dcf8271a
https://github.com/llvm/llvm-project/commit/3021455fcc4d173a92ffad2ac39a11a5dcf8271a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-nullptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ashr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-redundant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-neg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-amount-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shifts.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extractelement-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memsetinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/selected-inst-flags.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in codegen tests (4/9) (#205787)
Continue migrating targets away from codegenning the dummy target
by script.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 5375e9c91c26431923d74793460b20ba7c1b08fa
https://github.com/llvm/llvm-project/commit/5375e9c91c26431923d74793460b20ba7c1b08fa
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove unused MinProfitableTripCount field from ILV (NFC) (#205666)
The MinProfitableTripCount is never read. Remove it.
Commit: fbc32eb9fcf6e16173daabdd3bdbff169dda5917
https://github.com/llvm/llvm-project/commit/fbc32eb9fcf6e16173daabdd3bdbff169dda5917
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M libc/src/math/docs/add_math_function.md
Log Message:
-----------
[libc][docs] updating entrypoints in `add_math_functions.md` (#204700)
It updates the entrypoint documentation, which currently has only two
entrypoints listed (Outdated)
Commit: 8af6c2936d4eb824f853dfaba24722527277a520
https://github.com/llvm/llvm-project/commit/8af6c2936d4eb824f853dfaba24722527277a520
Author: Moazin K. <mkhatti at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir
Log Message:
-----------
[OpenACC] Propagate variable names to ops after materializing recipes. (#205821)
ACCRecipeMaterialization only attaches names to the result of the recipe
being materialized. However, some recipes produce multiple ops that need
to carry the variable name.
This change introduces `acc::getVarNamePlaceholder()`, a placeholder
value for `acc.var_name`. Implementations can attach this placeholder
while building the recipe to any ops that should carry the variable
name. ACCRecipeMaterialization will then replace the placeholder with
the actual variable name while materializing the recipe.
Assisted-by: Claude Code
Commit: 3b5c4ae855e6c2ee173c0cab37b8c6b38f344b8f
https://github.com/llvm/llvm-project/commit/3b5c4ae855e6c2ee173c0cab37b8c6b38f344b8f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/test/CodeGen/DirectX/scalarize-dynamic-vector-index.ll
Log Message:
-----------
[DirectX] Widen i1 indexable temps to i32 in DXILDataScalarization (#205444)
fixes #205443
Dynamically-indexed <N x i1> vectors were lowered to alloca [N x i1]
indexable temps. DXIL booleans are 32-bit in memory, and i1 stack arrays
are mishandled downstream (e.g. WARP returns 1 for every
dynamically-indexed element), producing wrong results for dynamic
bool vector/matrix accesses.
Widen i1 indexable-temp arrays to [N x i32], zero-extending on store and
truncating back to i1 on load, matching DXC. Fixes the dynamic bool
extract/insert miscompile.
We make this change in DXILDataScalarization because this is the pass
that adds the i1 allocas which was the cause of our miscompile.
Assisted by Claude Opus 4.7
Commit: 23e960431d294646b0664f759463529588471fc4
https://github.com/llvm/llvm-project/commit/23e960431d294646b0664f759463529588471fc4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/include/__memory/shared_ptr.h
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
Log Message:
-----------
[libc++] Fix move-only types in std::make_shared (#205819)
https://github.com/llvm/llvm-project/pull/200401 broke `make_shared` and
friends support for move-only types.
Commit: 0b328bc6a50becb35ebfb158dd3de69bd32c5563
https://github.com/llvm/llvm-project/commit/0b328bc6a50becb35ebfb158dd3de69bd32c5563
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang-rt/lib/runtime/__cuda_device.f90
M flang-rt/lib/runtime/cuda_runtime_api.f90
Log Message:
-----------
[Flang-RT] Make __cuda_builtins dependency explicit (#205895)
When compiling CUDA-Fortran, a use of the module __cuda_builtins is
added implicitly by the compiler. Add explicit use so CMake can consider
it in the built order. The other modules that are compiled with CUDA
enabled (`cudadevice.f90` and `cooperativegroups.f90`) transitively
depend on depend on __cuda_builtins as well.
Commit: f0fd1ee64993eca0acb9d847ebf351ed7eb10bac
https://github.com/llvm/llvm-project/commit/f0fd1ee64993eca0acb9d847ebf351ed7eb10bac
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/include/lldb/Utility/FileSpec.h
Log Message:
-----------
[lldb][NFC] Correct documentation for FileSpec::GetFileNameExtension (#205871)
Commit: 0a00381c67afcbb411679407c96e6b3e6613ee2f
https://github.com/llvm/llvm-project/commit/0a00381c67afcbb411679407c96e6b3e6613ee2f
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
A llvm/test/Transforms/GVN/invariant-load-intrinsic.ll
A llvm/test/Transforms/InstCombine/invariant-load-like-sink.ll
M llvm/test/Transforms/Sink/invariant-load.ll
Log Message:
-----------
[llvm][NFC] Add invariant.load intrinsic precommit tests (#205894)
Add tests to show what does/doesn't currently happen to !invariant.load
on intrinsics that read memory.
AI disclosure: Codex wrote these. They got put into new files in many cases and I _think_ that's a reasonable call.
Co-authored-by: Codex <codex at openai.com>
Commit: f2459f9ec89db238fb84b13a75ae38867d0b6cb2
https://github.com/llvm/llvm-project/commit/f2459f9ec89db238fb84b13a75ae38867d0b6cb2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
Log Message:
-----------
[VPlan] Handle loads feeding memops in makeMemOpWideningDecisions (NFC) (#196842)
The legacy cost model force-scalarizes loads feeding memory ops, unless
the target prefers vector addressing. Add the logic to
makeMemOpWideningDecisions. Currently this should match the legacy
decision as-is. Should be test-able in VPlan-printing test if legacy
decisions are done in a separate sub-pass as
https://github.com/llvm/llvm-project/pull/182593
PR: https://github.com/llvm/llvm-project/pull/196842
Commit: fc171ea41ab66eb05c27e939dd12e12de5da7423
https://github.com/llvm/llvm-project/commit/fc171ea41ab66eb05c27e939dd12e12de5da7423
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
[GettingInvolved] Add wg-hlsl to online sync ups (#205891)
This has been on the community calendar for a very long time, but
apparently we never added it here.
Commit: 749abf04eadaa38549e0168f1f6def513c86bee1
https://github.com/llvm/llvm-project/commit/749abf04eadaa38549e0168f1f6def513c86bee1
Author: Gedare Bloom <gedare at rtems.org>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] annotate inline assembly parens (#201703)
Annotate the opening and closing parens of inline assembly. This will
make other improvements related to inline assembly easier.
Commit: de3787e56829165917efef19c4ef030f230dc9e8
https://github.com/llvm/llvm-project/commit/de3787e56829165917efef19c4ef030f230dc9e8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp-on.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug_frame.ll
M llvm/test/CodeGen/AMDGPU/default_amdhsa_code_object_version.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/eh_frame.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
M llvm/test/CodeGen/AMDGPU/fceil.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
M llvm/test/CodeGen/AMDGPU/fold-cndmask.mir
M llvm/test/CodeGen/AMDGPU/fold-fmul-to-neg-abs.ll
M llvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
M llvm/test/CodeGen/AMDGPU/fold-over-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
M llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in hand-written codegen tests (5/9) (#205788)
Introduce -mcpu arguments in tests that did not need check line updates.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 7f0fad687d76fecc087fe6aca70d7086655d2e41
https://github.com/llvm/llvm-project/commit/7f0fad687d76fecc087fe6aca70d7086655d2e41
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
M llvm/test/CodeGen/AMDGPU/frame-lowering-entry-all-sgpr-used.mir
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-deduced-arg-attr.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3.ll
M llvm/test/CodeGen/AMDGPU/huge-number-operand-folds.mir
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/invalid-inline-asm-constraint-crash.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel_code_t_recurse.ll
M llvm/test/CodeGen/AMDGPU/knownbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/lcssa-optnone.ll
M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.hsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/load-global-f64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
M llvm/test/CodeGen/AMDGPU/lower-range-metadata-intrinsic-call.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in hand-written codegen tests (6/9) (#205789)
Introduce -mcpu arguments in tests which didn't require check line
updates.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: 0f1abfe0afe13b0fc101721aeef64d2169a32e7e
https://github.com/llvm/llvm-project/commit/0f1abfe0afe13b0fc101721aeef64d2169a32e7e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/sections01.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/workshare02.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.h
Log Message:
-----------
[flang][OpenMP] Move clause validity checks into OpenMP-specific code (#205607)
The checks for syntactic properties of clauses (e.g. uniqueness, being
required, etc.) were originally handled by infrastructure common to
OpenMP and OpenACC. That infrastructure, however, is not fully equipped
to handle OpenMP needs: being unable to express version-based properties
or clause set properties being two prominent examples.
The first step towards fulfilling the OpenMP requirements it is to
transfer the handling of clause validity checks into OpenMP-specific
code, which can then be modified without interfering with OpenACC.
In addition to that, this PR also changes the way that clauses on end-
directives are handled: first, a clause appearing on an end-directive is
checked to be allowed to appear on an end-directive, then all clauses
from the begin- and the end-directives are tested together. This unifies
checks for uniqueness of clauses that can appear in both places.
Commit: c002097b9bc07f858edb16947c6500077d2b2b17
https://github.com/llvm/llvm-project/commit/c002097b9bc07f858edb16947c6500077d2b2b17
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
Log Message:
-----------
[VPlan] Remove unused VPlanPrinter::getOrCreateName(const VPBlockBase*) (#205896)
The block-name printers use getName()/getUID() directly; this overload
has no callers.
Commit: 988a1a212035a0ee1688a0d1b1d2fbc331151ce5
https://github.com/llvm/llvm-project/commit/988a1a212035a0ee1688a0d1b1d2fbc331151ce5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/mem-builtins.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
M llvm/test/CodeGen/AMDGPU/movrels-bug.mir
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
M llvm/test/CodeGen/AMDGPU/no-hsa-graphics-shaders.ll
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/nullptr-long-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/opt_exec_copy_fold.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-saveexec.mir
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/reorder-stores.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/selectcc-opt.ll
M llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/stack-size-overflow.ll
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/AMDGPU/subreg_interference.mir
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence-keep-copy-on-use.mir
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undef-build-vector.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
Log Message:
-----------
AMDGPU: Avoid default subtarget in hand-written codegen tests (7/9) (#205790)
Introduce an -mcpu argument to tests missing it to avoid codegening
the default dummy target. These are cases that didn't require adjusting
the check lines.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: f9aa739d5ad1798f68ceedd97af77e9f1209001f
https://github.com/llvm/llvm-project/commit/f9aa739d5ad1798f68ceedd97af77e9f1209001f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-trailing.mir
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in hand-written codegen tests (8/9) (#205791)
Introduce the missing -mcpu argument to some tests which are not
autogenerated.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
Commit: c9f4ba01521f2a1b5610235a1766fa03b25309eb
https://github.com/llvm/llvm-project/commit/c9f4ba01521f2a1b5610235a1766fa03b25309eb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
Log Message:
-----------
AMDGPU: Avoid default subtarget in hand-written codegen tests (9/9) (#205792)
Fix some manual test checks using amdgcn triples without -mcpu. These
require the most careful consideration. The highest impact changes are the
optimizations removing execz branch now that there's a sched model.
Commit: 9b84d3b85642edf373163f395ec65ba3fcac1fc1
https://github.com/llvm/llvm-project/commit/9b84d3b85642edf373163f395ec65ba3fcac1fc1
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/include/__ranges/take_while_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.take_while/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied `[[nodiscard]]` to `take_while_view` (#205172)
Towards #172124
# References:
- https://wg21.link/range.take_while
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: ad850b8176cdb122ca1b8f0e1dce718e4f60f66d
https://github.com/llvm/llvm-project/commit/ad850b8176cdb122ca1b8f0e1dce718e4f60f66d
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M libcxx/include/__ranges/split_view.h
A libcxx/test/libcxx/ranges/range.adaptors/range.split/nodiscard.verify.cpp
Log Message:
-----------
[libc++][ranges] Applied `[[nodiscard]]` to `split_view` (#205161)
Towards #172124
# References:
- https://wg21.link/range.split
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 29bf2c4068a4c7a2c4f15e9982d4ae7cef7e50ec
https://github.com/llvm/llvm-project/commit/29bf2c4068a4c7a2c4f15e9982d4ae7cef7e50ec
Author: mygitljf <101249452+mygitljf at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M mlir/test/IR/visitors.mlir
M mlir/test/lib/IR/TestVisitors.cpp
Log Message:
-----------
[mlir] Fix visitor block erasure (#205854)
I made the visitor test drop block-defined value uses before erasing the
block and added a small regression case.
Fixes #205717
Commit: 1f46c12683f0683c13d86016d1ecba6392c08060
https://github.com/llvm/llvm-project/commit/1f46c12683f0683c13d86016d1ecba6392c08060
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/gpu-exceptions.cpp
Log Message:
-----------
[Clang] Disable C++ exceptions by default for GPU targets (#205402)
Summary:
Exceptions are not supporter, and likely will never be supported, on
GPUs. The SIMT model makes context switching nearly impossible, and
building an unwinder would require stashing a register file that is
over 8 KiB these days. There's precedent to disable this for the target,
so we should just do this.
Offloading languages have their own weird handling, some chimera that
just accepts exceptions but turns them into traps on the device side, so
we leave that unaffected.
Commit: 1774a65964a0b1b8220bf440991cfc3af2896b06
https://github.com/llvm/llvm-project/commit/1774a65964a0b1b8220bf440991cfc3af2896b06
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/test/CodeGenCUDA/offload_via_llvm.cu
M offload/include/Shared/APITypes.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
Log Message:
-----------
[Offload] Unify the kernel argument passing (#205224)
Summary:
Currently we have two conflicting methods of passing kernel arguments, a
flat pointer + size and an array of pointers. We recently decided to
move the offload API to the latter because it is more generic and lets
you construct the other formats.
This PR primarily just changes the format and the one existing core use.
The uses should be simplier now. Future changes will change the OpenMP
argument parsing.
Commit: a18c09a05d6d6a950b1b7cd9c59a43fcee5cb442
https://github.com/llvm/llvm-project/commit/a18c09a05d6d6a950b1b7cd9c59a43fcee5cb442
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/Analysis/Scalable/PointerFlow/entity-name-no-conflict.cpp
M clang/unittests/Index/IndexTests.cpp
Log Message:
-----------
[clang][index][USR] GenLoc prints file entry at most once, allow repeated offsets (#205430)
`GenLoc` previously printed the source location at most once per USR,
gated by a member flag toggled on the first call. During the recursive
visit, if both an outer and an inner decl needed to print the location,
only the outer one was printed. When the outer decl did not need the
offset, no offset was ever printed. For example, the USR of
`Holder<decltype([]{})>::method` depends on the location of the type of
the lambda but the outer decl prints the file entry only, which disables
offset printing.
Change the logic so the file-entry part of the location is printed at
most once (it must be identical), while offsets of sub-decl locations
may be printed multiple times.
rdar://180654884
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: d9906882fc613471ab51e7185094efae893066de
https://github.com/llvm/llvm-project/commit/d9906882fc613471ab51e7185094efae893066de
Author: adams381 <adams at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
A clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
Log Message:
-----------
[CIR] Implement ArgKind::Expand in CallConvLowering (#201718)
ArgKind::Expand classifies a struct argument for flattening: each field
becomes a separate scalar argument at the ABI level. Classic CodeGen
calls this "struct expansion" — used on targets like MIPS and some ARM
calling conventions.
CIRABIRewriteContext previously emitted errorNYI at both classification
sites. The replacement covers three call paths. In buildNewArgTypes,
the original struct type is replaced by one wire type per field. In
insertArgCoercion, the single struct block argument is replaced by N
scalar block arguments and an alloca+get_member+store+load sequence at
the entry block reassembles them for body uses; a running block-argument
index (rather than classIdx + sretOffset) correctly tracks the expanded
slot count when multiple Expand args or sret+Expand combinations appear.
The Ignore-drop loop gains a classToBlockArg pre-computation so that
Ignore args following Expand args are erased at the correct index. In
rewriteCallSite, cir.extract_member decomposes the struct operand into
its constituent fields, which become separate call arguments.
Asserts guard the two structural invariants: Expand requires a struct
type (not a union) and at least one field.
Commit: 512677061a0cd521f800eefa53dbf086bf37c3e6
https://github.com/llvm/llvm-project/commit/512677061a0cd521f800eefa53dbf086bf37c3e6
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
Log Message:
-----------
[CIR][CUDA] Replace poison attr usages to undef for global shared/shadow/device-shadow instantiation (#204663)
Commit: 9b29fb8c82117f5dfae60591b568ef589b3c82d2
https://github.com/llvm/llvm-project/commit/9b29fb8c82117f5dfae60591b568ef589b3c82d2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/test/Semantics/cuf05.cuf
Log Message:
-----------
[flang] Fix testcase after 0b328bc6a50becb35ebfb158dd3de69bd32c5563 (#205914)
Commit: abe675f638d38ece25f3445ad95f221416c77a20
https://github.com/llvm/llvm-project/commit/abe675f638d38ece25f3445ad95f221416c77a20
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-decomp-decls.cpp
M clang/test/CIR/CodeGen/global-dtor-union-narrowed.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/global-temp-dtor.cpp
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/static-members.cpp
M clang/test/CIR/CodeGen/thread-local-in-func.cpp
M clang/test/CIR/CodeGenCXX/global-refs.cpp
Log Message:
-----------
[CIR] Fix return type of __cxa_atexit (#205905)
The return type should be 'int', not 'void'. We even have a comment
above the code that generates this that it should be an int.
This patch changes it and updates all the affected tests.
Commit: 52de71124b7095d9323953b3cfeeaee4d42bb5af
https://github.com/llvm/llvm-project/commit/52de71124b7095d9323953b3cfeeaee4d42bb5af
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
Log Message:
-----------
[AArch64] Fix stack protectors with tiny code model. (#205668)
The tiny code model was using the address of the stack protector as the
stack protector, which doesn't provide the expected protection. Fix it
to use the usual adrp+ldr.
Commit: b05f34c21a8e552ca5f297c2de3f55dcc09df73c
https://github.com/llvm/llvm-project/commit/b05f34c21a8e552ca5f297c2de3f55dcc09df73c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Do not add shape when no references are involved (#205919)
Commit: 53e0a1f0d7e24089114b3a5719eed18028474c17
https://github.com/llvm/llvm-project/commit/53e0a1f0d7e24089114b3a5719eed18028474c17
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/indvar-overflow-check-scalable-tc.ll
A llvm/test/Transforms/LoopVectorize/RISCV/indvar-overflow-check-scalable-tc.ll
Log Message:
-----------
[LV] Use getSmallBestKnownTC in IV-overflow-check (#195226)
It has the benefit of also handling scalable TCs.
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: 67ab8b4ccd86bb7358d71ae56e215f1d8b9ab9d5
https://github.com/llvm/llvm-project/commit/67ab8b4ccd86bb7358d71ae56e215f1d8b9ab9d5
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
Log Message:
-----------
[flang][cuda] Fix predefined variable processing with inlining (#205888)
The pass was skipping some variables when they were inlined inside a cuf
kernel for example.
Commit: d1c291b9774fb148e412fdaf9e5458b8aa9bca55
https://github.com/llvm/llvm-project/commit/d1c291b9774fb148e412fdaf9e5458b8aa9bca55
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/affinity-clause.f90
M flang/test/Semantics/OpenMP/allocate02.f90
M flang/test/Semantics/OpenMP/allocate04.f90
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/allocators03.f90
M flang/test/Semantics/OpenMP/atomic-compare.f90
M flang/test/Semantics/OpenMP/atomic.f90
M flang/test/Semantics/OpenMP/atomic01.f90
M flang/test/Semantics/OpenMP/cancel.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-variant-match.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
M flang/test/Semantics/OpenMP/default.f90
M flang/test/Semantics/OpenMP/detach02.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/flush01.f90
M flang/test/Semantics/OpenMP/flush02.f90
M flang/test/Semantics/OpenMP/graph-id.f90
M flang/test/Semantics/OpenMP/graph-reset.f90
M flang/test/Semantics/OpenMP/if-clause-45-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-45.f90
M flang/test/Semantics/OpenMP/if-clause-50-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-50.f90
M flang/test/Semantics/OpenMP/interchange-permutation.f90
M flang/test/Semantics/OpenMP/loop-transformation-clauses01.f90
M flang/test/Semantics/OpenMP/loop-transformation-construct01.f90
M flang/test/Semantics/OpenMP/masked.f90
M flang/test/Semantics/OpenMP/nontemporal.f90
M flang/test/Semantics/OpenMP/order-clause01.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
M flang/test/Semantics/OpenMP/requires01.f90
M flang/test/Semantics/OpenMP/resolve02.f90
M flang/test/Semantics/OpenMP/scan1.f90
M flang/test/Semantics/OpenMP/sections01.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/target-update01.f90
M flang/test/Semantics/OpenMP/taskgroup01.f90
M flang/test/Semantics/OpenMP/taskloop04.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M flang/test/Semantics/OpenMP/tile01.f90
M flang/test/Semantics/OpenMP/workshare02.f90
M flang/test/Semantics/indirect02.f90
Log Message:
-----------
[flang][OpenMP] Unify wording of directive names in diagnostics (#205608)
Commit: bbba4639e3fab5eb2751beef8d09490d7d7369de
https://github.com/llvm/llvm-project/commit/bbba4639e3fab5eb2751beef8d09490d7d7369de
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/bindings/interface/SBValueExtensions.i
M lldb/test/API/functionalities/data-formatter/data-formatter-python-synth/TestDataFormatterPythonSynth.py
Log Message:
-----------
[lldb] Support indexes of hidden children in SBValue.child accessor (#205604)
A value object can have "hidden" children, which are children which can
be access by an index that is past the number of children reported by
the value object. This is used for example with `$$dereference$$`
children. It's also useful for designing a value object which shows only
a subset of its children.
This change updates the `SBValue.child` accessor to allow indexes that
are past the reported number children, to match the behavior or
`GetChildAtIndex`.
Commit: e749849a869f06e209c24ec1fdd66ea8cfeeaf8d
https://github.com/llvm/llvm-project/commit/e749849a869f06e209c24ec1fdd66ea8cfeeaf8d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A flang/test/Semantics/CUDA/cuf-constant-generic-unified.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures01.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures02.cuf
A flang/test/Semantics/CUDA/cuf-generic-literal-host.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-error.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-generic.cuf
A flang/test/Semantics/CUDA/cuf-matching-distance.cuf
A flang/test/Semantics/CUDA/cuf-missing-intrinsic-modules.cuf
A flang/test/Semantics/CUDA/cuf-proc-attr-error.cuf
A flang/test/Semantics/CUDA/cuf01.cuf
A flang/test/Semantics/CUDA/cuf02.cuf
A flang/test/Semantics/CUDA/cuf03.cuf
A flang/test/Semantics/CUDA/cuf04.cuf
A flang/test/Semantics/CUDA/cuf05.cuf
A flang/test/Semantics/CUDA/cuf06.cuf
A flang/test/Semantics/CUDA/cuf07.cuf
A flang/test/Semantics/CUDA/cuf08.cuf
A flang/test/Semantics/CUDA/cuf09.cuf
A flang/test/Semantics/CUDA/cuf10.cuf
A flang/test/Semantics/CUDA/cuf11.cuf
A flang/test/Semantics/CUDA/cuf12.cuf
A flang/test/Semantics/CUDA/cuf13.cuf
A flang/test/Semantics/CUDA/cuf14.cuf
A flang/test/Semantics/CUDA/cuf15.cuf
A flang/test/Semantics/CUDA/cuf16.cuf
A flang/test/Semantics/CUDA/cuf17.cuf
A flang/test/Semantics/CUDA/cuf18.cuf
A flang/test/Semantics/CUDA/cuf19.cuf
A flang/test/Semantics/CUDA/cuf20.cuf
A flang/test/Semantics/CUDA/cuf21.cuf
A flang/test/Semantics/CUDA/cuf22.cuf
A flang/test/Semantics/CUDA/cuf23.cuf
A flang/test/Semantics/CUDA/cuf24.cuf
A flang/test/Semantics/CUDA/cuf25.cuf
A flang/test/Semantics/CUDA/cuf26.cuf
A flang/test/Semantics/CUDA/cuf27.cuf
A flang/test/Semantics/CUDA/cuf28.cuf
A flang/test/Semantics/CUDA/cuf29.cuf
A flang/test/Semantics/CUDA/cuf30.cuf
R flang/test/Semantics/cuf-constant-generic-unified.cuf
R flang/test/Semantics/cuf-device-procedures01.cuf
R flang/test/Semantics/cuf-device-procedures02.cuf
R flang/test/Semantics/cuf-generic-literal-host.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-error.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-generic.cuf
R flang/test/Semantics/cuf-matching-distance.cuf
R flang/test/Semantics/cuf-missing-intrinsic-modules.cuf
R flang/test/Semantics/cuf-proc-attr-error.cuf
R flang/test/Semantics/cuf01.cuf
R flang/test/Semantics/cuf02.cuf
R flang/test/Semantics/cuf03.cuf
R flang/test/Semantics/cuf04.cuf
R flang/test/Semantics/cuf05.cuf
R flang/test/Semantics/cuf06.cuf
R flang/test/Semantics/cuf07.cuf
R flang/test/Semantics/cuf08.cuf
R flang/test/Semantics/cuf09.cuf
R flang/test/Semantics/cuf10.cuf
R flang/test/Semantics/cuf11.cuf
R flang/test/Semantics/cuf12.cuf
R flang/test/Semantics/cuf13.cuf
R flang/test/Semantics/cuf14.cuf
R flang/test/Semantics/cuf15.cuf
R flang/test/Semantics/cuf16.cuf
R flang/test/Semantics/cuf17.cuf
R flang/test/Semantics/cuf18.cuf
R flang/test/Semantics/cuf19.cuf
R flang/test/Semantics/cuf20.cuf
R flang/test/Semantics/cuf21.cuf
R flang/test/Semantics/cuf22.cuf
R flang/test/Semantics/cuf23.cuf
R flang/test/Semantics/cuf24.cuf
R flang/test/Semantics/cuf25.cuf
R flang/test/Semantics/cuf26.cuf
R flang/test/Semantics/cuf27.cuf
R flang/test/Semantics/cuf28.cuf
R flang/test/Semantics/cuf29.cuf
R flang/test/Semantics/cuf30.cuf
Log Message:
-----------
[flang][cuda][NFC] Move CUDA Fortran semantic tests to a dedicated directory (#205927)
Commit: 0ce7d23c2af4fbb828323423598d9c7f0bd10bb4
https://github.com/llvm/llvm-project/commit/0ce7d23c2af4fbb828323423598d9c7f0bd10bb4
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
A clang-tools-extra/test/clang-doc/Inputs/DR-141990.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/database_template.json
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Rectangle.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Shape.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Calculator.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Circle.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Rectangle.cpp
A clang-tools-extra/test/clang-doc/Inputs/builtin_types.cpp
M clang-tools-extra/test/clang-doc/Inputs/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/class.cpp
A clang-tools-extra/test/clang-doc/Inputs/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/Inputs/compact.cpp
A clang-tools-extra/test/clang-doc/Inputs/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/Inputs/concept.cpp
A clang-tools-extra/test/clang-doc/Inputs/conversion_function.cpp
M clang-tools-extra/test/clang-doc/Inputs/enum.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-specifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/index.cpp
A clang-tools-extra/test/clang-doc/Inputs/inheritance.cpp
A clang-tools-extra/test/clang-doc/Inputs/long-name.cpp
A clang-tools-extra/test/clang-doc/Inputs/method-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/multiple-namespaces.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-index.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace-html-md.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/nested-namespace.cpp
M clang-tools-extra/test/clang-doc/Inputs/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file-public.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file.cpp
A clang-tools-extra/test/clang-doc/Inputs/templates.cpp
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.css
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.js
A clang-tools-extra/test/clang-doc/Inputs/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/array-type.cpp
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/basic-project.test
R clang-tools-extra/test/clang-doc/builtin_types.cpp
R clang-tools-extra/test/clang-doc/class-partial-specialization.cpp
R clang-tools-extra/test/clang-doc/comments-in-macros.cpp
R clang-tools-extra/test/clang-doc/compact.cpp
R clang-tools-extra/test/clang-doc/conversion_function.cpp
R clang-tools-extra/test/clang-doc/enum.cpp
R clang-tools-extra/test/clang-doc/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/array-type.cpp
A clang-tools-extra/test/clang-doc/html/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class.cpp
A clang-tools-extra/test/clang-doc/html/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/html/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/html/conversion_function.cpp
A clang-tools-extra/test/clang-doc/html/enum.cpp
A clang-tools-extra/test/clang-doc/html/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/index.cpp
A clang-tools-extra/test/clang-doc/html/long-name.cpp
A clang-tools-extra/test/clang-doc/html/member-function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/mustache-index.cpp
A clang-tools-extra/test/clang-doc/html/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/html/namespace.cpp
A clang-tools-extra/test/clang-doc/html/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/html/templates.cpp
A clang-tools-extra/test/clang-doc/html/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/index.cpp
M clang-tools-extra/test/clang-doc/json/class-partial-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
A clang-tools-extra/test/clang-doc/json/compact.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
A clang-tools-extra/test/clang-doc/json/conversion_function.cpp
A clang-tools-extra/test/clang-doc/json/enum.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/function-specifiers.cpp
A clang-tools-extra/test/clang-doc/json/index.cpp
M clang-tools-extra/test/clang-doc/json/inheritance.cpp
A clang-tools-extra/test/clang-doc/json/long-name.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/multiple-namespaces.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
A clang-tools-extra/test/clang-doc/json/templates.cpp
R clang-tools-extra/test/clang-doc/long-name.cpp
A clang-tools-extra/test/clang-doc/md/array-type.cpp
A clang-tools-extra/test/clang-doc/md/builtin_types.cpp
A clang-tools-extra/test/clang-doc/md/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/md/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/md/enum.cpp
A clang-tools-extra/test/clang-doc/md/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/md/member-function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/md/namespace.cpp
A clang-tools-extra/test/clang-doc/md/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/md/templates.cpp
R clang-tools-extra/test/clang-doc/member-function-pointer-type.cpp
R clang-tools-extra/test/clang-doc/mustache-index.cpp
R clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
R clang-tools-extra/test/clang-doc/namespace.cpp
R clang-tools-extra/test/clang-doc/nested-pointer-qualifiers.cpp
R clang-tools-extra/test/clang-doc/single-file-public.cpp
R clang-tools-extra/test/clang-doc/single-file.cpp
R clang-tools-extra/test/clang-doc/templates.cpp
R clang-tools-extra/test/clang-doc/typedef-alias.cpp
A clang-tools-extra/test/clang-doc/yaml/builtin_types.cpp
A clang-tools-extra/test/clang-doc/yaml/conversion_function.cpp
A clang-tools-extra/test/clang-doc/yaml/single-file-public.cpp
A clang-tools-extra/test/clang-doc/yaml/single-file.cpp
A clang-tools-extra/test/clang-doc/yaml/templates.cpp
Log Message:
-----------
[clang-doc] Try to make testing more uniform (#205586)
Today clang-doc has tests for its various backends that use the same
input files, and mix the checks for each format. This leads to very
large test files that are quite hard to update or maintain. Thus far
we've assumed that this is better than updating several files, but as we
leverage mustache and JSON more and more to test feature completeness,
much of the output complexity is now limited to each backend and its
mustache templates. To make this simpler to maintain, we can lean into
common test Inputs keeping the annotate source separate from the test
checks, and split the checks out into their own directory hierarchy.
This patch is mostly mechanical rewriting of code. This was done with
the assistance of an LLM, but was checked by me, and verified with
instrumentation based coverage that we did not lose any line coverage.
Commit: 2c71c11a07003c0e0714a7b7436a767fb09761e5
https://github.com/llvm/llvm-project/commit/2c71c11a07003c0e0714a7b7436a767fb09761e5
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointResolverName.h
M lldb/source/Breakpoint/BreakpointResolverName.cpp
Log Message:
-----------
[lldb] Replace ConstString in BreakpointResovlerName::AddNameLookup signature (#205924)
Commit: 537b7f85ac789f296e89afdd7b0763d0ff611e78
https://github.com/llvm/llvm-project/commit/537b7f85ac789f296e89afdd7b0763d0ff611e78
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
opt: Use Triple overloads of TargetRegistry lookup (#205889)
Continue migrating target creation functions to use
Triple instead of StringRef.
Commit: 38f6ccbcc47e4b0b4f8aa40cd3c106ed5a320709
https://github.com/llvm/llvm-project/commit/38f6ccbcc47e4b0b4f8aa40cd3c106ed5a320709
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
A clang/test/CodeGen/X86/newpm.c
Log Message:
-----------
[Clang] Optionally use NewPM to run CodeGen Pipeline (#205928)
This patch adds a new -cc1 option to clang that runs the codegen
pipeline using the NewPM. This enables easy testing of this flow through
clang.
Lands #191579 actually, because that PR I accidentally landed into a
user branch.
Commit: 6b42621d92b0ae1322a93ff288979cb09774ebbf
https://github.com/llvm/llvm-project/commit/6b42621d92b0ae1322a93ff288979cb09774ebbf
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/Expression/DWARFExpression.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Reject DW_OP_deref_size with size 0 (#205911)
`Evaluate_DW_OP_deref` validated that the dereference size was `<= 8`
but
not that it was non-zero. The DWARF expression evaluator parses
untrusted operands, so a `DW_OP_deref_size` with size operand `0` is
reachable (it is hit by the lldb-dwarf-expression-fuzzer).
A zero dereference size flows into `DerefSizeExtractDataHelper`, which
constructs a `DataExtractor` with `addr_size == 0` and aborts on its
assertion. The unit test that feeds `DW_OP_lit0, DW_OP_deref_size, 0x00`
shows the crash:
```
[ RUN ] DWARFExpressionMockProcessTest.DW_OP_deref_size_zero
Assertion failed: (addr_size >= 1 && addr_size <= 8), function
DataExtractor, file DataExtractor.cpp, line 134.
#8 DataExtractor::DataExtractor(...)
#11 DWARFExpression::Evaluate(...)
```
Reject a zero dereference size with an error, alongside the existing
`size > 8` check.
Adds `DWARFExpressionMockProcessTest.DW_OP_deref_size_zero`, which
aborts on the assertion above without the fix.
Commit: dc2b5bf63f613a2192e26f60543fcb8c5c963b54
https://github.com/llvm/llvm-project/commit/dc2b5bf63f613a2192e26f60543fcb8c5c963b54
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
Log Message:
-----------
[flang][cuda][acc] Fix use_device device attribute for USE-renamed variables (#205902)
Example:
```fortran
module m
complex(8), allocatable, pinned :: v(:,:)
interface callee
subroutine callee_x(x, n)
complex(8), device :: x(:,:)
integer :: n
end subroutine
end interface
end module
subroutine driver(n)
use m, only : callee, v_renamed => v
integer :: n
!$acc data copy(v_renamed)
!$acc host_data use_device(v_renamed)
call callee(v_renamed, n)
!$acc end host_data
!$acc end data
end subroutine
```
In this code, the `use_device` device copy was keyed under the ultimate
name (`v`), so `v_renamed` resolved to the host (PINNED) symbol and
generic resolution failed.
Fix: key the device copy under the local renamed name, and resolve its
host binding in lowering via the enclosing scope's ultimate.
Commit: 294f9bead7b02e37ad35919a364df99a75adcb1e
https://github.com/llvm/llvm-project/commit/294f9bead7b02e37ad35919a364df99a75adcb1e
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes a18c09a (#205917)
This fixes a18c09a05d6d6a950b1b7cd9c59a43fcee5cb442.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: eea06905d642dfd1c37259bee3f3dd43e0dabd00
https://github.com/llvm/llvm-project/commit/eea06905d642dfd1c37259bee3f3dd43e0dabd00
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll
Log Message:
-----------
[SLP]Fix crash erasing reduced value extract still used by reduction
A reduced value vectorized in an operand subtree is replaced by an
extractelement that can be excluded from another reduction group's
candidates as incompatible, yet it is still consumed by the final
reduction. Keep such excluded extracts externally used so they are not
erased while vectorizing that group.
Fixes #205886
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/205942
Commit: 0c4cc9f8adc5acda1aa49b8a8704433e237848ee
https://github.com/llvm/llvm-project/commit/0c4cc9f8adc5acda1aa49b8a8704433e237848ee
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
R clang/test/CodeGen/X86/newpm.c
Log Message:
-----------
Revert "[Clang] Optionally use NewPM to run CodeGen Pipeline" (#205943)
Reverts llvm/llvm-project#205928
Is missing dependencies in a shared libraries build. Will investigate
offline.
Commit: 7cb370ddf4e5dbd40bd529a6625024cadeaa13d7
https://github.com/llvm/llvm-project/commit/7cb370ddf4e5dbd40bd529a6625024cadeaa13d7
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointName.h
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Replace ConstString with std::string in BreakpointName (#205910)
Commit: c5804067b7e622299d75ac420bdbac52c613c05c
https://github.com/llvm/llvm-project/commit/c5804067b7e622299d75ac420bdbac52c613c05c
Author: adams381 <adams at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/test/CIR/CodeGen/goto-address-label-table.c
M clang/test/CIR/CodeGen/label-values.c
Log Message:
-----------
[CIR] Wire const goto labels into indirect branch (#201644)
A computed goto through a constant dispatch table -- the GNU static
dispatch-table idiom `static const void *tbl[] = {&&L1, &&L2}; goto *tbl[i];`
-- reached `errorNYI("Indirect goto without a goto block")` in
`emitIndirectGotoStmt`. #203644 emits the label-address constant (the
value-like `#cir.block_addr_info`) into the table, but it takes a label's
address in a constant context without registering the label as address-taken,
so no indirect-goto block exists for the following `goto *tbl[i]` to branch to.
(#203644 landed the constant attribute, its lowering, and the GotoSolver label
retention; this is the remaining dispatch wiring.)
`VisitAddrLabelExpr` in the constant emitter now records each label via
`takeAddressOfConstantLabel`, which instantiates the indirect-goto block and
tracks the label; `finishIndirectBranch` then adds those labels as
`cir.indirect_br` successors alongside the existing op-form labels. A label
named more than once in a table is kept as a distinct successor each time, to
match classic codegen.
Registering the label needs a non-const `CIRGenFunction`, so `VisitAddrLabelExpr`
`const_cast`s `emitter.cgf` -- the same thing classic Clang does
(`ConstantEmitter::CGF` is non-const), matching the existing cast at
`CIRGenExprConstant.cpp:929`.
New test `goto-address-label-table.c` covers CIR, the CIR-lowered LLVM, and
classic OGCG: a plain table, a duplicate-label table, a label whose address is
taken but never reached by a goto, and one reached through both a constant table
and a runtime block-address.
Commit: f5d5ff90898cfdb2df8c56375f880fd1b1e808e4
https://github.com/llvm/llvm-project/commit/f5d5ff90898cfdb2df8c56375f880fd1b1e808e4
Author: Andre Kuhlenschmidt <akuhlenschmi at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Semantics/semantics.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/OpenACC/acc-default-none-scalars-strict.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars.f90
M flang/test/Semantics/OpenACC/acc-kernels-loop.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Semantics/OpenACC/acc-resolve01.f90
M flang/unittests/Frontend/CompilerInstanceTest.cpp
Log Message:
-----------
[flang][semantics][OpenACC] Warn for DEFAULT(NONE) scalars by default (#205683)
Change OpenACC `DEFAULT(NONE)` scalar handling to use the
pre-OpenACC-3.2 scalar behavior by default while emitting a warning.
Scalars referenced in a `default(none)` compute region without an
explicit data clause now warn by default instead of erroring. Arrays and
other non-scalars still error under `default(none)`.
Users can opt into OpenACC 3.2 strict scalar behavior with:
`-fopenacc-default-none-scalars-strict` and the default scalar warning
can be suppressed with: `-Wno-openacc-default-none-scalars-strict`
Commit: 68395337ef50bd43e024dee391f821e2836df949
https://github.com/llvm/llvm-project/commit/68395337ef50bd43e024dee391f821e2836df949
Author: A. Jiang <de34 at live.cn>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/__expected/expected.h
M libcxx/include/version
M libcxx/test/libcxx/utilities/expected/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
R libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
R libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
Revert "[libc++] P3798R1: The unexpected in std::expected (#204826)" (#205597)
Reverts 45a65bb48b5925707f43d08e30df2263a5e4e268.
Currently, there is no consensus among LWG and standard library
maintainers that P3798R1 should be applied as a Defect Report. So it is
better to revert the paper application for now and then reapply it as an
addition in C++29 when C++29 mode is ready.
Commit: a9b50ff36f36d1bc644bd91dffbfadb2b1f91821
https://github.com/llvm/llvm-project/commit/a9b50ff36f36d1bc644bd91dffbfadb2b1f91821
Author: Andre Kuhlenschmidt <akuhlenschmi at nvidia.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-routine-bind-clone-signature.f90
A flang/test/Lower/OpenACC/acc-routine-bind-devtype-filter.f90
M flang/test/Lower/OpenACC/acc-routine-bind-devtype-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-string-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-undeclared.f90
Log Message:
-----------
[flang][openacc] add acc.routine op for external names added in bind clauses. (#205591)
This adds acc.routine ops for the func.func ops that declare external
functions bound for device specific. This is needed to get the
ACCRoutineToGPUFunc pass to move the function declaration into the
correct region.
This is a follow-up from
[#203088](https://github.com/llvm/llvm-project/pull/203088) which
unblocked the original pass that was stalling bind clauses, but failed
further down the pipeline.
Commit: e2ac42b5cbe6ebda106805a41c8a20f90431652a
https://github.com/llvm/llvm-project/commit/e2ac42b5cbe6ebda106805a41c8a20f90431652a
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/Utility/FileSpec.cpp
Log Message:
-----------
[lldb] Remove ConstString from FileSpec setters (#205944)
Commit: a23701948a969d011b2580823fbcc725b39e4f66
https://github.com/llvm/llvm-project/commit/a23701948a969d011b2580823fbcc725b39e4f66
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/unittests/Index/CMakeLists.txt
Log Message:
-----------
[clang][index][USR] Fix build issue introduced in #205430 (#205954)
Add clangUnifiedSymbolResolution as dependency of clang index unit test.
Commit: cc91bbc5d88e56b85cd80e391d7faddd422bb3e4
https://github.com/llvm/llvm-project/commit/cc91bbc5d88e56b85cd80e391d7faddd422bb3e4
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/VectorEngine.cmake
M clang/cmake/caches/cross-linux-toolchain.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/caches/NVPTX.cmake
M compiler-rt/cmake/caches/SPIRV64.cmake
M compiler-rt/cmake/caches/hexagon-builtins-baremetal.cmake
M compiler-rt/cmake/caches/hexagon-linux-builtins.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/CMakeLists.txt
A compiler-rt/lib/instrumentor-tools/CMakeLists.txt
A compiler-rt/lib/instrumentor-tools/README.md
A compiler-rt/lib/instrumentor-tools/flop-counter/CMakeLists.txt
A compiler-rt/lib/instrumentor-tools/flop-counter/README.md
A compiler-rt/lib/instrumentor-tools/flop-counter/flop_counter_config.json
A compiler-rt/lib/instrumentor-tools/flop-counter/flop_counter_runtime.cpp
A compiler-rt/lib/instrumentor-tools/instrumentor_runtime.h
M compiler-rt/test/CMakeLists.txt
A compiler-rt/test/instrumentor-tools/CMakeLists.txt
A compiler-rt/test/instrumentor-tools/lit.cfg.py
A compiler-rt/test/instrumentor-tools/lit.site.cfg.py.in
A compiler-rt/test/instrumentor-tools/simple_flops.c
A compiler-rt/test/instrumentor-tools/vector_flops.cpp
M libcxx/cmake/caches/Generic-llvm-libc.cmake
Log Message:
-----------
[Instrumentor] Add runtime examples: [1/N] A flop counter (#205698)
This adds a instrumentor-tools folder into compiler RT to showcase use
cases of the instrumentor. The initial example is a program that, via
instrumentation, counts the number of flops performed. Call and
intrinsic support will follow after #198042.
This is the second try with more CMake magic after
https://github.com/llvm/llvm-project/pull/205221 failed on some
platforms.
Partially developped by Claude (AI), tested and verified by me.
Commit: c3652ba4ade988b0f6ec7a5f205c31e2fffe5a31
https://github.com/llvm/llvm-project/commit/c3652ba4ade988b0f6ec7a5f205c31e2fffe5a31
Author: hanbeom <kese111 at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/AArch64/fold-equivalent-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/AArch64/fold-reduce-add-cmp-zero.ll
M llvm/test/Transforms/VectorCombine/AArch64/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/AArch64/icmp-vector-reduce.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-equivalent-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-reduce-add-cmp-zero.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/RISCV/icmp-vector-reduce.ll
M llvm/test/Transforms/VectorCombine/X86/fold-equivalent-reduction-cmp.ll
A llvm/test/Transforms/VectorCombine/X86/fold-reduction-zero-test.ll
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/icmp-vector-reduce.ll
Log Message:
-----------
[VectorCombine] Fold zero tests of or/umax reductions (#205622)
Recognize equality and inequality tests against zero on vector.reduce.or
and vector.reduce.umax. When profitable, replace the scalar reduction
and
compare with a lane-wise comparison followed by an i1 reduce.or or
reduce.and.
Run the existing zero-preserving reduction fold first to retain its more
specific canonicalization opportunities.
Proof: https://alive2.llvm.org/ce/z/pyoTwP
Fixed https://github.com/llvm/llvm-project/issues/205028
Commit: 36b204896a513569c1460640f5cc6fe9714a16d0
https://github.com/llvm/llvm-project/commit/36b204896a513569c1460640f5cc6fe9714a16d0
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
A llvm/test/CodeGen/X86/apx/nf-stackadjust.ll
M llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
M llvm/test/CodeGen/X86/apx/push2-pop2.ll
M llvm/test/CodeGen/X86/apx/win64-abi.ll
M llvm/test/CodeGen/X86/win64-eh-unwindv3-push2pop2.ll
Log Message:
-----------
[X86][APX] Implement push+push2+push pre-alignment strategy for PP2 (#205031)
Replace the dummy "push %rax" stack-alignment padding for APX push2/pop2
(PP2) with a push+push2+push strategy: when an even number of callee-saved
GPRs is involved, a single CSR push provides the 16-byte alignment instead
of a throwaway push %rax, and the remaining registers use push2/pop2. The
padForPush2Pop2 flag and its associated dummy push, SUB/LEA padding, and
SEH_StackAlloc emission in spill/restoreCalleeSavedRegisters are removed.
BuildStackAdjustment now uses NF (no-flags) variants of ADD/SUB, but
only as a smaller replacement for LEA, i.e. only when EFLAGS must be preserved
across the adjustment. When EFLAGS is dead the plain SUB/ADD is kept, which is
shorter than the EVEX-encoded NF form. The NF opcodes are 64-bit
(SUB64ri32_NF/ADD64ri32_NF), so they are not used for the x32 ABI, and
they are recognized in mergeSPUpdates and the epilogue backward scan.
Update LIT tests accordingly.
Assisted-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: a4404f2ceb511429d19a4644e1b301d135e2e126
https://github.com/llvm/llvm-project/commit/a4404f2ceb511429d19a4644e1b301d135e2e126
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn] port 8a531c3608c7 (#205957)
Commit: df15df9d7bbc3b2d0d3342374f4c6ebd06019a4d
https://github.com/llvm/llvm-project/commit/df15df9d7bbc3b2d0d3342374f4c6ebd06019a4d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port 2ce6fc677fdb (#205958)
Commit: f0f5f771fb60ed0a840a1f4faa4f50d58b9c3e6f
https://github.com/llvm/llvm-project/commit/f0f5f771fb60ed0a840a1f4faa4f50d58b9c3e6f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-tidy/BUILD.gn
Log Message:
-----------
[gn build] Port fcc105f40c8e (#205959)
Commit: bd53dfe3f45207cbd96ebfaaa4fe1a204268d27e
https://github.com/llvm/llvm-project/commit/bd53dfe3f45207cbd96ebfaaa4fe1a204268d27e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M flang/test/Semantics/CUDA/cuf-proc-attr-error.cuf
M flang/test/Semantics/CUDA/cuf09.cuf
M flang/test/Semantics/CUDA/cuf14.cuf
M flang/test/Semantics/CUDA/cuf15.cuf
Log Message:
-----------
[flang][cuda][NFC] Fix some typos and misplaced comment (#205933)
Commit: 3ddeaebfd33fe0a3e45883c21ab1eee44ced83a6
https://github.com/llvm/llvm-project/commit/3ddeaebfd33fe0a3e45883c21ab1eee44ced83a6
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/cmake/caches/CrossWinToARMLinux.cmake
M clang/cmake/caches/VectorEngine.cmake
M clang/cmake/caches/cross-linux-toolchain.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/caches/NVPTX.cmake
M compiler-rt/cmake/caches/SPIRV64.cmake
M compiler-rt/cmake/caches/hexagon-builtins-baremetal.cmake
M compiler-rt/cmake/caches/hexagon-linux-builtins.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/CMakeLists.txt
R compiler-rt/lib/instrumentor-tools/CMakeLists.txt
R compiler-rt/lib/instrumentor-tools/README.md
R compiler-rt/lib/instrumentor-tools/flop-counter/CMakeLists.txt
R compiler-rt/lib/instrumentor-tools/flop-counter/README.md
R compiler-rt/lib/instrumentor-tools/flop-counter/flop_counter_config.json
R compiler-rt/lib/instrumentor-tools/flop-counter/flop_counter_runtime.cpp
R compiler-rt/lib/instrumentor-tools/instrumentor_runtime.h
M compiler-rt/test/CMakeLists.txt
R compiler-rt/test/instrumentor-tools/CMakeLists.txt
R compiler-rt/test/instrumentor-tools/lit.cfg.py
R compiler-rt/test/instrumentor-tools/lit.site.cfg.py.in
R compiler-rt/test/instrumentor-tools/simple_flops.c
R compiler-rt/test/instrumentor-tools/vector_flops.cpp
M libcxx/cmake/caches/Generic-llvm-libc.cmake
Log Message:
-----------
Revert "[Instrumentor] Add runtime examples: [1/N] A flop counter" (#205960)
This reverts commit 61cbfabb7ade682a64f516c871b2bacb1e3e324a.
Fails compiler-rt standalone builds, though, locally it works fine :(
Commit: cf6d79262187436908391a39ccecf291262cff1b
https://github.com/llvm/llvm-project/commit/cf6d79262187436908391a39ccecf291262cff1b
Author: Ryan Mitchell <Ryan.Mitchell at amd.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU][GFX1250] Support asyncmark builtin (#205697)
Commit: 606222601a3128b8adc63ffacb5997bb0482c201
https://github.com/llvm/llvm-project/commit/606222601a3128b8adc63ffacb5997bb0482c201
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/test/tools/llubi/byval.ll
A llvm/test/tools/llubi/byval_large_size.ll
A llvm/test/tools/llubi/byval_lifetime.ll
A llvm/test/tools/llubi/byval_misalign.ll
A llvm/test/tools/llubi/byval_misalign_callsite.ll
A llvm/test/tools/llubi/byval_mismatch1.ll
A llvm/test/tools/llubi/byval_mismatch2.ll
A llvm/test/tools/llubi/byval_mismatch3.ll
A llvm/test/tools/llubi/byval_null.ll
A llvm/test/tools/llubi/byval_oversize.ll
A llvm/test/tools/llubi/byval_padding.ll
A llvm/test/tools/llubi/byval_poison.ll
M llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Add support for byval pointer arguments (#201852)
This patch adds support for the byval attribute. The hidden copy is
implemented as memcpy with the allocation size of the specified type.
See https://github.com/llvm/llvm-project/pull/205576 for more
information.
Commit: 2919ad75affbfae061415f451a4ba8b7c76d44a3
https://github.com/llvm/llvm-project/commit/2919ad75affbfae061415f451a4ba8b7c76d44a3
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
A clang/test/Driver/fsanitize-shadow-call-stack-hexagon.c
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/test/shadowcallstack/libc_support.h
M compiler-rt/test/shadowcallstack/lit.cfg.py
M compiler-rt/test/shadowcallstack/minimal_runtime.h
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
A llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
Log Message:
-----------
[Hexagon] Add ShadowCallStack support (#200508)
Implement the software ShadowCallStack for Hexagon.
On Hexagon, r19 is used as the shadow stack pointer (reserved via
-ffixed-r19). On function entry the LR (r31) is saved to the shadow
stack and the pointer is advanced; on exit the LR is restored from the
shadow stack before returning.
Prologue sequence:
r19 = add(r19, #4)
memw(r19+#-4) = r31
Epilogue sequence (between deallocframe/jumpr r31):
r31 = memw(r19+#-4)
r19 = add(r19, #-4)
SCS is only emitted when hasFP() is true: the function uses allocframe.
Leaf functions that never touch the stack do not need protection.
When SCS is active the combined L4_return (deallocframe+jump) is not
used; instead L2_deallocframe and PS_jmpret are kept separate so the
shadow-stack restore can be inserted between them.
Commit: c2f10e00aea9aad66f3a7298e411a4721f53e93e
https://github.com/llvm/llvm-project/commit/c2f10e00aea9aad66f3a7298e411a4721f53e93e
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-sdnode.ll
Log Message:
-----------
[DAGCombiner] Fold multiplication through vp_merge into `partial_reduce_*mla` (#205890)
DAGCombiner is already doing this right now:
```
partial_reduce_*mla(acc, sel(p, mul(*ext(a), *ext(b)), splat(0)), splat(1))
-> partial_reduce_*mla(acc, sel(p, a, splat(0)), b)
```
We should be able to have drop-in support for vp_merge (not for
vp_select though) as the select in the pattern above. This patch adds
such support.
The test is checking whether RISC-V's Zvdot4a8i instruction is
generated, as it depends on this pattern to fold away not just the
multiplication but also the sign / zero extensions.
Commit: e03a23b2f9f43536ea2e724a078b76b870c5dabc
https://github.com/llvm/llvm-project/commit/e03a23b2f9f43536ea2e724a078b76b870c5dabc
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M libcxx/src/text_encoding.cpp
M libcxx/test/std/localization/locales/locale/locale.members/encoding.pass.cpp
Log Message:
-----------
[libc++] Cast 0 to `__locale_t` in `text_encoding.cpp` (#205882)
- As mentioned
https://github.com/llvm/llvm-project/pull/141312#issuecomment-4799649766,
platforms which define `locale_t` as not a pointer fail would fail to
compile. This should fix the picolibc case.
- As an aside, also disable the `encoding.pass.cpp` test for llvm-libc
as that also uses `__get_locale_encoding()`
Commit: bf354fe1ccf8c499d276b71960383ec2d6ca1ba6
https://github.com/llvm/llvm-project/commit/bf354fe1ccf8c499d276b71960383ec2d6ca1ba6
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/vtable-load-invariant.cpp
A clang/test/CIR/IR/load-invariant.cir
A clang/test/CIR/Lowering/load-invariant.cir
Log Message:
-----------
[CIR] Add invariant attribute to cir.load (#204283)
Model LLVM's `!invariant.load` metadata on `cir.load` via an optional
`invariant` UnitAttr, lower it to the `llvm.load isInvariant` flag.
Update existing `LoadOp::create` call sites with new parameter.
Commit: 0192c9fb904a914a7e144a87af9db4b4eed4d6e7
https://github.com/llvm/llvm-project/commit/0192c9fb904a914a7e144a87af9db4b4eed4d6e7
Author: quic_hchandel <hchandel at qti.qualcomm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
A llvm/test/MC/RISCV/xqcili-load-address.s
Log Message:
-----------
[RISCV] Add assembler support to lower `la/lla` to `qc.e.li` (#205782)
This patch updates the `RISCVAsmParser::emitLoadLocalAddress` function
to enable lowering of the `la/lla` pseudos to `qc.e.li` from the
Qualcomm uC Xqcili extension.
Commit: 77ef9afbb3d56f48e74799b4a97ece751a087c65
https://github.com/llvm/llvm-project/commit/77ef9afbb3d56f48e74799b4a97ece751a087c65
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
Log Message:
-----------
[AMDGPU] Pre-commit tests for folding SGPR->VGPR copies escaping a divergent loop (NFC) (#203502)
pre-commit for https://github.com/llvm/llvm-project/pull/203256
Commit: cd2de74f08b70d389993a9c270f0541d787852c7
https://github.com/llvm/llvm-project/commit/cd2de74f08b70d389993a9c270f0541d787852c7
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/test/CodeGen/SPIRV/transcoding/spirv-target-types.ll
Log Message:
-----------
[SPIR-V] Support bfloat and double in parseTypeString (#201919)
Commit: 7f08b5508201caca4033c9af69237f970e55d902
https://github.com/llvm/llvm-project/commit/7f08b5508201caca4033c9af69237f970e55d902
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-06-25 (Thu, 25 Jun 2026)
Changed paths:
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Casts/TestFrameVarDILCast.py
Log Message:
-----------
[lldb][DIL] Fix infinite loop parsing cv-qualifiers in a C-style cast (#205087)
`ParseBuiltinType` loops over identifier tokens to assemble a builtin type
name. When it encountered the "const" or "volatile" qualifier it executed
`continue` to skip the qualifier without first advancing the lexer, so the loop
re-examined the same token forever. Any cast expression beginning with a
cv-qualifier therefore hung the parser before any evaluation took place.
Advance past the qualifier token before continuing the loop.
Reproduce (hangs forever before the fix):
```
$ ./bin/lldb ./bin/lldb
(lldb) breakpoint set -n main
(lldb) run
(lldb) frame variable '(const int)1'
```
After the fix the qualifier is consumed and the cast evaluates normally
("(const int)1" -> 1); a bare qualifier with no type name is reported as an
ordinary parse error instead of hanging.
Adds regression coverage to the DIL Casts API test.
Commit: 8847fb24026b7a6742ecacd542a368527350a06d
https://github.com/llvm/llvm-project/commit/8847fb24026b7a6742ecacd542a368527350a06d
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f5d5ff9 (#205950)
This fixes f5d5ff90898cfdb2df8c56375f880fd1b1e808e4.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 8d60471f89fc7b57c08d64d7524dfbff48078567
https://github.com/llvm/llvm-project/commit/8d60471f89fc7b57c08d64d7524dfbff48078567
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
Log Message:
-----------
[SPIR-V] Fix correction shift for i8 bitreverse in shader mode (#203829)
selectBitreverse16 hardcoded the post-reverse shift to 16, but it also
handles i8, where the reversed bits land in [31:24] and a shift of 16
truncated to always 0
Compute the shift as `32 - bitwidth` instead
Commit: eac90446207dedf6bd243c9033fb3f1c7dec8dee
https://github.com/llvm/llvm-project/commit/eac90446207dedf6bd243c9033fb3f1c7dec8dee
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/mutable.cpp
Log Message:
-----------
[clang][bytecode] Don't check instance pointers for mutability (#205820)
The instance pointer being mutable is perfectly fine, we just can't read
anything from it.
This regresses a test case in `cxx11.cpp` where we now diagnose an extra
frame for `U(g1.u)`, but this seems correct since the read is happening
in the copy constructor of `U`.
Commit: 0075a8fbcc9928ef5a04a30233b08f67219a4310
https://github.com/llvm/llvm-project/commit/0075a8fbcc9928ef5a04a30233b08f67219a4310
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
M llvm/include/llvm/Analysis/PHITransAddr.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/PHITransAddr.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
Log Message:
-----------
[GVN] Support load PRE through select addresses (incl. indexed selects) (#203863)
This resurrects and extends the approach from the reverted
[D142705](https://reviews.llvm.org/D142705) ("[GVN] Support address
translation through select instructions"), adapting it to the current
GVN dependency model so that GVN can eliminate a redundant load whose
address is a `select` hidden behind cast/GEP indexing (the classic
`std::min_element` / min-index idiom, e.g. `data[*it] < data[*smallest]`
or returning the index `minloc`).
### What it does
When PHI translation of a load address fails along an edge because the
incoming value resolves to a `select`, we now translate **both** sides
of
that select to obtain the "true" and "false" addresses. If both
addresses
have a dominating, non-clobbered value of the right type, the load is
rematerialized as a `select` of those two values, letting the
loop-carried value be threaded through a phi over the backedge —
matching
GCC's `tree-ssa-pre` behavior, which previously produced one fewer load
in
the inner loop.
### Implementation
- `PHITransAddr`: `translateSubExpr` can resolve a select on a given
condition to one side and propagate that through casts/GEPs; adds
`getSelectCondition`, a pair-returning `translateValue`, the
`SelectAddr`
helper, and the value-preserving zext/sext-of-trunc fold.
- `MemoryDependenceAnalysis`: adds `MemDepResult::Select`;
`NonLocalDepResult`
carries a `SelectAddr`; on phi-translation failure with a
select-dependent
address, both sides are translated and a select dependency is reported.
- `GVN`: adds `DepKind::Select` to `ReachingMemVal` and
`AnalyzeSelectAvailability`; `AvailableValue` stores the select
condition so
the value select can be materialized at the load location.
### Testing
- Updated/added GVN regression tests, including negative cases
(intervening
clobbering store) and the indvars-canonicalized trunc form.
- Ran the full GVN + MemoryDependenceAnalysis test suites and
MemDep-consuming
passes (MemCpyOpt/DSE/LICM) — all pass.
- Ran llvm-test-suite (incl. SPEC CPU 2017 rate) for RISC-V `rva23u64`
under
QEMU: 2968/2968 tests PASS, no regressions.
Fixes #58569
Fixes #178616
Assisted-by: TraeCli (AI assistant)
Co-authored-by: Sergey Kachkov <sergey.kachkov at syntacore.com>
Commit: 433bed020b4f9fd791dccb7a77465427954c8ea6
https://github.com/llvm/llvm-project/commit/433bed020b4f9fd791dccb7a77465427954c8ea6
Author: David Green <david.green at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[AArch64] Add hip12 to release notes. (#205899)
This adds the hip12 cpu added in #203446 to the release notes, and
rejigs them to match the format used in previous releases.
Commit: af1c5a425a1e2f01e810cab06bdfa7c9199fd412
https://github.com/llvm/llvm-project/commit/af1c5a425a1e2f01e810cab06bdfa7c9199fd412
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/xqcilia-addimm-mulimm-loop.ll
A llvm/test/CodeGen/RISCV/xqcilo-split-gep.ll
A llvm/test/Transforms/CodeGenPrepare/RISCV/xqcilo.ll
A llvm/test/Transforms/ConstantHoisting/RISCV/xqcilia.ll
Log Message:
-----------
[RISCV] Extend legal addressing modes to support 26-bit addi/Xqcilo offsets (#204734)
Extend `RISCVTargetLowering::isLegalAddImmediate` and `isLegalAddressingMode`
to accept 26-bit signed immediates/offsets when the corresponding Qualcomm uC
extensions are enabled
These callbacks are queried by some pre-ISel passes. Adding support for
the wider range lets those passes keep large immediates inline and large offsets
folded into addressing modes.
Commit: affc89f7cb6439bd3974ef816e8f9872e76166c1
https://github.com/llvm/llvm-project/commit/affc89f7cb6439bd3974ef816e8f9872e76166c1
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/arm/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3fast.S
A compiler-rt/test/builtins/Unit/addsf3new_test.c
A compiler-rt/test/builtins/Unit/subsf3_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized single precision FP add/sub (#179929)
This adds new implementations of single-precision add/sub in both Thumb1
and Arm/Thumb2 assembler.
Both of the new implementations are included in the builtins library if
the `COMPILER_RT_ARM_OPTIMIZED_FP` cmake option is enabled (as it is by
default).
There was already a Thumb1 assembler implementation of single-precision
add/sub, slower but also smaller. I've kept it (although it's been moved
into the `thumb1` subdirectory), and if you _don't_ enable
`COMPILER_RT_ARM_OPTIMIZED_FP`, it will be selected in place of the new
version.
Commit: 04cf695c6662b30468dc14860973ed8186a20d79
https://github.com/llvm/llvm-project/commit/04cf695c6662b30468dc14860973ed8186a20d79
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
A llvm/test/CodeGen/Mips/msa/shuffle-undef-first-mask-element.ll
Log Message:
-----------
[MIPS] fix assert on `undef` first mask element (#203390)
fixes https://github.com/llvm/llvm-project/issues/203378
Previously the code asserted that the first shuffle index is `>= 0`,
i.e. not `undef`. But this is just not always true, and it turns out
that preceding optimizations can introduce such masks. Instead find the
first index that is valid and use that.
Commit: d6d6f4f3c104f7a741ba96fca1bcb0a0039493f0
https://github.com/llvm/llvm-project/commit/d6d6f4f3c104f7a741ba96fca1bcb0a0039493f0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
Log Message:
-----------
[NFC][Clang][CodeGen] Prefix LoopInfo symbols with clang::CodeGen
I had to revert #205928 due to missing shared library dependencies. Just
adding the dependency only fixes the build in some configurations. When
building with clang, which automatically enables PCH, we end up with
ambiguity between llvm::LoopInfo and clang::CodeGen::LoopInfo. This
patch prefixes the namespace on the symbols to make it explicit which we
are referring to fix the issue.
This also brings us a bit more in line with the LLVM coding standards:
https://llvm.org/docs/CodingStandards.html#use-namespace-qualifiers-to-define-previously-declared-symbols
Reviewers: oontvoo
Pull Request: https://github.com/llvm/llvm-project/pull/205985
Commit: 28f6605b844cabf8fa16201e4d3226fe3970d2f4
https://github.com/llvm/llvm-project/commit/28f6605b844cabf8fa16201e4d3226fe3970d2f4
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CMakeLists.txt
A clang/test/CodeGen/X86/newpm.c
Log Message:
-----------
Reapply "[Clang] Optionally use NewPM to run CodeGen Pipeline" (#205943)
This reverts commit 0c4cc9f8adc5acda1aa49b8a8704433e237848ee.
This patch also fixes the dependency issue by making the clang CodeGen
library depend on the LLVM CodeGen library which is needed by the NewPM
for CodeGen.
Reviewers: oontvoo
Pull Request: https://github.com/llvm/llvm-project/pull/205986
Commit: 9d6e0dd15a5f9aa975ffaa45da183c6c05cb8a03
https://github.com/llvm/llvm-project/commit/9d6e0dd15a5f9aa975ffaa45da183c6c05cb8a03
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Fix division by zero in CXXNewExpr handling (#205800)
Commit: 254df87abf4e6700ddc7b4f2417ab896bc809897
https://github.com/llvm/llvm-project/commit/254df87abf4e6700ddc7b4f2417ab896bc809897
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/unshuffle-constant-poison-mask.ll
Log Message:
-----------
[InstCombine] Handle shuffle masks selecting poison in unshuffleConstant (#205870)
A shuffle mask can select from the second operand even when that operand
is poison. This caused unshuffleConstant to assert while trying to map
those mask elements into the first operand's constant vector.
Fix this by ignoring mask elements that select the poison operand.
Fixes https://github.com/llvm/llvm-project/issues/205769
Commit: a42540b17689dfd4df706e44affb560b813bec87
https://github.com/llvm/llvm-project/commit/a42540b17689dfd4df706e44affb560b813bec87
Author: David Green <david.green at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/test/CodeGen/ARM/bf16-instructions.ll
Log Message:
-----------
[ARM] Add basic bf16 instructions tests. NFC (#206003)
Many of these are disabled as they do not yet lower successfully.
Commit: 4bf16dccc6305237ac5bbe0e70065c2df70edf2b
https://github.com/llvm/llvm-project/commit/4bf16dccc6305237ac5bbe0e70065c2df70edf2b
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][InsertWaitCnts] Make HWEvent a BitMask (#203864)
Follow up from comments on
https://github.com/llvm/llvm-project/pull/202886
Make HWEvent a bitmask by default instead of having both the enum, and a
separate HWEventSet. This has the advantage of streamlining the code a
bit and opening the possibility of adding "modifiers" to events, e.g. I
imagine we could now fold "VMemType" into the Events.
We already do this with things like SMEM_GROUP. At least now it's baked
into the design.
I opted for a bit more verbosity by taking inspiration from
FastMathFlags (FMF): instead of exposing a raw enum, I wrap it in a
class w/ helper function. The downside is having to reimplement all the
little bitwise ops, but the result is a cleaner, simpler interface than
a raw enum (class) w/ many helper functions. I initially tried that but
I recoiled at the sight of things like `contains(A, B)` which isn't very
clear, while `A.contains(B)` is self explanatory.
Considering HWEvent is a bitmask, I also implemented a simple iterator
to iterate over all set bits of the mask, which is a useful thing to
have as some APIs in InsertWaitCnt rely on treating one event at a time.
Commit: 938ee65f1a7dcf228d39ef6eff2e0edcc522270a
https://github.com/llvm/llvm-project/commit/938ee65f1a7dcf228d39ef6eff2e0edcc522270a
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][InsertWaitCnts] Move TENSOR/ASYNC event detection to separate header (#204544)
I forgot to move those out of the way as they were not grouped with the
other.
Now `getEventsFor` does all the work.
Commit: 6d48d45c130293452e398cda29ea7d348f384034
https://github.com/llvm/llvm-project/commit/6d48d45c130293452e398cda29ea7d348f384034
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU][HWEvents] Refactor VMEM_ACCESS as VMEM_READ_ACCESS (#204545)
Instead of having an HWEvent that can be either a read or a write
depending on the target, keep the events as straightforward as
possible and let InsertWaitCnt interpret it. Rename VMEM_ACCESS
to VMEM_READ_ACCESS and set VMEM_WRITE_ACCESS & similar events
even if the target does not have a VSCnt.
I think this conceptually makes more sense.
This separates concerns better so that HWEvents models events
objectively, and InsertWaitCnt handles them as necessary for the task
it is trying to achieve (insert wait instructions).
My end goal with this series of changes is to de-tangle InsertWaitCnt so
we can divide it into layers, and each layer worries about its own thing.
This is only possible with proper separation of concerns.
Commit: e354cd076677ba12561fa6925ed12b054623452b
https://github.com/llvm/llvm-project/commit/e354cd076677ba12561fa6925ed12b054623452b
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/discarded-interleave-group.ll
Log Message:
-----------
[LV] Only collect strides without predicates under OptForSize when interleaved access analysis (#205793)
During interleaved access analysis, certain addresses require a no-wrap
predicate to form an add recurrence and obtain the stride. However, when
optimizing for size, generating SCEV runtime checks is disallowed.
This patch modifies the constant stride collection when optimizing for
size to only collect strides that do not require predicates. This
ensures that vectorization will not blocked by disallowed predicates.
Commit: bda6db4a9bb54d10d269a39a26e8fb4263b751a4
https://github.com/llvm/llvm-project/commit/bda6db4a9bb54d10d269a39a26e8fb4263b751a4
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
A mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe3.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
A mlir/include/mlir/Dialect/XeGPU/uArch/uArchCommon.h
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUArrayLengthOptimization.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
Log Message:
-----------
[MLIR][XeGPU] Enable `isa<>` check for uarch (#204577)
Commit: a0248a26dd3496e72290ef60846a980c9a1293d7
https://github.com/llvm/llvm-project/commit/a0248a26dd3496e72290ef60846a980c9a1293d7
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/CodeGen/AArch64/sve-mul-imm-add-adr.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fma-binops.ll
Log Message:
-----------
[AArch64][SVE] add missing MLA commute instcombine (#205526)
Remove the MLA commuted patterns added in #198566 and canonicalise
those operations in instcombine instead.
Commit: e1cbf0f6a825cdac63639622adb3a1058e2f35c1
https://github.com/llvm/llvm-project/commit/e1cbf0f6a825cdac63639622adb3a1058e2f35c1
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
Log Message:
-----------
GlobalISel/LegalizerHelper: Use type of input load dst for LowerLoad (#205815)
Deduce dst type for new instructions, that do the load lowering, from
destination type of original load instead of from MMO.
Makes a difference with extendedLLTs.
Commit: 9e9de1f0f39740d314afd96eed9ef661722982c0
https://github.com/llvm/llvm-project/commit/9e9de1f0f39740d314afd96eed9ef661722982c0
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
Log Message:
-----------
GlobalISel/LegalizerHelper: Use same LLT kind as WideTy for widen merge (#205816)
In widenScalarMergeValues, WideTy is input given by target. Use same LLT
kind for other types of different sizes instead of LLT::scalar.
Makes a difference with extendedLLTs.
Commit: b2e725548b313898fa93f99c21b884978c7928fb
https://github.com/llvm/llvm-project/commit/b2e725548b313898fa93f99c21b884978c7928fb
Author: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
A llvm/test/tools/llvm-objcopy/DXContainer/dump-section-priv.yaml
A llvm/test/tools/obj2yaml/DXContainer/PRIVPart.yaml
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
Log Message:
-----------
[DirectX][ObjectYAML] Add PRIV part support (#204899)
Add support for DXContainer PRIV in the ObjectYAML pipeline so it can be
represented in structured YAML and round-tripped through
yaml2obj/obj2yaml.
PRIV part can store arbitrary user-provided binary blobs in DXContainer.
Unlike other DXContainer parts, PRIV part does not have to have 4-byte
aligned size. Therefore, if it is present, it is always the last section
in a DXContainer.
llvm-objcopy is already able to extract PRIV section. A test to verify
extraction of binary from PRIV is added.
Commit: 10755f42bb1cb70a97e5d28d1747d45fe78e532d
https://github.com/llvm/llvm-project/commit/10755f42bb1cb70a97e5d28d1747d45fe78e532d
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
Log Message:
-----------
[LV][NFC] Remove instcombine pass from RUN lines in target tests (#205848)
There is still one test remaining:
LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
but this looks more like a phase-ordering test and should probably be
handled separately.
Commit: f0bbae6641e6ec88537f26d5bcbd3e17a16bf5e3
https://github.com/llvm/llvm-project/commit/f0bbae6641e6ec88537f26d5bcbd3e17a16bf5e3
Author: Yuli Fiterman <fiterman at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/AST.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
Log Message:
-----------
[clangd] Navigate go-to-definition through forwarding wrappers to the constructor (#199480)
When the user invokes **Go to Definition** on a call like
`std::make_unique<T>(args...)` or `std::make_shared<T>(args...)`,
surface the constructor of `T` that is actually invoked inside the
wrapper, alongside the wrapper itself. The constructor is added before
the wrapper so LSP clients that auto-jump to the first target land on
it; clients that present a menu still let the user reach the wrapper.
This is the forward-direction counterpart to the find-references work in
#169742 (clangd/clangd#716): the same `isLikelyForwardingFunction` +
`searchConstructorsInForwardingFunction` machinery, applied to
`locateASTReferent`.
Commit: 359b47535c3f9def01f48d7d08c76a42b41d0645
https://github.com/llvm/llvm-project/commit/359b47535c3f9def01f48d7d08c76a42b41d0645
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/lib/Dialect/MemRef/Transforms/ExpandOps.cpp
M mlir/test/Transforms/test-bubble-down-memory-space-casts.mlir
Log Message:
-----------
[mlir][memref] Remove unsafe `getType()` from ReshapeOp (#205105)
Remove the unsafe `getType` method from ReshapeOp. It unconditionally
casts the result to `MemRefType`, but `memref.reshape` may return an
`UnrankedMemRefType`, leading to an assertion failure. The redundant
build method is also removed alongside this change. Fixes #203812.
Commit: 243617406ca858bd2a633e7c27043b4472810bc8
https://github.com/llvm/llvm-project/commit/243617406ca858bd2a633e7c27043b4472810bc8
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
Log Message:
-----------
[AMDGPU][NFC] Roundtrip gfx11_asm_vop3_from_vop2.s (#205825)
Removes the need for gfx11_dasm_vop3_from_vop2_hi.txt sitting
downstream.
Catches a problem with printing op_sel for the tied operands in
v_fmac_f16_e64.
Commit: cdbc5ca57bbae92cb0bc7b8c884cdf9bd2a5871f
https://github.com/llvm/llvm-project/commit/cdbc5ca57bbae92cb0bc7b8c884cdf9bd2a5871f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
Log Message:
-----------
AMDGPU: Remove leftover test for old promote-alloca subtarget feature (#206014)
This feature was removed in a56993a694ed02775285b9fe0e23fce8346491c9.
The test used to have a pair testing the enabled and disabled case,
and there's no point leaving the enabled partner.
Commit: cb27ba9e7ab95e5df774061e6b86610329782161
https://github.com/llvm/llvm-project/commit/cb27ba9e7ab95e5df774061e6b86610329782161
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-sgmask.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/sroa-phi-nodes.ll
Log Message:
-----------
AMDGPU: Remove unnecessary target-cpu attributes from tests (#206015)
Commit: a335f334f512be44ac02a07ffae27468d246a07d
https://github.com/llvm/llvm-project/commit/a335f334f512be44ac02a07ffae27468d246a07d
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M lldb/source/Utility/Log.cpp
Log Message:
-----------
[lldb] Always lock in StreamLogHandler::Write (#205771)
This code assumes that writing to an unbuffered raw_fd_ostream from
multiple threads is somehow safe. raw_fd_ostream doesn't make any
guarantees about this from what I can see.
The current raw_fd_ostream implementation also uses a looping write call
to write the content in chunks, and doing this from multiple threads
leads to interleaving log messages.
This patch unconditionally make us aquire the stream lock.
Commit: 1375ac2094aca2a4116e3094b5bb2f69b4018bd9
https://github.com/llvm/llvm-project/commit/1375ac2094aca2a4116e3094b5bb2f69b4018bd9
Author: Lukas Sommer <lukas.sommer at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
Log Message:
-----------
[AMDGPU] Make direct f16 <-> i32 conversion illegal (#205565)
Neither SALU nor VALU support direct conversion from f16 to/from i32.
Previously, this was still legal and handled by instruction selection
patterns, forming chains f16 -> f32 -> i32 and i32 -> f32 -> f16 for the
two cases, respectively.
This change marks the conversion illegal and creates the same chains as
the pattern during (operation) legalization.
This had the added benefit that a combination of FNEG and FPTOSI/UI can
now merge the float negation into the source modifier of the f16-to-f32
conversion, as demonstrated by the GlobalISel tests.
This fixes https://github.com/llvm/llvm-project/issues/177342.
---------
Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
Commit: 0d9fb3899949c02c665b82a2e33b89636ea3bb79
https://github.com/llvm/llvm-project/commit/0d9fb3899949c02c665b82a2e33b89636ea3bb79
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
Log Message:
-----------
[AMDGPU] Use `v_cvt_pk_*` instructions for i16_f32 saturated conversions (#202680)
This is a follow-up to #187487. `v_cvt_pk_*` is used for vector cases, as well as for scalar types (by passing a dummy second input) on GFX11+. Relevant fallback patterns have also been added and `splitUnaryVectorOp` has been extended to handle trailing scalar ops if present.
Assisted-by: Claude Code
Commit: 63ccf78848a743eac08871d24151fef70bde2978
https://github.com/llvm/llvm-project/commit/63ccf78848a743eac08871d24151fef70bde2978
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CMakeLists.txt
A clang/lib/CodeGen/pch.h
Log Message:
-----------
[CMake][CodeGen] Add PCH for Clang CodeGen (#206018)
The change to CGCall is required to avoid collisions of operator|=.
Commit: 030e74c2808a9af58c6b4ef461fd0c2c7039d647
https://github.com/llvm/llvm-project/commit/030e74c2808a9af58c6b4ef461fd0c2c7039d647
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Delete definitions of non-delimited end-directives, NFC (#205932)
Delimited directives are those that come in begin/end pairs, e.g. "begin
declare target"/"end declare target". Other block-associated directives
in Fortran do have end-forms, but they don't need to have specific
directive enums. Some such enums have been used in the past, but are not
anymore. Delete those extraneous definitions to clean up the OMP.td
file.
Commit: c7d1932126589d17dc9e100940f4b531345f6747
https://github.com/llvm/llvm-project/commit/c7d1932126589d17dc9e100940f4b531345f6747
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
Log Message:
-----------
[flang][OpenMP] Delete no longer needed CheckAllowedClause (#205936)
This removes the older overload of CheckAllowedClause(clauseId). After
0f1abfe0af that function was no longer doing anything.
Commit: 74cc00f866864ea15141b9e8ebb3bc3204198da2
https://github.com/llvm/llvm-project/commit/74cc00f866864ea15141b9e8ebb3bc3204198da2
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-absolute-path.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-composite-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-namespace-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-skip-type-not-in-debug-type-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-two-compile-units.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugFunctionDeclaration for DISubprograms (declarations). (#203615)
The PR adds support for
[DebugFunctionDeclaration](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugFunctionDeclaration).
Commit: a7eaec767388a4ba00897156762f0387afcf15a5
https://github.com/llvm/llvm-project/commit/a7eaec767388a4ba00897156762f0387afcf15a5
Author: Alex Strelnikov <strel at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M libc/src/__support/CPP/string_view.h
M libc/src/__support/CPP/type_traits/is_integral.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
Log Message:
-----------
[libc] Change cpp::string_view into cpp::basic_string_view<CharT> (#203355)
This will allow some of the types in src/stdio/printf_core/ to be
templated on character type for the implementation of `swprintf`.
Commit: a61830a1d36ada362076677dd1b17fcf875ed07b
https://github.com/llvm/llvm-project/commit/a61830a1d36ada362076677dd1b17fcf875ed07b
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
Log Message:
-----------
[AArch64][ISel] Improve lowering for clmul v4i32 with AES (#204542)
Lower CLMUL v4i32 by splitting it into two v2i32 operations and
concatenating the results when AES is available. This avoids the much
larger generic expansion and lets v4i16 benefit via legalization through
v4i32.
Update the cost model: v4i32 is costed as the 11-instruction PMULL
sequence, and v4i16 as that sequence plus the required input widens and
result narrow.
Commit: 933aa3e1c2face96ca268f2ce412000764b03111
https://github.com/llvm/llvm-project/commit/933aa3e1c2face96ca268f2ce412000764b03111
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/__support/CPP/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes a7eaec7 (#206035)
This fixes a7eaec767388a4ba00897156762f0387afcf15a5.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: aad0d97765f364b2363a429b19ab408033c29493
https://github.com/llvm/llvm-project/commit/aad0d97765f364b2363a429b19ab408033c29493
Author: Peruere1828 <3256411401 at qq.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Math/Transforms/ExpandOps.cpp
M mlir/test/Dialect/Math/expand-math.mlir
Log Message:
-----------
[MLIR][Math] Handle dynamic-shaped tensors without assertion (#204510)
Add `isDynamicShaped` helper to detect shaped types without static shape
(e.g., tensor<?xf32>). Return failure in 10 ops that use
`createFloatConst` (which assumes static shapes for DenseElementsAttr):
sinh, cosh, tanh, asinh, acosh, atanh, exp2, round, roundeven, ctlz
Refactor existing guards in ceil and rsqrt to use the shared helper for
consistency.
Add lit test coverage for each op with both ?-shaped and unranked
tensors, verifying the ops are preserved unchanged.
Fix issue #203753
---
Changes since last review:
Change `isDynamicShaped` to `isUnrankedShaped` to detect unranked shape
(e.g., `tensor<*xf32>`).
Modify `createConstFloat` and `createConstInt` using `tensor.dim` and
`tensor.splat` to handle dynamically-shaped ranked tensors.
Modify lit tests for dynamically-shaped ranked tensors, verifying the
ops are expanded using `tensor.dim` and `tensor.splat`.
Commit: c63aedd17319d1118ab59e34de5a9bc5b1b878c3
https://github.com/llvm/llvm-project/commit/c63aedd17319d1118ab59e34de5a9bc5b1b878c3
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
[lldb][Windows] Add Git utils to PATH in CI (#206021)
LLDB on Windows requires GNU tools like `dirname` which are not
installed by default. They are bundled with Git for Windows which also
depends on them. They are not in PATH however.
This patch adds those utilities to the PATH to fix lldb test targets
build failures.
Commit: d2d80787af6e1d671563654171f34e8eec35fd1b
https://github.com/llvm/llvm-project/commit/d2d80787af6e1d671563654171f34e8eec35fd1b
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/lib/Driver/OffloadBundler.cpp
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.co
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.py
A clang/test/Driver/clang-offload-bundler-magic-collision.c
M llvm/lib/Object/OffloadBundle.cpp
A llvm/test/tools/llvm-objdump/Offloading/fatbin-magic-collision.test
Log Message:
-----------
[OffloadBundler] Bound compressed bundles by header size, not magic scan (#205587)
The compressed offload bundle (CCOB) readers located the boundary
between concatenated bundles by scanning for the literal 4-byte magic
"CCOB". Those bytes can appear by chance inside a compressed payload, so
a single valid bundle could be truncated at the spurious magic and then
fail to decompress with "Src size is incorrect". At runtime this
surfaced as hipErrorInvalidImage ("device kernel image is invalid") when
loading affected HIP code objects.
Use the authoritative FileSize recorded in the compressed bundle header
(CompressedBundleHeader::tryParse, present for V2/V3) to delimit the
current bundle, and search for the next bundle's "CCOB" magic only past
that point. This keeps multi-bundle iteration working (and tolerant of
inter-bundle padding) while ignoring magic-byte collisions inside the
payload. Bundles without a recorded size (legacy V1) fall back to the
previous magic scan.
Commit: 8ddf3f755d44dcc2e2787d1420ea00f42d278648
https://github.com/llvm/llvm-project/commit/8ddf3f755d44dcc2e2787d1420ea00f42d278648
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M flang/unittests/Frontend/CMakeLists.txt
Log Message:
-----------
[flang] Fix build with BUILD_SHARED_LIBS=ON (#206038)
```
/usr/bin/ld: tools/flang/unittests/Frontend/CMakeFiles/FlangFrontendTests.dir/CompilerInstanceTest.cpp.o: undefined reference to symbol '_ZN5clang17getDriverOptTableEv'
/usr/bin/ld: b/x86/lib/libclangOptions.so.23.0git: error adding symbols: DSO missing from command line
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```
Commit: 3e75ca6b187a4cd3498645d57a1ad562ce438a4b
https://github.com/llvm/llvm-project/commit/3e75ca6b187a4cd3498645d57a1ad562ce438a4b
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Use `hasVCvtPkIU16F32` instead of a generation check (NFC) (#206030)
Commit: 20288013d75962593da545de5ecf391a8963d6ce
https://github.com/llvm/llvm-project/commit/20288013d75962593da545de5ecf391a8963d6ce
Author: David Green <david.green at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
M llvm/test/CodeGen/ARM/bf16-create-get-set-dup.ll
M llvm/test/CodeGen/ARM/bf16-shuffle.ll
M llvm/test/CodeGen/ARM/big-endian-vector-callee.ll
M llvm/test/CodeGen/ARM/div-by-constant-to-mul-crash.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/legalize-bitcast.ll
M llvm/test/CodeGen/ARM/llvm.frexp.ll
M llvm/test/CodeGen/ARM/neon-vmovn.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/pr196779.ll
M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/ARM/vcombine.ll
M llvm/test/CodeGen/ARM/vector-llrint.ll
M llvm/test/CodeGen/ARM/vector-lrint.ll
M llvm/test/CodeGen/ARM/vext.ll
M llvm/test/CodeGen/ARM/vldlane.ll
M llvm/test/CodeGen/ARM/vrint.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/ARM/vuzp.ll
M llvm/test/CodeGen/ARM/vzip.ll
M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
Log Message:
-----------
[ARM] Replace Neon concat patterns with insert_subregs. (#205505)
This replaces the REG_SEQUENCE we use for concat_vector with
INSERT_SUBREG, which whilst not perfect can produce slightly better code
overall, and helps us avoid REG_SEQUENCE instructions.
Commit: 236f63474d40850a33fd4bcc6d8d63a31cebb8f1
https://github.com/llvm/llvm-project/commit/236f63474d40850a33fd4bcc6d8d63a31cebb8f1
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Remove NodeBuilders around defaultEvalCall (#203923)
This change removes `NodeBuilder`s from the functions connected to
`defaultEvalCall` that were previously passing around `NodeBuilder`
arguments instead of the more usual `ExplodedNodeSet &Dst`
out-parameters.
Although these `NodeBuilder`s "travelled through" many functions, their
usage pattern was relatively simple and their back-and-forth set
manipulation didn't provide any advantage over a plain exploded node
set.
In addition to the removal of the `NodeBuilder`s, this commit performs
minor simplifications in the affected code and renames the old method
`BifurcateCall` to the more specific `dynDispatchBifurcate` (because the
old name was too vague now that we also have `ctuBifurcate`).
Commit: 685fe091f93d5d434e7670d1ae91a0df690036f6
https://github.com/llvm/llvm-project/commit/685fe091f93d5d434e7670d1ae91a0df690036f6
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/test/FileCheck/dump-input/search-range-annotations/check-label-follows.txt
A llvm/test/FileCheck/dump-input/search-range-annotations/check-next-same.txt
A llvm/test/FileCheck/dump-input/search-range-annotations/check-not.txt
Log Message:
-----------
[FileCheck] Extract new tests for braced search ranges here (#199063)
This patch introduces several tests in
`llvm/test/FileCheck/dump-input/search-range-annotations` to demonstrate
use cases that PR #198138 improves.
Commit: ba353465b82509e70ff2d97a1d821ef3934c4abe
https://github.com/llvm/llvm-project/commit/ba353465b82509e70ff2d97a1d821ef3934c4abe
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
[TargetParser][NFC] Move Triple comparators out of line (#206032)
These are not performance-critical and especially operator< is expensive
to compile due to the std::tie template instantiation.
Commit: 4cc7c70be0132826fdb3cd6a6c90c2610cc1da9d
https://github.com/llvm/llvm-project/commit/4cc7c70be0132826fdb3cd6a6c90c2610cc1da9d
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
Log Message:
-----------
[NFC][analyzer] Remove NodeBuilders in ObjC logic (#202709)
This change removes the remaining `NodeBuilder`s from
`ExprEngineObjC.cpp` as a step of my project to gradually replace the
class `NodeBuilder` with more straightforward tools.
The `NodeBuilder`s that I remove were all used in very simple patterns,
especially the two `NodeBuilder`s in `VisitObjCMessage` where the
`Frontier` set is thrown away and the code continues with the return
value of `generateNode` (which is exactly the same as the return value
of the appropriate `makeNode` call).
In addition to the removal of the `NodeBuilder`s, this change also
includes two additional NFC improvements:
1. `populateObjCForDestinationSet` was previously a static helper
function with nine (!) awkward arguments; this change turns it into a
method of `ExprEngine` with only five arguments (and the first three
arguments are customary: _expression_, `Pred`, `Dst` as in the transfer
functions). This change was necessary for the `NodeBuilder` removal:
without this cleanup I would have had to add a tenth argument.
2. In `VisitObjCMessage` I remove two complex and pointless assertions.
The ancestor of these was a simple and useful
```c++
Pred = Bldr.generateNode(currStmt, Pred, notNilState);
assert(Pred && "Should have cached out already!");
```
introduced in 2012 by 5481cfefa63624c4a91da0e05a1140e29ce6f65a in a
checker, but since then it was relocated to the engine, duplicated and
weakened to `assert(Pred || HasTag)`.
As `HasTag` can easily be true and is independent of everything else in
this function, the current assertions (which are removed in this change)
don't provide any helpful invariant, they just state that "`Pred` is not
null ... except when it is null".
Commit: 0ee0a1ea6ab25de6e7c38dd7bf9385b9742154f3
https://github.com/llvm/llvm-project/commit/0ee0a1ea6ab25de6e7c38dd7bf9385b9742154f3
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M lldb/tools/lldb-dap/EventHelper.cpp
Log Message:
-----------
[lldb-dap][Windows] use Unicode path limit (#206046)
`MAX_PATH` is defined as 260. `PosixApi.h` already defines `PATH_MAX` as
`32,768` characters which is the max path limit for Unicode paths on
Windows.
Use this in `lldb-dap` on Windows to avoid path truncation.
Commit: d9c24ae3418ee1d2b2fa174e0d3e18b985282f5e
https://github.com/llvm/llvm-project/commit/d9c24ae3418ee1d2b2fa174e0d3e18b985282f5e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
Log Message:
-----------
[lldb][windows] allow long paths in process launcher (#206029)
`MAX_PATH` is defined as `260` on Windows. Unicode paths however can be
up to `32,767` characters long.
Use `llvm::sys::windows::widenPath` to convert paths to unicode paths to
allow targets that have long path names.
This is the first part of a series of multiple commits that will fix
long path support in lldb on Windows as well as adding regression tests.
rdar://180711797
Commit: e2e761203b219a954335ddb6d223b661ff0f5779
https://github.com/llvm/llvm-project/commit/e2e761203b219a954335ddb6d223b661ff0f5779
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/include/llvm/ADT/Enum.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/unittests/Support/ScopedPrinterTest.cpp
Log Message:
-----------
[ADT] Add compact enum table (#202044)
The existing EnumEntry stores string using StringRefs, which are large
and require two relocations per entry. Introduce a new, compact enum
string representation that stores strings relative to the enum entries
in memory, allowing a low-overhead and relocation-free storage.
Unfortunately, the enum definitions have to be written into a separate
constexpr variable; only C++20 supports structural template parameters.
It is also not possible to hide this behind a macro due, because we want
enum entries to be sourced from other files and #include cannot occur
during a macro expansion.
When all uses of EnumEntry are ported to the new representation, this
will save 4.7k relocations on libLLVM.so (3% in an all-target assert
build), resulting in faster startup and lower max-rss, as these rarely
used pages don't need to be touched at all anymore.
Commit: 138e21730a47aea6004daa4bfd14ca39ea2250d0
https://github.com/llvm/llvm-project/commit/138e21730a47aea6004daa4bfd14ca39ea2250d0
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/test/FileCheck/dump-input/annotations.txt
M llvm/test/FileCheck/dump-input/context.txt
M llvm/test/FileCheck/dump-input/enable.txt
M llvm/test/FileCheck/dump-input/filter.txt
M llvm/test/FileCheck/dump-input/search-range-annotations/check-label-follows.txt
M llvm/test/FileCheck/dump-input/search-range-annotations/check-next-same.txt
M llvm/test/FileCheck/dump-input/search-range-annotations/check-not.txt
M llvm/test/FileCheck/match-time-error-propagation/invalid-excluded-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/invalid-expected-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/matched-excluded-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/matched-expected-pattern.txt
M llvm/utils/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Annotate search ranges with { } in -dump-input (#198138)
This PR has an
[RFC](https://discourse.llvm.org/t/rfc-filecheck-improving-input-dump-readability/91112).
It is stacked on PR #199063.
Example
=======
```
$ cat check
CHECK: start
CHECK-NEXT: end
$ FileCheck -v -dump-input-context=2 check < input |& tail -23
<<<<<<
1: start
check:1 ^~~~~
next:2'0 { search range start (exclusive)
2: foo0
3: foo1
.
.
.
21: foo19
22: foo20
23: end
next:2'1 !~~ error: match on wrong line
24: bar0
25: bar1
.
.
.
42: bar18
43: bar19
44: bar20
next:2'2 } search range end (exclusive)
>>>>>>
```
Without this patch, input lines 1-3 and 42-44 are not shown. However,
lines 1-3 are where the actual problem is because that is where the
`CHECK-NEXT` directive was expected to match but did not.
Search Ranges Are Helpful
=========================
In general, this patch marks any failed pattern's search range by using
the annotation style shown above, and these annotations are filtered in
when using `-dump-input-filter=error`, which is the default filter.
Seeing the search range can be helpful for understanding the pattern's
behavior. Moreover, the cause of the pattern failure is often the input
at the start or end of the search range. For example:
- A `CHECK-NEXT` or `CHECK-SAME` match on the wrong line, as in the
above example.
- A `CHECK-NOT` unexpected match because a neighboring directive matched
at an unexpected point, affecting the search range.
- An unmatched `CHECK` because a subsequent `CHECK-LABEL` matched at an
unexpected point, affecting the search range end. (In this case, the
search range start and thus the prior directive's match is already
revealed without this patch.)
This patch updates tests in
`llvm/test/FileCheck/dump-input/search-range-annotations`, which
demonstrate its benefit for those cases.
This patch is a replacement for D96653, which attempted to address the
above cases but in a less straight-forward and somewhat broken manner.
The idea of the current patch was discussed during that review.
Replacing `X~~`
===============
Without this patch, search ranges for unmatched patterns (whether a
success, as for `CHECK-NOT`, or a failure, as for `CHECK`) are already
marked with `X~~`. In those cases, this patch replaces those annotations
with the new annotations shown above. As described above, this patch
adds the new annotations to all other failed matched patterns as well.
`X~~` is thus no longer used by `-dump-input`. The `X~~` style is very
noisy, especially for consecutive unmatched unexpected patterns (like a
`CHECK-NOT` block), all of which mark every line of their identical
search ranges. Switching to the new style significantly reduces the
noise in such cases. That noise was discussed recently in issue #77257
and PRs linked from there, and that discussion led to the resurrection
of this patch.
Without this patch, `-dump-input-filter=error` filters in only the start
of a search range that spans multiple lines because an entire `X~~` is
one annotation. With this patch, it filters in both the start and end of
a search range because they are separate annotations (or a single
one-liner, as discussed below). With or without this patch, a different
argument to `-dump-input-filter` (and `-vv`) is required to filter in
the search range for an unmatched unexpected pattern, like `CHECK-NOT`,
because that is not an error.
One-Liners
==========
If a search range does not involve multiple input lines, this patch
keeps the `{` and `}` markers on the same output line like this:
```
<<<<<<
1: start foo end
check:1 ^~~~~
check:3 ^~~
not:2 { } search range (exclusive bounds)
>>>>>>
```
Exclusive Boundaries
====================
`{` and `}` are to be interpreted as exclusive bounds. That is, the
characters at those markers are not included in the search range, but
everything in between is. To try to avoid confusion, this patch adds the
word "exclusive" in every search range annotation.
When the search range starts or ends at a line boundary, the marker
cannot be placed at the first or last character of the line because that
would exclude that character. This patch instead places the marker in
the margin of the input dump, either before the line's first character
or after the line's last character (usually a newline), rather than on
the adjacent line. I have found this makes the annotations easier to
read (more apt have a one-liner, at least), and I do not think it would
make much sense to move a start annotation to an imaginary line 0. For
example, the `{` and `}` below appear in the input dump margins, before
the first character, `s`, and after the space representing the newline:
```
<<<<<<
1: start
check:1'0 { } search range (exclusive bounds)
check:1'1 error: no match found in search range
>>>>>>
```
Before trying exclusive bounds, I experimented with notations involving
inclusive bounds (e.g., `[` and `]`, or `[` and `)`). Such notations
either cannot distinguish empty ranges (without a cryptic inversion like
`][`) from one-character ranges, or they cannot represent them with
one-liners (because they must occupy the same column), increasing
verbosity. I ultimately decided I prefer exclusive bounds because they
are visually and semantically symmetric while consistently concise and
unambiguous.
For comparison, match ranges (e.g., `^~~`) cannot distinguish
one-character ranges from empty ranges. However, in my experience, empty
match ranges are uncommon, and usually it is easy to distinguish them
based on the pattern or directive (e.g., `CHECK-EMPTY`). In contrast,
empty search ranges can occur repeatedly when directive matches are
adjacent and `-implicit-check-not` is used.
Commit: 3654cb7d298a17ab9683d849e70bf47601637eef
https://github.com/llvm/llvm-project/commit/3654cb7d298a17ab9683d849e70bf47601637eef
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Use an explicit S_MOV with V_MIN in FPToSSatI16Pat pattern (#206053)
This fixes the case where GFX7 fails expensive checks/machine
verification with GISel due to passing a literal directly to V_MIN that
is not supported on the architecture. This fixes the buildbot failure:
https://lab.llvm.org/buildbot/#/builders/187/builds/21241 caused by
#202680.
Commit: f6cc23dda19d5e0aab0a8946e6e9242992428b4e
https://github.com/llvm/llvm-project/commit/f6cc23dda19d5e0aab0a8946e6e9242992428b4e
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/tools/llvm-objdump/Offloading/fatbin-coff-compress.test
Log Message:
-----------
[Object] Disable test on big endian (#205999)
The embedded compressed payload is in little endian, and offload assumes
that host endianness is used. Skip the test if host endianness is not
little endian.
Alternative to https://github.com/llvm/llvm-project/pull/205822.
Commit: c124b0e7f69ad1b7320e17f611e3007c442bd649
https://github.com/llvm/llvm-project/commit/c124b0e7f69ad1b7320e17f611e3007c442bd649
Author: David Spickett <david.spickett at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Process.h
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Target/Process.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
R lldb/test/API/functionalities/postmortem/elf-core/elf-dyld-nt-file-mismatch.yaml
Log Message:
-----------
Revert "Fix ProcessElfCore::FindModuleUUID() so it work with symlinks." (#206062)
Reverts llvm/llvm-project#205235
Due to timeouts reported in GitHub CI and reproduced locally by me.
See https://github.com/llvm/llvm-project/issues/205879 for details.
Commit: 64a5845b4f8b64b586f38cabae1d677100e346df
https://github.com/llvm/llvm-project/commit/64a5845b4f8b64b586f38cabae1d677100e346df
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Parser/cxx0x-attributes.cpp
M clang/test/Parser/cxx0x-keyword-attributes.cpp
A clang/test/Sema/attr-const-pure.c
Log Message:
-----------
Diagnose const and pure attributes on non-function declarations (#206039)
The const and pure attribute may only be applied to a function
declaration. However, we were missing a subject list for the attributes
and so we would silently accept and retain the attribute on any kind of
declaration.
Empirical testing suggests that this attribute is not effective with
Objective-C method calls or indirect calls and so the subject is limited
to just function declarations.
Commit: 2d12290550aca7e78a4575b4b09f75a3bc29576b
https://github.com/llvm/llvm-project/commit/2d12290550aca7e78a4575b4b09f75a3bc29576b
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/tools/llvm-readobj/ELF/file-headers.test
A llvm/test/tools/llvm-readobj/ELF/many-segments.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (#165278)
FreeBSD coredump uses program headers to store mmap information. It is
possible for program to use more than PN_XNUM mmaps. Therefore, we
implement the support of PN_XNUM in readelf.
Commit: 5fa41e26aaa01fb79c4c5d7ff71f027757e444ae
https://github.com/llvm/llvm-project/commit/5fa41e26aaa01fb79c4c5d7ff71f027757e444ae
Author: Ganesh <Ganesh.Gopalasubramanian at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
Log Message:
-----------
[X86] Use valign instead of vperm for float domain shuffles (#201624)
The X86 backend then lowers the shuffle through lowerV16F32Shuffle /
lowerV8F64Shuffle, which fall through to lowerShuffleWithPERMV (VPERMPS
/ VPERMPD). lowerShuffleAsVALIGN is asserted on i32 / i64 element types
only and is never called from the float-domain paths, even when the mask
is a clean concatenate-and-shift that VALIGN expresses exactly.
On znver5, VALIGN and VPERMPS / VPERMPD have identical latency (5 cycles
for zmm), throughput (2), and macro-op count (1). The real cost of
VPERMPS / VPERMPD is the extra zmm register required to hold the
permutation index vector.
Intrinsic path for _mm512_alignr_epi32 also gets a vperm. Its a win in
generic path as well as vpermps zmm1, zmm0, zmm3 requires a dedicated
zmm register to hold the permutation index vector. valignd zmm1, zmm3,
zmm3, 1 encodes the rotation count as an immediate (imm8 = 1), using no
extra registers.
Co-authored-by: Shivanshu
Commit: 017937967178fdcf246a3774131be89c6d00c676
https://github.com/llvm/llvm-project/commit/017937967178fdcf246a3774131be89c6d00c676
Author: Alexander Potapenko <glider at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/docs/ThreadSanitizer.rst
Log Message:
-----------
[clang][docs] Document ThreadSanitizer run-time flags and suppressions (#205761)
This patch updates the ThreadSanitizer documentation in clang/docs by
documenting the run-time flags and suppressions, which was requested in
google/sanitizers#446.
Specifically:
- Adds a "Run-time Flags" section detailing common options that can be
passed in TSAN_OPTIONS (e.g. exitcode, log_path, history_size,
halt_on_error, report_atomic_races, etc.).
- Explains how to print the full list of options using help=1.
- Adds a "Suppressions" section documenting the syntax, wildcard rules,
and types of runtime suppressions (race, thread, called_from_lib) with a
practical example suppressions file.
- Adds compile-time ignorelist code examples.
- Document limitations with C++ Exceptions, non-instrumented code, and
GDB/ASLR issues.
- Removes outdated references to the archived sanitizers wiki.
Commit: e1aa9d4cf0952b88010c38bae23ea9c651ae08c7
https://github.com/llvm/llvm-project/commit/e1aa9d4cf0952b88010c38bae23ea9c651ae08c7
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] Fix build for #204510. (#206069)
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: 958ddb5a280f99c6847bde0d4f75e1abb59d85ba
https://github.com/llvm/llvm-project/commit/958ddb5a280f99c6847bde0d4f75e1abb59d85ba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
Log Message:
-----------
AMDGPU: Initialize Module fields in AMDGPUPromoteAllocaImpl (#206052)
Commit: 0aaec671473dd311fc82c0c3e24e4c663c79f2e8
https://github.com/llvm/llvm-project/commit/0aaec671473dd311fc82c0c3e24e4c663c79f2e8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-merge.mir
M llvm/test/CodeGen/AMDGPU/alloca.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/comdat.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-def-after-use.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
Log Message:
-----------
AMDGPU: Use -mtriple= instead of with a space for llc run lines (#206067)
-mtriple=amdgcn is by far the dominant form over space separation.
Convert these to simplify future bulk test updates.
Commit: e3e7ec49e49b1fa7d2ebf40f44e369f2f7eff65a
https://github.com/llvm/llvm-project/commit/e3e7ec49e49b1fa7d2ebf40f44e369f2f7eff65a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
M clang/test/SemaSYCL/sycl-cconv-win.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
Log Message:
-----------
AMDGPU: Fix typos in test triple OS components (#206065)
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 384cecd5b20107e1453eaee008e8f4fd22b42c9e
https://github.com/llvm/llvm-project/commit/384cecd5b20107e1453eaee008e8f4fd22b42c9e
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectRewriter.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Script.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/ToolBase.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/lit.local.cfg
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expect_list_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expects_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_multiple_scripts_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/simple_prog.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test_expected.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expect_list.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expects.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_multiple_scripts.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/whole_file.test
Log Message:
-----------
Reapply "[Dexter] Add ability to rewrite scripts to fill-in unknown values" (#206034)
Reverts llvm/llvm-project#205657
The original commit was causing pre-merge CI to fail for AArch64, as one
of the tests expects stepping behaviour that is seen on not seen on
AArch64 targets; the test suite containing the failing test is meant to
be configured to not run for AArch64, but the unsupported label was not
being applied, due to an error in the unsupported check. This patch
fixes the unsupported check in scripts/lit.local.cfg, which should
prevent further errors.
Commit: 8249d087039e7e8e2967f0799902cb7ee8278a94
https://github.com/llvm/llvm-project/commit/8249d087039e7e8e2967f0799902cb7ee8278a94
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCBindRoutine.cpp
M mlir/test/Dialect/OpenACC/acc-bind-routine.mlir
Log Message:
-----------
[mlir][acc] Rewrite acc routine bind calls inside gpu.func (#204220)
Run `acc-bind-routine` on `FunctionOpInterface` and rewrite calls to
bound symbols in offload regions and `gpu.func`. For string bind names,
declare private functions in the enclosing `gpu.module` symbol table
when the call is inside device code.
Commit: ddb1d0c79cf0759aad6e0c49d0a98ae1e0b5b983
https://github.com/llvm/llvm-project/commit/ddb1d0c79cf0759aad6e0c49d0a98ae1e0b5b983
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
Log Message:
-----------
[AMDGPU][NFC] Add explicit -global-isel flag to test (#203533)
Follow up to #200414
[comment](https://github.com/llvm/llvm-project/pull/200414#discussion_r3403426555)
to add explicit `-global-isel` flag to mixed tests.
Commit: 94b5b37b439e1d9d4e9ad065949f52888ca75a30
https://github.com/llvm/llvm-project/commit/94b5b37b439e1d9d4e9ad065949f52888ca75a30
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] "port" affc89f7cb64 (#206098)
Commit: 49f061ce56be5c3ce2cc46f83a65102dc0e89958
https://github.com/llvm/llvm-project/commit/49f061ce56be5c3ce2cc46f83a65102dc0e89958
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn] port 0eefb2682bf8c (C++26 for libc++) (#206100)
Other than in 8a7846fe86f95e82c (the C++23 bump), we apparently only
bump the standard for libc++, but not for libc++abi.
Commit: d445267fbb569e67ba9311f8c2bc675fd79e5d16
https://github.com/llvm/llvm-project/commit/d445267fbb569e67ba9311f8c2bc675fd79e5d16
Author: David Green <david.green at arm.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/aggressive-interleaving.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-load.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
Log Message:
-----------
[AArch64] Increase the max interleave factor to 4 for loops with reductions (#205612)
The default max interleave factor is 2. Increasing it to 4 universally
can spend an amount of codeside on something that does not always
increase performance (especially if the loop gets over-unrolled). Small
reduction loops often benefit from extra interleaving due to the
multiple independant streams that can execute in parallel. This patch
increases the max interleave factor to 4 for such loops, limited to
where the VF is <= 4 to limit the impact for already highly vectorized
loops.
Commit: fe5f49f84f1e41a3266d215be01f3fe830e75d5d
https://github.com/llvm/llvm-project/commit/fe5f49f84f1e41a3266d215be01f3fe830e75d5d
Author: Ben Dunbobbin <Ben.Dunbobbin at sony.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A cross-project-tests/dtlto/cache-serialization.test
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DTLTO/DTLTOInputFiles.cpp
Log Message:
-----------
[DTLTO] Do not serialize inputs that hit in the ThinLTO cache (#204104)
To handle bitcode inputs that are not in individual files on disk, such
as members of non-thin archives, DTLTO serializes those inputs to
temporary individual bitcode files.
This patch changes LLVM to serialize only uncached input modules and any
modules they import from.
For a link of Clang 22 (debug build with sanitizers and
instrumentation), I performed measurements with and without this patch
for an optimized toolchain (PGO non-LTO, based on recent main commit
c264e07c2f3d9f25a2526e69926daea3a68be74b). The measurements were run on:
- Windows 11 Pro build 26200, AMD Family 25 at approximately 4.5 GHz,
16 cores / 32 threads, and 64 GB RAM.
- Ubuntu 24.04.3 LTS, Ryzen 9 5950X with 32 threads, and 62 GiB RAM.
There was no difference in serialization time when the cache was
disabled.
When the cache was enabled and all compilations hit in the cache,
serialization was eliminated, as was the time spent deleting the
previously serialized temporary files, which are no longer created. Mean
wall-clock time improved by about 10% on both machines in this scenario.
Commit: 60908dc9955337898ce3e2c21a3425cf073abe43
https://github.com/llvm/llvm-project/commit/60908dc9955337898ce3e2c21a3425cf073abe43
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-copyable-reused-scalars.ll
Log Message:
-----------
[SLP] Fix reused-scalar reduction counters for copyable root nodes
The horizontal reduction reuse-counter scale is built in
getRootNodeScalars() order and applied positionally to the emitted
reduction vector. For a root node with copyable elements the scalar
order is reordered while the emitted lanes still follow the reduced
values (candidates) order, so the repeat count was applied to the wrong
lane, producing a wrong reduction result.
Fixes #205614
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/206102
Commit: 00a6186128d326f8f5fe23d4754e399c7a08549c
https://github.com/llvm/llvm-project/commit/00a6186128d326f8f5fe23d4754e399c7a08549c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
Log Message:
-----------
AMDGPU: Prefer getting the triple from the module over the TargetMachine (#206055)
Commit: 96ef44c051f72130d4cd39b455f31822582b6e5f
https://github.com/llvm/llvm-project/commit/96ef44c051f72130d4cd39b455f31822582b6e5f
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
Log Message:
-----------
[AMDGPU][NFC] Use compact enum table for PALMetadata (#206085)
Instead of storing pointer+value pair, use the new enum tables to store
the same information more compact and without dynamic relocations.
Commit: 7dbdc34bd9be798a0debcec173e52e9477f8e70b
https://github.com/llvm/llvm-project/commit/7dbdc34bd9be798a0debcec173e52e9477f8e70b
Author: Ruslan Baratov <x at ruslo.dev>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/cmake/modules/CoverageReport.cmake
Log Message:
-----------
Fix command-line argument for prepare-code-coverage-artifact.py (#200982)
Commit: fdf30ae699ac10d0568e2d4a83da1327dd74255f
https://github.com/llvm/llvm-project/commit/fdf30ae699ac10d0568e2d4a83da1327dd74255f
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
R flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
R flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
Log Message:
-----------
Revert "[Flang]Add support for inlining hlfir.assign operation where both LHS and RHS are slices of the same array" (#206103)
Reverts llvm/llvm-project#204532 due to regressions in numerous Fujitsu
tests and several important apps
Commit: bcc3939eb9b7448d0c7db119cbdf4b71b562145b
https://github.com/llvm/llvm-project/commit/bcc3939eb9b7448d0c7db119cbdf4b71b562145b
Author: Paul Kirth <paulkirth at google.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
Log Message:
-----------
[llvm][GVNSink] Avoid non-determistic iteration order over NeededPHIs (#205952)
The iteration order of DenseSet is not guaranteed, which affects the
output of code generated with GVNSink enabled. This can cause code to be
emitted in differing order, affect section ordering, and in some cases
was reported to result in larger binaries due to increased padding between
sections.
This patch addresses this by using SetVector, which has a deterministic
iteration order.
Commit: 7f8faef330ec0f02eafe65c33d1796491c3e3aee
https://github.com/llvm/llvm-project/commit/7f8faef330ec0f02eafe65c33d1796491c3e3aee
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-add.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-fadd.ll
Log Message:
-----------
[PhaseOrdering][X86] Copied codegen add/fadd reduction pattern tests to ensure middle-end is creating reduction intrinsics (#206101)
AVX512 is missing a llvm.vector.reduce.add.v16i32 call - will investigate
Commit: d3ea8e2db1daa971bd1b4f3083af8ed99142d848
https://github.com/llvm/llvm-project/commit/d3ea8e2db1daa971bd1b4f3083af8ed99142d848
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-26 (Fri, 26 Jun 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
M clang-tools-extra/clang-tidy/misc/ExplicitConstructorCheck.cpp
M clang-tools-extra/clang-tidy/utils/TypeTraits.cpp
M clang-tools-extra/clang-tidy/utils/TypeTraits.h
M clang-tools-extra/clangd/AST.cpp
M clang-tools-extra/clangd/AST.h
M clang-tools-extra/clangd/XRefs.cpp
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/unittests/XRefsTests.cpp
M clang-tools-extra/pp-trace/PPCallbacksTracker.cpp
A clang-tools-extra/test/clang-doc/Inputs/DR-141990.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/database_template.json
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Rectangle.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/include/Shape.h
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Calculator.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Circle.cpp
M clang-tools-extra/test/clang-doc/Inputs/basic-project/src/Rectangle.cpp
A clang-tools-extra/test/clang-doc/Inputs/builtin_types.cpp
M clang-tools-extra/test/clang-doc/Inputs/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-specialization.cpp
A clang-tools-extra/test/clang-doc/Inputs/class-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/class.cpp
A clang-tools-extra/test/clang-doc/Inputs/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/Inputs/compact.cpp
A clang-tools-extra/test/clang-doc/Inputs/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/Inputs/concept.cpp
A clang-tools-extra/test/clang-doc/Inputs/conversion_function.cpp
M clang-tools-extra/test/clang-doc/Inputs/enum.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-requires.cpp
A clang-tools-extra/test/clang-doc/Inputs/function-specifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/index.cpp
A clang-tools-extra/test/clang-doc/Inputs/inheritance.cpp
A clang-tools-extra/test/clang-doc/Inputs/long-name.cpp
A clang-tools-extra/test/clang-doc/Inputs/method-template.cpp
A clang-tools-extra/test/clang-doc/Inputs/multiple-namespaces.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-index.cpp
A clang-tools-extra/test/clang-doc/Inputs/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace-html-md.cpp
A clang-tools-extra/test/clang-doc/Inputs/namespace.cpp
A clang-tools-extra/test/clang-doc/Inputs/nested-namespace.cpp
M clang-tools-extra/test/clang-doc/Inputs/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file-public.cpp
A clang-tools-extra/test/clang-doc/Inputs/single-file.cpp
A clang-tools-extra/test/clang-doc/Inputs/templates.cpp
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.css
M clang-tools-extra/test/clang-doc/Inputs/test-assets/test.js
A clang-tools-extra/test/clang-doc/Inputs/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/array-type.cpp
M clang-tools-extra/test/clang-doc/basic-project.mustache.test
M clang-tools-extra/test/clang-doc/basic-project.test
R clang-tools-extra/test/clang-doc/builtin_types.cpp
R clang-tools-extra/test/clang-doc/class-partial-specialization.cpp
R clang-tools-extra/test/clang-doc/comments-in-macros.cpp
R clang-tools-extra/test/clang-doc/compact.cpp
R clang-tools-extra/test/clang-doc/conversion_function.cpp
R clang-tools-extra/test/clang-doc/enum.cpp
R clang-tools-extra/test/clang-doc/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/array-type.cpp
A clang-tools-extra/test/clang-doc/html/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class-specialization.cpp
A clang-tools-extra/test/clang-doc/html/class.cpp
A clang-tools-extra/test/clang-doc/html/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/html/compound-constraints.cpp
A clang-tools-extra/test/clang-doc/html/conversion_function.cpp
A clang-tools-extra/test/clang-doc/html/enum.cpp
A clang-tools-extra/test/clang-doc/html/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/index.cpp
A clang-tools-extra/test/clang-doc/html/long-name.cpp
A clang-tools-extra/test/clang-doc/html/member-function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/html/mustache-index.cpp
A clang-tools-extra/test/clang-doc/html/mustache-separate-namespace.cpp
A clang-tools-extra/test/clang-doc/html/namespace.cpp
A clang-tools-extra/test/clang-doc/html/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/html/templates.cpp
A clang-tools-extra/test/clang-doc/html/typedef-alias.cpp
R clang-tools-extra/test/clang-doc/index.cpp
M clang-tools-extra/test/clang-doc/json/class-partial-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-requires.cpp
M clang-tools-extra/test/clang-doc/json/class-specialization.cpp
M clang-tools-extra/test/clang-doc/json/class-template.cpp
M clang-tools-extra/test/clang-doc/json/class.cpp
A clang-tools-extra/test/clang-doc/json/compact.cpp
M clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
M clang-tools-extra/test/clang-doc/json/concept.cpp
A clang-tools-extra/test/clang-doc/json/conversion_function.cpp
A clang-tools-extra/test/clang-doc/json/enum.cpp
M clang-tools-extra/test/clang-doc/json/function-requires.cpp
M clang-tools-extra/test/clang-doc/json/function-specifiers.cpp
A clang-tools-extra/test/clang-doc/json/index.cpp
M clang-tools-extra/test/clang-doc/json/inheritance.cpp
A clang-tools-extra/test/clang-doc/json/long-name.cpp
M clang-tools-extra/test/clang-doc/json/method-template.cpp
M clang-tools-extra/test/clang-doc/json/multiple-namespaces.cpp
M clang-tools-extra/test/clang-doc/json/namespace.cpp
M clang-tools-extra/test/clang-doc/json/nested-namespace.cpp
A clang-tools-extra/test/clang-doc/json/templates.cpp
R clang-tools-extra/test/clang-doc/long-name.cpp
A clang-tools-extra/test/clang-doc/md/array-type.cpp
A clang-tools-extra/test/clang-doc/md/builtin_types.cpp
A clang-tools-extra/test/clang-doc/md/class-partial-specialization.cpp
A clang-tools-extra/test/clang-doc/md/comments-in-macros.cpp
A clang-tools-extra/test/clang-doc/md/enum.cpp
A clang-tools-extra/test/clang-doc/md/function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/md/member-function-pointer-type.cpp
A clang-tools-extra/test/clang-doc/md/namespace.cpp
A clang-tools-extra/test/clang-doc/md/nested-pointer-qualifiers.cpp
A clang-tools-extra/test/clang-doc/md/templates.cpp
R clang-tools-extra/test/clang-doc/member-function-pointer-type.cpp
R clang-tools-extra/test/clang-doc/mustache-index.cpp
R clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
R clang-tools-extra/test/clang-doc/namespace.cpp
R clang-tools-extra/test/clang-doc/nested-pointer-qualifiers.cpp
R clang-tools-extra/test/clang-doc/single-file-public.cpp
R clang-tools-extra/test/clang-doc/single-file.cpp
R clang-tools-extra/test/clang-doc/templates.cpp
R clang-tools-extra/test/clang-doc/typedef-alias.cpp
A clang-tools-extra/test/clang-doc/yaml/builtin_types.cpp
A clang-tools-extra/test/clang-doc/yaml/conversion_function.cpp
A clang-tools-extra/test/clang-doc/yaml/single-file-public.cpp
A clang-tools-extra/test/clang-doc/yaml/single-file.cpp
A clang-tools-extra/test/clang-doc/yaml/templates.cpp
M clang-tools-extra/unittests/clang-tidy/CMakeLists.txt
A clang-tools-extra/unittests/clang-tidy/TypeTraitsTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/ThreadSanitizer.rst
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Checker.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/DarwinSDKInfo.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/FlowSensitive/WatchedLiteralsSolver.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeSafety.cpp
M clang/lib/Basic/DarwinSDKInfo.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
A clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CMakeLists.txt
A clang/lib/CodeGen/pch.h
M clang/lib/Driver/OffloadBundler.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Headers/__clang_hip_libdevice_declares.h
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaType.cpp
M clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineObjC.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/AST/ByteCode/cxx11.cpp
A clang/test/AST/ByteCode/evaluate-dtor.cpp
M clang/test/AST/ByteCode/mutable.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/Analysis/Scalable/PointerFlow/entity-name-no-conflict.cpp
A clang/test/CIR/CodeGen/builtin-atomic-is-lock-free.c
A clang/test/CIR/CodeGen/cleanup-scope-throw-caught.cpp
M clang/test/CIR/CodeGen/constant-inits.cpp
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-decomp-decls.cpp
M clang/test/CIR/CodeGen/global-dtor-union-narrowed.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/global-temp-dtor.cpp
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
A clang/test/CIR/CodeGen/goto-address-label-table.c
M clang/test/CIR/CodeGen/label-values.c
A clang/test/CIR/CodeGen/new-array-init.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/record-zero-init-padding.c
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/static-members.cpp
M clang/test/CIR/CodeGen/thread-local-in-func.cpp
A clang/test/CIR/CodeGen/vtable-load-invariant.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
A clang/test/CIR/CodeGenOpenMP/target-map-llvm-device.c
A clang/test/CIR/CodeGenOpenMP/target-map-llvm-host.c
A clang/test/CIR/CodeGenOpenMP/target-map.c
A clang/test/CIR/IR/load-invariant.cir
A clang/test/CIR/Lowering/load-invariant.cir
A clang/test/CIR/Transforms/abi-lowering/expand-struct-arg.cir
M clang/test/CXX/expr/expr.const/p6-2a.cpp
A clang/test/CodeGen/X86/newpm.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCUDA/offload_via_llvm.cu
M clang/test/CodeGenCXX/const-init-cxx2a.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/non-const-init-cxx2a.cpp
M clang/test/CodeGenOpenCL/address-spaces-conversions.cl
M clang/test/CodeGenOpenCL/address-spaces.cl
M clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
M clang/test/CodeGenOpenCL/func-call-dbg-loc.cl
M clang/test/CodeGenSYCL/address-space-conversions.cpp
M clang/test/CodeGenSYCL/amd-address-space-conversions.cpp
M clang/test/CodeGenSYCL/cuda-address-space-conversions.cpp
M clang/test/DebugInfo/Generic/bitfield-0-struct.c
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.co
A clang/test/Driver/Inputs/clang-offload-bundler-magic-collision.py
A clang/test/Driver/clang-offload-bundler-magic-collision.c
M clang/test/Driver/driverkit-path.c
A clang/test/Driver/fsanitize-shadow-call-stack-hexagon.c
A clang/test/Driver/gpu-exceptions.cpp
M clang/test/Driver/incompatible_sysroot.c
M clang/test/Driver/zos-ld.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Parser/cxx0x-attributes.cpp
M clang/test/Parser/cxx0x-keyword-attributes.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
A clang/test/Sema/attr-const-pure.c
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaOpenCL/usm-address-spaces-conversions.cl
M clang/test/SemaSYCL/address-space-conversions.cpp
M clang/test/SemaSYCL/sycl-cconv-win.cpp
M clang/unittests/Basic/DarwinSDKInfoTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Index/CMakeLists.txt
M clang/unittests/Index/IndexTests.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/arm/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3.S
A compiler-rt/lib/builtins/arm/thumb1/addsf3fast.S
A compiler-rt/test/builtins/Unit/addsf3new_test.c
A compiler-rt/test/builtins/Unit/subsf3_test.c
M compiler-rt/test/shadowcallstack/libc_support.h
M compiler-rt/test/shadowcallstack/lit.cfg.py
M compiler-rt/test/shadowcallstack/minimal_runtime.h
A cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectRewriter.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Script.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/ToolBase.py
M cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/lit.local.cfg
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expect_list_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_expects_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/rewrite_multiple_scripts_expected.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/simple_prog.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/Inputs/whole_file_test_expected.dex
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expect_list.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_expects.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/rewrite_multiple_scripts.cpp
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/rewriting/whole_file.test
A cross-project-tests/dtlto/cache-serialization.test
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/__cuda_device.f90
M flang-rt/lib/runtime/__fortran_type_info.f90
M flang-rt/lib/runtime/cooperative_groups.f90
M flang-rt/lib/runtime/cuda_runtime_api.f90
M flang-rt/lib/runtime/cudadevice.f90
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Optimizer/Analysis/ArraySectionAnalyzer.h
M flang/include/flang/Optimizer/Builder/FIRBuilder.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Semantics/semantics.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/HLFIR/Transforms/InlineHLFIRAssign.cpp
M flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/lib/Parser/program-parsers.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/program-tree.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/OpenACC/openacc-mappable.fir
R flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
R flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
R flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/OpenACC/acc-host-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-routine-bind-clone-signature.f90
A flang/test/Lower/OpenACC/acc-routine-bind-devtype-filter.f90
M flang/test/Lower/OpenACC/acc-routine-bind-devtype-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-string-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-undeclared.f90
M flang/test/Lower/OpenMP/metadirective-construct.f90
A flang/test/Semantics/CUDA/cuf-constant-generic-unified.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures01.cuf
A flang/test/Semantics/CUDA/cuf-device-procedures02.cuf
A flang/test/Semantics/CUDA/cuf-generic-literal-host.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-error.cuf
A flang/test/Semantics/CUDA/cuf-ignore-tkr-m-generic.cuf
A flang/test/Semantics/CUDA/cuf-matching-distance.cuf
A flang/test/Semantics/CUDA/cuf-missing-intrinsic-modules.cuf
A flang/test/Semantics/CUDA/cuf-proc-attr-error.cuf
A flang/test/Semantics/CUDA/cuf01.cuf
A flang/test/Semantics/CUDA/cuf02.cuf
A flang/test/Semantics/CUDA/cuf03.cuf
A flang/test/Semantics/CUDA/cuf04.cuf
A flang/test/Semantics/CUDA/cuf05.cuf
A flang/test/Semantics/CUDA/cuf06.cuf
A flang/test/Semantics/CUDA/cuf07.cuf
A flang/test/Semantics/CUDA/cuf08.cuf
A flang/test/Semantics/CUDA/cuf09.cuf
A flang/test/Semantics/CUDA/cuf10.cuf
A flang/test/Semantics/CUDA/cuf11.cuf
A flang/test/Semantics/CUDA/cuf12.cuf
A flang/test/Semantics/CUDA/cuf13.cuf
A flang/test/Semantics/CUDA/cuf14.cuf
A flang/test/Semantics/CUDA/cuf15.cuf
A flang/test/Semantics/CUDA/cuf16.cuf
A flang/test/Semantics/CUDA/cuf17.cuf
A flang/test/Semantics/CUDA/cuf18.cuf
A flang/test/Semantics/CUDA/cuf19.cuf
A flang/test/Semantics/CUDA/cuf20.cuf
A flang/test/Semantics/CUDA/cuf21.cuf
A flang/test/Semantics/CUDA/cuf22.cuf
A flang/test/Semantics/CUDA/cuf23.cuf
A flang/test/Semantics/CUDA/cuf24.cuf
A flang/test/Semantics/CUDA/cuf25.cuf
A flang/test/Semantics/CUDA/cuf26.cuf
A flang/test/Semantics/CUDA/cuf27.cuf
A flang/test/Semantics/CUDA/cuf28.cuf
A flang/test/Semantics/CUDA/cuf29.cuf
A flang/test/Semantics/CUDA/cuf30.cuf
M flang/test/Semantics/OpenACC/acc-default-none-scalars-strict.f90
M flang/test/Semantics/OpenACC/acc-default-none-scalars.f90
M flang/test/Semantics/OpenACC/acc-kernels-loop.f90
M flang/test/Semantics/OpenACC/acc-parallel.f90
M flang/test/Semantics/OpenACC/acc-resolve01.f90
A flang/test/Semantics/OpenACC/acc-routine-bad.f90
M flang/test/Semantics/OpenMP/affinity-clause.f90
M flang/test/Semantics/OpenMP/allocate02.f90
M flang/test/Semantics/OpenMP/allocate04.f90
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/allocators03.f90
M flang/test/Semantics/OpenMP/atomic-compare.f90
M flang/test/Semantics/OpenMP/atomic.f90
M flang/test/Semantics/OpenMP/atomic01.f90
M flang/test/Semantics/OpenMP/cancel.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/combined-constructs.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-variant-match.f90
M flang/test/Semantics/OpenMP/declare-variant.f90
M flang/test/Semantics/OpenMP/default.f90
M flang/test/Semantics/OpenMP/detach02.f90
M flang/test/Semantics/OpenMP/device-constructs.f90
M flang/test/Semantics/OpenMP/do-collapse.f90
M flang/test/Semantics/OpenMP/flush01.f90
M flang/test/Semantics/OpenMP/flush02.f90
M flang/test/Semantics/OpenMP/graph-id.f90
M flang/test/Semantics/OpenMP/graph-reset.f90
M flang/test/Semantics/OpenMP/if-clause-45-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-45.f90
M flang/test/Semantics/OpenMP/if-clause-50-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-50.f90
M flang/test/Semantics/OpenMP/interchange-permutation.f90
M flang/test/Semantics/OpenMP/loop-transformation-clauses01.f90
M flang/test/Semantics/OpenMP/loop-transformation-construct01.f90
M flang/test/Semantics/OpenMP/masked.f90
M flang/test/Semantics/OpenMP/nontemporal.f90
M flang/test/Semantics/OpenMP/order-clause01.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/ordered03.f90
M flang/test/Semantics/OpenMP/requires01.f90
M flang/test/Semantics/OpenMP/resolve02.f90
M flang/test/Semantics/OpenMP/scan1.f90
M flang/test/Semantics/OpenMP/sections01.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/OpenMP/target-update01.f90
M flang/test/Semantics/OpenMP/taskgroup01.f90
M flang/test/Semantics/OpenMP/taskloop04.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
M flang/test/Semantics/OpenMP/tile01.f90
M flang/test/Semantics/OpenMP/workshare02.f90
R flang/test/Semantics/cuf-constant-generic-unified.cuf
R flang/test/Semantics/cuf-device-procedures01.cuf
R flang/test/Semantics/cuf-device-procedures02.cuf
R flang/test/Semantics/cuf-generic-literal-host.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-error.cuf
R flang/test/Semantics/cuf-ignore-tkr-m-generic.cuf
R flang/test/Semantics/cuf-matching-distance.cuf
R flang/test/Semantics/cuf-missing-intrinsic-modules.cuf
R flang/test/Semantics/cuf-proc-attr-error.cuf
R flang/test/Semantics/cuf01.cuf
R flang/test/Semantics/cuf02.cuf
R flang/test/Semantics/cuf03.cuf
R flang/test/Semantics/cuf04.cuf
R flang/test/Semantics/cuf05.cuf
R flang/test/Semantics/cuf06.cuf
R flang/test/Semantics/cuf07.cuf
R flang/test/Semantics/cuf08.cuf
R flang/test/Semantics/cuf09.cuf
R flang/test/Semantics/cuf10.cuf
R flang/test/Semantics/cuf11.cuf
R flang/test/Semantics/cuf12.cuf
R flang/test/Semantics/cuf13.cuf
R flang/test/Semantics/cuf14.cuf
R flang/test/Semantics/cuf15.cuf
R flang/test/Semantics/cuf16.cuf
R flang/test/Semantics/cuf17.cuf
R flang/test/Semantics/cuf18.cuf
R flang/test/Semantics/cuf19.cuf
R flang/test/Semantics/cuf20.cuf
R flang/test/Semantics/cuf21.cuf
R flang/test/Semantics/cuf22.cuf
R flang/test/Semantics/cuf23.cuf
R flang/test/Semantics/cuf24.cuf
R flang/test/Semantics/cuf25.cuf
R flang/test/Semantics/cuf26.cuf
R flang/test/Semantics/cuf27.cuf
R flang/test/Semantics/cuf28.cuf
R flang/test/Semantics/cuf29.cuf
R flang/test/Semantics/cuf30.cuf
M flang/test/Semantics/indirect02.f90
M flang/unittests/Frontend/CMakeLists.txt
M flang/unittests/Frontend/CompilerInstanceTest.cpp
M libc/benchmarks/CMakeLists.txt
M libc/benchmarks/JSON.cpp
M libc/benchmarks/JSONTest.cpp
M libc/benchmarks/LibcBenchmark.cpp
M libc/benchmarks/LibcBenchmark.h
M libc/benchmarks/LibcBenchmarkTest.cpp
M libc/benchmarks/LibcFunctionPrototypes.h
M libc/benchmarks/LibcMemoryBenchmark.cpp
M libc/benchmarks/LibcMemoryBenchmark.h
M libc/benchmarks/LibcMemoryBenchmarkMain.cpp
M libc/benchmarks/LibcMemoryGoogleBenchmarkMain.cpp
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/benchmarks/MemorySizeDistributions.h
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/darwin/x86_64/entrypoints.txt
M libc/config/freebsd/x86_64/entrypoints.txt
M libc/config/gpu/amdgpu/entrypoints.txt
M libc/config/gpu/nvptx/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/arm/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/config/windows/entrypoints.txt
A libc/docs/dev/builtin_compatibility.rst
M libc/docs/dev/index.rst
M libc/docs/headers/math/index.rst
M libc/include/stdlib.yaml
M libc/shared/math.h
A libc/shared/math/tanbf16.h
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/string_view.h
M libc/src/__support/CPP/type_traits/is_integral.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/tanbf16.h
M libc/src/math/CMakeLists.txt
M libc/src/math/docs/add_math_function.md
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/tanbf16.cpp
A libc/src/math/tanbf16.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/environ_internal.cpp
M libc/src/stdlib/environ_internal.h
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/unsetenv.cpp
A libc/src/stdlib/unsetenv.h
M libc/test/UnitTest/LibcTest.cpp
M libc/test/UnitTest/LibcTest.h
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/unsetenv_test.cpp
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/CPP/CMakeLists.txt
M libc/test/src/__support/CPP/stringview_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/tanbf16_test.cpp
A libc/test/src/math/tanbf16_test.cpp
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__expected/expected.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__ranges/split_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/version
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/src/text_encoding.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.split/nodiscard.verify.cpp
A libcxx/test/libcxx/ranges/range.adaptors/range.take_while/nodiscard.verify.cpp
M libcxx/test/libcxx/utilities/expected/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/localization/locales/locale/locale.members/encoding.pass.cpp
R libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
R libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.create/make_shared.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libsycl/docs/index.rst
M libsycl/include/sycl/__impl/index_space_classes.hpp
A libsycl/test/basic/index_space_classes.cpp
A libsycl/test/basic/index_space_classes_negative.cpp
M lldb/bindings/interface/SBValueExtensions.i
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointList.h
M lldb/include/lldb/Breakpoint/BreakpointName.h
M lldb/include/lldb/Breakpoint/BreakpointResolverName.h
M lldb/include/lldb/Core/ModuleSpec.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/Breakpoint/BreakpointList.cpp
M lldb/source/Breakpoint/BreakpointResolverName.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Expression/DWARFExpression.cpp
M lldb/source/Host/windows/ProcessLauncherWindows.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/source/Utility/Log.cpp
M lldb/source/Utility/VirtualDataExtractor.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Casts/TestFrameVarDILCast.py
M lldb/test/API/functionalities/data-formatter/data-formatter-python-synth/TestDataFormatterPythonSynth.py
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
R lldb/test/API/functionalities/postmortem/elf-core/elf-dyld-nt-file-mismatch.yaml
A lldb/test/Shell/SymbolFile/DWARF/wasm-function-display-name.yaml
M lldb/tools/lldb-dap/EventHelper.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Utility/VirtualDataExtractorTest.cpp
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/ImmutableSetIteratorBM.cpp
M llvm/cmake/modules/CoverageReport.cmake
M llvm/docs/CommandGuide/index.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/Pipeline.rst
M llvm/docs/GlobalISel/Porting.rst
M llvm/docs/GlobalISel/index.rst
M llvm/docs/Reference.md
M llvm/docs/UserGuides.md
M llvm/docs/conf.py
M llvm/docs/tutorial/MyFirstLanguageFrontend/index.rst
A llvm/include/llvm/ADT/Enum.h
M llvm/include/llvm/ADT/ImmutableSet.h
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
M llvm/include/llvm/Analysis/PHITransAddr.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/BinaryFormat/DXContainerConstants.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/CommandFlags.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/Support/ScopedPrinter.h
M llvm/include/llvm/Target/TargetLoweringObjectFile.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
M llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
M llvm/lib/Analysis/PHITransAddr.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/ComplexDeinterleavingPass.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DTLTO/DTLTOInputFiles.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/Object/OffloadBundle.cpp
M llvm/lib/ObjectYAML/DXContainerEmitter.cpp
M llvm/lib/ObjectYAML/DXContainerYAML.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedA510.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
M llvm/lib/Target/AMDGPU/AMDGPUHWEvents.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/R600TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFCORE.h
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/BPF/BTFDebug.h
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/TargetLoweringObjectFile.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86MachineFunctionInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/NaryReassociate.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
A llvm/test/Analysis/MemorySSA/invariant-load-intrinsic.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/workitem-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
A llvm/test/CodeGen/AArch64/complex-deinterleaving-reassoc-duplicates.ll
M llvm/test/CodeGen/AArch64/sve-mul-imm-add-adr.ll
A llvm/test/CodeGen/AArch64/sve2-fixed-length-sra-flag.ll
A llvm/test/CodeGen/AArch64/sve2-fixed-length-sra.ll
M llvm/test/CodeGen/AArch64/tiny-model-static.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-add-nullptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ashr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fabs-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsh.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-or-redundant.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-redundant-neg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rot.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-amount-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-illegal-types.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shifts.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-narrow.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-trunc-shift.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.compr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.barrier.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbl-b32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-br.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-frame-index.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extractelement-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-amdgcn-fdiv-fast.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-jump-table.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memsetinline.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-merge.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-reassoc.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-select.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fabs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fneg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-illegal-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-inttoptr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptrtoint.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/selected-inst-flags.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector-pointer-crash.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer-unsupported.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-initializer.ll
M llvm/test/CodeGen/AMDGPU/alignbit-pat.ll
M llvm/test/CodeGen/AMDGPU/alloca.ll
M llvm/test/CodeGen/AMDGPU/allow-check.ll
M llvm/test/CodeGen/AMDGPU/always-uniform.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-cs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-default.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-denormal.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp-on.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-dx10-clamp.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-es.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-gs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-hs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ieee.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ls.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-msgpack-vs.ll
M llvm/test/CodeGen/AMDGPU/amdpal-ps.ll
M llvm/test/CodeGen/AMDGPU/amdpal-psenable.ll
M llvm/test/CodeGen/AMDGPU/amdpal-vs.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
M llvm/test/CodeGen/AMDGPU/atomic_cmp_swap_local.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_add.ll
M llvm/test/CodeGen/AMDGPU/atomic_load_sub.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/basic-branch.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bfe-patterns.ll
M llvm/test/CodeGen/AMDGPU/bfi_nested.ll
M llvm/test/CodeGen/AMDGPU/bfm.ll
M llvm/test/CodeGen/AMDGPU/bitreverse-inline-immediates.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/branch-uniformity.ll
M llvm/test/CodeGen/AMDGPU/break-vmem-soft-clauses.mir
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
M llvm/test/CodeGen/AMDGPU/cndmask-no-def-vcc.ll
M llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir
M llvm/test/CodeGen/AMDGPU/coalescer-identical-values-undef.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subreg-join.mir
M llvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
M llvm/test/CodeGen/AMDGPU/coalescer_remat.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf-broken.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/collapse-endcf2.mir
M llvm/test/CodeGen/AMDGPU/combine-and-sext-bool.ll
M llvm/test/CodeGen/AMDGPU/combine-cond-add-sub.ll
M llvm/test/CodeGen/AMDGPU/combine-reg-or-const.ll
M llvm/test/CodeGen/AMDGPU/combine-sreg64-inits.mir
M llvm/test/CodeGen/AMDGPU/comdat.ll
M llvm/test/CodeGen/AMDGPU/commute-compares.ll
M llvm/test/CodeGen/AMDGPU/commute_modifiers.ll
M llvm/test/CodeGen/AMDGPU/concat_vectors.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/control-flow-optnone.ll
M llvm/test/CodeGen/AMDGPU/convergent-inlineasm.ll
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cttz-elts.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dagcomb-shuffle-vecextend-non2.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-reassociate-bug.ll
M llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir
M llvm/test/CodeGen/AMDGPU/debug-value.ll
M llvm/test/CodeGen/AMDGPU/debug-value2.ll
M llvm/test/CodeGen/AMDGPU/debug_frame.ll
M llvm/test/CodeGen/AMDGPU/default_amdhsa_code_object_version.ll
M llvm/test/CodeGen/AMDGPU/detect-dead-lanes.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-abs.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-bitreverse.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctlz-cttz.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-ctpop.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-min-max.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-negsubinlineconst.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-not-isel.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-sext-inreg.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-trunc-to-i1.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-xnor.ll
M llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/eh_frame.ll
M llvm/test/CodeGen/AMDGPU/elf.ll
M llvm/test/CodeGen/AMDGPU/enable-no-signed-zeros-fp-math.ll
M llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
M llvm/test/CodeGen/AMDGPU/endpgm-dce.mir
M llvm/test/CodeGen/AMDGPU/exceed-max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/extload-align.ll
M llvm/test/CodeGen/AMDGPU/extload-private.ll
M llvm/test/CodeGen/AMDGPU/extload.ll
M llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
M llvm/test/CodeGen/AMDGPU/extract-lowbits.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-equal-length.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector.ll
M llvm/test/CodeGen/AMDGPU/extract-vector-elt-build-vector-combine.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
M llvm/test/CodeGen/AMDGPU/extractelt-to-trunc.ll
M llvm/test/CodeGen/AMDGPU/fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fabs.ll
M llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
M llvm/test/CodeGen/AMDGPU/fadd.ll
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M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/ffloor.f64.ll
M llvm/test/CodeGen/AMDGPU/ffloor.ll
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M llvm/test/CodeGen/AMDGPU/fix-vgpr-copies.mir
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M llvm/test/CodeGen/AMDGPU/fma.f64.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.f64.ll
M llvm/test/CodeGen/AMDGPU/fmed3.bf16.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
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M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f16.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/fmul.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
M llvm/test/CodeGen/AMDGPU/fneg.f64.ll
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M llvm/test/CodeGen/AMDGPU/fold-implicit-operand.mir
M llvm/test/CodeGen/AMDGPU/fold-over-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-readlane.mir
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M llvm/test/CodeGen/AMDGPU/fp-to-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpext.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fract.f64.ll
M llvm/test/CodeGen/AMDGPU/fract.ll
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M llvm/test/CodeGen/AMDGPU/freeze-other-uses-issue-198094.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsub.ll
M llvm/test/CodeGen/AMDGPU/ftrunc.ll
M llvm/test/CodeGen/AMDGPU/gep-address-space.ll
M llvm/test/CodeGen/AMDGPU/global-alias.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-constant.ll
M llvm/test/CodeGen/AMDGPU/global-directive.ll
M llvm/test/CodeGen/AMDGPU/global-extload-i16.ll
M llvm/test/CodeGen/AMDGPU/global_atomics.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/global_smrd.ll
M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
M llvm/test/CodeGen/AMDGPU/gv-const-addrspace.ll
M llvm/test/CodeGen/AMDGPU/hoist-cond.ll
M llvm/test/CodeGen/AMDGPU/hsa-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-deduced-arg-attr.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-1.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-invalid-ocl-version-3.ll
M llvm/test/CodeGen/AMDGPU/huge-number-operand-folds.mir
M llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
M llvm/test/CodeGen/AMDGPU/i1-copies-rpo.mir
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi.ll
M llvm/test/CodeGen/AMDGPU/icmp.i16.ll
M llvm/test/CodeGen/AMDGPU/icmp64.ll
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.ll
M llvm/test/CodeGen/AMDGPU/inline-calls.ll
M llvm/test/CodeGen/AMDGPU/inlineasm-sgmask.ll
M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-exp.mir
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invalid-inline-asm-constraint-crash.ll
M llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
M llvm/test/CodeGen/AMDGPU/invert-br-undef-vcc.mir
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
M llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
M llvm/test/CodeGen/AMDGPU/kernarg-stack-alignment.ll
M llvm/test/CodeGen/AMDGPU/kernel-args.ll
M llvm/test/CodeGen/AMDGPU/kernel_code_t_recurse.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/knownbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/lcssa-optnone.ll
M llvm/test/CodeGen/AMDGPU/lds-alignment.ll
M llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/liveness.mir
M llvm/test/CodeGen/AMDGPU/livevars-implicitdef.mir
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.alignbyte.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.compr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdiv.fast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.hsa.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.kernel.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mqsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mul.u24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.qsad.pk.u16.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.clamp.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.decperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getpc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.incperflevel.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.setprio.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.ll
M llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.r600.read.local.size.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-f64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i1.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i64.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-f32.ll
M llvm/test/CodeGen/AMDGPU/load-local-f64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i1.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/load-local-i32.ll
M llvm/test/CodeGen/AMDGPU/load-local-i64.ll
M llvm/test/CodeGen/AMDGPU/load-local-i8.ll
M llvm/test/CodeGen/AMDGPU/load-weird-sizes.ll
M llvm/test/CodeGen/AMDGPU/local-64.ll
M llvm/test/CodeGen/AMDGPU/local-atomics.ll
M llvm/test/CodeGen/AMDGPU/local-atomics64.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
M llvm/test/CodeGen/AMDGPU/lower-range-metadata-intrinsic-call.ll
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-copy-like-instrs.mir
M llvm/test/CodeGen/AMDGPU/mad24-get-global-id.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/madak-inline-constant.mir
M llvm/test/CodeGen/AMDGPU/madmk.ll
M llvm/test/CodeGen/AMDGPU/max-sgprs.ll
M llvm/test/CodeGen/AMDGPU/max3.ll
M llvm/test/CodeGen/AMDGPU/mcp-use-before-def.mir
M llvm/test/CodeGen/AMDGPU/med3-no-simplify.ll
M llvm/test/CodeGen/AMDGPU/mem-builtins.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
M llvm/test/CodeGen/AMDGPU/memory-legalizer-store-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/merge-load-store-physreg.mir
M llvm/test/CodeGen/AMDGPU/merge-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
M llvm/test/CodeGen/AMDGPU/min3.ll
M llvm/test/CodeGen/AMDGPU/mir-print-dead-csr-fi.mir
M llvm/test/CodeGen/AMDGPU/movrels-bug.mir
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/mul_int24.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
M llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
M llvm/test/CodeGen/AMDGPU/no-hsa-graphics-shaders.ll
M llvm/test/CodeGen/AMDGPU/no-limit-coalesce.mir
M llvm/test/CodeGen/AMDGPU/no-shrink-extloads.ll
M llvm/test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
M llvm/test/CodeGen/AMDGPU/nullptr-long-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/nullptr.ll
M llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir
M llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll
M llvm/test/CodeGen/AMDGPU/operand-spacing.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/opt_exec_copy_fold.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-def-after-use.mir
M llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
M llvm/test/CodeGen/AMDGPU/optimize-if-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/partially-dead-super-register-immediate.ll
M llvm/test/CodeGen/AMDGPU/peephole-opt-regseq-removal.mir
M llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir
M llvm/test/CodeGen/AMDGPU/perfhint.ll
M llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/preserve-user-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
M llvm/test/CodeGen/AMDGPU/rcp_iflag.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i32.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-type-i64.ll
M llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/reduce-saveexec.mir
M llvm/test/CodeGen/AMDGPU/reduce-store-width-alignment.ll
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
M llvm/test/CodeGen/AMDGPU/regcoal-subrange-join.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-cannot-join-failures.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
M llvm/test/CodeGen/AMDGPU/regcoalesce-prune.mir
M llvm/test/CodeGen/AMDGPU/regcoalescer-resolve-lane-conflict-by-subranges.mir
M llvm/test/CodeGen/AMDGPU/register-count-comments.ll
M llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.mir
M llvm/test/CodeGen/AMDGPU/remat-dead-subreg.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
M llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
M llvm/test/CodeGen/AMDGPU/reorder-stores.ll
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-dbg.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses-gen.mir
M llvm/test/CodeGen/AMDGPU/rewrite-partial-reg-uses.mir
M llvm/test/CodeGen/AMDGPU/rotate-add.ll
M llvm/test/CodeGen/AMDGPU/rotl.i64.ll
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M llvm/test/CodeGen/AMDGPU/rotr.i64.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/s_movk_i32.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sched.barrier.inverted.mask.ll
M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
M llvm/test/CodeGen/AMDGPU/schedule-global-loads.ll
M llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir
M llvm/test/CodeGen/AMDGPU/schedule-regpressure.mir
M llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll
M llvm/test/CodeGen/AMDGPU/scratch-buffer.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/select-constant-cttz.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/selectcc-opt.ll
M llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
M llvm/test/CodeGen/AMDGPU/setcc-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc-select-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/setcc-select.ll
M llvm/test/CodeGen/AMDGPU/setcc-sext.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/sext-in-reg.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy-duplicate-operand.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sgpr-to-vreg1-copy.mir
M llvm/test/CodeGen/AMDGPU/sgprcopies.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-fix-sgpr-copies.mir
M llvm/test/CodeGen/AMDGPU/si-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-body.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-initial-insert-in-latch.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-multi-entry-cycle.mir
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills.mir
M llvm/test/CodeGen/AMDGPU/si-spill-cf.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
M llvm/test/CodeGen/AMDGPU/smed3.ll
M llvm/test/CodeGen/AMDGPU/spill-before-exec.mir
M llvm/test/CodeGen/AMDGPU/spill-csr-frame-ptr-reg-copy.ll
M llvm/test/CodeGen/AMDGPU/spill-empty-live-interval.mir
M llvm/test/CodeGen/AMDGPU/spill-m0.ll
M llvm/test/CodeGen/AMDGPU/spill-partial-csr-sgpr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/split-scalar-i64-add.ll
M llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir
M llvm/test/CodeGen/AMDGPU/splitkit-nolivesubranges.mir
M llvm/test/CodeGen/AMDGPU/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/sroa-phi-nodes.ll
M llvm/test/CodeGen/AMDGPU/stack-size-overflow.ll
M llvm/test/CodeGen/AMDGPU/stop-tail-duplicate-cfg-intrinsic.mir
M llvm/test/CodeGen/AMDGPU/store-barrier.ll
M llvm/test/CodeGen/AMDGPU/store-v3i64.ll
M llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
M llvm/test/CodeGen/AMDGPU/subreg_interference.mir
M llvm/test/CodeGen/AMDGPU/tail-dup-bundle.mir
M llvm/test/CodeGen/AMDGPU/target-cpu.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/trunc-bitcast-vector.ll
M llvm/test/CodeGen/AMDGPU/trunc-cmp-constant.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-f64-to-f16.ll
M llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence-keep-copy-on-use.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-regsequence.mir
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.ll
M llvm/test/CodeGen/AMDGPU/umed3.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/AMDGPU/undef-build-vector.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll
M llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll
M llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_cvt_pk_u8_f32.ll
M llvm/test/CodeGen/AMDGPU/v_mac.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
M llvm/test/CodeGen/AMDGPU/verify-sop.mir
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant64_to_sgpr.mir
M llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-debug-non-first-terminators.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-trailing.mir
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr.mir
M llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
M llvm/test/CodeGen/AMDGPU/zext-lid.ll
M llvm/test/CodeGen/ARM/aes-erratum-fix.ll
M llvm/test/CodeGen/ARM/bf16-create-get-set-dup.ll
A llvm/test/CodeGen/ARM/bf16-instructions.ll
M llvm/test/CodeGen/ARM/bf16-shuffle.ll
M llvm/test/CodeGen/ARM/big-endian-vector-callee.ll
M llvm/test/CodeGen/ARM/div-by-constant-to-mul-crash.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
M llvm/test/CodeGen/ARM/legalize-bitcast.ll
M llvm/test/CodeGen/ARM/llvm.frexp.ll
M llvm/test/CodeGen/ARM/neon-vmovn.ll
M llvm/test/CodeGen/ARM/neon_vabd.ll
M llvm/test/CodeGen/ARM/pr196779.ll
M llvm/test/CodeGen/ARM/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/ARM/vcombine.ll
M llvm/test/CodeGen/ARM/vector-llrint.ll
M llvm/test/CodeGen/ARM/vector-lrint.ll
M llvm/test/CodeGen/ARM/vext.ll
M llvm/test/CodeGen/ARM/vldlane.ll
M llvm/test/CodeGen/ARM/vrint.ll
M llvm/test/CodeGen/ARM/vselect_imax.ll
M llvm/test/CodeGen/ARM/vtrn.ll
M llvm/test/CodeGen/ARM/vuzp.ll
M llvm/test/CodeGen/ARM/vzip.ll
A llvm/test/CodeGen/BPF/BTF/struct-member-order.ll
A llvm/test/CodeGen/BPF/CORE/struct-member-order.ll
M llvm/test/CodeGen/DirectX/scalarize-dynamic-vector-index.ll
A llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
A llvm/test/CodeGen/Mips/msa/shuffle-undef-first-mask-element.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-sdnode.ll
A llvm/test/CodeGen/RISCV/xqcilia-addimm-mulimm-loop.ll
A llvm/test/CodeGen/RISCV/xqcilo-split-gep.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-absolute-path.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-composite-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-namespace-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-path-null.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-skip-type-not-in-debug-type-regs.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-two-compile-units.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
A llvm/test/CodeGen/SPIRV/pointers/global-vars-untyped.ll
M llvm/test/CodeGen/SPIRV/transcoding/spirv-target-types.ll
M llvm/test/CodeGen/Thumb2/srem-seteq-illegal-types.ll
A llvm/test/CodeGen/X86/apx/nf-stackadjust.ll
M llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
M llvm/test/CodeGen/X86/apx/push2-pop2.ll
M llvm/test/CodeGen/X86/apx/win64-abi.ll
M llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
R llvm/test/CodeGen/X86/large-implicit-section.ll
M llvm/test/CodeGen/X86/vec_minmax_match.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/win64-eh-unwindv3-push2pop2.ll
M llvm/test/FileCheck/dump-input/annotations.txt
M llvm/test/FileCheck/dump-input/context.txt
M llvm/test/FileCheck/dump-input/enable.txt
M llvm/test/FileCheck/dump-input/filter.txt
A llvm/test/FileCheck/dump-input/search-range-annotations/check-label-follows.txt
A llvm/test/FileCheck/dump-input/search-range-annotations/check-next-same.txt
A llvm/test/FileCheck/dump-input/search-range-annotations/check-not.txt
M llvm/test/FileCheck/match-time-error-propagation/invalid-excluded-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/invalid-expected-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/matched-excluded-pattern.txt
M llvm/test/FileCheck/match-time-error-propagation/matched-expected-pattern.txt
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
A llvm/test/MC/RISCV/xqcili-load-address.s
M llvm/test/ThinLTO/X86/memprof-icp.ll
A llvm/test/Transforms/CodeGenPrepare/RISCV/xqcilo.ll
A llvm/test/Transforms/ConstantHoisting/RISCV/xqcilia.ll
M llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
A llvm/test/Transforms/GVN/invariant-load-intrinsic.ll
A llvm/test/Transforms/IndVarSimplify/exit-value-gep-inbounds.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fma-binops.ll
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
A llvm/test/Transforms/InstCombine/invariant-load-like-sink.ll
A llvm/test/Transforms/InstCombine/unshuffle-constant-poison-mask.ll
M llvm/test/Transforms/InstSimplify/maxmin.ll
M llvm/test/Transforms/LoopInterchange/reductions-non-wrapped-operations.ll
A llvm/test/Transforms/LoopInterchange/transform-stop-partway.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
M llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
M llvm/test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll
M llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/test/Transforms/LoopVectorize/AArch64/aggressive-interleaving.ll
M llvm/test/Transforms/LoopVectorize/AArch64/clamped-load.ll
M llvm/test/Transforms/LoopVectorize/AArch64/discarded-interleave-group.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fmin-without-fast-math-flags.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/gather-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
A llvm/test/Transforms/LoopVectorize/AArch64/indvar-overflow-check-scalable-tc.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
A llvm/test/Transforms/LoopVectorize/RISCV/indvar-overflow-check-scalable-tc.ll
M llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-masked-access.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/addressing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions-tail-folded.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-reductions.ll
M llvm/test/Transforms/LoopVectorize/X86/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
M llvm/test/Transforms/LoopVectorize/X86/pr42674.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/minmax-extra-outside-users.ll
M llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/select-reduction.ll
M llvm/test/Transforms/LowerSwitch/do-not-handle-impossible-values.ll
A llvm/test/Transforms/NaryReassociate/nary-gep-zero-sized-element.ll
M llvm/test/Transforms/NaryReassociate/nary-req.ll
M llvm/test/Transforms/NaryReassociate/nary-smax.ll
M llvm/test/Transforms/NaryReassociate/nary-smin.ll
M llvm/test/Transforms/NaryReassociate/nary-umax.ll
M llvm/test/Transforms/NaryReassociate/nary-umin.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-add.ll
A llvm/test/Transforms/PhaseOrdering/X86/horizontal-reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
A llvm/test/Transforms/SLPVectorizer/WebAssembly/or-reduction-zero-test.ll
A llvm/test/Transforms/SLPVectorizer/X86/copyable-reduced-erased.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-copyable-reused-scalars.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-zero-test-ctpop.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/undef_vect.ll
M llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
M llvm/test/Transforms/SROA/struct-to-vector-fp-store-only-tail.ll
M llvm/test/Transforms/SROA/struct-to-vector.ll
M llvm/test/Transforms/Sink/invariant-load.ll
M llvm/test/Transforms/VectorCombine/AArch64/fold-equivalent-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/AArch64/fold-reduce-add-cmp-zero.ll
M llvm/test/Transforms/VectorCombine/AArch64/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/AArch64/icmp-vector-reduce.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-equivalent-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-reduce-add-cmp-zero.ll
M llvm/test/Transforms/VectorCombine/RISCV/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/RISCV/icmp-vector-reduce.ll
M llvm/test/Transforms/VectorCombine/X86/fold-equivalent-reduction-cmp.ll
A llvm/test/Transforms/VectorCombine/X86/fold-reduction-zero-test.ll
M llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
M llvm/test/Transforms/VectorCombine/X86/icmp-vector-reduce.ll
A llvm/test/Verifier/anyptr-bad.ll
A llvm/test/tools/llubi/byval.ll
A llvm/test/tools/llubi/byval_large_size.ll
A llvm/test/tools/llubi/byval_lifetime.ll
A llvm/test/tools/llubi/byval_misalign.ll
A llvm/test/tools/llubi/byval_misalign_callsite.ll
A llvm/test/tools/llubi/byval_mismatch1.ll
A llvm/test/tools/llubi/byval_mismatch2.ll
A llvm/test/tools/llubi/byval_mismatch3.ll
A llvm/test/tools/llubi/byval_null.ll
A llvm/test/tools/llubi/byval_oversize.ll
A llvm/test/tools/llubi/byval_padding.ll
A llvm/test/tools/llubi/byval_poison.ll
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Cortex/A510-writeback.s
A llvm/test/tools/llvm-objcopy/DXContainer/dump-section-priv.yaml
M llvm/test/tools/llvm-objdump/Offloading/fatbin-coff-compress.test
A llvm/test/tools/llvm-objdump/Offloading/fatbin-magic-collision.test
M llvm/test/tools/llvm-readobj/ELF/file-headers.test
A llvm/test/tools/llvm-readobj/ELF/many-segments.test
A llvm/test/tools/obj2yaml/DXContainer/PRIVPart.yaml
M llvm/tools/llubi/lib/ExecutorBase.h
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llvm-debuginfo-analyzer/README.md
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-reduce/ReducerWorkItem.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ADT/ImmutableSetTest.cpp
M llvm/unittests/ADT/StringRefTest.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/Object/DXContainerTest.cpp
M llvm/unittests/ObjectYAML/DXContainerYAMLTest.cpp
M llvm/unittests/Support/ScopedPrinterTest.cpp
M llvm/utils/FileCheck/FileCheck.cpp
M llvm/utils/gn/secondary/clang-tools-extra/unittests/clang-tidy/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M mlir/include/mlir/Dialect/Math/Transforms/Passes.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCTypeInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
A mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe3.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
A mlir/include/mlir/Dialect/XeGPU/uArch/uArchCommon.h
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Dialect/Math/Transforms/CMakeLists.txt
M mlir/lib/Dialect/Math/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandOps.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCBindRoutine.cpp
A mlir/lib/Dialect/OpenACC/Transforms/ACCEmitRemarksPrivate.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUArrayLengthOptimization.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/lib/TableGen/CodeGenHelpers.cpp
M mlir/test/Dialect/Math/expand-math.mlir
M mlir/test/Dialect/OpenACC/acc-bind-routine.mlir
A mlir/test/Dialect/OpenACC/acc-emit-remarks-private.mlir
M mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
A mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate-two-allocs.mlir
A mlir/test/Dialect/OpenACC/acc-specialize-for-host-deep-nesting.mlir
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
A mlir/test/IR/test-successor-verifier.mlir
M mlir/test/IR/visitors.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
M mlir/test/Target/SPIRV/ocl-ops.mlir
M mlir/test/Transforms/test-bubble-down-memory-space-casts.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/IR/TestVisitors.cpp
M mlir/test/mlir-tblgen/constraint-unique.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M offload/include/Shared/APITypes.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.h
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
M offload/plugins-nextgen/level_zero/include/L0Kernel.h
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
M offload/test/offloading/fortran/target-no-loop.f90
A offload/test/offloading/xteam_min_reduction_partial_wave.c
M openmp/device/src/Reduction.cpp
M openmp/module/CMakeLists.txt
M openmp/module/omp_lib.F90.var
M runtimes/cmake/config-Fortran.cmake
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/__support/CPP/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/driver.bzl
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
A utils/docs/llvm_sphinx/ext/checks.py
Log Message:
-----------
Rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/a787b012f107...d3ea8e2db1da
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