[all-commits] [llvm/llvm-project] ace910: AMDGPU: Use -mtriple= instead of with a space for ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/amdgpu/use-mtriple-equal-not-space
  Home:   https://github.com/llvm/llvm-project
  Commit: ace910402ad533c7ca754d46dbf30b35923712ec
      https://github.com/llvm/llvm-project/commit/ace910402ad533c7ca754d46dbf30b35923712ec
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-06-26 (Fri, 26 Jun 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-merge.mir
    M llvm/test/CodeGen/AMDGPU/alloca.ll
    M llvm/test/CodeGen/AMDGPU/always-uniform.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
    M llvm/test/CodeGen/AMDGPU/comdat.ll
    M llvm/test/CodeGen/AMDGPU/global_smrd.ll
    M llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
    M llvm/test/CodeGen/AMDGPU/inline-calls.ll
    M llvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
    M llvm/test/CodeGen/AMDGPU/mesa_regression.ll
    M llvm/test/CodeGen/AMDGPU/naked-fn-with-frame-pointer.ll
    M llvm/test/CodeGen/AMDGPU/not-scalarize-volatile-load.ll
    M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-def-after-use.mir
    M llvm/test/CodeGen/AMDGPU/phi-elimination-assertion.mir
    M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
    M llvm/test/CodeGen/AMDGPU/promote-alloca-shufflevector.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
    M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
    M llvm/test/CodeGen/AMDGPU/unpack-non-coissue-insts-post-ra-scheduler.mir
    M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll

  Log Message:
  -----------
  AMDGPU: Use -mtriple= instead of with a space for llc run lines

-mtriple=amdgcn is by far the dominant form over space separation.
Convert these to simplify future bulk test updates.



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