[all-commits] [llvm/llvm-project] ed287c: [HLSL][NFC] Add codegen test for ConstantBuffer<T>...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Tue Jun 23 13:15:26 PDT 2026
Branch: refs/heads/users/boomanaiden154/main.ir-remove-synthetic-profile-support-from-function
Home: https://github.com/llvm/llvm-project
Commit: ed287c064db043a94b5470ebf36524153aeaf33f
https://github.com/llvm/llvm-project/commit/ed287c064db043a94b5470ebf36524153aeaf33f
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-06-18 (Thu, 18 Jun 2026)
Changed paths:
A clang/test/CodeGenHLSL/resources/ConstantBufferT.hlsl
Log Message:
-----------
[HLSL][NFC] Add codegen test for ConstantBuffer<T> element access and initialization (#204507)
Adding tests coverage for `ConstantBuffer<T>` element access and
initialization.
Related to llvm/wg-hlsl#302 and llvm/llvm-project#195153
Commit: 21622397c16f65d00361cd883c769189b06df13c
https://github.com/llvm/llvm-project/commit/21622397c16f65d00361cd883c769189b06df13c
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/openmp-task-in-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[mlir][OpenMP] Translate explicit task in_reduction (#202611)
Lower `in_reduction` on explicit `omp.task` operations to LLVM IR.
Inside the outlined task body, obtain the executing thread's `gtid` and call `__kmpc_task_reduction_get_th_data` with a null descriptor and the original reduction variable address. This lets the runtime find the enclosing taskgroup reduction registration and return the per-task private reduction storage.
The `in_reduction` block arguments are remapped to the returned private storage, so updates inside the explicit task body target the task-private reduction copy instead of the original shared variable.
Unsupported cases remain guarded, including byref `in_reduction` and richer `declare_reduction` forms such as two-argument initializers, cleanup regions, and missing combiners.
Commit: 1e0899794dd432c6c3c7bbba6940e8640e6a201c
https://github.com/llvm/llvm-project/commit/1e0899794dd432c6c3c7bbba6940e8640e6a201c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[DAG] visitEXTRACT_SUBVECTOR - Fold EXTRACT_SUBVECTOR(EXTRACT_SUBVECTOR(X,C1),C0) with nonzero indices (#204533)
Removed equivalent fold from x86 and added generic DAG fold to replace
it - net zero test changes
Refactored version of #200935
Commit: 4b2a02d47e31da4764aa6e204e6c502ccc69e201
https://github.com/llvm/llvm-project/commit/4b2a02d47e31da4764aa6e204e6c502ccc69e201
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/test/CodeGen/X86/bmi2-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/CodeGen/X86/bmi2.ll
M llvm/test/Instrumentation/MemorySanitizer/bmi.ll
M llvm/test/Instrumentation/MemorySanitizer/pdep.ll
M llvm/test/Instrumentation/MemorySanitizer/pext.ll
M llvm/test/Transforms/InstCombine/pdep.ll
M llvm/test/Transforms/InstCombine/pext.ll
Log Message:
-----------
[X86] Replace X86 specific PDEP/PEXT handling with generic intrinsics (#204144)
* Remove X86ISD::PDEP/PEXT and use ISD::PDEP/PEXT instead
* AutoUpgrade x86 pdep/pext intrinsics to llvm.pdep/pext generics
* Move X86 DAG knownbits/demandedbits handling to generic (unchanged)
* Move X86 InstCombine folds to generic (unchanged)
* Add memory sanitizer handling for generic pdep/pext intrinsics
* Updated clang builtins to emit generics
Fixes #204537
Commit: f0134cc7a5a56b53dfbe2887cd759806845c8797
https://github.com/llvm/llvm-project/commit/f0134cc7a5a56b53dfbe2887cd759806845c8797
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Basic/TargetID.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/invalid-target-id.cl
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
Log Message:
-----------
AMDGPU: Add subtarget feature for controllable xnack modes (#204523)
This replaces the previously removed xnack-any-only feature,
with the inversion xnack-on-off-modes. All pre-gfx12.5 xnack
targets support the controllable mode. Ignore explicitly
set xnack settings the same way as is done for xnack requests
on other unsupported targets.
Commit: b65d5100d712e49abe85b337b03663ec1dcbd266
https://github.com/llvm/llvm-project/commit/b65d5100d712e49abe85b337b03663ec1dcbd266
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-06-18 (Thu, 18 Jun 2026)
Changed paths:
M offload/libomptarget/omptarget.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
A offload/test/tools/omp-kernel-replay/record-replay-empty-memory.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[offload][OpenMP] Fix record replay when no memory is used (#201771)
Progams that do not use any memory (e.g., no mappings) were failing
because we were trying to execute zero size transfers. This commit adds
handling for this case.
Commit: 9c50867e78707c7ad9b46b6c2c71ef45ac124bbb
https://github.com/llvm/llvm-project/commit/9c50867e78707c7ad9b46b6c2c71ef45ac124bbb
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/examples/OrcV2Examples/CMakeLists.txt
A llvm/examples/OrcV2Examples/LLJITWithSymbolAliases/CMakeLists.txt
A llvm/examples/OrcV2Examples/LLJITWithSymbolAliases/LLJITWithSymbolAliases.cpp
Log Message:
-----------
[ORC][examples] Add a new example showing basic symbolAliases usage. (#204733)
LLJITWithSymbolAliases shows how the symbolAliases function can be used
to introduce aliases for both JIT'd and precompiled symbols.
Commit: 0ad5d54be53f34f71e25575964785670720a5f4c
https://github.com/llvm/llvm-project/commit/0ad5d54be53f34f71e25575964785670720a5f4c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
Log Message:
-----------
[GlobalISel] TableGen memcpy-like prelegalizer combines (#203235)
This removes the corresponding handwritten C++ combine handling from the
AArch64 prelegalizer combiners.
Assisted-by: codex
Commit: d87e513d454714d08b6deeb055bf6f6cc959b450
https://github.com/llvm/llvm-project/commit/d87e513d454714d08b6deeb055bf6f6cc959b450
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/test/Sema/enable_if.c
M clang/test/SemaCXX/enable_if.cpp
Log Message:
-----------
[clang][test] Use #marker in enable_if tests (#204624)
I just wasted way too long trying to figure out why my newly added RUN
lines were randomly broken or not.
Stop using absolute line numbers.
Commit: 7d122c329944a6be4ed93929c99f5e8fc75b6892
https://github.com/llvm/llvm-project/commit/7d122c329944a6be4ed93929c99f5e8fc75b6892
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/dangling-global.cpp
M clang/test/Sema/LifetimeSafety/safety-c.c
Log Message:
-----------
[LifetimeSafety] Propagate loans through pointer inc/dec and compound assignment (#204477)
Commit: 6352a584c409a4ad44804f06e06260be587866d3
https://github.com/llvm/llvm-project/commit/6352a584c409a4ad44804f06e06260be587866d3
Author: Matthias Springer <me at m-sp.org>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinAttributes.td
Log Message:
-----------
[mlir][IR] Fix typo in code example of DenseTypedElementsAttr (#204739)
There was a typo in the type-first syntax code example.
Commit: 3b1a922a6d02705ef30b1527e34af7b6208dc02f
https://github.com/llvm/llvm-project/commit/3b1a922a6d02705ef30b1527e34af7b6208dc02f
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
Log Message:
-----------
[VPlan] Extend licm to sink replicate stores (#191026)
Follow up on hoisting replicate loads in VPlan-licm to also sink
replicate stores.
Commit: f8bd135b6faef0675f1b8cb088373337d0439bb8
https://github.com/llvm/llvm-project/commit/f8bd135b6faef0675f1b8cb088373337d0439bb8
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/utils/lit/lit/TestRunner.py
Log Message:
-----------
[lit] Make RecursionError less likely in internal shell (#204573)
The lit internal shell chains together the contents of multiple RUN:
lines by connecting them with implicit && nodes, forming a binary tree
structure which is then executed recursively by `_executeShCommand`.
However the tree structure is constructed in a very simple way which
makes it effectively just a linked list, so `_executeShCommand` must
recurse to a depth equal to the number of commands.
If a test file contains more than 1000 RUN: lines (e.g. running the
clang driver only, with lots of different options), then this causes a
RecursionError exception, which did not happen using the external shell.
Failures of this kind can be avoided by instead connecting the commands
together in a _balanced_ binary tree, which has equivalent behaviour,
since the && shell operator is associative.
Commit: 9361b3d9570596231ffa2b9a1a2ae4ee5fe7eb9d
https://github.com/llvm/llvm-project/commit/9361b3d9570596231ffa2b9a1a2ae4ee5fe7eb9d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/widen-call-op-scalar-vector.ll
Log Message:
-----------
[LV] Add test for WidenCall with mixed scalar-vector operands (#203092)
Commit: b9587a78a090fa53bed1dc1b478502e3038a0028
https://github.com/llvm/llvm-project/commit/b9587a78a090fa53bed1dc1b478502e3038a0028
Author: Jiang Ning <jiangninghx at foxmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/test/ELF/aarch64-tls-le.s
M lld/test/ELF/aarch64-tlsld-ldst.s
Log Message:
-----------
[ELF][AArch64] Relax zero TLSLE add to nop (#204286)
Optimize AArch64 local-exec TLS relocation handling by replacing a
self-add R_AARCH64_TLSLE_ADD_TPREL_HI12 instruction with nop when the
high 12 bits are zero.
The optimization is disabled by --no-relax and avoids non-equivalent
forms such as non-self-adds and 32-bit destination registers.
Commit: b496d0623824060af20726f89bbf8fe662dd49e4
https://github.com/llvm/llvm-project/commit/b496d0623824060af20726f89bbf8fe662dd49e4
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/LifetimeSafety/safety-c.c
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Model bit_cast and atomic casts in the fact generator (#204591)
VisitCastExpr dropped several borrow-carrying cast kinds into its
default case. Propagate the borrow through
`__builtin_bit_cast`/`std::bit_cast` of a pointer and through
wrapping/unwrapping `_Atomic(T*)`, so a stack address laundered through
either is caught (matching reinterpret_cast). hasOrigins and
buildListForType now see through AtomicType, which is transparent for
lifetimes.
Assisted-by: Claude Opus 4.8
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: c327ab359a959de2e4241a5fcda409958f2c0d11
https://github.com/llvm/llvm-project/commit/c327ab359a959de2e4241a5fcda409958f2c0d11
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
A llvm/test/CodeGen/AArch64/windows-elf-frame-record-pairing.ll
Log Message:
-----------
[AArch64] Fix Windows target detection in FrameLowering (#204347)
In #156467, we switched to using `getMCAsmInfo()->usesWindowsCFI()` to
recognize "Windows". This does not include Windows triples with ELF
binary formats.
So, for aarch64-pc-windows-msvc-elf we would use the Windows callee-save
list in `AArch64RegisterInfo::getCalleeSavedRegs()`, but FrameLowering
would handle this like Linux, and fail to invalidate the (x29, x28)
pairing.
This patch switches back to using AArch64Subtarget::isTargetWindows(),
which aligns with getCalleeSavedRegs().
Note: We were using `usesWindowsCFI()` to include UEFI targets, however,
there does not seem to be tests/support for UEFI triples on AArch64
(basic examples that compile for x86 fail: https://godbolt.org/z/dPWdTrEG7).
So, this has been moved to a TODO.
Fixes #204060
Commit: 06137a53cc96643f17f34c6affa8838c5c86e2cb
https://github.com/llvm/llvm-project/commit/06137a53cc96643f17f34c6affa8838c5c86e2cb
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/CAS/ActionCache.h
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/include/llvm/CAS/OnDiskGraphDB.h
M llvm/include/llvm/CAS/OnDiskKeyValueDB.h
M llvm/include/llvm/CAS/OnDiskTrieRawHashMap.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CGData/StableFunctionMap.h
M llvm/include/llvm/CodeGen/MIR2Vec.h
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/Option/ArgList.h
M llvm/include/llvm/SandboxIR/Argument.h
M llvm/include/llvm/SandboxIR/BasicBlock.h
M llvm/include/llvm/SandboxIR/Function.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/GlobPattern.h
M llvm/include/llvm/Support/LSP/Logging.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Transforms/Utils/DebugSSAUpdater.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterBulk.h
Log Message:
-----------
[llvm] Remove LLVM_ABI_FOR_TEST in public headers (#204627)
These annotations were mistakenly set up as LLVM_ABI_FOR_TEST. Since
these are public headers, they should be using LLVM_ABI.
The effort to build LLVM as a dylib is tracked in #109483.
Commit: 47b29c2eadbd9d7ddfb26bd6104a0a1f9e4a13a1
https://github.com/llvm/llvm-project/commit/47b29c2eadbd9d7ddfb26bd6104a0a1f9e4a13a1
Author: Faijul Amin <md.faijul.amin at intel.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/instructions/phi-large-vector-shader.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-large-vector.ll
Log Message:
-----------
[SPIR-V] Legalize G_PHI of oversized vectors via fewer-elements (#203993)
`G_PHI` on vectors wider than the SPIR-V max vector size previously
failed legalization. This PR adds a `fewerElementsIf` rule that splits
them down to `MaxVectorSize`, matching how other vector ops are handled
in `SPIRVLegalizerInfo.cpp`.
Added the following test
`llvm/test/CodeGen/SPIRV/instructions/phi-large-vector.ll` covering
spirv32 and spirv64.
Commit: 40cbc98bb17718eef5e0b1f47e3b58900aac354a
https://github.com/llvm/llvm-project/commit/40cbc98bb17718eef5e0b1f47e3b58900aac354a
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
Log Message:
-----------
[AArch64][SDAG] Legalise nxv1 gather/scatter nodes (#204620)
This updates WidenVecRes_MGATHER and WidenVecOp_MSCATTER to support
scalable vector types.
Commit: a5e83b9a9b16d770792f7cd02ebe30bcfd95cbfe
https://github.com/llvm/llvm-project/commit/a5e83b9a9b16d770792f7cd02ebe30bcfd95cbfe
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/neon-luti.c
M clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
M clang/test/Sema/aarch64-neon-immediate-ranges/luti.c
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-neon-without-target-feature.cpp
M clang/test/Sema/arm-neon-target.c
Log Message:
-----------
[Clang][NEON ACLE] Remove +bf16 requirement from opaque bfloat builtins. (#204201)
Builtins that only care about the size of the element type but not its
format (e.g loads, stores and shuffles) do not require any special
instructions to code generate beyond those already available to +neon.
Fixes https://github.com/llvm/llvm-project/issues/203159
Commit: fdf3d44c9004eaf2ed112ced60b3f0e384724281
https://github.com/llvm/llvm-project/commit/fdf3d44c9004eaf2ed112ced60b3f0e384724281
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/test/Transforms/InstCombine/pdep.ll
M llvm/test/Transforms/InstCombine/pext.ll
Log Message:
-----------
[InstCombine] Add tests showing failure to fold pdep(0,x) and pext(0,x) to 0 (#204783)
As noted on #204144
Commit: e6daa6810e5ed49104a0f409d51e953905c9752e
https://github.com/llvm/llvm-project/commit/e6daa6810e5ed49104a0f409d51e953905c9752e
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/lit.cfg.py
Log Message:
-----------
Revert "Revert "[Compiler-rt][test] Fix circular link dependency between builtins and libc"" (#204728)
Reverts llvm/llvm-project#203152
Commit: 500d1f848c9a5488b7ff5ab2aad09041935ae7ff
https://github.com/llvm/llvm-project/commit/500d1f848c9a5488b7ff5ab2aad09041935ae7ff
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
Log Message:
-----------
[SPIR-V] Fix crash on void indirect call with aggregate argument (#204388)
removeAggregateTypesFromCalls named the call to key the type-restoration
metadata, which asserts for void-returning calls. Key the metadata via
instruction metadata on the call instead, which works for void results.
Commit: b90ec9c2747f336991f392dc843ecff1ca2faed7
https://github.com/llvm/llvm-project/commit/b90ec9c2747f336991f392dc843ecff1ca2faed7
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/StackColoring.cpp
Log Message:
-----------
[StackColoring] Remove unused BB numbering state (#204414)
Commit: f6fd6ea3c1b59728c3c8f3443ef9a02d367ec8e0
https://github.com/llvm/llvm-project/commit/f6fd6ea3c1b59728c3c8f3443ef9a02d367ec8e0
Author: bogdan-petkovic <bpetkovi at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M mlir/lib/ExecutionEngine/CMakeLists.txt
Log Message:
-----------
[mlir][ExecutionEngine] Fix dead -Wno-c++98-compat-extra-semi guard (#204524)
`check_cxx_compiler_flag` stores its result in
`CXX_SUPPORTS_NO_CXX98_COMPAT_EXTRA_SEMI_FLAG`, but the guarding `if()`
checked `CXX_SUPPORTS_CXX98_COMPAT_EXTRA_SEMI_FLAG` (without `_NO_`),
which is never set. The condition was therefore always false and the
`-Wno-c++98-compat-extra-semi` suppression for `mlir_rocm_runtime` was
never applied.
The sibling flag checks in the same block (`-Wno-return-type-c-linkage`,
`-Wno-nested-anon-types`, `-Wno-gnu-anonymous-struct`) already use
matching variable names, so this aligns the typo'd guard with the
established pattern.
No test is included, this is a build-system-only (CMake) change to a
warning-suppression guard and is not unit-testable.
Signed-off-by: bogdan-petkovic <bpetkovi at amd.com>
Commit: 3cc94639047973169a9874139b8d95e17cdba50b
https://github.com/llvm/llvm-project/commit/3cc94639047973169a9874139b8d95e17cdba50b
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Analysis/Delinearization.cpp
A llvm/test/Analysis/Delinearization/inconsistent-types.ll
Log Message:
-----------
[Delinearization] Narrow the scope of the term collection (#204145)
In parametric delinearization, it collects subexpressions whose SCEV
type is `SCEVUnknown` and uses them as candidates for the array
dimensions. When traversing these subexpressions, it may follow any kind
of expression. For example, if it follows a `sext` expression, this can
lead to type inconsistencies among the collected terms.
This patch fixes this issue by preventing traversal into subexpressions
other than `SCEVAddExpr` or `SCEVAddRecExpr`.
Note: I tried to minimize the test case, but this seems to be as far as
it can go.
Fix #204066.
Commit: 60a2d437bd040a494cfe87fa8f44ebad18db2196
https://github.com/llvm/llvm-project/commit/60a2d437bd040a494cfe87fa8f44ebad18db2196
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
A llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
A llvm/test/CodeGen/AArch64/sve-tbl-folding-new-pm.ll
A llvm/test/CodeGen/AArch64/sve-tbl-folding-opts.ll
Log Message:
-----------
[AArch64] Add SVE shuffle optimization pass (#193951)
Add a pass to perform VLA shuffle optimizations for SVE.
First up is using tbl to replace deinterleave4+uunpk+zext/uitofp
by generating shuffle masks with index, exploiting the fact that
out-of-range indices in the mask produce zeroes in the result
vector. That way, we can easily zero-extend smaller elements
by using the destination type when generating the mask, and
having one index in range with several out-of-range for each
destination element.
Commit: 80c80e6d04515acf7dac8c256a1a3b3dc14cfa4d
https://github.com/llvm/llvm-project/commit/80c80e6d04515acf7dac8c256a1a3b3dc14cfa4d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check const writes more thorougly (#204529)
We used to only have a list of blocks under construction, but now we
have a list of pointers, which gives us more information.
Use this new list to diagnose a case we couldn't previously diagnose.
The test case is from `constant-expression-cxx14.cpp` and shows that a
write to a const member is invalid, even if the parent object is being
constructed right now.
Commit: a6fe3c7422db83346c336346e0b7a56ff084b17f
https://github.com/llvm/llvm-project/commit/a6fe3c7422db83346c336346e0b7a56ff084b17f
Author: Xavier Roche <xavier.roche at algolia.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/bitint.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/digits.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/digits10.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/max.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/min.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_ceil.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_floor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_width.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/has_single_bit.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/popcount.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
M libcxx/test/std/numerics/bit/byteswap.pass.cpp
M libcxx/test/std/numerics/bit/byteswap.verify.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
R libcxx/test/std/utilities/format/format.arguments/format.arg.store/make_format_args.bitint.verify.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.bitint.pass.cpp
M libcxx/test/support/test_macros.h
Log Message:
-----------
[libc++][test] Migrate _BitInt probe to __BITINT_MAXWIDTH__ and fix latent test bugs (#203876)
`libcxx` tests gate `_BitInt` blocks on `TEST_HAS_EXTENSION(bit_int)`,
which is not a recognized Clang extension and returns 0 in every
language mode. The blocks have been compiling as dead code, hiding
latent bugs across 23 files.
Migrate to a `TEST_HAS_BITINT` helper backed by the standard
`__BITINT_MAXWIDTH__`. The latent bugs the activation surfaces are fixed
in the same commit:
- overflow-safe `min`;
- post-P4052R0 saturating-arithmetic renames plus a
`clang-21`/`apple-clang-21` skip for `saturating.bitint.pass.cpp` (Clang
21 asserts in constexpr eval on non-byte-aligned `_BitInt`);
- an `intcmp` syntax fix;
- `byteswap.verify` directive tightening;
- a missing `<climits>` include in `byteswap.pass` (only visible under
`-fmodules`);
- C++03-compatible `static_assert` form in `digits10`; gating
`digits`/`digits10` `_BitInt` blocks behind
`!_LIBCPP_USE_FROZEN_CXX03_HEADERS` since the fix from #193002 was not
backported to the frozen snapshot; and
- `make_format_args` reduced to a placeholder pending a SFINAE-friendly
rejection path.
Discussion:
https://discourse.llvm.org/t/implementing-p3666r4-bit-precise-integers-in-libc/91070
Assisted-by: Claude (Anthropic)
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: eb7ce80944ee06b09c0bd6474254a155461dddd9
https://github.com/llvm/llvm-project/commit/eb7ce80944ee06b09c0bd6474254a155461dddd9
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Log Message:
-----------
CodeGenPassBuilder: Use cl::boolOrDefault directly in CGPassBuilderOption (#204196)
Current implementation that uses std::optional<bool> captures cl::BOU_FALSE,
for example -global-isel=0, as true. Explictly setting option to 0 should be
false, forced option not set.
This could be fixed but I find it cleaner to use boolOrDefault directly and
use same logic as in TargetPassConfig.
Options EnableIPRA and EnableGlobalISelAbort are left as optional since for
them it is explicitly checked if they are set using getNumOccurrences.
boolOrDefault has encoded unset option.
Commit: 54a7896acfb97d7935e085eebbc18fd5e694f67d
https://github.com/llvm/llvm-project/commit/54a7896acfb97d7935e085eebbc18fd5e694f67d
Author: mkovacevic99 <mkovacevic at baylibre.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
A llvm/test/ExecutionEngine/JITLink/x86-64/COFF_dllimport_iat.s
Log Message:
-----------
[JITLink][COFF] Synthesize __imp_ IAT entries (#203906)
Adds a default COFF/x86_64 JITLink pass that synthesizes `__imp_` Import
Address Table (IAT) entries for dllimport references. This allows COFF
objects using dllimport to be JIT-linked without a hand-built import library or
a special generator.
On COFF, `__declspec(dllimport)` codegen emits indirect accesses through a named
`__imp_X` symbol (`callq *__imp_bar(%rip)`; `movq __imp_g(%rip)` for data),
with `__imp_X` left undefined. JITLink had no handling for this. The new pass —
the COFF counterpart of the ELF/Mach-O GOT builder — defines each undefined
external `__imp_X` over an 8-byte slot holding the address of `X`, and leaves `X`
as an ordinary external to be resolved normally (import library, dynamic-library
search generator, etc.). Both the call and data-access forms then resolve
indirectly through the slot.
Rather than the `GOTTableManager` pattern (anonymous entry + edge redirection),
the pass defines the *named* `__imp_X` symbol over the slot. ELF GOT references
are nameless edge kinds, so that builder must create an anonymous entry and
redirect edges; COFF references `__imp_X` by name, so defining it is simpler —
no edge rewriting, no orphaned-external cleanup, sharing is automatic,
and the call/data-access forms are handled identically.
x86_64 only (runs in the COFF/x86_64 backend's default pass pipeline). New lit
test `COFF_dllimport_iat.s`: assembles an object referencing `__imp_bar` (call)
and `__imp_foo` (data load), supplies `foo`/`bar` via `-abs`, links with
`-noexec`, and uses `jitlink-check` to verify each `__imp_` slot holds the
target's address and that the references resolve through the slot.
Partly implements github issue:
https://github.com/llvm/llvm-project/issues/190122
In the comment section of the github issue there is this comment
https://github.com/llvm/llvm-project/issues/190122#issuecomment-4617328036
This PR implements point 2 Synthesis IAT entries.
Commit: 12ee71c377db385c4af0cfe92488406b9a8fa13c
https://github.com/llvm/llvm-project/commit/12ee71c377db385c4af0cfe92488406b9a8fa13c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/lto.c
Log Message:
-----------
[Clang] Respect `-fno-slp-vectorize` for the LTO pipeline (#201585)
Summary:
This is related to reported regressions in the GROMACS suite when
offloading to AMDGCN devices through the RDC / LTO interface. The
application intentionally passes `-fno-slp-vectorize` to disable that
pass, but there's currently no way to do this through the LTO pipline.
This PR causes the driver to emit `plugin-opt=` for the `-mllvm` option.
That means the pass is still enabled but it should be a no-op now.
Commit: 0390898335f9f32ea71ff288a5b4085cecc10391
https://github.com/llvm/llvm-project/commit/0390898335f9f32ea71ff288a5b4085cecc10391
Author: Jeremy Kun <jkun at google.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
A mlir/test/Dialect/Affine/trip-count.mlir
Log Message:
-----------
[mlir][affine] Implement LoopLikeInterface::getStaticTripCount on AffineForOp (#204687)
LoopLikeInterface is useful, but missing `getStaticTripCount` requires
adding extra cases to check when processing otherwise dialect-agnostic
code.
There is an existing free function `getConstantTripCount`, which I
deprecated and replaced (NFC) with the new implementation. I believe the
new implementation is slightly more efficient than
`getConstantTripCount` because it checks if the expression is constant
and fast-fails before constructing the output `AffineMap` that was
returned by `getTripCountMapAndOperands`.
Assisted by Gemini
Commit: 72af16e1a1cc3e1db9a5cd458f4ed410ca90cb87
https://github.com/llvm/llvm-project/commit/72af16e1a1cc3e1db9a5cd458f4ed410ca90cb87
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][FreeBSD] Re-enable the crash-recovery test on FreeBSD (#192608)
All of the tests work now on FreeBSD, so we re-enable the feature again
on FreeBSD.
Commit: 825950238fffb9549b7fd81700bb241e1473c866
https://github.com/llvm/llvm-project/commit/825950238fffb9549b7fd81700bb241e1473c866
Author: quic-k <kushpal at qti.qualcomm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/test/Preprocessor/hexagon-predefines.c
Log Message:
-----------
[Clang][Hexagon] Predefine _GNU_SOURCE for C++ compilations (#201599)
Predefine _GNU_SOURCE in C++ mode for H2, QuRT, and baremetal
Hexagon targets.
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Commit: 8eae496effc992b28c12c23374e89474956b9860
https://github.com/llvm/llvm-project/commit/8eae496effc992b28c12c23374e89474956b9860
Author: Vinay Deshmukh <vinay_deshmukh at outlook.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/include/map
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/for_each.associative.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/ranges.for_each.associative.pass.cpp
M libcxx/test/std/containers/associative/map/map.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/associative/map/map.cons/move_assign.pass.cpp
M libcxx/test/std/containers/associative/map/map.modifiers/merge.pass.cpp
M libcxx/test/std/containers/associative/map/map.ops/contains.pass.cpp
M libcxx/test/std/containers/associative/map/map.ops/contains_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/empty.pass.cpp
M libcxx/test/std/containers/associative/multimap/get_allocator.pass.cpp
M libcxx/test/std/containers/associative/multimap/incomplete_type.pass.cpp
M libcxx/test/std/containers/associative/multimap/iterator.pass.cpp
M libcxx/test/std/containers/associative/multimap/max_size.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/assign_initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/compare_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/deduct.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/deduct_const.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/default.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/dtor_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/from_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list_compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list_compare_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter_comp_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.erasure/erase_if.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/clear.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/emplace.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/emplace_hint.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/extract_iterator.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/extract_key.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_allocator_requirements.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_cv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_cv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_rv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_node_type.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_node_type_hint.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_rv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/merge.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.nonmember/compare.three_way.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.nonmember/op_compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.observers/key_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.observers/value_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/find.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/member_swap.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/non_member_swap.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/swap_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.value_compare/invoke.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.value_compare/types.pass.cpp
M libcxx/test/std/containers/associative/multimap/size.pass.cpp
M libcxx/test/std/containers/associative/multimap/types.pass.cpp
M libcxx/test/std/containers/container.node/node_handle.pass.cpp
Log Message:
-----------
[libc++] Make std::multimap constexpr as part of P3372R3 (#161901)
Fixes #128661
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 46ece19eef8199137c0df10b492cadcb91060846
https://github.com/llvm/llvm-project/commit/46ece19eef8199137c0df10b492cadcb91060846
Author: Takuto Ikuta <tikuta at google.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/include/string.h
Log Message:
-----------
[libc++] Add a missing include in string.h (#135134)
`stddef.h` is necessary for `size_t` in explicit Clang modules build.
Commit: 8ca5830992768650b77ee318dad5402108e8bed3
https://github.com/llvm/llvm-project/commit/8ca5830992768650b77ee318dad5402108e8bed3
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++] Default the allocator argument for most string constructors (#169901)
Allocators are generally very cheap to copy, so avoiding copies by
having separate overloads is not that useful. Defaulting them
significanlty reduces the overload set the compiler has to consider and
simplifies the code, since we can remove some functions in the future.
Closes #87368
Commit: d6ccc29cb3a79631818e30f2f523fc6a91718f8a
https://github.com/llvm/llvm-project/commit/d6ccc29cb3a79631818e30f2f523fc6a91718f8a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Take AccessKinds into account in diagnoseNonConstVa… (#204824)
…riable
And diagnose it as a modification and not a read if applicable.
Commit: bf18f6f43052cb558502e3e6f4db6a7368fe7b61
https://github.com/llvm/llvm-project/commit/bf18f6f43052cb558502e3e6f4db6a7368fe7b61
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/Remarks/RemarkStreamer.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/WithColor.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.h
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/utils/yaml-bench/YAMLBench.cpp
Log Message:
-----------
[CommandLine] Make cl::boolOrDefault a scoped enum (#204553)
Prevents implicit conversion to bool/int, where BOU_FALSE wrongly
evaluated as true. All uses qualified as cl::boolOrDefault::BOU_*.
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 8c7b7dda518a28447660256c44c39d94d0c7e793
https://github.com/llvm/llvm-project/commit/8c7b7dda518a28447660256c44c39d94d0c7e793
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] Fix format string (#204837)
GetLoadAddress() returns an integer value, not a null-terminated string.
Commit: 16a0a1042f7e4e5a0c667096fcdeb5803e06d120
https://github.com/llvm/llvm-project/commit/16a0a1042f7e4e5a0c667096fcdeb5803e06d120
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
Log Message:
-----------
[NFC] Remove SVEShuffleOpts variable unused in release build (#204833)
Fixes a warning-as-error build failure for #193951
Commit: 5bb3690d08fd89b3bba9866fc68df56f02379294
https://github.com/llvm/llvm-project/commit/5bb3690d08fd89b3bba9866fc68df56f02379294
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
Log Message:
-----------
[llvm][Target] Avoid premature Twine .str() materialization (#204836)
Call sites in the AMDGPU and SPIRV parsers and the SystemZ AsmPrinter /
InstrInfo pass `expr.str()` (or `.str().c_str()`) to parameters of type
`const llvm::Twine &`, forcing a throwaway heap std::string that is
immediately rewrapped into a Twine. Drop the materialization and let
Twine accept the concatenation directly.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 467a5fe378edfce2d495417c1b224cc2967570a2
https://github.com/llvm/llvm-project/commit/467a5fe378edfce2d495417c1b224cc2967570a2
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Analysis/FlowSensitive/FormulaSerialization.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/Yaml.h
Log Message:
-----------
[clang] Avoid premature Twine .str() materialization (#204830)
Several call sites pass `expr.str()` to parameters of type `const
llvm::Twine &`, forcing a throwaway heap std::string that is immediately
rewrapped into a Twine. Drop the `.str()` and let Twine accept the
StringRef/concatenation directly.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 22dce64361a23b954e5275b151cdbefc92eaa204
https://github.com/llvm/llvm-project/commit/22dce64361a23b954e5275b151cdbefc92eaa204
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
Log Message:
-----------
[AMDGPU] Remove some functions unused since #105645. NFC. (#204844)
Commit: 29692c150f86d76cfb58e8bf2c0e97dc6afd2088
https://github.com/llvm/llvm-project/commit/29692c150f86d76cfb58e8bf2c0e97dc6afd2088
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/include/CMakeLists.txt
A libc/include/libgen.yaml
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/string_view.h
A libc/src/libgen/CMakeLists.txt
A libc/src/libgen/basename.cpp
A libc/src/libgen/basename.h
A libc/src/libgen/dirname.cpp
A libc/src/libgen/dirname.h
M libc/test/src/CMakeLists.txt
A libc/test/src/libgen/CMakeLists.txt
A libc/test/src/libgen/basename_death_test.cpp
A libc/test/src/libgen/basename_test.cpp
A libc/test/src/libgen/dirname_death_test.cpp
A libc/test/src/libgen/dirname_test.cpp
A libc/utils/docgen/libgen.yaml
Log Message:
-----------
[libc] Implement basename and dirname in libgen.h (#204554)
Added the POSIX standard functions basename and dirname under a new
libgen.h header. The implementations modify the input path in-place
using cpp::string_view to determine boundaries safely.
Added find_last_not_of to cpp::string_view to support trailing slash
removal.
Implemented:
* libc/include/libgen.yaml, libgen.h.def: Public API definitions.
* libc/src/libgen/basename.cpp, dirname.cpp: Generic implementations.
* libc/test/src/libgen/: Unit and hermetic tests.
Registered the new entrypoints for all active Linux targets (x86_64,
aarch64, arm, riscv) and added docgen configuration.
Assisted-by: Automated tooling, human reviewed.
Commit: fd6a30b11da2bcbce657aa26a362e7d24aa9cd44
https://github.com/llvm/llvm-project/commit/fd6a30b11da2bcbce657aa26a362e7d24aa9cd44
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
M libcxx/utils/gdb/libcxx/printers.py
Log Message:
-----------
[libcxx] Make std::pair pretty-printer ABI-independent (#201768)
std::pair is printed explicitly instead of relying on GDB's default
struct formatting to keep output stable across ABI configurations.
With _LIBCPP_DEPRECATED_ABI_DISABLE_PAIR_TRIVIAL_COPY_CTOR (default on
some platforms, e.g. FreeBSD), std::pair gains an empty
__non_trivially_copyable_base base class. GDB would otherwise render
this as <...__non_trivially_copyable_base<...>> = {<No data fields>},
which makes output ABI-dependent.
Only first and second are meaningful, so print them directly.
Commit: d43b360c0625f930fc9bc3bfedb9419bd4acf928
https://github.com/llvm/llvm-project/commit/d43b360c0625f930fc9bc3bfedb9419bd4acf928
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement-cost.ll
Log Message:
-----------
[SLP] Fix reduction cost crash for reduced values replaced by extractelement
A reduced value may be replaced by an extractelement while vectorizing a
previous subvector, so it is no longer a key in ReducedValsToOps.
Look through replaced values to the reduction operation among their users.
Fixes #204814
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/204847
Commit: 8c922aa493a3357ef9a9fab28e903b12fc2250ce
https://github.com/llvm/llvm-project/commit/8c922aa493a3357ef9a9fab28e903b12fc2250ce
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[MemorySanitizer] Merge x86 BMI and PackedBits handlers into handleGenericBitManipulation (#204786)
As discussed on #204144 - its not necessary to have separate handlers, just because some are target intrinsics
Commit: abbb031d386908d4274306f77c9c2cdc3e34d28d
https://github.com/llvm/llvm-project/commit/abbb031d386908d4274306f77c9c2cdc3e34d28d
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/binary-analysis/AArch64/cfg-warning.s
Log Message:
-----------
[BOLT][rewrite] warn about functions without CFG before binary analyses. (#197294)
Commit: 85c81a23e759d9f45da28d074beacffe14c2ba99
https://github.com/llvm/llvm-project/commit/85c81a23e759d9f45da28d074beacffe14c2ba99
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
A llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
M llvm/test/MC/COFF/seh-unwindv3-inheritance.s
M llvm/test/MC/COFF/seh-unwindv3-large.s
M llvm/test/MC/COFF/seh-unwindv3-nonmirror.s
Log Message:
-----------
[x64][win] Windows x64 unwind v3: Use tail-relative epilog offsets and add size-based splitting (#203108)
Win64 Unwind v3 encodes each epilog's EpilogOffset as a signed 16-bit
field. The encoder previously measured the first epilog offset from the
fragment start, which overflowed for large functions and produced a
cryptic "<unknown>:0: value too large for field" error (and, on the
early .seh_handlerdata path, an assertion failure).
Two changes:
- MCWin64EH.cpp: Always emit epilog offsets tail-relative. The first
epilog descriptor is measured from the fragment end and subsequent ones
as deltas from the previous epilog, so descriptors are emitted in
descending address order (all non-positive, per spec). A new lazy
MCUnwindV3EpilogOffsetTargetExpr resolves the fragment-end-relative
value at layout time (it may not have a symbol yet when emitted via
.seh_handlerdata) and reports a clean, function-named diagnostic on
genuine overflow.
- X86WinEHUnwindV3.cpp: Add Unwind-v2-style size-based sub-fragment
splitting. In addition to the existing >7-epilog split, the pass now
splits a funclet into chained fragments when an epilog is too far from
its fragment tail (using the V2 approximate-instruction-count heuristic,
tunable via -x86-wineh-unwindv3-epilog-distance-threshold). Splits use
SEH_SplitChainedAtEndOfBlock so the split lands after the epilog,
keeping every epilog close to its tail; a long trailing region becomes
its own epilog-free chained fragment.
Updates seh-unwindv3-large.s expectations to the new tail-relative
values and adds win64-eh-unwindv3-split-large.ll covering size-based
splitting.
Commit: e995171352b00123961e5c55600dd96bd11e7b60
https://github.com/llvm/llvm-project/commit/e995171352b00123961e5c55600dd96bd11e7b60
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/add.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Upstream widening-addition and vector-shift-left-and-widen NEON builtins (#204285)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for
- widening-addition intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#widening-addition)
- vector-shift-left-and-widen intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-left-and-widen)
Port tests:
- `clang/test/CodeGen/AArch64/neon_intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/add.c`
- `clang/test/CodeGen/AArch64/neon_intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`
Commit: ae60782c82682d20764f888321efb5d53df18a4a
https://github.com/llvm/llvm-project/commit/ae60782c82682d20764f888321efb5d53df18a4a
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/include/CMakeLists.txt
R libc/include/libgen.yaml
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/string_view.h
R libc/src/libgen/CMakeLists.txt
R libc/src/libgen/basename.cpp
R libc/src/libgen/basename.h
R libc/src/libgen/dirname.cpp
R libc/src/libgen/dirname.h
M libc/test/src/CMakeLists.txt
R libc/test/src/libgen/CMakeLists.txt
R libc/test/src/libgen/basename_death_test.cpp
R libc/test/src/libgen/basename_test.cpp
R libc/test/src/libgen/dirname_death_test.cpp
R libc/test/src/libgen/dirname_test.cpp
R libc/utils/docgen/libgen.yaml
Log Message:
-----------
Revert "[libc] Implement basename and dirname in libgen.h (#204554)" (#204856)
Reverted due to death tests failing with ASan on buildbots. Reverts
commit 29692c150f86d76cfb58e8bf2c0e97dc6afd2088.
Commit: 403ce0dc4bf3b288323a6e62d7d9056befdde483
https://github.com/llvm/llvm-project/commit/403ce0dc4bf3b288323a6e62d7d9056befdde483
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/requires01.f90
M flang/test/Semantics/OpenMP/requires03.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/requires06.f90
M flang/test/Semantics/OpenMP/requires07.f90
M flang/test/Semantics/OpenMP/requires08.f90
M flang/test/Semantics/OpenMP/requires10.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Emit warning that REVERSE_OFFLOAD is not supported (#204647)
Right now we quietly ignore it, whereas the OpenMP spec mandates a
compilation error for requirements that the implementation does not
support.
The REVERSE_OFFLOAD was not causing a compilation error to allow testing
of incremental implementation improvements, but we should at least warn
about not supporting it.
Commit: ef5d544f9bc18c41941e0a701ed11124623fb480
https://github.com/llvm/llvm-project/commit/ef5d544f9bc18c41941e0a701ed11124623fb480
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
M flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
M flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-target-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-same-name-different-scope.f90
M flang/test/Lower/OpenMP/declare-reduction-target-intrinsic.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
Log Message:
-----------
[flang][OpenMP] Scope-qualify user-defined reduction names in lowering (#202474)
A named !$omp declare reduction was lowered to an omp.declare_reduction
operation whose symbol name was just the bare reduction name (e.g.
`@a`), without any scope qualification. Semantic name resolution was
correct and gave each scope its own reduction symbol, but lowering
deduplicates the declare reduction op by name, so two subroutines that
declared a reduction with the same name collapsed onto a single op.
As a result, a reduction(name:var) clause could bind to a declaration
that leaked in from a different scope.
Per OpenMP 6.0 7.6.14, a user-defined reduction has the same visibility
and accessibility as a variable declared at the same location.
Qualify the generated op name with the scope in which the reduction is
declared using mangleName, the same approach already used for
omp.private and declare mapper. This is applied consistently when the op
is created, when a clause references it, and when its existence is
checked, so the names always agree.
Fixes #181270
Commit: fa135bb8cb8c4adf9fb7d5eb93143182dd632cd4
https://github.com/llvm/llvm-project/commit/fa135bb8cb8c4adf9fb7d5eb93143182dd632cd4
Author: Zhige Chen <zhige_chen at outlook.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/test/tools/llubi/assume_invalid_align.ll
M llvm/test/tools/llubi/controlflow.ll
M llvm/test/tools/llubi/intr_vector_manip.ll
M llvm/test/tools/llubi/invoke_poison.ll
M llvm/test/tools/llubi/metadata.ll
A llvm/test/tools/llubi/verify.ll
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi] Run verifier on the input IR (#204095)
This PR runs the IR verifier in llubi by default and adds a
`--disable-verify` opt-out.
Commit: eb21e784ce4a9ade6f00fad259889f9ab3f25d1a
https://github.com/llvm/llvm-project/commit/eb21e784ce4a9ade6f00fad259889f9ab3f25d1a
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
Log Message:
-----------
Mark LastEpilogIdx as maybe_unused (#204857)
#203108 added a variable which is read only in debug builds, so we are
seeing warning in release builds without asserts.
Commit: d10349cb51e19e25697be1ce19324274a8570d07
https://github.com/llvm/llvm-project/commit/d10349cb51e19e25697be1ce19324274a8570d07
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/test/Transforms/InstCombine/pdep.ll
M llvm/test/Transforms/InstCombine/pext.ll
Log Message:
-----------
[InstSimplify] Add fold for pdep(0,x) -> 0 and pext(0,x) -> 0 (#204810)
As noted on #204144
Commit: bb87fbb82b93fec4f1f39015a1d9262746a4e62f
https://github.com/llvm/llvm-project/commit/bb87fbb82b93fec4f1f39015a1d9262746a4e62f
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskKeyValueDB.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/ObjCopy/COFF/COFFObjcopy.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Transforms/IPO/InstrumentorConfigFile.cpp
M llvm/lib/Transforms/IPO/InstrumentorUtils.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm] Avoid premature Twine .str() materialization (#204828)
Commit: 394aa60e5678f07de7ad2f1923ddb2290f9ad7c6
https://github.com/llvm/llvm-project/commit/394aa60e5678f07de7ad2f1923ddb2290f9ad7c6
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
Log Message:
-----------
[CIR][NFC] Sync AArch64 NEON intrinsics with Clang (#204862)
Sync AArch64 NEON intrinsics with Clang after changes merged from
#204201
Commit: 7319a3cf812f487728a6f1de4f70846f9fee7513
https://github.com/llvm/llvm-project/commit/7319a3cf812f487728a6f1de4f70846f9fee7513
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/lib/DWP/DWP.cpp
M llvm/tools/llvm-dwarfdump/Statistics.cpp
M llvm/tools/llvm-objdump/SourcePrinter.cpp
M llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/obj2yaml/elf2yaml.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
Log Message:
-----------
[Support] Remove unused parameter of DataExtractor constructor (#204840)
#190519 removed the uses of the parameter, and several follow-up patches
cleaned up call sites. This is the last patch in the series that finally
removes the parameter.
While here, also remove the unused "truncating constructor".
Commit: 95e321951ad3041998e49bc0353482bcd27c65db
https://github.com/llvm/llvm-project/commit/95e321951ad3041998e49bc0353482bcd27c65db
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M mlir/lib/Conversion/PtrToLLVM/PtrToLLVM.cpp
M mlir/test/Conversion/PtrToLLVM/ptr-to-llvm.mlir
Log Message:
-----------
[mlir][ptr] Add constantop convertion (#204846)
Previously, Ptr.ConstantOp was missing the lowering pattern to LLVM IR.
This PR adds the missing conversion logic. See
https://github.com/llvm/llvm-project/pull/190527#issuecomment-4751141164.
---------
Co-authored-by: Fabian Mora <fmora.dev at gmail.com>
Commit: f4043dbcafc93f9107b7c93ee8740cdb0fe22d7c
https://github.com/llvm/llvm-project/commit/f4043dbcafc93f9107b7c93ee8740cdb0fe22d7c
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
A lldb/test/API/macosx/deny-attach/Makefile
A lldb/test/API/macosx/deny-attach/TestDenyAttach.py
A lldb/test/API/macosx/deny-attach/main.c
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb] Survive ptrace(PT_DENY_ATTACH) when attaching (#204688)
A process can opt out of being debugged with ptrace(PT_DENY_ATTACH). The
XNU kernel enforces this by delivering SIGSEGV to the *attaching*
process while it is still inside the ptrace(PT_ATTACHEXC) syscall. This
means debugserver gets killed before it can inspect the result. LLDB
only sees the dropped connection ("error: attach failed: lost
connection").
The condition can't be detected up front: the target's P_LNOATTACH flag
is not exposed to userspace. To work around this, install a temporary
SIGSEGV handler around the ptrace(PT_ATTACHEXC) call in AttachForDebug
and siglongjmp back out if it fires, turning the fatal signal into an
EPERM that propagates to lldb as a clear message:
```
error: attach failed: cannot attach to process N because it has
disabled debugging via ptrace(PT_DENY_ATTACH)
```
The handler only acts on a SIGSEGV that arrives on the attaching thread
while the guard is armed. Any other SIGSEGV restores the default handler
and re-raises. Genuine, unrelated, crashes still report normally.
rdar://44542907
Assisted-by: Claude
Commit: 6b7dbd8f485dc710f41fe5383ac99c2c42f9f6b9
https://github.com/llvm/llvm-project/commit/6b7dbd8f485dc710f41fe5383ac99c2c42f9f6b9
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for gfx950 mfmas (#204696)
Commit: d1c306c5ef9fc687df3630145b256f0d67a767b2
https://github.com/llvm/llvm-project/commit/d1c306c5ef9fc687df3630145b256f0d67a767b2
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
A clang/test/CIR/CodeGen/agg-atomic-cast.cpp
Log Message:
-----------
[CIR] Implement Aggregate non-atomic to atomic cast (#204653)
Implement support for Aggregate non-atomic to atomic cast
Commit: e6a92e0d2dbe413f994ad743f3f94cc9f0281b82
https://github.com/llvm/llvm-project/commit/e6a92e0d2dbe413f994ad743f3f94cc9f0281b82
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/test/tools/omp-kernel-replay/record-replay-diff-teams-threads.cpp
M offload/test/tools/omp-kernel-replay/record-replay-diff-threads.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
Log Message:
-----------
[offload] Fix teams/threads limits in record replay (#200639)
The recording phase now sets the teams and threads limits provided by
the user (in the corresponding OpenMP clauses) or zero if not specified.
Additionally, the PR #199483 already enforces that replay's configuration
of threads and teams are respected.
This commit also changes the way we test record and replay when multiple
kernels are recorded in the same test. We use the record report to know how
to associate a json record descriptor file to the target region in the code. We
do not rely anymore on the modification time of the files to know the order,
which was problematic.
Commit: f1931891a9fe19c4b003b7dd2665ddc887f91a0d
https://github.com/llvm/llvm-project/commit/f1931891a9fe19c4b003b7dd2665ddc887f91a0d
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M libcxx/include/__cstddef/byte.h
M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
Log Message:
-----------
[libc++][byte] Apply [[nodiscard]] to std::byte (#204674)
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
Towards: #172124
Commit: fe9521d11834f9c408406b5a5d6c617c6156d1b8
https://github.com/llvm/llvm-project/commit/fe9521d11834f9c408406b5a5d6c617c6156d1b8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Unify header phi fixup and remove fixNonInductionPHIs (NFC). (#204886)
Unify the execute logic for VPPhi and VPWidenPHIRecipe into a shared
executePhiRecipe helper that handles both scalar and vector phis. For
header phis, only the preheader incoming value is added during execute;
the backedge is fixed up later by VPlan::execute().
This allows generalizing the VPlan::execute() fixup loop to handle all
loop headers (not just the first), removing the VPWidenPHIRecipe skip,
and eliminating fixNonInductionPHIs entirely.
Commit: 39f8f90cc9d8cf650823f397e56244b4d84168ff
https://github.com/llvm/llvm-project/commit/39f8f90cc9d8cf650823f397e56244b4d84168ff
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/instructions/undef-composite.ll
Log Message:
-----------
[SPIR-V] Lower undef nested in a constant aggregate (#204377)
A constant aggregate whose element is itself an aggregate `undef` was
never lowered to a placeholder. The raw aggregate operand reached
IRTranslator on the llvm.spv.const.composite call and aborted with
"unable to translate instruction".
A similar issue was found and fixed during SPV_KHR_poison_freeze
implementation. So instead of re-inventing a wheel - unify lowering with
poison.
Addresses the following observation:
https://github.com/llvm/llvm-project/pull/198037#discussion_r3304013315
Commit: 4195b294cb82f50fdfb980434439a22a0f5be315
https://github.com/llvm/llvm-project/commit/4195b294cb82f50fdfb980434439a22a0f5be315
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M .github/workflows/subscriber.yml
Log Message:
-----------
workflows/subscriber: Update to latest github automation container (#204692)
This one is about 33% smaller than the previous version.
Commit: 086f6331a5a904da8de84b30dcdaddc0a6220ed1
https://github.com/llvm/llvm-project/commit/086f6331a5a904da8de84b30dcdaddc0a6220ed1
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.async.to.lds.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for load_async_to_lds (#204683)
Commit: f9fa59867f663d965dd7a6a72777477c4decee4d
https://github.com/llvm/llvm-project/commit/f9fa59867f663d965dd7a6a72777477c4decee4d
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/addsub64_carry.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
A llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
Log Message:
-----------
[AMDGPU] Use explicit carry nodes for i64 wide integer lowering (#204694)
This PR switches widened i64 add/sub lowering to use explicit
UADDO/USUBO carry
nodes instead of glue-based carry chains.
Commit: 90b204888de4da58d4f3b68355658c16a14a1e46
https://github.com/llvm/llvm-project/commit/90b204888de4da58d4f3b68355658c16a14a1e46
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
A llvm/test/Bitcode/Inputs/invalid-summary-version.bc
A llvm/test/Bitcode/invalid-summary-version.test
Log Message:
-----------
bitcode: Improve invalid summary version error (#204888)
Commit: c890f4dbc248cf5f22e9f5b212d03be44b77d499
https://github.com/llvm/llvm-project/commit/c890f4dbc248cf5f22e9f5b212d03be44b77d499
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 95e3219 (#204873)
This fixes 95e321951ad3041998e49bc0353482bcd27c65db.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: a8aba704b0972253ffb6d7bda770ecef43f5b131
https://github.com/llvm/llvm-project/commit/a8aba704b0972253ffb6d7bda770ecef43f5b131
Author: Steve Scalpone <sscalpone at nvidia.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/test/Lower/MIF/coarray_allocation3.f90
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
Log Message:
-----------
[Flang] Standardize coarray TODO() diagnostic messages (#204708)
Commit: ba5384a3e154e6f43ddc951ebc81b4b5edafcc1b
https://github.com/llvm/llvm-project/commit/ba5384a3e154e6f43ddc951ebc81b4b5edafcc1b
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[Support] Add a parser for cl::opt<ElementCount> (#203969)
This adds command-line option parsing support for ElementCount.
This allows the following syntax:
```
--my-option=4 ; Maps to ElementCount::getFixed(4)
--my-option="vscale x 8" ; Maps to ElementCount::getScalable(8)
```
This is intended to unify fixed/scalable option handling in the loop
vectorizer. Currently, we have options like
'`EpilogueVectorizationForceVF`' defined as `cl::opt<unsigned>` which do
not allow specifying scalable VFs.
Assisted-by: Codex
Commit: b32488f78b6c029aa0b0a011dbc8c593f2e8cb34
https://github.com/llvm/llvm-project/commit/b32488f78b6c029aa0b0a011dbc8c593f2e8cb34
Author: Hubert Tong <hubert.reinterpretcast at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/test/CodeGen/ubsan-aggregate-null-align-bounds.c
Log Message:
-----------
[Clang][UBSan] Use EmitCheckedLValue for C++ trivial operator= operands (#203737)
Further to https://github.com/llvm/llvm-project/pull/190739, use
EmitCheckedLValue for trivial operator= operands
* for the LHS (`lhs->` not handled yet), and
* for the RHS also for function call syntax.
Commit: e47530b9f4d6c2417aeb578af615710cdce50597
https://github.com/llvm/llvm-project/commit/e47530b9f4d6c2417aeb578af615710cdce50597
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
Log Message:
-----------
[BOLT][AArch64] Align tentative layout bases using per-section alignment (#204262)
Move `AssignSections` pass before `AlignerPass` so it can record the max
code alignment per output section, then align the tentative hot/cold
section bases using the recorded alignment, which makes tentative layout
better match actually emitted.
Commit: 092858485f00e6786da8a88c0c4d462247e64571
https://github.com/llvm/llvm-project/commit/092858485f00e6786da8a88c0c4d462247e64571
Author: owenca <owenpiano at gmail.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
Log Message:
-----------
[clang-format][NFC] Clean up FormatTokenLexer (#203825)
Commit: 359bfe62ed1b1cd498cee558ed8699b2b88ae58b
https://github.com/llvm/llvm-project/commit/359bfe62ed1b1cd498cee558ed8699b2b88ae58b
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/docs/LifetimeSafety.rst
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
Log Message:
-----------
[LifetimeSafety] Allow configuring lifetimebound fix-it spelling (#204045)
When suggesting `[[clang::lifetimebound]]` fix-its, allow users to
provide a project-specific macro spelling with
`-lifetime-safety-lifetimebound-macro=...`.
If no spelling is configured, use a visible macro whose replacement
tokens spell the attribute, preferring the most recently defined
matching macro, and fall back to `[[clang::lifetimebound]]` or
`__attribute((lifetimebound))` otherwise.
Closes https://github.com/llvm/llvm-project/issues/200232
Commit: 2678b8f51e10df0beacade724b781ee214ec58f6
https://github.com/llvm/llvm-project/commit/2678b8f51e10df0beacade724b781ee214ec58f6
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-06-19 (Fri, 19 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/load-constant-buffer-t.ll
Log Message:
-----------
[DirectX] Handle llvm.dx.resource.getbasepointer intrinsic in DXILResourceAccess pass (#204732)
The `llvm.dx.resource.getbasepointer` intrinsic is emitted for
`Constantbuffer<T>` element access and needs to be translated to
`llvm.dx.resource.load.cbufferrow` calls in the `DXILResourceAccess`
pass. The handling is identical to `llvm.dx.resource.getpointer` with a
0 offset.
Fixes #204234
Commit: e9acb01904be7c32e98dedee27b68f939d79549a
https://github.com/llvm/llvm-project/commit/e9acb01904be7c32e98dedee27b68f939d79549a
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
R clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/spirv_target_teams_reduction_addrspace.c
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_firstprivate_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen_01.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_map_codegen_hold.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_offload_mandatory_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
A clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/add_attributes.ll
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
M offload/include/Shared/Environment.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/device/include/Interface.h
M openmp/device/src/Reduction.cpp
Log Message:
-----------
[OpenMP][offload] Cross-team reductions with variable number of teams (#195102)
This is a part of a series of patches that rework OpenMP cross-team
reductions.
This patch changes the cross-team reduction runtime to no longer work
through larger number of teams in chunks. Instead, we allocate a
suitable-sized global buffer for the team values and let all teams run
at once. The last team that finishes uses a strided loop to reduce the
team values from the global buffer.
We also use `mapping::getNumberOfThreadsInBlock()` instead of
`omp_get_num_threads()` because the reduction of the team values runs
outside of the parallel region device code, which would make
`omp_get_num_threads()` always return 1. For Generic-SPMD mode, we also
want to use all available threads, which means that we need to copy the
reduction data from LDS (where it lives in that mode by default) to
scratch in codegen before calling the cross-team reduction.
Performance:
All performance tests can be reproduced with
https://github.com/ro-i/xteam-test @ commit
2f09ae1f566f13189d20b414d8b83bf2986564d2. To reproduce, simply create a
`local.mk` file in the cloned directory with a suitable `OFFLOAD_ARCH`
for your machine and `CXX_trunk` + `CXX_trunk_dev` set to the paths of
the clang++ binaries for llvm/main and this patch. (llvm/main should
best be at the commit that is currently the base for this PR. At the
moment, this is fe87c971bf07eb38af97ca96bf2810e94e7549dc). Then, run
`make trunk trunk_dev` to build the benchmark binaries for 208 and 10400
teams. Run them with `./run_bench.sh -rq -n10 red_trunk_208
red_trunk_dev_208 red_trunk_10400 red_trunk_dev_10400` to get the avg
performance numbers over 10 rounds.
This tests multiple reduction workloads, including reductions that run
in the Generic-SPMD mode, with 208 teams and with 10400 teams, both à
512 threads, and with a reduction array size of 177,777,777. I tested on
a gfx942 and didn't find any regressions - here are some numbers showing
the performance of this patch relative to the baseline:
```
red_comb_sep_arr_32 double dev_208: +84.37% dev_10400: +54.06%
red_sum_arr_32 double dev_208: +9.72% dev_10400: +51.29%
red_comb double dev_208: +2.73% dev_10400: +8.73%
red_comb_sep double dev_208: +1.89% dev_10400: +87.13%
red_dot double dev_208: +1.46% dev_10400: +25.66%
red_indirect double dev_208: +1.51% dev_10400: +23.54%
red_kernel_part double dev_208: +1.27% dev_10400: +88.28%
red_max double dev_208: +1.29% dev_10400: +22.69%
red_mult double dev_208: +1.96% dev_10400: +22.02%
red_sum double dev_208: +2.03% dev_10400: +22.00%
red_pi double dev_208: +1.08% dev_10400: +1.22%
red_comb_sep_arr_32 uint dev_208: +139.10% dev_10400: +88.02%
red_sum_arr_32 uint dev_208: +49.70% dev_10400: +143.24%
red_dot uint dev_208: +0.77% dev_10400: +24.91%
red_max uint dev_208: +3.43% dev_10400: +36.61%
red_sum uint dev_208: +4.56% dev_10400: +36.95%
red_comb_sep_arr_32 ulong dev_208: +85.22% dev_10400: +58.17%
red_sum_arr_32 ulong dev_208: +9.01% dev_10400: +55.14%
red_dot ulong dev_208: +2.94% dev_10400: +26.89%
red_max ulong dev_208: +2.83% dev_10400: +23.10%
red_sum ulong dev_208: +1.59% dev_10400: +22.82%
red_comb_sep_arr_32 Value dev_208: +29.88% dev_10400: +24.17%
red_sum_arr_32 Value dev_208: +7.26% dev_10400: +38.14%
red_dot Value dev_208: +2.65% dev_10400: +8.60%
red_max Value dev_208: +2.86% dev_10400: +4.77%
red_sum Value dev_208: +0.47% dev_10400: +10.22%
```
This patch uses ideas from Johannes Doerfert, ideas from the AOMP
cross-team reduction implementation, and was assisted by Claude.
Commit: 4c16440e1edc00cd1b5a64944fc651064fe6425b
https://github.com/llvm/llvm-project/commit/4c16440e1edc00cd1b5a64944fc651064fe6425b
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
A clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/spirv_target_teams_reduction_addrspace.c
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_firstprivate_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen_01.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_map_codegen_hold.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_offload_mandatory_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
R clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/add_attributes.ll
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
M offload/include/Shared/Environment.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/device/include/Interface.h
M openmp/device/src/Reduction.cpp
Log Message:
-----------
Revert "[OpenMP][offload] Cross-team reductions with variable number of teams" (#204914)
Reverts llvm/llvm-project#195102 due to some missed debug info issue
revealed by https://lab.llvm.org/buildbot/#/builders/67/builds/7022
Commit: a38998941b2f57ffce38d6161a48d59d7d481964
https://github.com/llvm/llvm-project/commit/a38998941b2f57ffce38d6161a48d59d7d481964
Author: Ferdinand Lemaire <flscminecraft at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
A mlir/include/mlir/Conversion/RaiseWasm/RaiseWasmMLIR.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
M mlir/lib/Conversion/CMakeLists.txt
A mlir/lib/Conversion/RaiseWasm/CMakeLists.txt
A mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
A mlir/test/Conversion/RaiseWasm/wasm-abs-to-math-abs.mlir
A mlir/test/Conversion/RaiseWasm/wasm-add-to-arith-add.mlir
A mlir/test/Conversion/RaiseWasm/wasm-and-to-arith-and.mlir
A mlir/test/Conversion/RaiseWasm/wasm-ceil-to-math-ceil.mlir
A mlir/test/Conversion/RaiseWasm/wasm-clz-to-math-clz.mlir
A mlir/test/Conversion/RaiseWasm/wasm-const-to-arith-const.mlir
A mlir/test/Conversion/RaiseWasm/wasm-convert-to-arith-tofp.mlir
A mlir/test/Conversion/RaiseWasm/wasm-copysign-to-math-copysign.mlir
A mlir/test/Conversion/RaiseWasm/wasm-ctz-to-math-ctz.mlir
A mlir/test/Conversion/RaiseWasm/wasm-demote-to-arith-trunc.mlir
A mlir/test/Conversion/RaiseWasm/wasm-div-to-arith-div.mlir
A mlir/test/Conversion/RaiseWasm/wasm-floor-to-math-floor.mlir
A mlir/test/Conversion/RaiseWasm/wasm-func-to-func.mlir
A mlir/test/Conversion/RaiseWasm/wasm-global-to-memref-global.mlir
A mlir/test/Conversion/RaiseWasm/wasm-local-to-memref.mlir
A mlir/test/Conversion/RaiseWasm/wasm-max-to-arith-maximumf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-min-to-arith-minimumf.mlir
A mlir/test/Conversion/RaiseWasm/wasm-mul-to-arith-mul.mlir
A mlir/test/Conversion/RaiseWasm/wasm-neg-to-arith-neg.mlir
A mlir/test/Conversion/RaiseWasm/wasm-or-to-arith-or.mlir
A mlir/test/Conversion/RaiseWasm/wasm-popcnt-to-math-ctpop.mlir
A mlir/test/Conversion/RaiseWasm/wasm-promote-to-arith-ext.mlir
A mlir/test/Conversion/RaiseWasm/wasm-reinterpret-to-arith-bitcast.mlir
A mlir/test/Conversion/RaiseWasm/wasm-rem-to-arith-rem.mlir
A mlir/test/Conversion/RaiseWasm/wasm-shl-to-arith-shl.mlir
A mlir/test/Conversion/RaiseWasm/wasm-shr_s-to-arith-shrs.mlir
A mlir/test/Conversion/RaiseWasm/wasm-shr_u-to-arith-shru.mlir
A mlir/test/Conversion/RaiseWasm/wasm-sqrt-to-math-sqrt.mlir
A mlir/test/Conversion/RaiseWasm/wasm-sub-to-arith-sub.mlir
A mlir/test/Conversion/RaiseWasm/wasm-trunc-to-math-trunc.mlir
A mlir/test/Conversion/RaiseWasm/wasm-wrap-to-arith-trunc.mlir
A mlir/test/Conversion/RaiseWasm/wasm-xor-to-arith-xor.mlir
Log Message:
-----------
[MLIR][WASM] Introduce the RaiseWasmMLIRPass to convert WasmSSA MLIR to core dialects (#164562)
This is following https://github.com/llvm/llvm-project/pull/154674 and
still related to
https://discourse.llvm.org/t/rfc-mlir-dialect-for-webassembly/86758.
This PR introduces the RaiseWasmMLIRPass. This pass lowers WasmSSA MLIR
to other dialects of the LLVM ecosystem (namely: arith, math, cf and
memref).
This is the first PR of a series of 2 or 3 to introduce the lowering, as
an introduction it brings support for function calls, local and global
variables and handling of arithmetic operations. As explained in the
RFC, most WasmSSA operations have been made to stay close to other
dialects' semantics so that conversion is trivialized.
---------
Signed-off-by: Ferdinand Lemaire <flemairen6 at gmail.com>
Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
Co-authored-by: Ferdinand Lemaire <flemairen6 at gmail.com>
Commit: ea9bae08990f581e9dce8f65844bc16b3249f91e
https://github.com/llvm/llvm-project/commit/ea9bae08990f581e9dce8f65844bc16b3249f91e
Author: Luc Forget <github at alias.lforget.fr>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.h
M mlir/include/mlir/Conversion/Passes.td
R mlir/include/mlir/Conversion/RaiseWasm/RaiseWasmMLIR.h
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
M mlir/lib/Conversion/CMakeLists.txt
R mlir/lib/Conversion/RaiseWasm/CMakeLists.txt
R mlir/lib/Conversion/RaiseWasm/RaiseWasmMLIR.cpp
M mlir/lib/Dialect/WasmSSA/IR/WasmSSAOps.cpp
R mlir/test/Conversion/RaiseWasm/wasm-abs-to-math-abs.mlir
R mlir/test/Conversion/RaiseWasm/wasm-add-to-arith-add.mlir
R mlir/test/Conversion/RaiseWasm/wasm-and-to-arith-and.mlir
R mlir/test/Conversion/RaiseWasm/wasm-ceil-to-math-ceil.mlir
R mlir/test/Conversion/RaiseWasm/wasm-clz-to-math-clz.mlir
R mlir/test/Conversion/RaiseWasm/wasm-const-to-arith-const.mlir
R mlir/test/Conversion/RaiseWasm/wasm-convert-to-arith-tofp.mlir
R mlir/test/Conversion/RaiseWasm/wasm-copysign-to-math-copysign.mlir
R mlir/test/Conversion/RaiseWasm/wasm-ctz-to-math-ctz.mlir
R mlir/test/Conversion/RaiseWasm/wasm-demote-to-arith-trunc.mlir
R mlir/test/Conversion/RaiseWasm/wasm-div-to-arith-div.mlir
R mlir/test/Conversion/RaiseWasm/wasm-floor-to-math-floor.mlir
R mlir/test/Conversion/RaiseWasm/wasm-func-to-func.mlir
R mlir/test/Conversion/RaiseWasm/wasm-global-to-memref-global.mlir
R mlir/test/Conversion/RaiseWasm/wasm-local-to-memref.mlir
R mlir/test/Conversion/RaiseWasm/wasm-max-to-arith-maximumf.mlir
R mlir/test/Conversion/RaiseWasm/wasm-min-to-arith-minimumf.mlir
R mlir/test/Conversion/RaiseWasm/wasm-mul-to-arith-mul.mlir
R mlir/test/Conversion/RaiseWasm/wasm-neg-to-arith-neg.mlir
R mlir/test/Conversion/RaiseWasm/wasm-or-to-arith-or.mlir
R mlir/test/Conversion/RaiseWasm/wasm-popcnt-to-math-ctpop.mlir
R mlir/test/Conversion/RaiseWasm/wasm-promote-to-arith-ext.mlir
R mlir/test/Conversion/RaiseWasm/wasm-reinterpret-to-arith-bitcast.mlir
R mlir/test/Conversion/RaiseWasm/wasm-rem-to-arith-rem.mlir
R mlir/test/Conversion/RaiseWasm/wasm-shl-to-arith-shl.mlir
R mlir/test/Conversion/RaiseWasm/wasm-shr_s-to-arith-shrs.mlir
R mlir/test/Conversion/RaiseWasm/wasm-shr_u-to-arith-shru.mlir
R mlir/test/Conversion/RaiseWasm/wasm-sqrt-to-math-sqrt.mlir
R mlir/test/Conversion/RaiseWasm/wasm-sub-to-arith-sub.mlir
R mlir/test/Conversion/RaiseWasm/wasm-trunc-to-math-trunc.mlir
R mlir/test/Conversion/RaiseWasm/wasm-wrap-to-arith-trunc.mlir
R mlir/test/Conversion/RaiseWasm/wasm-xor-to-arith-xor.mlir
Log Message:
-----------
Revert "[MLIR][WASM] Introduce the RaiseWasmMLIRPass to convert WasmSSA MLIR to core dialects" (#204917)
Reverts llvm/llvm-project#164562
Co-authored-by: Luc Forget <lforg37 at users.noreply.github.com>
Commit: ec3b4186a0f5bd182692721d14ed50af1f4af47d
https://github.com/llvm/llvm-project/commit/ec3b4186a0f5bd182692721d14ed50af1f4af47d
Author: A. Jiang <de34 at live.cn>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
A libcxx/test/std/language.support/support.types/byte.compile.pass.cpp
R libcxx/test/std/language.support/support.types/byte.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/and.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/and.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/enum_direct_init.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/lshift.assign.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/lshift.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/not.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/or.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/or.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/rshift.assign.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/rshift.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/to_integer.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/to_integer.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/xor.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/xor.pass.cpp
Log Message:
-----------
[libc++][test] Rewrite tests for `std::byte` (#204116)
Previously, test files for `std::byte` were less than ideal. There were
many issues.
- `byte.pass.cpp` tested many properties which hold for enumeration
types, but failed to verity that `std::byte` is a scoped enumeration
type. Also, it was not a `.compile.pass.cpp`.
- `enum_direct_init.pass.cpp` seemed to be completely redundant.
- It was not tested that compound assignment operators return references
to their left operands.
- Return types of operators were rarely tested.
- Constraints of functions were not tested using SFINAE techniques.
- Test cases were not made run in both constant evaluation and at run
time in the conventional way.
This patch
- rewrites tests for `std::byte` to address these issues,
- expands test coverage for integer types listed in `type_algorithms.h`,
and
- updates lit comments to new-style `// REQUIRES: std-at-least-c++17`.
Commit: 9f578bc595ca7c1a5ce35b17c483fd6c557d11ef
https://github.com/llvm/llvm-project/commit/9f578bc595ca7c1a5ce35b17c483fd6c557d11ef
Author: Damian Höster <damian.hoester at posteo.de>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Reset `Line->IsModuleOrImportDecl` in `addUnwrappedLine` (#204565)
The `IsModuleOrImportDecl` flag was not reset in `addUnwrappedLine`.
Since the parser recycles the `Line` object, this flag remained `true`
for all subsequent lines in the file, which disabled wrapping
(`CanBreakBefore` in `TokenAnnotator.cpp`) for expression-level
constructs after any C++20 module or import statement, causing some
formatting rules to not be applied in places. This patch fixes the issue
by resetting the flag to `false`.
---------
Co-authored-by: Owen Pan <owenpiano at gmail.com>
Commit: f21080724d2067b5acf01893bf2d544b49239161
https://github.com/llvm/llvm-project/commit/f21080724d2067b5acf01893bf2d544b49239161
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
Log Message:
-----------
[LoopCacheAnalysis] Drop isLoopSimplifyForm check (NFCI) (#204822)
This patch removes the isLoopSimplifyForm() check from
LoopCacheAnalysis. This check was problematic when I tried migrating
LoopCachePrinterPass from a loop pass to a function pass (i.e.,
#204807), because the former applies the loop-simplify pass via
FunctionToLoopPassAdapter, whereas the latter does not. I believe this
check is meaningless because the analysis doesn't pay attention to the
details of the actual loop structure. So this change should not affect
the behavior of the pass.
Commit: 342de06a7692e76a23b30761e576e58e675b65d8
https://github.com/llvm/llvm-project/commit/342de06a7692e76a23b30761e576e58e675b65d8
Author: Hazarath <92698778+hazarathayya at users.noreply.github.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/Reassociate.cpp
A llvm/test/Transforms/Reassociate/reassociate-distribute.ll
Log Message:
-----------
[Reassociate] Distribute multiply over add to enable factorization (#178201)
### This patch improves ReassociatePass to handle patterns like:
(x*C1) - ((y+x)*C2) → x*(C1-C2) - (y*C2)
The optimization consists of two changes:
1. Distribution pre-processing: Transform (A+B)*C → A*C + B*C when:
- The add has exactly one use (avoids code bloat)
- Both add operands are non-constant (avoids unprofitable cases)
This exposes common factors that would otherwise be hidden inside
the addition, enabling subsequent factorization.
2. Factorization heuristic: Prefer extracting non-constant factors
(Instructions/Arguments) over constant factors when occurrence
counts are equal. This enables better constant folding opportunities.
Note: undef is excluded from this preference to maintain existing
test expectations.
Example transformation:
Input IR:
```
%add = add nsw i16 %y, %x
%mul1 = mul nsw i16 %x, 8697
%mul2 = mul nsw i16 %add, 6436
%sub = sub nsw i16 %mul1, %mul2
ret i16 %sub
```
After distribution:
```
%1 = mul nsw i16 %y, 6436
%2 = mul nsw i16 %x, 6436
%3 = add nsw i16 %1, %2
%sub = sub nsw i16 %mul1, %3
```
After reassociation (factors %x, folds 8697-6436):
```
%neg = mul i16 %y, -6436
%reass.mul = mul i16 %x, 2261
%result = add i16 %reass.mul, %neg
```
The transformation preserves nsw/nuw flags during distribution.
Note that flags may be dropped by subsequent reassociation passes;
comprehensive flag preservation can be addressed in future work.
Fixes #167190
Commit: 56262f29ea23c50e82640c8bdc50cc17e9498688
https://github.com/llvm/llvm-project/commit/56262f29ea23c50e82640c8bdc50cc17e9498688
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M .github/workflows/new-prs.yml
Log Message:
-----------
workflows/new-prs: Use github-automation container (#204706)
Commit: 68079bb518dcdaec15ee3b202f45701d3a78fa91
https://github.com/llvm/llvm-project/commit/68079bb518dcdaec15ee3b202f45701d3a78fa91
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/Sema/builtins-elementwise-math.c
Log Message:
-----------
[clang] Implement `__builtin_elementwise_pext` and `__builtin_elementwise_pdep` (#204296)
Closes #204126
This PR adds `__builtin_elementwise_pext` to emit `@llvm.pext` and `__builtin_elementwise_pdep` to emit `@llvm.pdep`.
Commit: 9019eff661e2c0e93f2389cf25a59fd24b0dd18a
https://github.com/llvm/llvm-project/commit/9019eff661e2c0e93f2389cf25a59fd24b0dd18a
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-to-cmp.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] Fold trunc scmp/ucmp -> scmp/ucmp with the target type being what we truncate (#196847)
I don't think I need an alive2 for this, since this is basically a
tautology/self-definition.
Commit: d186503ccc7ad93f695f60302c5def5efc3ac2dd
https://github.com/llvm/llvm-project/commit/d186503ccc7ad93f695f60302c5def5efc3ac2dd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove dead code (#204910)
Unions can't have base classes so this is never used.
Commit: 465c904272709002665bd86765d8f11dc9390a98
https://github.com/llvm/llvm-project/commit/465c904272709002665bd86765d8f11dc9390a98
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combineX86ShufflesRecursively - delay widening shuffle inputs. NFC. (#204931)
Perform resolveTargetShuffleInputsAndMask earlier as widening shouldn't
merge any inputs (we canonicalize small shuffle inputs earlier).
We should be able to move the widenSubVector calls inside
combineX86ShuffleChain in a future commit, but this patch should be NFC.
Commit: e26ff5491b91c66bb27bfd2b2ca8afe76bb7489d
https://github.com/llvm/llvm-project/commit/e26ff5491b91c66bb27bfd2b2ca8afe76bb7489d
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Log Message:
-----------
[InstCombine] Remove fold with OneUse as there is fold without the check (NFC) (#204925)
Commit: 2ec6f2870e13bb8807360f2278108b7d5240fe40
https://github.com/llvm/llvm-project/commit/2ec6f2870e13bb8807360f2278108b7d5240fe40
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/set.ll
Log Message:
-----------
[InstCombine] Fold sext(and/or/xor(trunc nsw x), y) -> and/or/xor(sext(y), x) (#204928)
Proof: https://alive2.llvm.org/ce/z/ntVE_8
Commit: f6296fb4507e80f507024a28a21654e12543b62e
https://github.com/llvm/llvm-project/commit/f6296fb4507e80f507024a28a21654e12543b62e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/zext.ll
Log Message:
-----------
[InstCombine] Fold zext(and/or/xor(trunc nuw x), y) -> and/or/xor(zext(y), x) (#204927)
proof: https://alive2.llvm.org/ce/z/ZORvJ6
Commit: b2c0c48595ab840c5b949d871302b0d1186acf53
https://github.com/llvm/llvm-project/commit/b2c0c48595ab840c5b949d871302b0d1186acf53
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/or.ll
Log Message:
-----------
[InstCombine] Fold or (ashr X, BW-1), zext (icmp ne|sgt X, 0) to scmp(X, 0) (#196828)
Recognize the bitwise signum encoding
or (ashr X, BW-1), zext (icmp ne X, 0) --> llvm.scmp(X, 0)
or (ashr X, BW-1), zext (icmp sgt X, 0) --> llvm.scmp(X, 0)
Alive2: https://alive2.llvm.org/ce/z/UZ7a7Q
Commit: bae51e7ffb767d08d684290d34515b91f2cbb2ed
https://github.com/llvm/llvm-project/commit/bae51e7ffb767d08d684290d34515b91f2cbb2ed
Author: Arda Serdar Pektezol <arda at pektezol.dev>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/InstCombine/alloca-big.ll
Log Message:
-----------
[IR] handle oversized constant alloca counts in getAllocationSize (#204540)
AllocaInst::getAllocationSize() unconditionally calls getZExtValue() for
array allocas, which asserts when the constant element count is wider
than 64 bits.
Use tryZExtValue() when reading the constant array size instead. If the
count cannot be represented in uint64_t, return std::nullopt rather than
asserting, matching the existing contract.
Fixes #203519
Commit: c888371ff0a3e10f8472676dc992f4347fca58d9
https://github.com/llvm/llvm-project/commit/c888371ff0a3e10f8472676dc992f4347fca58d9
Author: player <playerc at msn.cn>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
Log Message:
-----------
[clangd] Look for resource-dir relative to detected compiler path as a fallback (#203332)
If the standard resource directory (which is searched for relative to the clangd
executable) does not exist, look for one relative to the detected compiler as a
fallback. This handles some packaging schemes where clangd and clang are
installed in different prefixes and the resource directory is only located in the
latter.
Also print an error message to the log if the fallback didn't find an existing
directory either.
Commit: 0c3c664f32d5b15ae542ed66fa52ebf86974ccaa
https://github.com/llvm/llvm-project/commit/0c3c664f32d5b15ae542ed66fa52ebf86974ccaa
Author: Adam Scott <88979030+as4230 at users.noreply.github.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/PhaseOrdering/X86/madd.ll
M llvm/test/Transforms/PhaseOrdering/X86/sad.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
M llvm/test/Transforms/VectorCombine/AArch64/partial-reduce-crash.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
A llvm/test/Transforms/VectorCombine/X86/shuffle-chain-reduction-subvector.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-chain-reduction-umin.ll
M llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll
Log Message:
-----------
[VectorCombine] Add subvector reduction support to foldShuffleChainsToReduce (#199872)
Extends foldShuffleChainsToReduce to recognise subvector reductions
where the chain narrows through shuffles before extracting lane 0.
The matcher tracks per output lane attribution as the chain is walked.
Each lane carries a per source bitmask of contributing source lanes plus
a poison flag. Shuffles permute these records. Binops union them. At the
extract, lane 0's bitmasks rebuild the reduction as one or more partial
reduce intrinsics. The walk is capped at 32 chain nodes.
Also added new test file with 11 tests:
| Test | Reason |
| ------------------------------------------------------ |
--------------------------------------------- |
| `_add_v4i32`, `_add_v8i16`, `_add_v16i8`, `_add_v64i8` | basic
subvector reductions across types/sizes |
| `_mul_v16i8` | non-add reduction |
| `_swapped_v8i16` | root operand swap |
| `_deinterleave_v8i16` | non-contiguous shuffle masks |
| `_multishuffle_accumulator_v8i32` | reduction with multiple shuffle
leaves |
| `_multisource_full_plus_scalar_v4i32` | multi-source reduction chain |
| `_neg_overlapping_masks_v8i16` | overlapping-mask reject case |
| `_neg_different_sources_v8i16` | non-profitable fold reject |
A few patterns the old matcher didn't fold get caught by the new one. In
`extract-binop.ll`, `ext_ext_partial_add_reduction_and_extra_add_v4i32`
mixes two source vectors. The old matcher walked a single chain
bottom-up assuming one source at the leaves so it bailed. The partial
reduction patterns in `load-extractelement-scalarization.ll` fold for
the same reason.
Fixes #197919
---------
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
Commit: 2c022e8d946619602e967924a7291f197119e8a5
https://github.com/llvm/llvm-project/commit/2c022e8d946619602e967924a7291f197119e8a5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/lower-range-metadata-func-call.ll
M llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maxnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minnum.ll
M llvm/test/Verifier/nofpclass-metadata.ll
A llvm/test/Verifier/nonnull-metadata.ll
R llvm/test/Verifier/nonnull_metadata.ll
A llvm/test/Verifier/noundef-metadata.ll
R llvm/test/Verifier/range-1.ll
A llvm/test/Verifier/range-metadata.ll
M llvm/test/tools/llubi/metadata.ll
Log Message:
-----------
[Verifier] Only accept noundef metadata on loads and update metadata tests (#204922)
noundef metadata has been accepted everywhere so far, which seems to be
an oversight. This patch rejects it everywhere except for load
instructions, which seem to be the only ones where it's supposed to be
supported. The other metadata tests are also updated so they are
somewhat similar to each other.
Commit: cd532fe7fbcb72b6ca7a73f15cc8cb0023e7a9de
https://github.com/llvm/llvm-project/commit/cd532fe7fbcb72b6ca7a73f15cc8cb0023e7a9de
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopCacheAnalysis.h
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/loads-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matvecmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/multi-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/single-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll
M llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll
M llvm/test/Analysis/LoopCacheAnalysis/interchange-cost-beneficial.ll
M llvm/test/Analysis/LoopCacheAnalysis/interchange-refcost-overflow.ll
M llvm/test/Analysis/LoopCacheAnalysis/partially-perfect-nest.ll
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
[LoopCacheAnalysis] Generate tests by update_analyze_test_checks.py (#204807)
Since loop interchange has been enabled in the default pipeline,
development on LoopCacheAnalysis, which is used by LoopInterchange, is
becoming more active. So I think it's a good time to support automatic
test generation for LoopCacheAnalysis.
This patch does two things. First, it changes LoopCachePrinterPass from
a loop pass to a function pass to make it possible to use
update_analyze_test_checks.py. Second, it rewrites all the CHECK
directives in the existing LoopCacheAnalysis tests using the script.
Commit: 6619aa70071db7d3a589fe50474e19c58dbca8f9
https://github.com/llvm/llvm-project/commit/6619aa70071db7d3a589fe50474e19c58dbca8f9
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
A llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
Log Message:
-----------
[AMDGPU] Use SchedModel latencies for Fence barrier edges (#204657)
For memory->fence dependencies, this PR sets the latency of the edge to
the instr latency of the predecessor memory instruction.
During lowering of these fences, we insert the necessary waitcnts, and
we end up waiting for any outstanding memory op at these fences. Thus,
the latency of the edges should be based on latency of the associated
load/stores.
Commit: b9c334de33a9a0b5713b191f214de8c3c8990507
https://github.com/llvm/llvm-project/commit/b9c334de33a9a0b5713b191f214de8c3c8990507
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/insertvalue-reordered-operands.ll
Log Message:
-----------
[SLP] Fix scheduling crash for reordered insertvalue buildvector nodes
Insertvalue nodes keep scalars in program order but reorder operands, like
stores. Remap the operand lane via ReorderIndices for InsertValueInst (not
just StoreInst) in scheduling and the copyable helpers, fixing the
"Operand not found" assertion.
Fixes https://github.com/llvm/llvm-project/pull/200274#issuecomment-4753792761
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/204941
Commit: cb85dfeb3275dce8f00ab7bf18f6ef3734222069
https://github.com/llvm/llvm-project/commit/cb85dfeb3275dce8f00ab7bf18f6ef3734222069
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
A llvm/test/Transforms/LoopVectorize/shl-shift-amount-out-of-range-scev.ll
Log Message:
-----------
[VPlan] Skip shl->mul SCEV rewrite for out-of-range shift amounts. (#204921)
getSCEVExprForVPValue rewrites `shl x, c` as `x * (1 << c)` using
ScalarEvolution::getPowerOfTwo, which asserts that the power is less
than the type's bit width.
Only perform the rewrite when the shift amount is less than the
operand's bit width, to avoid assertion.
Commit: 18c1cbce6874a7341f357014befb66d4c11a04a9
https://github.com/llvm/llvm-project/commit/18c1cbce6874a7341f357014befb66d4c11a04a9
Author: Sungbin Jo <goranmoomin at daum.net>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
A llvm/test/tools/llvm-objcopy/MachO/linkedit-alignment.test
M llvm/test/tools/llvm-objcopy/MachO/linkedit-order-1.test
M llvm/test/tools/llvm-objcopy/MachO/linkedit-order-2.test
M llvm/test/tools/llvm-objcopy/MachO/symbol-table.test
Log Message:
-----------
[llvm-objcopy][MachO] Align __LINKEDIT entries to pointer size (#203680)
Align Mach-O __LINKEDIT entries to the target pointer size when building
the tail layout. This matches the behavior of ld64 and lld-macho.
dyld on macOS 27 rejects loading dylibs with misaligned __LINKEDIT
entries.
See #203678 for details and the motivation of this fix.
AI Tool Use Disclosure:
Regarding the PR and the linked issue, I have personally wrote every
single part of the PR by myself, and have/ran/verified every single part
of the issue report as well without any AI tool usage.
I have used LLM-based coding agents only for debugging purposes, e.g. to
figure out why the dylib was not loading (from the original bug report),
and figuring out how to build, run, and test my local `llvm-objcopy`.
Commit: a891d7b38b31fd7e229f88c2555184713935ea60
https://github.com/llvm/llvm-project/commit/a891d7b38b31fd7e229f88c2555184713935ea60
Author: Daniel Rodríguez Troitiño <danielrodriguez at meta.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.h
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
Log Message:
-----------
[llvm-objcopy][MachO] Use alignToPowerOf2 instead of alignTo (#204033)
During the review of #203680 I noticed that Mach-O objcopy files seems
to use `alignTo` and import `Alignment.h` to align some offsets to page
boundaries and similar requirements. However, the `alignTo` in
`Alignment.h`, while being intended for powers of 2, requires using an
alignment of type `llvm::Align`, and needs explicit conversion from
`uint64_t` and similar. Single `Alignment.h` includes `MathExtras.h`,
the `alignTo` being invoked ends up being a generic `alignTo` that does
not require powers of 2, and perform divisions and multiplications.
While some of those might be optimized by the compiler into efficient
power of 2 operations, there's an explicit `alignToPowerOf2` version
that is optimized and asserts the alignment is a power of 2 (with
asserts enabled). Since all the alignments should be power of 2 for the
Mach-O binary format, change from `alignTo` to `alignToPowerOf2` to make
the fact more visible (and get the extra safety net of the assertions).
As expected, the test suite of objcopy doesn't show any regressions, but
I have not done a performance benchmark around this either.
Commit: d0c27761d4f1e25d1ab4b672d23bc7e46f517bcd
https://github.com/llvm/llvm-project/commit/d0c27761d4f1e25d1ab4b672d23bc7e46f517bcd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/test/Analysis/BasicAA/phi-aa.ll
M llvm/test/Analysis/BasicAA/phi-and-select.ll
M llvm/test/Analysis/BasicAA/recphi.ll
Log Message:
-----------
[BasicAA] Add additional tests with GEPs with phi/select pointer ops (NFC) (#204947)
Commit: 5502491546363465ef2b58dbf5821a67a3be6164
https://github.com/llvm/llvm-project/commit/5502491546363465ef2b58dbf5821a67a3be6164
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
Log Message:
-----------
[VPlan] Properly check predicates and types in canNarrowOps. (#204948)
Update canNarrowOps to properly check the types of all members match.
Similarly, for recipes with predicates, the predicates must match.
Commit: 3c5f0c2d3e00a22a275f404bac29ce62c69d95d5
https://github.com/llvm/llvm-project/commit/3c5f0c2d3e00a22a275f404bac29ce62c69d95d5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
Log Message:
-----------
[VPlan] Add memory op decision test for scalarizing loads. (NFC) (#204949)
VPlan printing tests for
https://github.com/llvm/llvm-project/pull/196842
Commit: 959f069f442d75dd7c365cb608140693e834b93e
https://github.com/llvm/llvm-project/commit/959f069f442d75dd7c365cb608140693e834b93e
Author: jofrn <jo7frn1 at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/X86/atomic-load-store.ll
Log Message:
-----------
[SelectionDAG] Keep split vector atomic store value in a vector register (#201566)
When the value of an ATOMIC_STORE has a vector type whose legalization
action is split (e.g. <4 x half>/<4 x bfloat> on X86 without F16C),
SplitVecOp_ATOMIC_STORE bitcast the value straight to a scalar integer
spanning the memory width. For a split vector that bitcast is expanded
element by element, reassembling the value in GPRs (a long pextrw/shl/or
sequence) before the store.
Instead, keep the value in a vector register when a legal vector form
exists: reinterpret it as a same-shaped integer-element vector (an FP
element type may have no legal vector form, e.g. bfloat on SSE2, while
the integer-of-element-size form does), widen that to a legal vector,
and extract the low integer element of the memory width. This issues the
store directly from a vector register (a single MOVQ/MOVD on X86),
matching the widen-path codegen already produced on AVX targets. Falls
back to the scalar bitcast when no suitable legal vector type exists.
Stacked on top of https://github.com/llvm/llvm-project/pull/197861; and
below of #197862.
Commit: 61d601e796beef1b891ca437dd3167fbabad4451
https://github.com/llvm/llvm-project/commit/61d601e796beef1b891ca437dd3167fbabad4451
Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
Log Message:
-----------
[AMDGPU][VOPD] Cache load reachability checks in VOPDpairing (#204854)
#201930 causes significant compilation time regression when building
ROCm mathlibs.
Major regressions are caused by repeated queries to `DAG->IsReachable`
to detect possible scalarisation of loads when fusing a pair of
VOPD-capable instructions.
This patch caches the set of reachable loads for every potentially
hazardous load instruction to avoid the need to invoke
`DAG->IsReachable` at all.
Commit: afac572cd4c58b02ebe9a72c04f63a91dccc7901
https://github.com/llvm/llvm-project/commit/afac572cd4c58b02ebe9a72c04f63a91dccc7901
Author: owenca <owenpiano at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M clang/test/CMakeLists.txt
Log Message:
-----------
[clang] Add clang-format-check-format instead to CLANG_TEST_DEPS (#204908)
Ensure that clang-format doesn't break the existing format of its own
source.
Reverts #199169 and #199638.
Commit: ec56065709fe771c90da191f107126ac71bc09ad
https://github.com/llvm/llvm-project/commit/ec56065709fe771c90da191f107126ac71bc09ad
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M .github/workflows/new-prs.yml
Log Message:
-----------
workflows/new-prs: Remove obsolete code (#204955)
This was left over after 57e4352de0d2617bae1656dc2e2b3ca430e83c4c and
causing the jobs to fail.
Commit: 9d6c686a8a77e8c5ff9b42803c1bf07bcc1b66b3
https://github.com/llvm/llvm-project/commit/9d6c686a8a77e8c5ff9b42803c1bf07bcc1b66b3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/Session.h
M orc-rt/lib/executor/Session.cpp
Log Message:
-----------
[orc-rt] Sink Session::sendWrapperResult into Session.cpp. NFC. (#204956)
This function is never called inline (except by Session::wrapperReturn,
which is also in Session.cpp), so there's no need for it to be in the
header.
Commit: 7376a706150289cf60fb3648e75e909ab6e86f68
https://github.com/llvm/llvm-project/commit/7376a706150289cf60fb3648e75e909ab6e86f68
Author: Tamir Duberstein <tamird at gmail.com>
Date: 2026-06-20 (Sat, 20 Jun 2026)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_platform.h
Log Message:
-----------
[tsan] fit Go/s390x mapping under QEMU (#204503)
QEMU linux-user first tries guest_base=0. In that identity-mapped mode,
fixed guest mappings use the same host addresses. On an x86-64 host
with four-level page tables, the Go/s390x meta shadow starts at
144 TiB, beyond the 128 TiB userspace limit, and its mmap fails with
ENOMEM during TSan initialization.
Move the meta shadow down by 32 TiB to
[0x700000000000, 0x780000000000), restoring the 16 TiB gap after the
shadow and placing all Go/s390x TSan regions below 2^47. Correct the
mapping comment's shadow size and ratio.
Failure report and native s390x comparison:
https://github.com/golang/go/issues/67881
QEMU identity guest-base selection:
https://github.com/qemu/qemu/blob/v10.2.3/linux-user/elfload.c#L1036-L1042
QEMU guest-to-host address translation:
https://github.com/qemu/qemu/blob/v10.2.3/include/user/guest-host.h#L46-L50
QEMU fixed-mapping implementation:
https://github.com/qemu/qemu/blob/v10.2.3/linux-user/mmap.c#L600-L628
x86-64 four-level paging documentation:
https://docs.kernel.org/arch/x86/x86_64/5level-paging.html
Commit: f42072ed8de552ce25b7a978c052acca6ab13246
https://github.com/llvm/llvm-project/commit/f42072ed8de552ce25b7a978c052acca6ab13246
Author: Jan Schultke <me at eisenwave.net>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/KnownBits.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Support/KnownBits.cpp
A llvm/test/Analysis/ValueTracking/knownbits-pdep.ll
A llvm/test/Analysis/ValueTracking/knownbits-pext.ll
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[Analysis] Add `KnownBits` optimization for `pdep` and `pext` (#204223)
Fixes #204136
Commit: 8947e494f92e37d036ec22b79464368292eae177
https://github.com/llvm/llvm-project/commit/8947e494f92e37d036ec22b79464368292eae177
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Move alignment assumptions to the base of constant offset GEPs (#204602)
Commit: 71c2feb30426af725dd93297b9dccc18f8210a0e
https://github.com/llvm/llvm-project/commit/71c2feb30426af725dd93297b9dccc18f8210a0e
Author: shivaramaarao <58245296+shivaramaarao at users.noreply.github.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M flang/test/Integration/split-lto-unit-2.f90
Log Message:
-----------
Support for -fsplit-lto-unit option in flang driver (#204904)
Fix for buildbot failures in #202858
This commit fixes a regression introduced in commit
12aefe26cedd9a8f94546cc1f2be285cfddcc861 (Support for -fsplit-lto-unit
option in flang driver). When the compiler is built only for aarch64 one
of the testcase failed.
Added explicit check %if x86-registered-target for this testcase to
resolve the issue.
Commit: 441725611d0e166a144ac85665bf0ac3611851de
https://github.com/llvm/llvm-project/commit/441725611d0e166a144ac85665bf0ac3611851de
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/vplan-native-outer-loop-wide-type.ll
Log Message:
-----------
[LV] Avoid zero-width VF in computeVPlanOuterloopVF. (#204918)
RegSize / WidestType may be 0 for types wider than the vector register
size. Clamp VF to at least 1 (scalar), to avoid a crash. This matches
inner loop behavior.
Commit: 9b36e4fbc789201228ca9b40524996e13959505a
https://github.com/llvm/llvm-project/commit/9b36e4fbc789201228ca9b40524996e13959505a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/QueueingRunner.h
R orc-rt/include/orc-rt/QueueingTaskDispatcher.h
M orc-rt/include/orc-rt/Session.h
R orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolRunner.h
R orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
M orc-rt/lib/executor/CMakeLists.txt
R orc-rt/lib/executor/QueueingTaskDispatcher.cpp
M orc-rt/lib/executor/Session.cpp
R orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolRunner.cpp
R orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/BootstrapInfoTest.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/CommonTestUtils.h
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
A orc-rt/unittests/QueueingRunnerTest.cpp
R orc-rt/unittests/QueueingTaskDispatcherTest.cpp
M orc-rt/unittests/SessionTest.cpp
M orc-rt/unittests/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/unittests/SimpleNativeMemoryMapTest.cpp
A orc-rt/unittests/ThreadPoolRunnerTest.cpp
R orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
Log Message:
-----------
[orc-rt] Replace TaskDispatcher with Session-supplied wrapper-runner. (#204965)
TaskDispatcher was only used to run wrapper-function calls that
originated from the controller. Replace it with a callable type:
Session::RunWrapperCall = move_only_function<void(
orc_rt_SessionRef, uint64_t, orc_rt_WrapperFunctionReturn,
orc_rt_WrapperFunction, WrapperFunctionBuffer)>
Each call carries an outstanding ManagedCodeTaskGroup token; the runner
must eventually invoke Fn (which calls Return) or call Return directly
to bail out, otherwise Session shutdown blocks indefinitely.
Clients can supply any callable that satisfies the contract above. The
new QueueingRunner and ThreadPoolRunner classes (replacing
QueueingTaskDispatcher and ThreadPoolTaskDispatcher, respectively) are
provided as off-the-shelf options.
Commit: a12b7af17a70f810ac3abe906b42930307efdaf0
https://github.com/llvm/llvm-project/commit/a12b7af17a70f810ac3abe906b42930307efdaf0
Author: Harishankar.1 <88716735+Harishankar14 at users.noreply.github.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/test/CodeGen/X86/bmi.ll
Log Message:
-----------
[X86] Select BLSI for i8 operands (#202344) (#204746)
Adds a tablegen pattern to select BLSI 32 for `and (neg x), x` at i8.
Fixes #202344
Commit: e0cc08dc1121126392df2b832ee060a60cca6dc3
https://github.com/llvm/llvm-project/commit/e0cc08dc1121126392df2b832ee060a60cca6dc3
Author: Akash Deo <AkashDeo2025 at u.Northwestern.edu>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Headers/avx512vlvnniintrin.h
M clang/lib/Headers/avx512vnniintrin.h
M clang/lib/Headers/avxvnniintrin.h
M clang/test/CodeGen/X86/avx512vlvnni-builtins.c
M clang/test/CodeGen/X86/avx512vnni-builtins.c
M clang/test/CodeGen/X86/avxvnni-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for VNNI intrinsics (#190549)
Fixes #161340.
It adds constexpr support for VNNI
intrinsics by modifying their header files, their TableGen definitions,
how they're interpreted in InterpBuiltin.cpp and ExprConstant.cpp, and
adds unit tests in the headers' corresponding unit test files.
Commit: 4f3eb803343711c69e287da8a3272ab9449b53a9
https://github.com/llvm/llvm-project/commit/4f3eb803343711c69e287da8a3272ab9449b53a9
Author: Kern Handa <kernhanda at users.noreply.github.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
Log Message:
-----------
[Xtensa] Call isUInt<8> in range-check asserts (#204731)
`printOffset8m8_AsmOperand` and `getSelect_256OpValue` assert on
`isUInt<8>` without calling it, so the expression takes the function's
address and the range check never runs. This also trips
`-Werror,-Wpointer-bool-conversion` in builds with assertions enabled.
Pass the operand value so the bound is actually checked.
Commit: 3b46feb29499a3a43a166b36ce59bb6d49ec6682
https://github.com/llvm/llvm-project/commit/3b46feb29499a3a43a166b36ce59bb6d49ec6682
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-tail-folding.ll
Log Message:
-----------
[VPlan] Allow plain active lane mask in LastActiveLane verifier. (#204982)
Active lane masks are prefix masks. After simplifying the backedge, we
may end up with an active-lane-mask operand of LastActiveLane that does
not match the header mask predicate.
This fixes a verifier failure for the new test.
Commit: d6d4921b71e66540bcf582e41b202d533fbfe762
https://github.com/llvm/llvm-project/commit/d6d4921b71e66540bcf582e41b202d533fbfe762
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/utils/gn/build/write_cmake_config.gni
M llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
Log Message:
-----------
[gn] Fix missing dependency (#204991)
This fixes an oversight in 27d344d36ecac364.
Commit: 6542d6dec0110452ede41f58938b4225f2d92a98
https://github.com/llvm/llvm-project/commit/6542d6dec0110452ede41f58938b4225f2d92a98
Author: David Green <david.green at arm.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
Log Message:
-----------
[ARM] Use lo tCMPr opcode when expanding CMP_SWAP (#204567)
We were always generating the tCMPhir even when the registers were both
low, which is an unpredictable instruction. Generating tCMPr instead
when both the registers are low.
Fixes #204519.
Commit: 48c0a2a551bc0116298a28e67c368b052469641d
https://github.com/llvm/llvm-project/commit/48c0a2a551bc0116298a28e67c368b052469641d
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/ucmp.ll
Log Message:
-----------
Revert "[Legalizer] Add support for promoting integers for s/ucmp (#198554) (#204978)
This reverts commit 91edd87a801fc5c9d12c7f5c6863edd50327cef8.
It was causing CI failures for Linux.
Commit: 47fd9ed9e958bf6df1d2fdaa50f70501271f27af
https://github.com/llvm/llvm-project/commit/47fd9ed9e958bf6df1d2fdaa50f70501271f27af
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port 60a2d437bd04 (#204996)
Commit: d3b48ccccb3a826515e8bc0def3c9fa3b24880a2
https://github.com/llvm/llvm-project/commit/d3b48ccccb3a826515e8bc0def3c9fa3b24880a2
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port a64928f267f3 (#204997)
Commit: a3230900a8809a45ac3952af186cf03d87183cfb
https://github.com/llvm/llvm-project/commit/a3230900a8809a45ac3952af186cf03d87183cfb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
Log Message:
-----------
[VPlan] Add VPReplicateRecipe::getNumOperandsWithoutMask (NFC) (#205004)
Add a getNumOperandsWithoutMask helper to VPReplicateRecipe, mirroring
the existing VPInstruction::getNumOperandsWithoutMask, and use it to
replace some hand-rolled code.
Commit: 5bb5410d5b6d289a0a402ed4de052eb86e8bce5f
https://github.com/llvm/llvm-project/commit/5bb5410d5b6d289a0a402ed4de052eb86e8bce5f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
Log Message:
-----------
[VPlan] Use pattern matching in isUsedByLoadStoreAddress (NFC) (#205008)
Replace the hand-written check for a VPReplicateRecipe load/store using
the value as its address with VPlan pattern matching via
m_Unary/m_Binary, which also handle masked recipes uniformly.
Commit: d1744cf76fbea0c407c5e793a380ffca4e5829be
https://github.com/llvm/llvm-project/commit/d1744cf76fbea0c407c5e793a380ffca4e5829be
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/InProcessControllerAccess.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/InProcessControllerAccess.cpp
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/InProcessControllerAccessTest.cpp
Log Message:
-----------
[orc-rt] Add InProcessControllerAccess class. (#204976)
Adds a Session::ControllerAccess implementation for in-process JIT
setups, where the controller (LLVM-side) and the executor (orc-rt) live
in the same address space.
The two sides communicate through a refcounted C-ABI struct (Connection)
of function pointers. The C-only interface avoids assuming a common C++
ABI between the two sides and supports symmetric, graceful disconnect:
when either side calls Connection::Disconnect, in-flight cross-calls are
drained and pending continuations are surfaced as out-of-band errors,
after which further cross-calls fail cleanly.
This is intended to be paired with a new ExecutorProcessControl
implementation (llvm::orc::InProcessEPC) on the LLVM side, landing in a
follow-up commit. Unit tests are included covering construction without
connect, attach via Session, OnConnect-failure detach, successful and
out-of-band-error call cases, and the disconnect-drains-pending
behavior.
Commit: 2e87cf8c2b8ec6453ccfa7e448d5b33f1d71a2ca
https://github.com/llvm/llvm-project/commit/2e87cf8c2b8ec6453ccfa7e448d5b33f1d71a2ca
Author: jofrn <jo7frn1 at gmail.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/ARM/atomic-load-store.ll
M llvm/test/CodeGen/X86/atomic-load-store.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
Log Message:
-----------
[AtomicExpand] Add bitcasts when expanding store atomic vector (#197862)
AtomicExpand fails for aligned `store atomic <n x T>` because it
does not find a compatible library call. This change adds appropriate
ptrtoint + bitcast so that the call can be lowered, mirroring the
load-side handling.
Store-side counterpart to #148900. Stacked on top of
https://github.com/llvm/llvm-project/pull/201566.
Commit: bc047d40eb3a17451af586a973d6a0e5e4f0fd5c
https://github.com/llvm/llvm-project/commit/bc047d40eb3a17451af586a973d6a0e5e4f0fd5c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/ScopeExit.h
M orc-rt/lib/executor/AllocAction.cpp
M orc-rt/unittests/ScopeExitTest.cpp
Log Message:
-----------
[orc-rt]R Align scope-exit with LLVM (rename to scope_exit, use CTAD) (#205020)
This renames the orc_rt::detail::ScopeExitRunner class to
orc_rt::scope_exit and adds a class template argument deduction guide.
Commit: 75fbd791638e583eb5bf483906fb5a75b7ab18b0
https://github.com/llvm/llvm-project/commit/75fbd791638e583eb5bf483906fb5a75b7ab18b0
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lld/MachO/ICF.cpp
A lld/test/MachO/icf-safe-data-addrsig.s
Log Message:
-----------
[lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (#193125)
#188400 regressed data-section folding under --icf=safe{,_thunks}:
no-addrsig fallback, and over-broad compiler-emitted addrsig entries
covering data symbols, both caused markSymAsAddrSig to set keepUnique on
data sections, after which foldIdenticalSections refused to fold them.
ld64 coalesces __cfstring, __objc_classrefs and __objc_selrefs
unconditionally regardless of addrsig, so ignore keepUnique for them as
a workaround for the imprecise addrsig payload.
Commit: fc7bcd0ce864c631b7429f795249ea8cef6634a7
https://github.com/llvm/llvm-project/commit/fc7bcd0ce864c631b7429f795249ea8cef6634a7
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
Log Message:
-----------
[clang][RISCV] Handle VLS CC on unsupported primitive type in aggregate type (#203898)
We handled this for pure vector type before but missed the aggregate
types, this patch try to apply same mechanism on them where unsupported
vector types are converted to same size i8 vector types.
Commit: f571abab7c49a57cbb0fbaa6e5a0d65c39ab0c03
https://github.com/llvm/llvm-project/commit/f571abab7c49a57cbb0fbaa6e5a0d65c39ab0c03
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
M clang/test/Sema/sifive-xsfmm.c
Log Message:
-----------
[llvm][RISCV] Revise xsfmm intrinsic interface. (#201527)
This patch does 2 things:
1. Change matmul interface to use newly defined OFP8 RVV types.
2. change all of matmul overloaded interfaces to only keep only widen
information and eliminate types information.
Commit: b68b8232ff72535ca1bb43832029cbb480bcbf3f
https://github.com/llvm/llvm-project/commit/b68b8232ff72535ca1bb43832029cbb480bcbf3f
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/MC/Mips/mips64r6/invalid.s
Log Message:
-----------
[Mips] Fix Clang crashes when assembling MIPS64r6 LDPC with non-8-byte-aligned offset (#204320)
Fix #184959.
Commit: 72b891b75f85cd8be4ac125f36f1bc9a97c8e185
https://github.com/llvm/llvm-project/commit/72b891b75f85cd8be4ac125f36f1bc9a97c8e185
Author: Fan Mo <w007878 at hotmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/instantiate-member-template.cpp
Log Message:
-----------
[clang] Avoid assertion on invalid member template specialization (#201506)
fixes #201490
It would be possible to have `PrevClassTemplate == false` when `SS` was
invalid.
Since it is already invalid, it would be safe to skip
`setMemberSpecialization` for `NewTemplate`. When the qualified scope
specifier is invalid, Sema may have already diagnosed the declaration
and marked it invalid. In that case there may be no previous class
template declaration, so the assertion is too strong. Avoid marking the
new declaration as a member specialization unless the previous class
template exists.
Commit: 6f98573ebdd8fa826aa841f48e6ed7e671900ecc
https://github.com/llvm/llvm-project/commit/6f98573ebdd8fa826aa841f48e6ed7e671900ecc
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
R orc-rt/include/orc-rt/ScopeExit.h
A orc-rt/include/orc-rt/scope_exit.h
M orc-rt/lib/executor/AllocAction.cpp
M orc-rt/unittests/CMakeLists.txt
R orc-rt/unittests/ScopeExitTest.cpp
A orc-rt/unittests/scope_exit-test.cpp
Log Message:
-----------
[orc-rt] Rename scope_exit header, add nodiscard attribute. (#205030)
The rename brings the scope_exit type's header name into alignment with
other ORC runtime snake_case types.
The [[nodiscard]] attribute should help to prevent accidental misuse of
the type.
Commit: 6a2128a933cbeaccfbff2b81cd9ee2ed80e6071d
https://github.com/llvm/llvm-project/commit/6a2128a933cbeaccfbff2b81cd9ee2ed80e6071d
Author: Kazu Hirata <kazu at google.com>
Date: 2026-06-21 (Sun, 21 Jun 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/lib/ProfileData/SampleProfReader.cpp
Log Message:
-----------
[ProfileData] Lazy-load fixed-length MD5 name table (#202014)
When reading extensible binary format profiles with fixed-length MD5
name tables, the reader eagerly allocates and populates a
std::vector<FunctionId> to store the name table. This eager loading
is particularly wasteful when ProfileIsCS is false, as we populate the
entire name table just to support lookups during profile ingestion,
even though we may only use a subset of the profile. Since FunctionId
is 16 bytes on 64-bit systems, a name table containing 10 million MD5
hash values would consume 160MB of heap memory.
This patch implements lazy loading for the name table in extensible
binary format profiles when the fixed-length MD5 layout is used.
Specifically, this patch introduces SampleProfileNameTable to
encapsulate the name table representation, supporting both lazy
loading (pointing directly to the memory-mapped buffer) and eager
loading (using a vector). Eager loading is retained as a fallback for
layouts that do not support O(1) random access (such as
variable-length string tables).
The reader transitions between these modes using setLazy and
resetToEager. The getNameTable interface is updated to return an
iterator_range of SampleProfileNameTable::iterator, which reads the
MD5 values directly from the buffer on-demand when lazy-loaded.
- Heap consumption: Saves 16 bytes of heap memory for each name table
entry by avoiding the std::vector allocation.
- Compilation performance: Saves about 4% on ThinLTO pre-link and 10%
on ThinLTO backend on shared and non-shared profiles.
Commit: 1092b2bad2edf9ee11a9d8e641a22f5b46922a4c
https://github.com/llvm/llvm-project/commit/1092b2bad2edf9ee11a9d8e641a22f5b46922a4c
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/AMDGPUAsyncOperations.rst
Log Message:
-----------
[AMDGPU] Improve the description of asyncmark semantics (#202579)
- The semantics of asyncmarks is now defined purely in terms of
sequences, without referring to the implementation.
- The examples incorrectly used (post)dominance. Fixed that with wording
in terms of asyncmark sequences.
Commit: 9f0b22c61153e8390e3eed74e4a9cf1160bd71fe
https://github.com/llvm/llvm-project/commit/9f0b22c61153e8390e3eed74e4a9cf1160bd71fe
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/float-convert.ll
Log Message:
-----------
[LoongArch] Custom scalar UINT_TO_FP and FP_TO_UINT with LSX instructions (#200901)
Using `vftintrz.lu.d` for converting scalar double/float values to
unsigned 64-bit integers, and `vffint.d.lu` vice versa.
Commit: de045d579791d978cce109f9348d20560e112d74
https://github.com/llvm/llvm-project/commit/de045d579791d978cce109f9348d20560e112d74
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/SimplePackedSerialization.h
Log Message:
-----------
[orc-rt] Tidy up some SPS tag types. NFC. (#205038)
Replaces class definitions with decls for tag types that don't need a
body, and moves the SPSError tag down to just above it's
serialization-traits class.
Commit: 15a3238566e799e3dd0e473672307712be8528e6
https://github.com/llvm/llvm-project/commit/15a3238566e799e3dd0e473672307712be8528e6
Author: Weiwen He <60433849+he-weiwen at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/extend-bool-vector-load.ll
Log Message:
-----------
[AArch64] Lower extends of boolean vector loads via scalar load (#203394)
Replace a `load <N x i1>` under a sext/zext with a scalar load +
bitcast, so the `combineToExtendBoolVectorInReg` helper can apply,
avoiding scalarization.
Optimisation for the SVE case with a predicate load to be added in a
follow up.
Fixes #200325
Commit: 6d66cc1e0e953e996048e93a9fa3e1c6b9a27642
https://github.com/llvm/llvm-project/commit/6d66cc1e0e953e996048e93a9fa3e1c6b9a27642
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/SimplePackedSerialization.h
M orc-rt/unittests/SimplePackedSerializationTest.cpp
Log Message:
-----------
[orc-rt] Add SPS serialization for ExecutorAddrRange. (#205041)
Allows SPS serialization to/from ExecutorAddrRange. This will be used in
upcoming patches for compact-unwind registration support.
Commit: 25e4057d49055a645dc6a51ae1f40ac647aaed5b
https://github.com/llvm/llvm-project/commit/25e4057d49055a645dc6a51ae1f40ac647aaed5b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/AST/ByteCode/command-line-options.cpp
Log Message:
-----------
[clang] Respect `CLANG_USE_EXPERIMENTAL_CONST_INTERP` (#200716)
Seems like https://github.com/llvm/llvm-project/pull/199396 had no
effect at all, even though the patch itself seems pretty obvious.
Change the semantics of the command-line option to support
`-fno-experimental-constant-interpreter` as well. This way, the cmake
option can be used to set the default and the `-f`/`-fno-` command-line
options can be used to override the default behavior.
Commit: 64ad10fcda6952b78b81075d93a31364337ef8f4
https://github.com/llvm/llvm-project/commit/64ad10fcda6952b78b81075d93a31364337ef8f4
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/AMDGPUExecutionSynchronization.rst
Log Message:
-----------
[AMDGPU][doc] Refactor Barrier Execution Model (#204566)
Remove everything that has to do with named barriers and put it in a
series of model extensions specific to /sbarrier/named-barriers.
I had to change a few things to make it fit, in summary:
Base Model:
- (~) Stylistic changes that make it easier to refer to specific rules.
Each rule is in a rubric instead of a bullet point.
- (-) No longer defines `barrier-mutually-exclusive`
- (-) No longer defines barrier `join` and any associated rule.
New named barrier extensions
- (+) Define "named barrier" as a sub-type of barrier objects. This
makes barrier-mutually-exclusive redundant.
- (+) Define barrier join as an op that can exclusively be done on
`named barrier objects`.
- (+) Define rules relating to join and its ordering with other barrier
operations
Following these changes, the target tables changed a bit as well.
Motive: Barrier _join_ + `barrier-mutually-exclusive` only ever makes
sense when considering named barriers in the ISA. They are an alien
concept to higher-level barrier abstractions.
_Join_ has especially been a pain to deal with and explain in the
general, high-level execution model. Kicking it down into an extension
allows to keep the base model much more concise. As the model extension
is defined w.r.t. the ISA, it's an appropriate place to surface
ISA-specific restrictions. For example we don't need to dance around the
concept of "each thread is a member of at most one named barrier" with
`barrier-mutually-exclusive`. We can just say it straight away when
describing the behavior of _join_ in the model extension.
Commit: ff0e4f0830f7913a3c66b28cafcc7dae2a6e10d6
https://github.com/llvm/llvm-project/commit/ff0e4f0830f7913a3c66b28cafcc7dae2a6e10d6
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64][NFC] Refactor duplicate code into getCmpOrCmnOperandFoldingProfit (#198981)
Commit: 5492d06d4fb99795b3b7247be374cdcb47f5ac03
https://github.com/llvm/llvm-project/commit/5492d06d4fb99795b3b7247be374cdcb47f5ac03
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/CodeGen/VE/Scalar/atomic.ll
M llvm/test/CodeGen/VE/Scalar/atomic_cmp_swap.ll
M llvm/test/Transforms/IRCE/correct-loop-info.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/version-mem-access.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M polly/test/CodeGen/scop_expander_insert_point.ll
Log Message:
-----------
[IRBuilder] (Target|InstSimplify)-fold intrinsics (#204967)
Includes changes to guard against a nullptr TLI and Call. TargetFold or
InstSimplify fold in IRBuilderBase::CreateIntrinsic, in the same way we
fold in Create(Unary|Binary)Intrinsic.
Commit: 5951daf0f0cf67a0c75ced322c88aef86c9349de
https://github.com/llvm/llvm-project/commit/5951daf0f0cf67a0c75ced322c88aef86c9349de
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/narrow-interleave-groups-scalable-vf.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar-widen-gep-scalable.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/vector-freeze.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
Log Message:
-----------
[LV] Allow scalable VFs in `-force-vector-width` (and use in tests) (#204953)
This updates `-force-vector-width=VF` to accept scalable VFs. If a
scalable width is specified it is assumed the target supports scalable
vectors.
So for example, `-force-vector-width="vscale x 4"` works as a shorthand
for `-scalable-vectorization=always -force-target-supports-scalable-vectors=true -force-vector-width=4`.
Commit: e4df7391e49f0d1188d544f22db265ba9c30da3e
https://github.com/llvm/llvm-project/commit/e4df7391e49f0d1188d544f22db265ba9c30da3e
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
Log Message:
-----------
[AMDGPU] Remove stale declarations. NFC. (#205047)
Remove declarations of functions that are never defined. Also remove
unused field AMDGPUInstructionSelector::TM.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 0972d5c5c11a5dfd8c6a60ef018129157522e139
https://github.com/llvm/llvm-project/commit/0972d5c5c11a5dfd8c6a60ef018129157522e139
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/AST/Decl.h
Log Message:
-----------
[clang][NFC] Add LLVM_PREFERRED_TYPE to EvaluatedStmt bitfields (#205026)
Commit: 6be53ab5da701ca6939c818fbe8cdbb633ab2409
https://github.com/llvm/llvm-project/commit/6be53ab5da701ca6939c818fbe8cdbb633ab2409
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/pr204118.mir
A llvm/test/CodeGen/AArch64/pr204118.ll
Log Message:
-----------
[AArch64][GISel] Remove hard-coded operand index from FCVT renderers (#204118)
Commit: 6daa02101815f4b2a6851fba8d8bedbfffd1e72c
https://github.com/llvm/llvm-project/commit/6daa02101815f4b2a6851fba8d8bedbfffd1e72c
Author: Luke Hutton <luke.hutton at arm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Check same input/output types in pooling ops verifier (#203565)
Adds a missing check to make sure the input and output types of pooling
ops have the same element type.
Commit: b0bf2c796915821d8bda7d136fe4eec62603454f
https://github.com/llvm/llvm-project/commit/b0bf2c796915821d8bda7d136fe4eec62603454f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/docs/ConstantInterpreter.rst
Log Message:
-----------
[clang][bytecode] Update high-level documentation (#202596)
Commit: 3aeb6c1f3322b57fe102b7c87d8fd17f87454195
https://github.com/llvm/llvm-project/commit/3aeb6c1f3322b57fe102b7c87d8fd17f87454195
Author: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
Log Message:
-----------
[mlir][spirv] Re-enable bf16/fp8 for vector composite ops (#204848)
Allow bf16 and fp8 vector element types in VectorExtractDynamic,
VectorInsertDynamic, and VectorShuffle.
Commit: b5dfea08588fc64b0ce5cea685b275ed3de400de
https://github.com/llvm/llvm-project/commit/b5dfea08588fc64b0ce5cea685b275ed3de400de
Author: Deepak Shirke <117824396+deepakshirkem at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMRegisterInfo.td
A llvm/test/CodeGen/ARM/machine-outliner-thunk-tcgpr.mir
Log Message:
-----------
[ARM] Fix Machine Outliner crash when tBLXr uses non-tcGPR register (#200684)
When the Machine Outliner selects MachineOutlinerThunk mode for a
sequence ending in tBLXr/tBLXr_noip, it converts the indirect call to
tTAILJMPr in buildOutlinedFrame. However tTAILJMPr requires its operand
to be in tcGPR (R0-R3, R12), while tBLXr accepts any GPR.
If the register is callee-saved (e.g. r4), the Machine Verifier crashes
with 'Illegal physical register for instruction'.
Fixes #188076
Commit: 0b1fe74f079fd330e4d4d85ce33b7f5702da1be7
https://github.com/llvm/llvm-project/commit/0b1fe74f079fd330e4d4d85ce33b7f5702da1be7
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/UnstructuredControlFlow.h
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Arith/one-shot-bufferize-memory-space-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/test-one-shot-module-bufferize.mlir
M mlir/test/Dialect/ControlFlow/one-shot-bufferize-invalid.mlir
M mlir/test/Dialect/SCF/one-shot-bufferize-invalid.mlir
M mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][bufferization] Introduce reconcileBufferTypeMismatchFn hook (#202667)
This PR is the first part of the work that aims to allow customizations
in resolving mismatching buffer types.
Add a new bufferization hook that lets downstream bufferization
implementations define how to handle buffer mismatches that appear
during type inference in various upstream scenarios.
The hook is used as a fallback mechanism in several upstream operations.
For example, when bufferizing block signatures (scf.execute_region), and
resolving "branch" conflicts (scf.if, scfl.index_switch, scf.for,
arith.select).
The hook returns a valid buffer type when reconciliation succeeded;
failure indicates reconciliation failure and should be treated as
bufferization failure. The caller of the hook is expected to use the
returned buffer type. By default, a memref with fully-dynamic layout map
is returned (for unranked case, buffers are assumed to match).
---------
Co-authored-by: Dmitrii Makarenko <dmitrii.makarenko at intel.com>
Commit: 75440ed24c4e656cef53f0d2419a885eb7c908f7
https://github.com/llvm/llvm-project/commit/75440ed24c4e656cef53f0d2419a885eb7c908f7
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-mca/AArch64/Cortex/A55-in-order-bottleneck-analysis.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-direct-branch.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-shifted-register.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/direct-branch.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/in-order-bottleneck-analysis.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/shifted-register.s
Log Message:
-----------
[NFC][AArch64][MCA] Rename A55/A57 mca tests (#204551)
Rename several llvm-mca tests for cortex-a55 and cortex-a57 to follow
the same pattern as the other testss
Commit: 9e8615f5268a4aa0298d615e6c79391174dcc8da
https://github.com/llvm/llvm-project/commit/9e8615f5268a4aa0298d615e6c79391174dcc8da
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/ConvertUTF.h
M llvm/lib/Support/ConvertUTFWrapper.cpp
Log Message:
-----------
[NFC][llvm] simplify convertWideToUTF8 overloads (#204552)
Remove the C-String overload of `convertWideToUTF8` and convert the
`ArrayRef` one to use `std::wstring_view` in order to simplify the API.
Commit: 283514b070fd2ae647f56cf046ea74be15a887b1
https://github.com/llvm/llvm-project/commit/283514b070fd2ae647f56cf046ea74be15a887b1
Author: jpwang <jpwang at smail.nju.edu.cn>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
R llvm/test/tools/llvm-objcopy/ELF/compress-debug-sections-zstd-err.test
M llvm/test/tools/llvm-objcopy/ELF/compress-sections-within-segment.s
A llvm/test/tools/llvm-objcopy/ELF/compress-sections-zlib-unsupported.test
A llvm/test/tools/llvm-objcopy/ELF/compress-sections-zstd-unsupported.test
R llvm/test/tools/llvm-objcopy/ELF/decompress-debug-sections-unsupported-zlib.test
A llvm/test/tools/llvm-objcopy/ELF/decompress-sections-unsupported-zlib.test
A llvm/test/tools/llvm-objcopy/ELF/decompress-sections-unsupported-zstd.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
Log Message:
-----------
[llvm-objcopy] Report unsupported formats before compression (#202357)
Fixes #197877.
`llvm-objcopy --compress-sections` now reports unavailable compression
support while parsing the option, matching the behavior of
`--compress-debug-sections`. This avoids reaching compression code with
an unavailable format.
Decompression (either via `--decompress-debug-sections` or
`--compress-sections` with a `none` format) is still checked when the
relevant compressed section is processed, because the required
compression format is determined from the section header rather than
from the command-line option.
The `compress-sections-within-segment` test now requires zlib because
`--compress-sections .text=zlib` is diagnosed during option parsing when
zlib support is unavailable, before the test can reach the intended
"section within a segment" diagnostic.
Commit: 00086d64086043269c3ed1c15dc08f5b6d517292
https://github.com/llvm/llvm-project/commit/00086d64086043269c3ed1c15dc08f5b6d517292
Author: sipher <110331483+sipher-01 at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/test/Sema/LifetimeSafety/dangling-global.cpp
Log Message:
-----------
[LifetimeSafety] Add `LifetimeSafetyDanglingGlobalMoved` to strict diagnostic group (#204891)
Fixes #204213
`-Wlifetime-safety-dangling-global-moved` was defined but not included
in any parent diagnostic group, meaning `-Wlifetime-safety-all` and
`-Wno-lifetime-safety-all` had no effect on it.
`LifetimeSafetyDanglingGlobal` (the non-moved variant) was already
correctly placed under `LifetimeSafetyPermissive`. Following the same
pattern as the other `-moved` sibling warnings
(`DanglingFieldMoved`, `ReturnStackAddrMoved`, `UseAfterScopeMoved`),
this patch adds `LifetimeSafetyDanglingGlobalMoved` to
`LifetimeSafetyStrict`, which is part of the `lifetime-safety-all`
hierarchy.
Assisted-by: Claude (Anthropic) — used for learning and understanding
the codebase, not for generating code directly.
Commit: 192ef559fbfeeba2f9cc43252db3da1303e8f00b
https://github.com/llvm/llvm-project/commit/192ef559fbfeeba2f9cc43252db3da1303e8f00b
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
R llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
Log Message:
-----------
AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default (#203928)
AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default
Change AMDGPU's default -global-isel pipeline to use AMDGPURegBankSelect
and AMDGPURegBankLegalize (previously -global-isel -new-reg-bank-select)
by default instead of RegBankSelect which uses AMDGPURegisterBankInfo.
-global-isel pipeline that used RegBankSelect/AMDGPURegisterBankInfo is
now deprecated, since it could not generate functionally correct code in
some cases involving divergent control flow and phis.
-new-reg-bank-select option does nothing and will be removed in followup
patch.
Delete regbankselect-mui.ll and regbankselect-mui-salu-float.ll, which
existed to compare the -global-isel vs -global-isel -new-reg-bank-select.
Temporarily disable a couple of tests that are missing AMDGPURegBankLegalize
support.
Commit: a2289b7336a299c2a5d6c4fb8b6fc074297acf88
https://github.com/llvm/llvm-project/commit/a2289b7336a299c2a5d6c4fb8b6fc074297acf88
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
R lldb/test/API/macosx/deny-attach/Makefile
R lldb/test/API/macosx/deny-attach/TestDenyAttach.py
R lldb/test/API/macosx/deny-attach/main.c
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
Revert "[lldb] Survive ptrace(PT_DENY_ATTACH) when attaching" (#205075)
Reverts llvm/llvm-project#204688
This breaks green dragon where the error message is `error: attach
failed: this is a non-interactive debug session, cannot get permission
to debug processes.`
Commit: 05d84fd3f92355d7f4a0c90ac4fd4229f3e19133
https://github.com/llvm/llvm-project/commit/05d84fd3f92355d7f4a0c90ac4fd4229f3e19133
Author: Diana Picus <Diana-Magda.Picus at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
Log Message:
-----------
[AMDGPU] Run update script on test. NFC (#204570)
There's some bogus whitespace in the generated CHECKs that changes when
touching the test.
Commit: 2a1f306515b67036a44b16e569a9f26f57520c54
https://github.com/llvm/llvm-project/commit/2a1f306515b67036a44b16e569a9f26f57520c54
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/dynamic-cast.cpp
Log Message:
-----------
[clang][bytecode] Add more sanity checks for pointers used in `dynamic_cast` (#205070)
Make sure it's initialized and that it points to a record.
Commit: b95e1e890c025ab4eee3583b7b1e2497991145db
https://github.com/llvm/llvm-project/commit/b95e1e890c025ab4eee3583b7b1e2497991145db
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/Allocator.h
M llvm/unittests/Support/AllocatorTest.cpp
Log Message:
-----------
[Allocator] Keep bump pointer at a minimum alignment (#203718)
Add a `MinAlign` template parameter (default 8, sizeof(size_t) on 64-bit
platforms) so that the common case `Alignment <= MinAlign` can skip
realigning `CurPtr`.
This is achieved by rounding each allocation's size up to MinAlign, so
the bump pointer stays MinAlign-aligned between allocations.
SpecificBumpPtrAllocator::DestroyAll() walks objects at a fixed
sizeof(T) stride and needs tight packing, so it uses MinAlign=1. (alignof(T) would
pack just as tightly and reuse the default instantiation, but T may be
incomplete here, e.g. `SpecificBumpPtrAllocator<MCSectionELF>`.)
Its `Allocate` still skips the realign: the slab is max_align_t-aligned
and every size is a multiple of alignof(T), so the bump pointer stays
alignof(T)-aligned and we can just request alignment 1. Over-aligned
types (alignof(T) > alignof(max_align_t)) keep requesting alignof(T).
Also use `bit_ceil` instead of `NextPowerOf2` in the placement operator
new alignment heuristic. NextPowerOf2 is strictly greater, so an 8-byte
pointer-sized object asked for alignment 16 and missed the fast path;
bit_ceil(8) == 8 keeps it on the fast path.
Aided by Claude Opus 4.8
Commit: c56e892f5c520b4474158837d7968e5c8dc3e4c1
https://github.com/llvm/llvm-project/commit/c56e892f5c520b4474158837d7968e5c8dc3e4c1
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-add-sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/br-constant-invalid-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-byte-short.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug_shuffle_vector_to_scalar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combiner-crash.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value-addrspaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.live.mask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mul24.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.integer-minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.strictwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.subdword.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-divergent-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-uniform-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
M llvm/test/CodeGen/AMDGPU/allow-check.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination-gfx12.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-v2f32.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpenv.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invariant-image-load.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.add.min.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-agent.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-singlethread.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-system.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-wavefront.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.off.f32.i4.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk8.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.push.pop.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add-errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx10.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.gfx11.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.flat.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.prefetch.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.groupstaticsize.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.flt.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.u24.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.bcast.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.down.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.idx.gen.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.up.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
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M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-sign-bits.ll
M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
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M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
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M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/sgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
M llvm/test/CodeGen/AMDGPU/stackguard.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.invalid.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/unaligned-buffer.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
M llvm/test/CodeGen/AMDGPU/write-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
Log Message:
-----------
AMDGPU/GlobalISel: Remove -new-reg-bank-select option (#203929)
AMDGPU's -global-isel pipeline that uses AMDGPURegBankSelect and
AMDGPURegBankLegalize, previously -global-isel -new-reg-bank-select,
is now the default -global-isel pipeline.
Remove -new-reg-bank-select option from the compiler.
Remove -new-reg-bank-select from all llvm regression tests.
Edit a couple comments to reference RegBankLegalize instead of
-new-reg-bank-select.
Commit: f3fb6fe3099887ce1538c1dbbe3694f740f9f126
https://github.com/llvm/llvm-project/commit/f3fb6fe3099887ce1538c1dbbe3694f740f9f126
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check for block pointers in Free() (#205043)
We need a block pointer here for the following operations, and non-block
pointers aren't valid anyway.
Commit: 4fd464061536f1bb7d12ee9524712d202c2b4488
https://github.com/llvm/llvm-project/commit/4fd464061536f1bb7d12ee9524712d202c2b4488
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Analysis/DependenceAnalysis.cpp
A llvm/test/Analysis/DependenceAnalysis/find-gcd-overflow.ll
Log Message:
-----------
[DA] Add overflow check before calculating absolute value (#201964)
In findGCD, we call APInt::abs, which can overflow when the value is a
signed minimum one. Such overflow can lead miscompilation, so this patch
adds an overflow check for absolute value calculations and bail out
early if it actually overflows.
Fix #201559.
Commit: 8b723503336f094afb92f00cb73378321914f6cf
https://github.com/llvm/llvm-project/commit/8b723503336f094afb92f00cb73378321914f6cf
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
Log Message:
-----------
[NFC][analyzer] Eliminate some simple node builders (#204187)
Replace four `NodeBuilder`s with direct use of the `makeNode` method
family. This is part of my commit series that simplifies the engine by
gradually eliminating the class `NodeBuilder`.
Commit: b6a0f6c79fee527a5ef2826e30949cd8f27db889
https://github.com/llvm/llvm-project/commit/b6a0f6c79fee527a5ef2826e30949cd8f27db889
Author: Jiaqi He <heturing at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
Log Message:
-----------
[LifetimeSafety] resolved lifetimeBound violation in constructor (#204797)
Fix https://github.com/llvm/llvm-project/issues/203839.
Constructor body does not produce `ReturnEscapeFact`, but a constructor
parameter marked [[clang::lifetimebound]] may still be valid if it
escapes into a field of the constructed object.
Update the `LifetimeBound` logic to accept `FieldEscapeFact` for
constructors, and add a test case for this pattern.
Commit: b3022110d84dabf5ddbbecd7db4e943791d5320c
https://github.com/llvm/llvm-project/commit/b3022110d84dabf5ddbbecd7db4e943791d5320c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
Log Message:
-----------
clang/AMDGPU: Use effective triple instead of raw toolchain triple (#205054)
Start using the effective triple instead of the raw toolchain triple.
For the moment this is NFC, but will change when new uses of the subarch
field are introduced.
Commit: c5f4abf97938cc1d4615baf1f45bef4e38e0dd91
https://github.com/llvm/llvm-project/commit/c5f4abf97938cc1d4615baf1f45bef4e38e0dd91
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/revec-ordered-reductions.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP][Revec] Fix SLP crash when trying to fold trailing scalars into the reduced value (#203477)
Cost modelling change introduced by commit SHA f15666d is enabling revec
of test shown in the above issue. This is introducing a crash as the
reduced value(a scalar) is being added to a vector tail value.
Patch tries to address this.
Fixes #203195
Commit: f8cb6be61b995fc64d696c42fdb3eb88d2ed3a9e
https://github.com/llvm/llvm-project/commit/f8cb6be61b995fc64d696c42fdb3eb88d2ed3a9e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
clang: Use the effective triple string for offload jobs (#205065)
Track the future effective triple for the job, rather than
the toolchain's default triple. In the future this will
change the result when amdgpu starts adjusting the triples
to contain subarches.
Commit: 6019657c6a4528e92887bec4b52222f9c0fc6a8b
https://github.com/llvm/llvm-project/commit/6019657c6a4528e92887bec4b52222f9c0fc6a8b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
Log Message:
-----------
Reapply "[AMDGPU] Add compiler-rt checks for the GPU runtime" (#204898)
The original issue should've been solved by
https://github.com/llvm/llvm-project/pull/204694
Reverts llvm/llvm-project#204370
Commit: 4f5c444227c76c41146b7a91c1a1cab460c74112
https://github.com/llvm/llvm-project/commit/4f5c444227c76c41146b7a91c1a1cab460c74112
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/QueueingRunner.h
M orc-rt/unittests/InProcessControllerAccessTest.cpp
M orc-rt/unittests/QueueingRunnerTest.cpp
M orc-rt/unittests/SessionTest.cpp
Log Message:
-----------
[orc-rt] Default QueueingRunner to a synchronized queue. (#205088)
Adds orc_rt::detail::SynchronizedDeque<T>, a mutex-protected deque whose
pop_front / pop_back return std::optional<T> (std::nullopt indicates the
queue is empty), and makes it QueueingRunner's default WorkQueue type.
Using a synchronized queue type allows QueueingRunner to be used in
multi-threaded contexts.
Updates SessionTest and InProcessControllerAccessTest to use the new
default, and extends QueueingRunnerTest to cover the new contract.
Commit: 8616fad2fa5c772b7ebc254335e7c6be858a5182
https://github.com/llvm/llvm-project/commit/8616fad2fa5c772b7ebc254335e7c6be858a5182
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/source/Target/Memory.cpp
Log Message:
-----------
[lldb] Avoid tautological copying of a newly created object (NFC) (#204998)
Commit: 27af208fe5cbd7d6b9ba24b22d75f1abba42c111
https://github.com/llvm/llvm-project/commit/27af208fe5cbd7d6b9ba24b22d75f1abba42c111
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
Log Message:
-----------
[AMDGPU][NFC] Templatise and roundtrip gfx12_asm_vop3_dpp16.s (#203953)
This is effectively the changes between the non-template versions of
gfx11/12_asm_vop3_dpp16.s applied on top of the templatised
gfx11_asm_vop3_dpp16.s.
Commit: a7808183c742b88065e912dd0b98ab446b01b7c0
https://github.com/llvm/llvm-project/commit/a7808183c742b88065e912dd0b98ab446b01b7c0
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
Log Message:
-----------
[AMDGPU][NFC] Templatise and roundtrip gfx13_asm_vop3_dpp16.s (#204849)
Again, this is based on the templatised version of
gfx12_asm_vop3_dpp16.s with the GFX13-specific changes re-applied on top
of it.
gfx13_dasm_vop3_dpp16.txt was never upstreamed, so no changes for the
disassembler side.
Commit: 06dcba660904e041cca1d245e674f040bb04f454
https://github.com/llvm/llvm-project/commit/06dcba660904e041cca1d245e674f040bb04f454
Author: Tim <timothy.smith at hpe.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Transforms/debug-fake-use-multiple-dimensions.fir
A flang/test/Transforms/debug-fake-use-multiple-returns.fir
M flang/test/Transforms/debug-fake-use.fir
Log Message:
-----------
[flang][debug] Add fake use ops for dynamic array dimension variables (#200061)
In cases where the upper or lower bounds of a dynamic array are not
explicitly referenced in code, flang can optimize away the internal
variables that represent these values. This causes missing values to
appear in the debugger when examining the dynamic array's type. Adding
an llvm.fake.use op for each bound preserves it for use by a debugger,
similar to the fix for #185432.
Resolves #119474
Commit: b0c2017bcff5ae07fe44d3271a269e50e1c98cbd
https://github.com/llvm/llvm-project/commit/b0c2017bcff5ae07fe44d3271a269e50e1c98cbd
Author: Adam Siemieniuk <adam.siemieniuk at intel.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
M mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
Log Message:
-----------
[mlir][x86] Fail on missing read source operation (#205077)
Adds an extra check to AMX lowering to fail gracefully when a source
operation for contraction input data is not found.
Commit: a7e3eda221412f798ae448c293217f49f4a5ebed
https://github.com/llvm/llvm-project/commit/a7e3eda221412f798ae448c293217f49f4a5ebed
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/Allocator.h
M llvm/unittests/Support/AllocatorTest.cpp
Log Message:
-----------
Revert "[Allocator] Keep bump pointer at a minimum alignment" (#205091)
Arithmetic on nullptr is UB and gets flagged by UBSan.
Reverts llvm/llvm-project#203718
Commit: d8657e1bb196d52892365da5cf917f8ed90932f8
https://github.com/llvm/llvm-project/commit/d8657e1bb196d52892365da5cf917f8ed90932f8
Author: Sean Perry <perry at ca.ibm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/unittests/CMakeLists.txt
Log Message:
-----------
Don't test JIT's on z/OS (#196580)
The JIT's aren't supported on z/OS so no need to run the unit tests on
them.
Commit: 685af3ab083c71c32172fb7116176b55a6c26b25
https://github.com/llvm/llvm-project/commit/685af3ab083c71c32172fb7116176b55a6c26b25
Author: Akshay Kumar Dubey <123586645+akshaydubey05 at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/tool/ClangdMain.cpp
Log Message:
-----------
[clangd] Log environment variables that influence compilation at startup (#204990)
When users face missing system include issues (especially on Windows),
it's difficult to diagnose whether the problem is caused by missing
environment variables like `INCLUDE`, `CPATH`, etc.
This patch logs the values of environment variables that influence how the
compiler finds headers and libraries, at startup alongside the existing
version/PID/argv logs. Only variables that are actually set are printed.
Variables logged:
- MSVC (set by vcvarsall.bat): `INCLUDE`, `LIB`, `LIBPATH`, `CL`, `_CL_`
- GCC/Clang: `CPATH`, `C_INCLUDE_PATH`, `CPLUS_INCLUDE_PATH`,
`OBJC_INCLUDE_PATH`, `LIBRARY_PATH`, `GCC_EXEC_PREFIX`
Fixes https://github.com/clangd/clangd/issues/2657
Commit: 079683b7e1d0cb39cbb2205d38425d56030d31b2
https://github.com/llvm/llvm-project/commit/079683b7e1d0cb39cbb2205d38425d56030d31b2
Author: Reinhard Stahn <rainij36 at proton.me>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
Log Message:
-----------
[mlir][scf] Tighten description of scf.for (#203713)
The previous description was vague in the case that the
one-past-the-last value for the induction variable is not representable
in the used integer type. Current passes implicitly exploit this by
implementing non-equivalent semantics (e.g. terminating vs
non-terminating loops).
We tighten the specification of `scf.for` by first stating the desired
ideal semantics, but deeming overflow undefined behavior. This fixes all
inconsistencies I am aware of.
Documentation only; no behavioral change.
Commit: 8062e6dc822b7832d8d988bd9cc70a04a327848a
https://github.com/llvm/llvm-project/commit/8062e6dc822b7832d8d988bd9cc70a04a327848a
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Remove support for ADDC/ADDE/SUBC/SUBE DAG nodes (#205082)
Since #204694 we should be using UADDO/USUBO/UADDO_CARRY/USUBO_CARRY
instead.
Commit: 4661c0248ca5621b05808e25605b7adeb6c078a8
https://github.com/llvm/llvm-project/commit/4661c0248ca5621b05808e25605b7adeb6c078a8
Author: gretay-amd <Greta.Yorsh at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
Log Message:
-----------
[AMDGPU] Waterfall loop codegen improvement in SIInstrInfo (#192415)
When generating waterfall loops, use the instructions `v_cmpx_eq_*` and
`s_andn2_wrexec_*` as recommended for recent architectures, instead of
`v_cmp_eq_*` and `s_and saveexec`.
This PR only updates waterfall loop code generation in
`SIInstrInfo.cpp`. Other places that generated waterfall loops can be
handled separately.
- Add new lane mask constant for `s_andn2_wrexec`
- Set `isTerminator` for `v_cmpx_eq_{u32,u64}_e32`
- Fix test `mubuf-legalize-operands.mir` to track liveness needed for
verifying phi nodes
- Update .ll and .mir tests to accept the new instruction sequences
Assisted-by: Claude
Commit: bcae37f4a8e8d163e34080186b789a6cb0ae91d1
https://github.com/llvm/llvm-project/commit/bcae37f4a8e8d163e34080186b789a6cb0ae91d1
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llubi/reset_return_value_slot.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Reset retval when return type is void (#205107)
In `returnFromCallee`, the return value is moved out from
`CurrentFrame->RetVal`. So `visitReturnInst` is always responsible for
setting a valid value.
Closes https://github.com/llvm/llvm-project/issues/204992
Commit: fe5ad843d83aef5846862064551fb8e5fc8e9048
https://github.com/llvm/llvm-project/commit/fe5ad843d83aef5846862064551fb8e5fc8e9048
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/callbr.ll
Log Message:
-----------
[Attributor] Do not delete side-effect-free terminator (#205052)
Fixes: https://github.com/llvm/llvm-project/issues/192012
Commit: 4e6976b70b52f2f84b2b4f28c7badbfb401d302e
https://github.com/llvm/llvm-project/commit/4e6976b70b52f2f84b2b4f28c7badbfb401d302e
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/test/AST/ByteCode/command-line-options.cpp
Log Message:
-----------
Fix test on read-only file systems (#205108)
Fixes 25e4057d49055a645dc6a51ae1f40ac647aaed5b.
Use the -fsyntax-only flag instead of -c. This performs the necessary
parsing and diagnostics verification (the actual intent of this test)
without attempting to emit an object file.
Commit: 6b59e09d1443b5c3905daa457d241487eb9bfc3f
https://github.com/llvm/llvm-project/commit/6b59e09d1443b5c3905daa457d241487eb9bfc3f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[HIP] Fix `--no-offload-new-driver` behavior after #201457 (#205094)
Summary:
https://github.com/llvm/llvm-project/pull/201457 changed the default for
all targets. Even though the old offload driver is getting removed soon
we shouldn't break it for the LLVM23 release. This simply reverts to the
original behavior, the old driver builds its jobs manually so we can
just turn off this one specific case unless the user forced it.
Commit: 5b687a501bd26cc46d6b52582aa926acc0d3564e
https://github.com/llvm/llvm-project/commit/5b687a501bd26cc46d6b52582aa926acc0d3564e
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/test/did-change-configuration-params.test
Log Message:
-----------
Be more permissive on spaces in command line argument parsing (#205111)
Fixes c888371ff0a3e10f8472676dc992f4347fca58d9.
This change properly accommodates both presence and absence of extra
trailing arguments like -resource-dir.
Commit: c79333e16d4c567c4ebeccb878ac2fc40fed687d
https://github.com/llvm/llvm-project/commit/c79333e16d4c567c4ebeccb878ac2fc40fed687d
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
Log Message:
-----------
[flang][OpenMP] Centralize pushing/popping directive context (#204924)
Put calls to PushContextAndClauseSets to the Enter function for
OpenMPConstruct and OpenMPDeclarativeConstruct, and popping the context
to the corresponding Leave functions. This moves most of the context
handling to the top-level AST entries. This will allow more centralized
verification of common clause properties in the future.
Commit: 6e4e181c83d076bb8e4c208ae28817f3900b23fa
https://github.com/llvm/llvm-project/commit/6e4e181c83d076bb8e4c208ae28817f3900b23fa
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
A cmake/Modules/GetTripleCMakeSystemName.cmake
A cmake/Modules/NormalizeTriple.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/runtimes/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
runtimes: Pass CMAKE_SYSTEM_NAME based on target triple (#203504)
Compute the cmake system name from the target triple, rather
than passing through the host's. This is primarily to stop
forwarding OSX specific cmake variables.
This fixes build failures when trying to build gpu libc on mac
hosts. Previously it would fail on several issues, starting with
an unused argument -mmacos-version-min error, followed by other
errors caused by passing -isysroot.
Secondarily, restrict the cmake imported targets when cross compiling.
Without this, the amdgpu build prints many cmake warnings about the
target not supporting shared libraries.
Claude did most of the actual work, though it required quite a few
rounds of prodding to get it into the right place. In particular it
took care of handling all of the cmake platform recognized names from
the triple.
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 1ba7c9677649ed5072205c63532c1c2d5da38e13
https://github.com/llvm/llvm-project/commit/1ba7c9677649ed5072205c63532c1c2d5da38e13
Author: Koakuma <koachan at protonmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/CodeGen/SPARC/bswap.ll
Log Message:
-----------
[SPARC] Use hardware byteswapper when we have V9 (#191720)
On V9 processors we have endianness-adjusted memory operations, that can
be used to implement BSWAPs.
Use those instructions whenever possible to reduce code size.
Commit: e07c1e710ccf0be64140bd5774ba8dccce505bfd
https://github.com/llvm/llvm-project/commit/e07c1e710ccf0be64140bd5774ba8dccce505bfd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[flang][OpenMP] Move unique clauses to allowedOnceClauses in OMP.td (#204995)
Many unique clauses were listed in "allowedClauses", which turned off
the single-occurrence check in flang. Move these clauses to the right
category to enable this check.
One exception to this is the IF clause: the IF clause is unique for all
non-compound directives, but is repeatable on compound ones with the
restriction that at most one IF clause can apply to any of the
constituents. This restriction is currently not enforced correctly in
flang, and so the IF clause was left unchanged.
Although this change is applied to a file shared between flang and
clang, clang does not use these categories for its checks, and hence is
not affected by this patch.
Commit: 237fbfd7cfbd2a2a4f0b171e493aa85b8506065a
https://github.com/llvm/llvm-project/commit/237fbfd7cfbd2a2a4f0b171e493aa85b8506065a
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
A llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
Log Message:
-----------
[CodeGen] Join live range segments after dead def move (#204648)
Moving a dead def upward can retag a following live-range segment to the
same value as the previous segment. That leaves adjacent same-value
segments, which live range verification rejects.
Add a shared LiveRange helper for merging adjacent same-value segments.
Use it in the existing value-number merge code and after retagging later
segments for a moved dead def. Add an AMDGPU scheduler regression test.
Commit: 448b725bb78bc288c5f6e3ad27856c92902f6537
https://github.com/llvm/llvm-project/commit/448b725bb78bc288c5f6e3ad27856c92902f6537
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Compilation.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Job.h
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CSKYToolChain.cpp
M clang/lib/Driver/ToolChains/CSKYToolChain.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CrossWindows.cpp
M clang/lib/Driver/ToolChains/CrossWindows.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Fuchsia.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Haiku.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSP430.cpp
M clang/lib/Driver/ToolChains/MSP430.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/Managarm.cpp
M clang/lib/Driver/ToolChains/Managarm.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/NetBSD.h
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/OHOS.h
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/OpenBSD.h
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Driver/ToolChains/SPIRVOpenMP.cpp
M clang/lib/Driver/ToolChains/SPIRVOpenMP.h
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/lib/Driver/ToolChains/Serenity.h
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/Solaris.h
M clang/lib/Driver/ToolChains/VEToolchain.cpp
M clang/lib/Driver/ToolChains/VEToolchain.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/WebAssembly.h
M clang/lib/Driver/ToolChains/XCore.cpp
M clang/lib/Driver/ToolChains/XCore.h
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Driver/ToolChains/ZOS.h
M clang/test/Driver/hip-link-bundle-archive.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/unittests/Driver/DXCModeTest.cpp
Log Message:
-----------
clang/Driver: Use struct type for BoundArch instead of StringRef (#204748)
Change BoundArch arguments in the clang driver from StringRef (or
sometimes const char*) to a dedicated struct type that contains both
the architecture string and a parsed OffloadArch enum field. In the
future it may be useful to contain other feature bits here.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: e57068a5bd9fd9be5a265b83552689ff49f8fcb4
https://github.com/llvm/llvm-project/commit/e57068a5bd9fd9be5a265b83552689ff49f8fcb4
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Try folding align assumes with unkown offset (#204962)
There are a few folds which don't depend on the offset of the alignment,
but are nevertheless guarded on whether the offset is known. Run these
folds unconditionally instead.
Commit: d9d2f3221b9e499f183acb1d3bece3c1d8f1462a
https://github.com/llvm/llvm-project/commit/d9d2f3221b9e499f183acb1d3bece3c1d8f1462a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
Log Message:
-----------
[flang][OpenMP] Refactor semantic check of SINGLE construct (#204339)
Extract it into a separate function and simplify the code. Avoid making
the distinction between a clause appearing on the "begin" and the "end"
directives for the purposes of emitting diagnostic messages.
One change in behavior is that using the same list item multiple times
in COPYPRIVATE clause(s) is an error regardless of the placement of the
clauses. Previously in some cases it was treated as a warning.
Part of the motivation is the goal of eliminating explicit definitions
of end-directives for directives that are not delimited, e.g. "end
single", but not "end declare_variant".
Commit: 421ae3759e92132f066c77764d6da31e8a74e47c
https://github.com/llvm/llvm-project/commit/421ae3759e92132f066c77764d6da31e8a74e47c
Author: earnol <earnol at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/MisplacedWideningCastCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/misplaced-widening-cast-bitfield.cpp
Log Message:
-----------
[clang-tidy] Fix bugprone-misplaced-widening-cast false positive on bitfield assignments (#197554)
When CheckImplicitCasts=true, the checker used the declared type of a
bitfield insread of the actual bitfield width to determine if widening
occurs. This caused false positives when assigning to a bitfield whose
declared type is wider than the source, but whose bitfield width
actually matches the source type. This behavior is fixed.
This PR fixes https://github.com/llvm/llvm-project/issues/197261 issue.
Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
Commit: 132e019c1f8f485c764b22670b5ea7ff2d8556a8
https://github.com/llvm/llvm-project/commit/132e019c1f8f485c764b22670b5ea7ff2d8556a8
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
R clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/spirv_target_teams_reduction_addrspace.c
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_firstprivate_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen_01.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_map_codegen_hold.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_offload_mandatory_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
A clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/OpenMP/add_attributes.ll
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
M offload/include/Shared/Environment.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M openmp/device/include/Interface.h
M openmp/device/src/Reduction.cpp
Log Message:
-----------
Reapply "[OpenMP][offload] Cross-team reductions with variable number of teams" (#204914) (#205071)
Together with the fix for
https://github.com/llvm/llvm-project/pull/195102#issuecomment-4756584289
Commit: b9940aa6cf3c30ae8eb3c2059c0869ed95bb42aa
https://github.com/llvm/llvm-project/commit/b9940aa6cf3c30ae8eb3c2059c0869ed95bb42aa
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
Log Message:
-----------
[InstCombine] Merge consecutive assumes (#204983)
This should make assumes a bit more efficient, since it removes a few
instructions. This should also help with optimizations that are limited
in how many instructions they step through.
Commit: 1a4e2d2f0a7b60083f19e68abff80dc14702a579
https://github.com/llvm/llvm-project/commit/1a4e2d2f0a7b60083f19e68abff80dc14702a579
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for pk_u64 add and sub (#205079)
Commit: 97fe69eaec8920e84308f80ade9e641aa424267b
https://github.com/llvm/llvm-project/commit/97fe69eaec8920e84308f80ade9e641aa424267b
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
Log Message:
-----------
[AMDGPU] Add a test for sext i1 feeding into icmp (#205121)
This is a precommit of a test case that causes problems for #204238.
Commit: 63862a2d80759a88e0b7408e555bb8f2292c5d40
https://github.com/llvm/llvm-project/commit/63862a2d80759a88e0b7408e555bb8f2292c5d40
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/freebsd/x86_64/entrypoints.txt
Log Message:
-----------
[libc][math] Add missing freebsd entrypoint for cbrtf16 (#205011)
Adds missing freebsd entrypoint in
[5429667](https://github.com/llvm/llvm-project/pull/205011/commits/5429667e053398d39e180f084e0dd5c4c416aa27)
and fixes the wrong entry point for `crbtf1` in
[cdc394f](https://github.com/llvm/llvm-project/pull/205011/commits/cdc394f8ba7dffb9f49563d601def7cf31561d6f),
which was `cbrtf` in `baremetal/riscv`
Commit: a92039c3e44e102f90751c8e8b2ab70a077016b7
https://github.com/llvm/llvm-project/commit/a92039c3e44e102f90751c8e8b2ab70a077016b7
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang-rt/lib/runtime/CMakeLists.txt
M openmp/module/CMakeLists.txt
Log Message:
-----------
[flang-rt][openmp] Add file-level dependencies for builtin mod files (#204260)
CMake currently intentionally ignores intrinsic dependencies. flang-rt
already had a workaround using target-level dependencies, but it does
not know about dependencies between .mod files created within the same
add_library that CMake ignores. As a result, as reported in #203549,
updating a .mod did not trigger rebuilding the .mod files that depend on
it. Specifically, .mod files store the checksum of used .mod files which
need to be updated and therefore require transitive rebuidling.
As mentioned, CMake already adds this file-level dependency itself for
non-intrinsic modules dependencies. In this PR we are injecting the
additional dependencies that CMake does not add via OBJECT_DEPENDS.
Three caveats:
1. Using OBJECT_DEPENDS for dependencies between modules of the same
OBJECT library makes Ninja complain about circular dependencies. To
avoid, split __fortran_builtins.f90 and __cuda_builtins.f90 into their
own OBJECT libraries each.
2. The dependency cannot be on the .mod files. Because of how CMake's
dependency mechanism works, the dependency scanning runs only after
ensuring that the OBJECT_DEPENDS files exist. So if they don't exist
yet, we get a missing dependency error. To avoid, we depend on the .o
file instead.
3. Generator expressions do not work in OBJECT_DEPENDS. That is, we
cannot use `$<TARGET_FILES:flang_rt.mod.fortran.builtins>`, but
fortunately we can use OBJECT_OUTPUTS to make the location predictable.
At some point in the future,
https://gitlab.kitware.com/cmake/cmake/-/issues/26803 should be resolved
and become the minimum required version to build LLVM, in which case
these workarounds can be removed.
Commit: f63cb33699f4ab593328c15ee99650514bc0ab2c
https://github.com/llvm/llvm-project/commit/f63cb33699f4ab593328c15ee99650514bc0ab2c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M .gitignore
Log Message:
-----------
gitignore: Add emacs lock files (#205055)
Commit: bd89ac741dff1a6edec15821b719a34ab5646f3f
https://github.com/llvm/llvm-project/commit/bd89ac741dff1a6edec15821b719a34ab5646f3f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Log Message:
-----------
[lldb][Windows] Remember server's primary stop thread on gdb-remote stops (#203525)
The client kept the previously-selected thread across stops, ignoring
the primary tid from the server in `T<sig>thread:<tid>`.
On Windows, lldb-server halts the inferior by injecting a thread called
`DbgUiRemoteBreakin` whose only job is to execute an int 3. After an
interrupt, the process has `N+1` threads and the new one is what caused
the stop. The server reports that thread as primary, but the client
ignored it and stayed on whichever thread was selected before. In
`TestExpressionInSyscall` that thread is main, paused just past
`NtDelayExecution`'s syscall with a garbage value in the RSI register.
Evaluating an expression there crashes the JIT trampoline.
This patch makes `ProcessGDBRemote::RefreshStateAfterStop` record the
primary tid from the most recent T-packet's `thread:<tid>` and select it
after applying per thread stop infos.
Fixes `TestBreakpointSetRestart` and `TestExpressionInSyscall` with
LLDB_USE_LLDB_SERVER=1.
rdar://180307914
Commit: d4ae086789debfaa1065b97dfd2cf78b44544eba
https://github.com/llvm/llvm-project/commit/d4ae086789debfaa1065b97dfd2cf78b44544eba
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
Log Message:
-----------
[AMDGPU] Prevent folding of immediates larger than 64 bit (#204434)
Commit: f4927c95fa74247304af703d4dae4396dcbc5a2f
https://github.com/llvm/llvm-project/commit/f4927c95fa74247304af703d4dae4396dcbc5a2f
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
Log Message:
-----------
[AMDGPU] Make v2x64 BUILD_VECTOR legal on gfx1251 (#204470)
Commit: 08c728e8528c9584bc1fe0f46bbdd657e368be91
https://github.com/llvm/llvm-project/commit/08c728e8528c9584bc1fe0f46bbdd657e368be91
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/cmake/modules/ClangConfig.cmake.in
R cmake/Modules/GetTripleCMakeSystemName.cmake
R cmake/Modules/NormalizeTriple.cmake
M llvm/cmake/modules/LLVMConfig.cmake.in
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/runtimes/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "runtimes: Pass CMAKE_SYSTEM_NAME based on target triple" (#205133)
Reverts llvm/llvm-project#203504
Breaks build pending #205130
Commit: 91e344bd26bf18badeaf5bd8e5cf41f1f7e1cca4
https://github.com/llvm/llvm-project/commit/91e344bd26bf18badeaf5bd8e5cf41f1f7e1cca4
Author: youngd007 <davidayoung at meta.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Add the Windows process plugin to the bazel build (#203146)
Add a cc_library for the native Windows process plugin
(ProcessWindowsCommon),
gated to @platforms//os:windows, and register it via the dedicated
@LLDB_PROCESS_WINDOWS_PLUGIN@ slot in the generated Plugins.def. This
mirrors the
CMake build, which special-cases ProcessWindowsCommon into that slot so
it is
initialized after all other process plugins but before ProcessGDBRemote.
With the help of claude.
Tested internally at Meta by converting Bazel -> BUCK and confirming
matches working BUCK contents for windows lldb build.
Commit: 6e562169fd026e26124fe4e2e435d3a4c522ffe2
https://github.com/llvm/llvm-project/commit/6e562169fd026e26124fe4e2e435d3a4c522ffe2
Author: Sungbin Jo <goranmoomin at daum.net>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/ObjectYAML/MachOEmitter.cpp
A llvm/test/ObjectYAML/MachO/endianness.yaml
Log Message:
-----------
[yaml2obj][MachO] Fix byte order of the indirect symbol table (#205044)
This is a follow-up of PR #203680 that added the test case
`linkedit-alignment.test`, which currently fails on big-endian buildbots
(see: https://lab.llvm.org/buildbot/#/builders/98/builds/3084 and
https://lab.llvm.org/buildbot/#/builders/114/builds/906).
The failure seems to be on `yaml2obj`, where `writeDynamicSymbolTable`
emits an indirect symbol table in host byte order rather than the
specified object's byte order (i.e. the `IsLittleEndian` field value).
This PR adds the missing swap and a regression test that round-trips all
endian-sensitive fields with both endianness values.
Commit: 1a63fca933a0e8a3cb807d462ef50901a90f83d2
https://github.com/llvm/llvm-project/commit/1a63fca933a0e8a3cb807d462ef50901a90f83d2
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[bazel] Disable buildkite for PluginProcessWindowsCommon (#205141)
Commit: 08d766ba6d1ffdeb894c0c935465f7134aef6dfc
https://github.com/llvm/llvm-project/commit/08d766ba6d1ffdeb894c0c935465f7134aef6dfc
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++][lnt] Allow retaining build artifacts in run-benchbot (#205146)
Also, as a drive-by, introduce `--results-dir` to specify where to put
the JSON results instead of using `--build-dir` for that.
Assisted by Claude
Commit: a88b88bdd346282a71b2f01b1513936280c20a93
https://github.com/llvm/llvm-project/commit/a88b88bdd346282a71b2f01b1513936280c20a93
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/__utility/constant_wrapper.h
M libcxx/include/utility
M libcxx/include/version
M libcxx/test/std/language.support/support.limits/support.limits.general/utility.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/convert.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/ctad.compile.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/cw.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/cw_fixed.array.ctor.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/cw_fixed.ctor.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
A libcxx/test/std/utilities/const.wrap.class/template.verify.cpp
M libcxx/test/std/utilities/const.wrap.class/types.compile.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/unary_ops.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] Implement P4206R0 Revert string support in std::constant_wrapper (#203338)
Fixes https://github.com/llvm/llvm-project/issues/203336
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: 20cf19f0c34579273382e20947ea8e6373949796
https://github.com/llvm/llvm-project/commit/20cf19f0c34579273382e20947ea8e6373949796
Author: Xavier Roche <roche at httrack.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libcxx/include/__math/abs.h
M libcxx/test/std/numerics/c.math/abs.pass.cpp
Log Message:
-----------
[libc++] std::abs support for _BitInt(N) and __int128 (#196532)
`std::abs` does not accept `__int128` or signed `_BitInt(N)`: the call
is ambiguous and fails to compile (#204212).
This adds an explicit `abs(__int128_t)` overload and an
`abs(_BitInt(N))` overload that deduces the width, so every signed
`_BitInt` gets a same-type result. `_BitInt` does not integer-promote,
so without this overload a narrow signed `_BitInt` would be an ambiguous
call against `abs(int/long/long long)` instead of promoting the way
`signed char` and `short` do. Standard narrow types are unchanged: they
still go through `abs(int)`.
Part of the [_BitInt(N) libc++
effort](https://discourse.llvm.org/t/bitint-n-support-in-libc-investigations-possible-improvements-looking-for-guidance/90063).
Fixes #204212
Assisted-by: Claude (Anthropic)
---------
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 86f2e71cb8d165b59ad31a442b2391e23826133e
https://github.com/llvm/llvm-project/commit/86f2e71cb8d165b59ad31a442b2391e23826133e
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/malloc.c
M clang/test/Analysis/pr22954.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread.c
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
Log Message:
-----------
[Clang][Sema] Add -Wstringop-overread warning for source buffer overreads (#183004)
This PR adds a new `-Wstringop-overread` warning that diagnoses calls to
memory functions where the specified size exceeds the size of the source
buffer, increasing parity with GCC's `-Wstringop-overread`.
The warning is emitted when the read size is a compile-time constant
that is greater than the size of the source buffer (when known
statically).
This check applies to the following functions:
- `memcpy`, `memmove`, `mempcpy` (and `__builtin_` / `__builtin___*_chk`
variants)
- `memchr`
- `memcmp`, `bcmp`
Some of the existing code for `-Wfortify-source` was refactored into a
helper class to make its lambdas accessible to other functions.
Fixes #83728
Assisted-by: claude-opus-4.6
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 1f20833fa42ddec64e170b2738e5cdbc007bb5de
https://github.com/llvm/llvm-project/commit/1f20833fa42ddec64e170b2738e5cdbc007bb5de
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
Log Message:
-----------
[ValueTracking] Mark frexp, ALM propagates poison (#205139)
Commit: 582a20269e2cc190ce73151f51e99c9e14ffc202
https://github.com/llvm/llvm-project/commit/582a20269e2cc190ce73151f51e99c9e14ffc202
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
A llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
A llvm/test/CodeGen/RISCV/qc-access-marking.ll
Log Message:
-----------
[RISCV] Add a Pass for adding %qc.access specifiers (#201938)
Qualcomm's ABI has Access Relocation Markers, which are used to enable
more linker relaxations. This change implements a pass which will
annotate loads and stores (accesses) which are the single user of a
`qc.e.li`-materialized address with these markers so they can be relaxed
in the linker.
This is a follow-up to #188671.
Commit: 93b1f81e03ef4c717a9d222b46f78c38bcff0a3f
https://github.com/llvm/llvm-project/commit/93b1f81e03ef4c717a9d222b46f78c38bcff0a3f
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M libcxx/include/__random/bernoulli_distribution.h
M libcxx/include/__random/binomial_distribution.h
M libcxx/include/__random/cauchy_distribution.h
M libcxx/include/__random/chi_squared_distribution.h
M libcxx/include/__random/discard_block_engine.h
M libcxx/include/__random/discrete_distribution.h
M libcxx/include/__random/exponential_distribution.h
M libcxx/include/__random/extreme_value_distribution.h
M libcxx/include/__random/fisher_f_distribution.h
M libcxx/include/__random/gamma_distribution.h
M libcxx/include/__random/generate_canonical.h
M libcxx/include/__random/geometric_distribution.h
M libcxx/include/__random/independent_bits_engine.h
M libcxx/include/__random/linear_congruential_engine.h
M libcxx/include/__random/lognormal_distribution.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/negative_binomial_distribution.h
M libcxx/include/__random/normal_distribution.h
M libcxx/include/__random/piecewise_constant_distribution.h
M libcxx/include/__random/piecewise_linear_distribution.h
M libcxx/include/__random/poisson_distribution.h
M libcxx/include/__random/random_device.h
M libcxx/include/__random/seed_seq.h
M libcxx/include/__random/shuffle_order_engine.h
M libcxx/include/__random/student_t_distribution.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__random/uniform_int_distribution.h
M libcxx/include/__random/uniform_real_distribution.h
M libcxx/include/__random/weibull_distribution.h
A libcxx/test/libcxx/numerics/rand/nodiscard.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bernoulli/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.geo/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.negbin/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.cauchy/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.chisq/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.f/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.lognormal/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.normal/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.t/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.exp/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.extreme/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.gamma/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.poisson/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.weibull/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.discrete/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.pconst/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.plinear/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.int/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.real/bad_engine.verify.cpp
Log Message:
-----------
[libc++][random] Applied `[[nodiscard]]` to `<random>` (#204970)
Towards: #172124
-
https://libcxx.llvm.org/CodingGuidelines.html#apply-nodiscard-where-relevant
- https://wg21.link/rand
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: ef22d07c2c4fc3209cc14de2734fbb336ddf42b4
https://github.com/llvm/llvm-project/commit/ef22d07c2c4fc3209cc14de2734fbb336ddf42b4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Use early exit to unindent some code, NFC (#205150)
Commit: 2bb8a56e7dfc6e0a90c0464d9b65640f0252883d
https://github.com/llvm/llvm-project/commit/2bb8a56e7dfc6e0a90c0464d9b65640f0252883d
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M bolt/lib/Core/BinaryEmitter.cpp
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYTargetStreamer.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[MC] emitCodeAlignment: take MCSubtargetInfo by reference. NFC (#205140)
The fragment member cannot be null, and the sibling streamer hooks
(emitInstruction, initSections, emitPrefAlign) already take it by
reference.
Commit: 1d8a54f7cf233be64ffce08a3c5697ea8f1cccb5
https://github.com/llvm/llvm-project/commit/1d8a54f7cf233be64ffce08a3c5697ea8f1cccb5
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/CIR/LoweringHelpers.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/Lowering/const-array-bulk-lowering-fallbacks.cir
M clang/test/CIR/Lowering/const-array-of-pointers.cir
Log Message:
-----------
[CIR] Lower const arrays as a single llvm.mlir.constant (#203590)
When compiling the blender benchmark for SPEC CPU2017, we hit a case
where a very large array (more than 400k elements) is initialized with
constant values. However, because it contains trailing zeros, CIR
generates a constant record initializer (an array of elements, plus a
zero-initialized trailing array). We were lowering this to the LLVM
dialect using a global initializer function with a huge number of calls
to insertelement. The subsequent lowering to LLVM IR constant folded
back to a constant initializer, but it took about 40 minutes to compile.
The recent fix to avoid calling insertelement for the array
initialization didn't fix this case because it handled only arrays, not
records.
This change updates the lowering to the LLVM dialect to lower constant
array attributes to a single llvm.mlir.const value rather than
attempting to build a chain of insertvalue ops whenever possible.
Commit: 8140495ed285468512e8b0c0fc576234750bd15f
https://github.com/llvm/llvm-project/commit/8140495ed285468512e8b0c0fc576234750bd15f
Author: Bidhan <bidhan619 at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.h
A llvm/test/DebugInfo/BPF/dbg-location-fbreg.ll
Log Message:
-----------
[BPF] override getFrameIndexReference for frame object offsets (#204722)
### Summary
The BPF backend currently does not override `getFrameIndexReference()`.
Since BPF uses a fixed frame pointer (R10), frame object offsets are
already expressed relative to the frame pointer. The generic
`TargetFrameLowering::getFrameIndexReference()` implementation adjusts
offsets using the stack size, which is not appropriate for BPF.
This PR overrides `getFrameIndexReference()` to return the correct frame
object offsets for the BPF frame model, resulting in accurate debug
locations for stack variables. For example, the stack variable `local`
in the reproducer below previously received:
```
DW_AT_location (DW_OP_fbreg +0)
```
and now correctly receives:
```
DW_AT_location (DW_OP_fbreg -32)
```
which matches the actual location of the stack object relative to the
frame pointer.
-----
**Rust code snippet**
```
#[repr(C)]
#[derive(Copy, Clone)]
pub struct S {
pub a: u64,
pub b: u64,
pub c: u64,
}
#[unsafe(no_mangle)]
pub extern "C" fn entry(x: u64) -> u64 {
let mut local = S { a: x, b: x + 1, c: x + 2 };
let ptr_to_b = &mut local.a as *mut u64;
let ptr_to_b = core::hint::black_box(ptr_to_b);
unsafe {
core::ptr::write_volatile(ptr_to_b, x + 42);
}
unsafe { core::ptr::read_volatile(ptr_to_b) }
}
```
**Build commands**
```
> rustc +nightly repro.rs --emit=llvm-ir -g -O --crate-type=lib -o repro.l
> ./build/bin/lc repro.l -march=bpfel -O2 -filetype=obj -o repro.o
> ./build/bin/lvm-dwarfdump --debug-info --debug-loc --debug-loclists repro.o > repro.debug
```
**DW_TAG_variable info for variable "local"**
Before patch:
```
0x00000114: DW_TAG_variable
DW_AT_location (DW_OP_fbreg +0)
DW_AT_name ("local")
DW_AT_alignment (8)
DW_AT_decl_file ("/home/LLVM/llvm-project/repro.rs")
DW_AT_decl_line (11)
DW_AT_type (0x000001b8 "repro::S")
```
After patch:
```
0x00000114: DW_TAG_variable
DW_AT_location (DW_OP_fbreg -32)
DW_AT_name ("local")
DW_AT_alignment (8)
DW_AT_decl_file ("/home/LLVM/llvm-project/repro.rs")
DW_AT_decl_line (11)
DW_AT_type (0x000001bc "repro::S")
```
Commit: 46995fb32b999c6332fbd1bdfb84d79cad47195f
https://github.com/llvm/llvm-project/commit/46995fb32b999c6332fbd1bdfb84d79cad47195f
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/MathToXeVM/MathToXeVM.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
A mlir/test/Conversion/MathToXeVM/math-to-ocl.mlir
Log Message:
-----------
[mlir][Math][XeVM] Add Math to OCL conversion patterns (#198370)
This PR adds conversion patterns to convert supported math ops to SPIR-V
OpenCL builtin calls. These lowerings correspond to `OpExtInst` calls
into the OpenCL SPIR-V extended instruction set via mangled
`__spirv_ocl_` entry points for f32/f64 variants.
Commit: 49a0e107e9f0d244d41eb766c67d02900eff8ee3
https://github.com/llvm/llvm-project/commit/49a0e107e9f0d244d41eb766c67d02900eff8ee3
Author: Shilei Tian <i at tianshilei.me>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Verifier.cpp
A llvm/lib/IR/VerifierAMDGPU.cpp
A llvm/lib/IR/VerifierInternal.h
M llvm/test/Verifier/callbr-intrinsic.ll
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
Log Message:
-----------
[RFC][NFCI][IR] Extract AMDGPU-specific verification logic into `VerifierAMDGPU.cpp` (#204284)
`Verifier.cpp` is large and already mixes generic IR verification with
target-specific checks. We also have a growing amount of AMDGPU verifier
logic downstream, which would all end up in the same file if we don't
address this, and that is not ideal.
This patch extracts AMDGPU-specific verification logic into a separate
`VerifierAMDGPU.cpp` file, with shared infrastructure
(`VerifierSupport`) moved into `VerifierInternal.h`.
This is purely a code organization change, not a target-dependent IR
verifier. All checks remain compiled and linked into `LLVMCore`
regardless of the target triple. The extracted functions are called
unconditionally at well-defined extension points in `Verifier.cpp`, and
each function internally gates on target-specific conditions (for
example, triple checks or intrinsic IDs) as needed. The file is strictly
limited to AMDGPU-specific IR constructs (amdgcn intrinsics, AMDGPU
module flags, etc.), and does not contain generic IR rules that vary by
target.
This PR deliberately avoided introducing polymorphism, since this is not
a target-dependent verification framework. Instead, this follows a
pattern similar to TargetParser (for example `AMDGPUTargetParser.cpp`):
flat file layout, free functions, no registration, and unconditional
compilation.
Other targets that want similar separation can follow the same pattern.
Open to suggestions on whether there is a better long-term way to
structure this.
Commit: 39f5357397ef97aa2143360f3613decef981d02b
https://github.com/llvm/llvm-project/commit/39f5357397ef97aa2143360f3613decef981d02b
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
Log Message:
-----------
[flang][cuda] Apply implicit managed attribute to pointer variables under -gpu=mem:managed (#204634)
When -gpu=mem:managed is active with CUDA Fortran enabled, only
allocatable variables were implicitly given the managed CUDA data
attribute. Pointer variables were left without it, causing their
allocations to use host memory instead of cudaMallocManaged.
This patch extends the implicit managed attribute in
FinishSpecificationPart to also cover pointer symbols. A
LanguageFeature::CUDA guard is added so the attribute is only applied
when CUDA Fortran semantics are active. The implicit pinned attribute
(-gpu=mem:pinned) remains allocatable-only.
Commit: 04baf7ed88bc833a599d20bafb07fbceccade4a7
https://github.com/llvm/llvm-project/commit/04baf7ed88bc833a599d20bafb07fbceccade4a7
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[SDAG][LegalizeType] Implement result vector widening for VECTOR_DEINTERLEAVE (#203105)
I accidentally found that we haven't implemented result vector widening
for `ISD::VECTOR_DEINTERLEAVE`. This patch implements such type
legalization.
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 738fecbc68e2e3ca04efd26db648eff57f2456ff
https://github.com/llvm/llvm-project/commit/738fecbc68e2e3ca04efd26db648eff57f2456ff
Author: Kunal Pathak <kunalspathak.github at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Enable all AArch64 instructions for disassembly (#204619)
llvm-profgen builds its MCSubtargetInfo from
`ObjectFile::getFeatures()`. For AArch64 ELF objects this often produces
an empty feature set, so the disassembler falls back to the baseline
Armv8.0-A ISA and rejects valid feature-gated instructions such as LSE
atomics and RCPC loads.
`llvm-objdump` already handles this by [adding +all for AArch64
disassembly](https://github.com/llvm/llvm-project/blob/1e2d1bbc12f6a5f5931c77d39894ee1b8679f5f8/llvm/tools/llvm-objdump/llvm-objdump.cpp#L2823-L2824)
when neither -mattr nor -mcpu is specified. Match that behavior in
`llvm-profgen` so valid AArch64 instructions are not reported as invalid
and their addresses are preserved in profgen's code and branch maps.
Add a regression test covering an AArch64 binary containing `ldaddal`
and `ldapr` without object-level feature metadata.
---------
Co-authored-by: Kunal Pathak <kupathak at fb.com>
Commit: 56434aaf66507e567317655a05dd7da918f90d81
https://github.com/llvm/llvm-project/commit/56434aaf66507e567317655a05dd7da918f90d81
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Bump minimum required sphinx Python to 3.8 (#203963)
There seems to be de-facto use of at least 3.6 in docs, namely:
* Use of pathlib (3.4) in various places
* Format f-strings (3.6) and used in clang/docs/ghlinks.py
I don't see a strong reason to maintain the divide in minimum version
between test/docs, especially considering the "FIXME" indicating
the 3.0 lower bound was just a guess to begin with.
Change-Id: I11e00295ae0a13ec0f1c5cefbb2fdd2db272b152
Commit: bf3652b1e7eb0633c13afcc23bbc238f5e7f9ec8
https://github.com/llvm/llvm-project/commit/bf3652b1e7eb0633c13afcc23bbc238f5e7f9ec8
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-cov/show-colors-uninit.test
M llvm/tools/llvm-cov/CodeCoverage.cpp
Log Message:
-----------
[llvm-cov] Init `ViewOpts.Colors` before `error()` (#205001)
The `commandLineParser` lambda calls `error()` at several points before
`ViewOpts.Colors` is set. `error()` uses `ViewOpts.colored_ostream()`
which reads `Colors`, triggering undefined behavior (load of
uninitialized `bool`).
Fix by moving the `Colors` initialization block to just after
`ParseCommandLineOptions`, before any `error()` call in the lambda. This
ensures error messages are always rendered with properly initialized
color settings.
Commit: a60ad3e35514a733f19e6f2ac6bb7fe558c04441
https://github.com/llvm/llvm-project/commit/a60ad3e35514a733f19e6f2ac6bb7fe558c04441
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 46995fb (#205155)
This fixes 46995fb32b999c6332fbd1bdfb84d79cad47195f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 55d7f777d958a64ed5ef31be269c3005ddd6c7a6
https://github.com/llvm/llvm-project/commit/55d7f777d958a64ed5ef31be269c3005ddd6c7a6
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSADefs.h
A compiler-rt/lib/profile/InstrProfilingPlatformROCmInternal.h
A compiler-rt/test/profile/AMDGPU/device-basic.hip
A compiler-rt/test/profile/AMDGPU/device-early-collect.hip
A compiler-rt/test/profile/AMDGPU/device-no-kernel.hip
A compiler-rt/test/profile/AMDGPU/device-symbols.hip
A compiler-rt/test/profile/AMDGPU/lit.local.cfg.py
A compiler-rt/test/profile/GPU/instrprof-hip-basic.hip
A compiler-rt/test/profile/GPU/instrprof-hip-collect-after.hip
A compiler-rt/test/profile/GPU/instrprof-hip-counter-correctness.hip
A compiler-rt/test/profile/GPU/instrprof-hip-coverage.hip
A compiler-rt/test/profile/GPU/instrprof-hip-device-branching.hip
A compiler-rt/test/profile/GPU/instrprof-hip-fork-safety.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-gpu.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-process-merge.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multiple-kernels.hip
A compiler-rt/test/profile/GPU/instrprof-hip-nondefault-device.hip
A compiler-rt/test/profile/GPU/instrprof-hip-pgo-use.hip
A compiler-rt/test/profile/GPU/lit.local.cfg.py
A compiler-rt/test/profile/instrprof-rocm-bounds-dedup.cpp
A compiler-rt/test/profile/instrprof-rocm-grow-array.cpp
M compiler-rt/test/profile/lit.cfg.py
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[PGO][HIP] HSA-introspection device profile drain + GPU PGO tests (#203056)
## Summary
Follow-up to #202095 (now landed). #202095's host-shadow device-profile
drain can
only collect device counters for kernels that registered a host-side
shadow via
`__hipRegisterVar`. Device-linked programs (e.g. RCCL), whose
instrumented code
objects are linked directly into the device image with no host shadow,
are never
drained.
This adds a **supplemental, Linux-only HSA-introspection drain** that
runs after
the host-shadow drain: it walks each GPU agent, enumerates only the code
objects
actually resident there, reads each one's `__llvm_profile_sections`
table on the
device, and routes them through the existing `processDeviceOffloadPrf()`
path so
the emitted `.profraw` layout is identical. A content-dedup set keyed on
the
`(data, counters, names)` device-pointer triple ensures a section
already drained
by the host-shadow pass is not drained twice, so the two passes compose
without
double-counting.
It is purely additive — it does not modify #202095's host-shadow drain
or its
launch-tracking. Highlights:
- `compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp`: HSA
agent/segment/
symbol walk + dedup; record drained bounds after each host-shadow drain;
lazy
HSA init (no library constructor, for fork-safety).
- Because the HSA walk only touches resident code objects, it lets us
avoid the
host-shadow drain's collect-all fallback on Linux. When **no** kernel
launch was
tracked (program never launches, collects before its first launch, or
launches
only via an untracked API), the host-shadow pass is skipped and the HSA
drain
covers it safely — instead of faulting/hanging reading a non-resident
device on
a multi-GPU host. This also closes the silent-data-loss gap for
untracked launch
APIs (`hipExtLaunchKernel`, cooperative/graph launches).
- `clang/lib/Driver/ToolChains/Clang.cpp` / `HIPAMD.cpp`: link the
device profile
runtime on both the new-offload-driver (`LinkerWrapper::ConstructJob`)
and
traditional (`lld`) link paths, guarded by `needsProfileRT` + VFS
existence.
- New GPU/AMDGPU HIP device-PGO lit tests, gated by `hip`/`amdgpu`
features
(auto-detected from the toolchain + a visible GPU) so they report
UNSUPPORTED
rather than fail when no GPU is present. Plus GPU-free host unit tests
for the
device-profile host helpers that run everywhere, including upstream CI.
## Test plan
- 4x gfx90a (`gfx90a:sramecc+:xnack-`), ROCm 7.1.
- GPU device tests run through standard lit:
`llvm-lit -sv <build>/.../compiler-rt/test/profile/Profile-x86_64` over
the
`GPU/` and `AMDGPU/` subdirectories. The profile `lit.cfg.py`
auto-detects a
visible GPU (`amdgpu-arch`) and the HIP runtime (`libamdhip64`) and
exposes the
`hip`/`amdgpu`/`multi-device` features and the `%amdgpu_arch` /
`%hip_lib_path`
substitutions; both are overridable via `--param amdgpu_arch=… /
hip_lib_path=…`.
- **15 device tests passed, 0 failed.** Covers: basic/coverage/pgo-use,
multiple-kernels, device-branching, multi-gpu and non-default-device
drain,
early-collect / no-kernel edges, RDC vs non-RDC
`__llvm_profile_sections`,
dedup (host-shadow drains the used device, HSA finds it and dedups), and
fork-safety (the RCCL parent-no-HIP / kernel-in-forked-child pattern).
- On a host without a GPU + ROCm/HIP (e.g. upstream CI) those device
tests report
UNSUPPORTED instead of failing, and the GPU subdirectories serialize via
a
size-1 `gpu` lit parallelism group when they do run.
- GPU-free host unit tests run anywhere the profile suite runs
(including upstream
CI): `instrprof-rocm-grow-array.cpp` (the dynamic-array helper) and
`instrprof-rocm-bounds-dedup.cpp` (the `(data, counters, names)` dedup
table
that backs the "drain each counter set once" guarantee).
- Build is warning-clean and `clang-format` clean.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 42d6d5b44d6170cceeacd2ae1b83335f72f0fcba
https://github.com/llvm/llvm-project/commit/42d6d5b44d6170cceeacd2ae1b83335f72f0fcba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/hsa-default-device.ll
M llvm/test/CodeGen/AMDGPU/hsa-func.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
A llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
A llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
A llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/buffer-op-swz-operand.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
Log Message:
-----------
AMDGPU: Refactor AMDGPUTargetID to not store MCSubtargetInfo (#204315)
Store the triple string and GPUKind instead. The dependence
on checking AMDHSA seems like an anti-feature, but maintain the
behavior of not printing the modifiers for other OSes. Start
parsing the target ID instead of performing a direct string
comparison. Also improve test coverage for the treatment of the
environment component of the triple. The main behavioral change
is this will now produce normalized triples in the output and
diagnostics. Practially, this means all of the places that
currently emit "--" will be expanded into "-unknown-".
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 9b1b03ef26a936efc51b11c1955ff270e80d87e9
https://github.com/llvm/llvm-project/commit/9b1b03ef26a936efc51b11c1955ff270e80d87e9
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
Log Message:
-----------
[AMDGPU] Update packed FP32 intrinsic cost model (#205145)
Intrinsics will not have packed vector benefit if they don't have
the corresponding packed instructions.
Commit: 81638b092dd0c0a0c299081a6accd2f59e3f6a7c
https://github.com/llvm/llvm-project/commit/81638b092dd0c0a0c299081a6accd2f59e3f6a7c
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU] Add MC omod support for bf16 trans instructions (#205144)
Based on recent gfx1250 sp3 update. Refer to DEGFXSP3-664
Commit: cd89a8675cfef4e1efca258a89fae9ae903e3e3c
https://github.com/llvm/llvm-project/commit/cd89a8675cfef4e1efca258a89fae9ae903e3e3c
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-pseudoprobe.ll
A llvm/test/Transforms/SimplifyCFG/hoist-common-skip-pseudoprobe.ll
Log Message:
-----------
[SimplifyCFG] Allow hoisting in the presence of pseudoprobes (#199753)
Fix regressions in the presence of pseudoprobes that prevents
SimplifyCFG from hoisting instructions into the predecessor. Teach
`hoistCommonCodeFromSuccessors` and `foldBranchToCommonDest` to ignore
pseudo probes and drop them when the BB is eliminated.
The minor loss of profile quality for these cases are justified, as not
performing these hoists degrades performance more and blocks downstream
passes like loop-vectorize (can be upto 30% in 526.blender_r and
525.x264_r).
Commit: dc520fcd90527d196a676795d20539440de9442b
https://github.com/llvm/llvm-project/commit/dc520fcd90527d196a676795d20539440de9442b
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
Log Message:
-----------
[lldb][tests] Fix FS timing issue in `TestRerunAndExprDylib`. (#205116)
This PR fixes a timing issue that made `TestRerunAndExprDylib` fail with
a small probability. The test rebuilds a library; however, the build and
the re-build may fall into the same timestamp if the underlying
filesystem only has second granularity such that LLDB doesn't reload the
rebuilt library for the second execution.
The fix consists in artifically aging the library file from the first
build, i.e., setting its timestamp 10 seconds into the past. This not
only guarantees that LLDB reloads the file but also also that it is
rebuilt, so the explicit removing is now unnecessary and removed.
This issue exists for at least six months, possible since the tests
exists; I was not able to test older versions. However, we have recently
seen frequent failures, probably due to some change in our underlying
testing infrastructure.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: e6199d8f36263f018b47ba8fd1fd2f77e477b0ac
https://github.com/llvm/llvm-project/commit/e6199d8f36263f018b47ba8fd1fd2f77e477b0ac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
Log Message:
-----------
AMDGPU: Temporarily restore disassembler's dependency on TargetParser (#205175)
Reverts part of #204315
Commit: c046d4b47cd5c8c75efa8b93d0c1fbfff54c2559
https://github.com/llvm/llvm-project/commit/c046d4b47cd5c8c75efa8b93d0c1fbfff54c2559
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] Add googlewalt to Bazel codeowners (#205174)
Commit: 63692a910c10abb0a6ae67f99da7ffc8a1f3f964
https://github.com/llvm/llvm-project/commit/63692a910c10abb0a6ae67f99da7ffc8a1f3f964
Author: newgre <jannewger at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[ProfileData] Avoid unnecessary copies. (#204875)
Make `Frame` moveable and avoid some unnecessary copies in `RawMemProfReader`. Unnecessary copies fixed in this PR were found by the CSan prototype described in the RFC [1] CopySanitizer (CSan): Detecting unneccessary object copies at runtime.
[1] https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038
Co-authored-by: Jan Newger <jannewger at google.com>
Commit: 223bdef73f761f22353744eeea46663ed0941926
https://github.com/llvm/llvm-project/commit/223bdef73f761f22353744eeea46663ed0941926
Author: Mohammed Ashraf <125150223+Holo-xy at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
Log Message:
-----------
[BoundsSafety] unify ParseLexedAttribute (#186033)
Resolves #93263
Commit: a1cfa786c96fee1ce63d034674d7aeb4cc9cc5d9
https://github.com/llvm/llvm-project/commit/a1cfa786c96fee1ce63d034674d7aeb4cc9cc5d9
Author: Greg Clayton <gclayton at fb.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/source/Plugins/SymbolVendor/PECOFF/SymbolVendorPECOFF.cpp
M lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
A lldb/test/Shell/ObjectFile/ELF/build-id-case-debug-only.yaml
Log Message:
-----------
Fix SectionList::ReplaceSection to not replace incorrect section. (#204677)
We use SectionList::ReplaceSection to check for some sections in the
main object file and in separate debug info files. It was relying on
section IDs being consistent between different individual section lists
in different object files which does not work. I fixed this by not using
a section ID when replacing a section, but using the section shared
pointer so there can be no errors.
Commit: 982646f33d1ac7872832c2f3969dc83a762eab5d
https://github.com/llvm/llvm-project/commit/982646f33d1ac7872832c2f3969dc83a762eab5d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
Log Message:
-----------
[LSR] Preserve LCSSA in SCEVRewriter
This is necessery to fix some regressions when switching to the NewPM
and seems to improve optimization quality in some cases due to LSR
currently not understanding loop nests (usage of getSCEV vs
getSCEVScoped). This patch just enables LCSSA
preservation for SCEVRewriter and updates all the relevant tests. There
are some further fixes that are needed to get this fully working that
will be included in follow up patches. This patch also only changes
behavior in the NewPM path to get that unblocked while more work is done
on ensuring LCSSA preservation/requirements do not regress LSR.
Similar to #185373 (although without follow up fixes and a regression
test).
Regression test added for the specific NewPM case noticed is in
Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
(does not reproduce without the target triple).
Reviewers: arsenm, Meinersbur, fhahn, nikic, vikramRH
Pull Request: https://github.com/llvm/llvm-project/pull/191665
Commit: 5b0cb22661a9a256fee7af77a79960d435ce8582
https://github.com/llvm/llvm-project/commit/5b0cb22661a9a256fee7af77a79960d435ce8582
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
M llvm/test/Transforms/LoopStrengthReduce/preserve-lcssa.ll
Log Message:
-----------
[LSR] Preserve LCSSA in critical edge splitting
This was another case where LSR failed to preserve LCSSA, which will
trigger an assertion under the NewPM. This is currently only enabled
under the NewPM to avoid pessimizing any optimizations while unblocking
work on the NewPM.
Reviewers: fhahn, vikramRH, nikic, arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/192371
Commit: 871990a01ea72cb2090e73e52b0e66605a770f34
https://github.com/llvm/llvm-project/commit/871990a01ea72cb2090e73e52b0e66605a770f34
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
Log Message:
-----------
[LAA] Collect no-wrap predicates separately in getPtrStride/isNoWrap. (#203787)
Add an overload of getPtrStride and update isNoWrap to collect no-wrap
SCEV predicates in a vector, and have the caller add them to PSE if
needed.
This also requires to explicitly build the wrap predicate via
ScalarEvolution::getWrapPredicate (clearing statically implied flags)
rather than going through PredicatedScalarEvolution::setNoOverflow,
which can now be removed together with the flags map.
This also requires generalizing SCEVUnionPredicate::implies so a wrap
predicate can be recognized as implied by an existing wrap predicate
after applying equal predicates, avoiding redundant predicates when the
collected predicates are committed.
The only functional changes is re-ordering of runtime check groups in a
single test case; no functional IR changes across a large IR corpus (32k
modules)
To be used to avoid adding unnecessary wrap predicates during interleave
group analysis: https://github.com/llvm/llvm-project/pull/200807
PR: https://github.com/llvm/llvm-project/pull/203787
Commit: 3f0ef1efb26206c3f5d5621d86d740c7f466c67b
https://github.com/llvm/llvm-project/commit/3f0ef1efb26206c3f5d5621d86d740c7f466c67b
Author: Thurston Dang <thurston at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
Log Message:
-----------
Revert "[InstCombine] Merge consecutive assumes" (#205177)
Reverts llvm/llvm-project#204983 due to buildbot breakage (see
discussion in
https://github.com/llvm/llvm-project/pull/204983#issuecomment-4771424564)
Commit: fe4ea7b81cad9c76d304370b3b4395df43cba9ec
https://github.com/llvm/llvm-project/commit/fe4ea7b81cad9c76d304370b3b4395df43cba9ec
Author: adams381 <adams at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
Log Message:
-----------
[CIR] Compute union base subobject for tail-padding reuse (#201428)
A [[no_unique_address]] field whose type is a union with reusable tail
padding made CIRGen trip the insertPadding "offset >= size" assertion in
CIRGenRecordLayoutBuilder. CIR sized the union member at its full size, so a
following field that the ABI places in the union's tail padding overlapped the
union and insertPadding asserted.
CIR already computed a distinct, smaller base subobject type for structs and
classes whose tail padding can be reused, but not for unions. A union has
reusable tail padding when one of its members is itself a [[no_unique_address]]
field with tail padding, which makes the union's data size smaller than its
size.
computeRecordLayout now builds that base type for unions too, sized from
getDataSize(), and lowerUnion emits the storage type plus trailing padding as
ordinary struct fields so the reusable padding is exposed, mirroring classic
CodeGen. The base-type gate also no longer skips records marked final, which
classic CodeGen never skipped and which otherwise hit the same assertion for a
final union with reusable tail padding.
This unblocks libcxx's std::expected tests, which lean on [[no_unique_address]]
over unions.
Commit: 7ce49b34caa760403784fe2d541bf9feca4743a2
https://github.com/llvm/llvm-project/commit/7ce49b34caa760403784fe2d541bf9feca4743a2
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
Log Message:
-----------
[BOLT][Bazel] Configure Rewrite target backends (#205179)
`RewriteInstance.cpp` only creates target-specific `MCPlusBuilder`
instances when `X86_AVAILABLE` or `AARCH64_AVAILABLE` is defined. The
Bazel `Rewrite` target defines neither macro and hard-codes `TargetX86`,
so `createMCPlusBuilder()` returns null for both target backends defined
by the Bazel overlay. Derive the definitions and dependencies from the
generated `bolt_targets` list, restricted to the `TargetAArch64` and
`TargetX86` rules defined in this BUILD file, and use the same target
dependencies for `llvm-bolt`.
Validation: `buildifier -mode=check -lint=warn
utils/bazel/llvm-project-overlay/bolt/BUILD.bazel`; an equivalent
overlay change built and executed BOLT for Linux x86_64 and Linux
AArch64 in [hermetic-llvm's remote `//prebuilt/llvm:all`
build](https://app.buildbuddy.io/invocation/7943a005-c159-4cb9-af0e-00ffbaa40bb5).
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: faaec33ab9eadf3433ffe720d19028464f2c265d
https://github.com/llvm/llvm-project/commit/faaec33ab9eadf3433ffe720d19028464f2c265d
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/AST/RecursiveASTVisitor.h
A clang/test/AST/pr198903.cpp
A clang/test/Analysis/pr169302.cpp
Log Message:
-----------
[Clang][RAV] Simplify TraverseTemplateArgumentLocsHelper (#199131)
We were checking the result of getTemplateArgsAsWritten() to skip over
implicit instantiations, with an assert to ensure that it has the
desired effect, before checking getTemplateSpecializationKind() ==
TSK_ExplicitSpecialization which would skip over implicit instantiations
anyway. As the included tests show, the invariant that we were relying
on did not hold, but we no longer have any need to rely on that, we can
now just check the result of getTemplateSpecializationKind() directly.
Fixes: #198903
Fixes: #169302
Commit: 162d84f0955b8e10fd6d84ba7443c2eb596582ef
https://github.com/llvm/llvm-project/commit/162d84f0955b8e10fd6d84ba7443c2eb596582ef
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
A llvm/test/Transforms/LoopVectorize/X86/predicated-replicate-feeding-cast.ll
Log Message:
-----------
[VPlan] Handle single-scalar casts in replicateByVF. (#205181)
Fixes a crash after https://github.com/llvm/llvm-project/pull/203057.
Commit: e67b31a00e72ebb1b3a782c6bfcad9b51f173521
https://github.com/llvm/llvm-project/commit/e67b31a00e72ebb1b3a782c6bfcad9b51f173521
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M libunwind/src/UnwindRegistersSave.S
Log Message:
-----------
[libunwind] Fix an uninitialized read of __ra_sign_state (#205152)
The Arm DWARF spec defines UNW_AARCH64_RA_SIGN_STATE as being zeroed
until the first .cfi_negate_ra_state / .cfi_set_ra_state [1]. The GPRs
struct containing __ra_sign_state is memcpy'd directly from the
unw_context_t, which in turn is initialized by __unw_getcontext. Since
it is a pseudo register, there is no corresponding state to restore in
__unw_resume.
https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst#44call-frame-instructions
Commit: 8f249a7bd3bca35a5114aab85b5ce58ba4ca6461
https://github.com/llvm/llvm-project/commit/8f249a7bd3bca35a5114aab85b5ce58ba4ca6461
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Utility/FileSpec.cpp
Log Message:
-----------
[lldb][NFC] FileSpec::GetFileNameStrippingExtension should return a StringRef (#205178)
No need to create a ConstString of a filename without its file
extension.
Commit: 60b48545638f63669fde6c832e0689f78310f6ec
https://github.com/llvm/llvm-project/commit/60b48545638f63669fde6c832e0689f78310f6ec
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/FindDecl.h
Log Message:
-----------
[SSAF] Let UnsafeBufferUsageExtractor & PointerFlowExtractor ignore templates (#198927)
Templates are ignored for two reasons:
- Template instantiations are still handled. Template facts can be
inferred from their instantiations.
- Templates are inherently difficult to reason about. Their ASTs can
contain dependent expression types (such as ParenListExpr) that
complicate analysis.
Commit: 1f3d8cba700c2340bb223770932ebc054ce0b767
https://github.com/llvm/llvm-project/commit/1f3d8cba700c2340bb223770932ebc054ce0b767
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Rewrite/MachORewriteInstance.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
Log Message:
-----------
[BOLT] Route alignment options through BinaryContext (NFC) (#204902)
Consolidate all alignment-related `cl::opt` definitions into
`CommandLineOpts.cpp`, expose matching public members on `BinaryContext`,
and populate them from `RewriteInstance::adjustCommandLineOptions` (and
mirrored in `MachORewriteInstance`). Switch all readers in Aligner,
BinaryEmitter, LongJmp, BinaryFunction and the use-old-text logs to
`BC.*` instead of `opts::*`.
Commit: bb8f468d260f3c063b9cf23f387ec4b27bc1b146
https://github.com/llvm/llvm-project/commit/bb8f468d260f3c063b9cf23f387ec4b27bc1b146
Author: David Green <david.green at arm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
Log Message:
-----------
[AArch64][GlobalISel] Update some scalar types to integer in tests. NFC (#205190)
Commit: 33e8502336c76591172fbae37209d31c1e90c7c6
https://github.com/llvm/llvm-project/commit/33e8502336c76591172fbae37209d31c1e90c7c6
Author: Bhavesh M <85327930+beamandala at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/test/Dialect/EmitC/wrap-func-in-class.mlir
Log Message:
-----------
[mlir][EmitC] Make `GlobalOps` `FieldOps` in wrap-emitc-func-in-class pass (#203641)
Update the `WrapFuncInClassPass` pass so that `GlobalOp`s are moved into
the `ClassOp` as `FieldOps`. This respects MLIR's behavior of resolving
references to the closest parent operation that defines a symbol table
which is the `ClassOp` that we are creating in this pass.
Without this change, references to a `GlobalOp` in `GetGlobalOp` are
failing to resolve.
Details:
- Identify `GlobalOp`s
- Create a `FieldOp` within the `ClassOp` for each `GlobalOp`
- Delete the `GlobalOp`s after all functions have been wrapped in a
class. Doing this after every function can cause an error when multiple
functions refer to the same `GlobalOp`(s) which would be deleted after
the first function is wrapped in a class.
Also renamed `fName` parameter in `populateWrapFuncInClass` to
`funcName` to match naming in `WrapFuncInClass`.
Based on PR #153452. Key differences:
- No size is set for the `globalsToMove` `SmallVector` type because I'm
not sure if the number of global variables is consistent across
different models.
- `GlobalOp`s are deleted after all functions have been processed.
- Instead of directly cloning the `GlobalOp`, an equivalent `FieldOp` is
created
- `GetGlobalOp`s are translated to `GetFieldOp`s
Co-authored-by: [Jaddyen](https://github.com/Jaddyen)
Commit: ef752a0780be31ac94be5f459ff60629136f4087
https://github.com/llvm/llvm-project/commit/ef752a0780be31ac94be5f459ff60629136f4087
Author: Daniel Hill <daniel.hill at mongodb.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/eh-frame-hdr.test
Log Message:
-----------
[BOLT] Emit .eh_frame_hdr before .eh_frame to prevent table scans from libdw (#201917)
resolves https://github.com/llvm/llvm-project/issues/201701 by moving
the `.eh_frame_hdr` section-header entry before `.eh_frame` before
assigning final section indices.
This lets BOLT binaries work with existing [libdw library logic
expecting the index before the
table](https://github.com/sourceware-org/elfutils/blob/67199e1c974db37f2bd200dcca7d7103f42ed06e/libdw/dwarf_getcfi_elf.c#L301),
preventing linear `.eh_frame` scanning.
Commit: 7781a0c196acda252a1db67936b76e96e9971f4c
https://github.com/llvm/llvm-project/commit/7781a0c196acda252a1db67936b76e96e9971f4c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Do not emit data transfer for constant read on the rhs (#205185)
Commit: c97eb542a7c3202957da66758568230289b70697
https://github.com/llvm/llvm-project/commit/c97eb542a7c3202957da66758568230289b70697
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/expression.cpp
M flang/test/Semantics/call47.f90
Log Message:
-----------
[flang][Semantics] Do not require explicit interface checks for statement functions (#205023)
https://github.com/llvm/llvm-project/pull/198610 caused a regression,
where the
code path for explicit interface checks was also used for the statement
functions arg check. Refactor the code to avoid explicit interface
checks.
Fixes #203500
Assisted-by: AI
Commit: 211ca98dd0a58600461f4d33ca5bf2a626558487
https://github.com/llvm/llvm-project/commit/211ca98dd0a58600461f4d33ca5bf2a626558487
Author: adams381 <adams at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
M clang/test/CIR/IR/invalid-data-member.cir
Log Message:
-----------
[CIR] DataMemberAttr: replace flat index with GEP-style path (#200854)
`DataMemberAttr` stored a single field index relative to the immediately containing class, which broke when the member is inherited: `int Derived::*p = &Derived::x` with `x` in Base produced a spurious `errorNYI` because Derived's CIR record doesn't directly hold `x`.
The attribute now stores a GEP-style `member_path` — a sequence of CIR field indices stepping from the pointer's class type down to the member, one level per inheritance hop. `lowerDataMemberConstant` walks the path accumulating element offsets to produce the Itanium ABI byte value.
`buildMemberPath` searches the `destClass` record tree for the target field (`findFieldMemberPath`). `CK_BaseToDerivedMemberPointer` and `CK_DerivedToBaseMemberPointer` return `{}` in ConstExprEmitter, delegating to the APValue path which builds the correct path via `buildMemberPath`. Virtual bases are not yet handled.
`CK_ReinterpretMemberPointer` remains `errorNYI` on this branch; a follow-up PR will add that separately.
Commit: 201cf31b84acbc80bf4a6d09197bc7e9df9bb4a5
https://github.com/llvm/llvm-project/commit/201cf31b84acbc80bf4a6d09197bc7e9df9bb4a5
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
Log Message:
-----------
[flang] Reduce FIR AA overhead for functions with one scope. (#204009)
Avoid overheads of collectScopedOrigins and
getDeclarationScope/DominanceInfo
when the values passed to FIR AA belong to a function with a single
dummy scope.
Commit: fa016f67531e2274f7a7e38d11461ef5efcc5827
https://github.com/llvm/llvm-project/commit/fa016f67531e2274f7a7e38d11461ef5efcc5827
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/test/tools/llvm-cas/validation.test
Log Message:
-----------
[llvm-cas] Fix validation test on Ubuntu / uutils v0.2.2, NFC (#205199)
Work around uutils/coreutils#9128 by implementing the 40 byte truncation
in Python. Otherwise, this test fails out of the box on Ubuntu 25.10.
GNU coreutils supports -s=arg, but Mac truncate does not. Resorting to
Python seemed like the cleanest solution. The next best idea was to use
subshells or other techniques to calculate the file size and subtract
40, but that seemed excessive.
Commit: 5ad66bdcaff8bbcce63bb9aef317600ae253cfbf
https://github.com/llvm/llvm-project/commit/5ad66bdcaff8bbcce63bb9aef317600ae253cfbf
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/ProjectGovernance.rst
Log Message:
-----------
[docs] Minor edits to project governace docs (#203149)
s/non-private/public/
Pencil in the 2027 calendar year election dates, so they are posted well
in advance and we have a link anchor we can share.
Commit: cd3bfc1f992612aff5df2c5d6c73d1c08a185880
https://github.com/llvm/llvm-project/commit/cd3bfc1f992612aff5df2c5d6c73d1c08a185880
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/test/Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
Log Message:
-----------
[SCEV] Preserve LCSSA when reusing dominating variable
This seems to just be a missing case in SCEV. This came up when looking
at making LSR preserve LCSSA for the NewPM. Regression test of that
nature has been added.
Reviewers: fhahn, nikic, arsenm
Pull Request: https://github.com/llvm/llvm-project/pull/192831
Commit: 64d386e642e5ee3f31a4d0ef45454bef10b4ea90
https://github.com/llvm/llvm-project/commit/64d386e642e5ee3f31a4d0ef45454bef10b4ea90
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/README.txt
A llvm/docs/CMake.md
R llvm/docs/CMake.rst
A llvm/docs/CodeGenerator.md
R llvm/docs/CodeGenerator.rst
A llvm/docs/CodingStandards.md
R llvm/docs/CodingStandards.rst
A llvm/docs/CommandGuide/index.md
R llvm/docs/CommandGuide/index.rst
A llvm/docs/Contributing.md
R llvm/docs/Contributing.rst
A llvm/docs/DeveloperPolicy.md
R llvm/docs/DeveloperPolicy.rst
A llvm/docs/GettingInvolved.md
R llvm/docs/GettingInvolved.rst
A llvm/docs/GettingStarted.md
R llvm/docs/GettingStarted.rst
A llvm/docs/GettingStartedTutorials.md
R llvm/docs/GettingStartedTutorials.rst
A llvm/docs/GitHub.md
R llvm/docs/GitHub.rst
M llvm/docs/GitRepositoryPolicy.md
M llvm/docs/InstrRefDebugInfo.md
A llvm/docs/Passes.md
R llvm/docs/Passes.rst
A llvm/docs/ProgrammersManual.md
R llvm/docs/ProgrammersManual.rst
A llvm/docs/RFCProcess.md
R llvm/docs/RFCProcess.rst
A llvm/docs/Reference.md
R llvm/docs/Reference.rst
M llvm/docs/RemoveDIsDebugInfo.md
A llvm/docs/SourceLevelDebugging.md
R llvm/docs/SourceLevelDebugging.rst
M llvm/docs/SphinxQuickstartTemplate.md
A llvm/docs/TableGen/index.md
R llvm/docs/TableGen/index.rst
A llvm/docs/TestingGuide.md
R llvm/docs/TestingGuide.rst
A llvm/docs/UserGuides.md
R llvm/docs/UserGuides.rst
A llvm/docs/WritingAnLLVMBackend.md
R llvm/docs/WritingAnLLVMBackend.rst
A llvm/docs/WritingAnLLVMNewPMPass.md
R llvm/docs/WritingAnLLVMNewPMPass.rst
A llvm/docs/WritingAnLLVMPass.md
R llvm/docs/WritingAnLLVMPass.rst
M llvm/docs/conf.py
A llvm/docs/index.md
R llvm/docs/index.rst
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/tools/reduce-chunk-list/reduce-chunk-list.cpp
M llvm/utils/lit/tests/Inputs/shtest-define/examples/param-subst.txt
Log Message:
-----------
[docs] Rename 22 popular LLVM docs .rst -> .md (#201243)
Tracking issue: #201242
RFC: https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
Migration guide: https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
Update filename references, but leave the docs with reST syntax to
ensure rename detection works.
This intentionally breaks the documentation build, but I will immediately follow up by merging the PR that fixes it.
Commit: 3e414a36cd82651e9d904e21ab444d3ca265d254
https://github.com/llvm/llvm-project/commit/3e414a36cd82651e9d904e21ab444d3ca265d254
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/CMake.md
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/index.md
M llvm/docs/Contributing.md
M llvm/docs/DeveloperPolicy.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GettingStartedTutorials.md
M llvm/docs/GitHub.md
M llvm/docs/Passes.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/RFCProcess.md
M llvm/docs/Reference.md
M llvm/docs/SourceLevelDebugging.md
M llvm/docs/TableGen/index.md
M llvm/docs/TestingGuide.md
M llvm/docs/UserGuides.md
M llvm/docs/WritingAnLLVMBackend.md
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/docs/conf.py
M llvm/docs/index.md
Log Message:
-----------
[docs] Migrate 22 popular LLVM docs to MyST (#201244)
This was done with LLM assistance.
I rebuilt the LLVM docs, opened all 22 docs in a browser and scrolled
through them, and caught and fixed a few errors.
Tracking issue: #201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840
Commit: d9a1ed0c32ac6729c45ea6998281a1cd53c44fb6
https://github.com/llvm/llvm-project/commit/d9a1ed0c32ac6729c45ea6998281a1cd53c44fb6
Author: Kevin Sala Penades <salapenades1 at llnl.gov>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M offload/test/CMakeLists.txt
Log Message:
-----------
[offload] Add kernel replay tool to tests' dependencies (#205209)
Commit: 9e80b89e9481a88333c83d1f48a4492cdb8a84aa
https://github.com/llvm/llvm-project/commit/9e80b89e9481a88333c83d1f48a4492cdb8a84aa
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/tools/debugserver/source/RNBRemote.cpp
Log Message:
-----------
[lldb] Use heuristics to extend rather than replace error message (#205196)
When an attach fails, HandlePacket_A tries to explain why. The last two
checks are heuristics that discard any error debugserver already
produced for this specific failure.
The guess can be wrong, for example the PT_DENY_ATTACH test case from
#204688 is incorrectly reported as failing due to it running in a
non-interactive debug session on the bots.
Include debugserver's real error into the heuristic message, instead of
replacing it, so the real reason is never lost.
Commit: e522c116b1e5180ac7a98f992895a296d3b75ef9
https://github.com/llvm/llvm-project/commit/e522c116b1e5180ac7a98f992895a296d3b75ef9
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
A clang/test/CIR/CodeGen/unary-expr-or-type-trait-32bit.cpp
Log Message:
-----------
[CIR] Use the AST result type for sizeof/alignof constants (#203942)
On targets where `size_t` is narrower than 64 bits (e.g. `i686`), CIR
codegen for `sizeof`/`alignof`/`__builtin_vectorelements` crashes with a
type/value bitwidth mismatch.
The result of these expressions is `size_t`, but the emitted integer
constant was built with a hardcoded 64-bit type. `EvaluateKnownConstInt`
returns an `APSInt` with the width of the AST result type (32 bits on
this target), so it no longer matches the `IntAttr`'s type and trips the
`IntAttr` verifier.
### How to Reproduce
```c++
using size_t = decltype(sizeof(int));
size_t size_of_int() { return sizeof(int); }
clang -cc1 -std=c++20 -triple i686-unknown-linux-gnu -fclangir \
-emit-cir test.cpp -o test.cir
error: type and value bitwidth mismatch: 64 != 32
clang: mlir/include/mlir/IR/StorageUniquerSupport.h:180:
... Assertion `succeeded(ConcreteT::verifyInvariants(...))' failed.
#11 cir::IntAttr::get(mlir::Type, llvm::APInt const&)
#12 ScalarExprEmitter::VisitUnaryExprOrTypeTraitExpr(...)
#13 CIRGenFunction::emitScalarExpr(...)
```
### Fix
Form the IntAttr using the converted AST result type (convertType(e->getType())) instead of a hardcoded 64-bit type, matching classic codegen. The same path covers the fixed-vector __builtin_vectorelements case.
Commit: a7263bea29efd710a1207afe5641fad54692284d
https://github.com/llvm/llvm-project/commit/a7263bea29efd710a1207afe5641fad54692284d
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
Log Message:
-----------
[lldb] Remove ConstString from Breakpoint::GetMatchingFileLine (#205210)
Commit: 2d0b2fb0e0d8fa198be51096923675de9a564f83
https://github.com/llvm/llvm-project/commit/2d0b2fb0e0d8fa198be51096923675de9a564f83
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Log Message:
-----------
Revert "[lldb][Windows] Remember server's primary stop thread on gdb-remote stops" (#205220)
Reverts llvm/llvm-project#203525 because it breaks TestRealDefinition.py
Commit: a6986f0b929d575728d564cd41bb0f9a6b6fdea4
https://github.com/llvm/llvm-project/commit/a6986f0b929d575728d564cd41bb0f9a6b6fdea4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
A flang/test/Semantics/modfile84.f90
Log Message:
-----------
[flang][cuda][openacc] Emit an error when CUDA symbols are imported with CUDA disabled (#205207)
Commit: bc4aadb7bfc2d00487c5965bc4f12a510db181a9
https://github.com/llvm/llvm-project/commit/bc4aadb7bfc2d00487c5965bc4f12a510db181a9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Lua/LuaState.cpp
Log Message:
-----------
[lldb] Fix LuaState after #205210 (#205219)
Commit: ff4bc6e5d96f1dabe2f82c289fa97889830fd08e
https://github.com/llvm/llvm-project/commit/ff4bc6e5d96f1dabe2f82c289fa97889830fd08e
Author: superdusty <superdusty at foxmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/ext-int.cpp
Log Message:
-----------
[Clang] Fix crash when comparing fixed point type with BitInt (#199912)
Fixes #196948
Added checks in `handleFixedPointConversion`: reject fixed point/BitInt
comparisons
Now clang properly emits an error instead of crashing.
---------
Co-authored-by: cry <2091136672 at foxmail.com>
Commit: 38df8cbd328efd43326ef18fc26a9a881f76cec1
https://github.com/llvm/llvm-project/commit/38df8cbd328efd43326ef18fc26a9a881f76cec1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A lldb/test/API/macosx/deny-attach/Makefile
A lldb/test/API/macosx/deny-attach/TestDenyAttach.py
A lldb/test/API/macosx/deny-attach/main.c
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
Log Message:
-----------
[lldb] Survive ptrace(PT_DENY_ATTACH) when attaching (#204688) (#205198)
A process can opt out of being debugged with ptrace(PT_DENY_ATTACH). The
XNU kernel enforces this by delivering SIGSEGV to the *attaching*
process while it is still inside the ptrace(PT_ATTACHEXC) syscall. This
means debugserver gets killed before it can inspect the result. LLDB
only sees the dropped connection ("error: attach failed: lost
connection").
The condition can't be detected up front: the target's P_LNOATTACH flag
is not exposed to userspace. To work around this, install a temporary
SIGSEGV handler around the ptrace(PT_ATTACHEXC) call in AttachForDebug
and siglongjmp back out if it fires, turning the fatal signal into an
EPERM that propagates to lldb as a clear message:
```
error: attach failed: cannot attach to process N because it has
disabled debugging via ptrace(PT_DENY_ATTACH)
```
The handler only acts on a SIGSEGV that arrives on the attaching thread
while the guard is armed. Any other SIGSEGV restores the default handler
and re-raises. Genuine, unrelated, crashes still report normally.
rdar://44542907
Assisted-by: Claude
Commit: c7e815b189ea5c0f8261ba13eb677465c992c625
https://github.com/llvm/llvm-project/commit/c7e815b189ea5c0f8261ba13eb677465c992c625
Author: Alexandre Isoard <isoard at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
A clang/test/CodeGenHLSL/BasicFeatures/OutArgLifetime.hlsl
Log Message:
-----------
[HLSL] Emit lifetime.start before copy-in for inout parameters (#191917)
For inout parameters, Clang was emitting lifetime.start after the
copy-in store that initializes the temporary. Per LLVM's lifetime
semantics, any access to memory outside its lifetime is undefined
behavior, so the copy-in store was technically UB and the value was
undefined after lifetime.start.
Move EmitLifetimeStart into EmitHLSLOutArgLValues so that it is emitted
before EmitInitializationToLValue, putting the copy-in store within the
lifetime of the temporary.
---------
Co-authored-by: Alexandre Isoard <alexandre.isoard at amd.com>
Co-authored-by: Deric C. <cheung.deric at gmail.com>
Commit: 52e00058960e90b1ccadd07b95ca05d13e1f1318
https://github.com/llvm/llvm-project/commit/52e00058960e90b1ccadd07b95ca05d13e1f1318
Author: Wenju He <wenju.he at intel.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaOpenCL.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOpenCL.cpp
A clang/test/SemaOpenCL/read-image-integer-linear-filter.cl
Log Message:
-----------
[OpenCL] Warn if filter_mode is linear in read_image{i|ui} (#204086)
Per OpenCL spec:
The read_image{i|ui} calls support a nearest filter only. The
filter_mode specified in sampler must be set to CLK_FILTER_NEAREST;
otherwise the values returned are undefined.
Warn users when they apply a linear filter accidentally.
Address https://github.com/intel/compute-runtime/issues/379#issuecomment-4592083032
Assisted-by: Claude Sonnet 4.6
Commit: dfe8b229d3ec40e49250cc587009d5752b58b087
https://github.com/llvm/llvm-project/commit/dfe8b229d3ec40e49250cc587009d5752b58b087
Author: yonghong-song <yhs at fb.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
Log Message:
-----------
[BPF] Increase BPFMaxStoresPerMemFunc from 128 to 192 (#205222)
With commits [1] and [2], memory operations like memcpy/memmove lower to
a sequence of loads/stores whose width is the minimum of the source and
destination alignment, and the store count is bounded by
BPFMaxStoresPerMemFunc. For 1-byte alignment, the maximum copy length
that can be inlined is therefore 128 bytes.
This may regress cases that previously inlined. Consider a memcpy with
src alignment 8, dst alignment 1 and size 136. After [1]/[2], the store
width is the minimum alignment (1 byte), so the store count is 136,
which exceeds the 128 limit and the copy falls back. Before [1]/[2], the
store count was computed with a fixed 8-byte unit regardless of the
actual alignment (each unit expands to 8 one-byte stores when the
minimum alignment is 1), so the total count was only 17 (136/8 < 128)
and the copy was inlined.
Raise the limit from 128 to 192 to mitigate. Alternatively, users can
increase alignment to avoid the regression.
[1] https://github.com/llvm/llvm-project/pull/201119
[2] https://github.com/llvm/llvm-project/pull/204042
Commit: 899548615f41018113e08260817ddcfc23060937
https://github.com/llvm/llvm-project/commit/899548615f41018113e08260817ddcfc23060937
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] packed exchanged add/sub codegen (#203473)
Wire up the already-defined exchanged add/sub instructions
pas/psa/psas/pssa/paas/pasa with llvm.riscv.* intrinsics and isel
patterns.
Commit: f519bd91d300238660914d9094b5e70090da1d85
https://github.com/llvm/llvm-project/commit/f519bd91d300238660914d9094b5e70090da1d85
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/memprof-metadata-bad.ll
Log Message:
-----------
[Verifier] Require !callsite with !memprof metadata (#205053)
Fixes: https://github.com/llvm/llvm-project/issues/181237
Commit: d853c056e5db0f9e1779e351b02c98a141a95c8d
https://github.com/llvm/llvm-project/commit/d853c056e5db0f9e1779e351b02c98a141a95c8d
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-nontemporal.cpp
Log Message:
-----------
[CIR] Add support for __builtin_nontemporal_store and __builtin_nontemporal_load (#197872)
Add nontemporal attribute to cir.load and cir.store ops.
Commit: e2765f3e202cd0ed126fb72cd77a1f59ecaf739b
https://github.com/llvm/llvm-project/commit/e2765f3e202cd0ed126fb72cd77a1f59ecaf739b
Author: ZT Qin <xiaoyaoyou95 at hotmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
Log Message:
-----------
[OpenMPOpt][Attributor] Selectively seed deglobalization AAs (#198710)
This addresses a compile-time issue observed on a large generated C++
translation unit compiled with `-fopenmp`.
The source code is not OpenMP-heavy. It mainly consists of generated
function-registration wrappers, template instantiations, lambdas, and
small helper functions. However, because the TU is compiled with OpenMP
enabled, `OpenMPOptCGSCCPass` runs and drives Attributor on a module
with many functions.
`OpenMPOpt::registerAAsForFunction` currently eagerly creates the
deglobalization AAs for every function in OpenMP device modules:
* `AAHeapToShared`
* `AAHeapToStack`
Most generated wrapper/helper functions in the motivating workload do
not contain `__kmpc_alloc_shared`, removable allocations, or free-like
calls. In those cases, the deglobalization AAs have no useful candidates
but still contribute to Attributor initialization and fixed-point work.
This patch makes the deglobalization AA seeding more selective:
* only create `AAHeapToShared` for functions with non-empty
`__kmpc_alloc_shared` uses;
* only create `AAHeapToStack` for functions containing removable
allocation or free-like call candidates;
* make `AAHeapToShared` use the per-function runtime use vector instead
of scanning all users of the runtime declaration.
I also measured the previously attempted pieces independently. The
compile-time improvement comes from the selective seeding change. The
Attributor use-caching change and the `registerAAsForFunction`
registration cache did not show meaningful benefit on the motivating
workload, so they have been removed from this PR.
On the motivating TU, selective seeding reduced total compile time from
about 3473s to 271s, and `OpenMPOptCGSCCPass` time from about 3232s to
111s.
---------
Co-authored-by: jnudhf <jnudhf at users.noreply.github.com>
Co-authored-by: Shilei Tian <i at tianshilei.me>
Commit: c91c9fced2ff7266e566fad2963ab241bf6360b3
https://github.com/llvm/llvm-project/commit/c91c9fced2ff7266e566fad2963ab241bf6360b3
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/Allocator.h
M llvm/unittests/Support/AllocatorTest.cpp
Log Message:
-----------
Reland [Allocator] Keep bump pointer at a minimum alignment (#205240)
Reland #203718 (reverted in #205091) by making computation in integer
domain to avoid UB (nullptr + non-zero offset).
Add a `MinAlign` template parameter (default 8, sizeof(size_t) on 64-bit
platforms) so that the common case `Alignment <= MinAlign` can skip
realigning `CurPtr`.
This is achieved by rounding each allocation's size up to MinAlign, so
the bump pointer stays MinAlign-aligned between allocations.
SpecificBumpPtrAllocator::DestroyAll() walks objects at a fixed
sizeof(T) stride and needs tight packing, so it uses MinAlign=1.
(alignof(T) would
pack just as tightly and reuse the default instantiation, but T may be
incomplete here, e.g. `SpecificBumpPtrAllocator<MCSectionELF>`.)
Its `Allocate` still skips the realign: the slab is max_align_t-aligned
and every size is a multiple of alignof(T), so the bump pointer stays
alignof(T)-aligned and we can just request alignment 1. Over-aligned
types (alignof(T) > alignof(max_align_t)) keep requesting alignof(T).
Also use `bit_ceil` instead of `NextPowerOf2` in the placement operator
new alignment heuristic. NextPowerOf2 is strictly greater, so an 8-byte
pointer-sized object asked for alignment 16 and missed the fast path;
bit_ceil(8) == 8 keeps it on the fast path.
Aided by Claude Opus 4.8
Commit: de1effc8639273ea79f95e198133dec777ff8908
https://github.com/llvm/llvm-project/commit/de1effc8639273ea79f95e198133dec777ff8908
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/MC/RISCV/rv64p-aliases-valid.s
Log Message:
-----------
[RISCV][P-ext] Rename pwcvt/pncvt pseudoinstructions for RV64. (#205227)
We need to add a 'w' to the suffix to indicate it operates on a word and
not a register pair like on RV32. See https://github.com/riscv/riscv-p-spec/pull/303
Commit: 53fec04cc23de825ed6ae1c84dea5d45b746fba9
https://github.com/llvm/llvm-project/commit/53fec04cc23de825ed6ae1c84dea5d45b746fba9
Author: Anutosh Bhat <andersonbhat491 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/Dialect/Arith/int-range-opts-crash.mlir
Log Message:
-----------
[mlir][arith] Fix APInt bitwidth mismatch crash in int-range-optimizations (#205110)
Fixes https://github.com/llvm/llvm-project/issues/204909
When an op's `areTypesCompatible()` hook accepts integers of different
widths across a region boundary, the range analysis can propagate a
constant range whose APInt bitwidth does not match the IR type of the
destination value.
This caused `IntegerAttr::get` to `assert` in
`maybeReplaceWithConstant`.
Fix by bailing out in `maybeReplaceWithConstant` when the bitwidths
mismatch, and adding the same check to the needsReplacing lambda in
matchAndRewrite.
The second guard is necessary to mirror the existing isIntOrIndex()
guard — without it the pattern claims success without changing the IR,
causing the greedy rewrite driver to loop.
We should now see
```
anutosh491 at Anutoshs-MacBook-Air mlir-build % ./bin/mlir-opt -int-range-optimizations bin/a.mlir
module {
func.func @m0() -> i32 {
%c1_i64 = arith.constant 1 : i64
%c0_i32 = arith.constant 0 : i32
%0 = "test.region_types_compat"(%c0_i32) ({
^bb0(%arg0: i64):
test.types_compat_yield %c1_i64 : i64
}) : (i32) -> i32
return %0 : i32
}
}
```
Commit: cdfd1e081529447ecb56ae7a43a32d8b237b9c28
https://github.com/llvm/llvm-project/commit/cdfd1e081529447ecb56ae7a43a32d8b237b9c28
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/struct-to-vector-subpartition.ll
Log Message:
-----------
Patch tryCanonicalizeStructToVector to handle split slice tails (#201434)
We choose a vector alloca over a struct alloca when all users of the
alloca are memory or lifetime intrinsics. But we only accounted for
slices that start in the corresponding partition. We have to also check
that all split slice tails overlapping the partition are memory or
lifetime intrinsics
I also updated the `PassRegistry.def` to include the new pass option
because we forgot to add that.
Commit: d147ad969aa97fa500e250c33fe8d0770117708b
https://github.com/llvm/llvm-project/commit/d147ad969aa97fa500e250c33fe8d0770117708b
Author: Sam Elliott <aelliott at qti.qualcomm.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-valid.s
Log Message:
-----------
[RISCV] Update Xqcilo Pseudos (#196422)
This changes the Xqcilo pseudos to instead emit a sequence of
`qc.e.li` followed by a standard load/store annotated with %qc.access.
The new sequence is easier for our linker to relax.
This Change was written with the assistance of AI.
Commit: f7ec732d50620ed5833c283558bf74fd446962e9
https://github.com/llvm/llvm-project/commit/f7ec732d50620ed5833c283558bf74fd446962e9
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
R flang/test/Semantics/modfile84.f90
Log Message:
-----------
Revert "[flang][cuda][openacc] Emit an error when CUDA symbols are imported with CUDA disabled" (#205254)
Reverts llvm/llvm-project#205207
Commit: 3d8ca7e0544c4cca5367c83b1ccd4246bc3dea77
https://github.com/llvm/llvm-project/commit/3d8ca7e0544c4cca5367c83b1ccd4246bc3dea77
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
Log Message:
-----------
[orc-rt] Replace AAHandlerTraits with CallableArgInfo. NFCI. (#205257)
CallableArgInfo provides a superset of AAHandlerTraits functionality, so
we don't need the latter.
Commit: c492c7d5c2e49e576fce149706139f37f6aae934
https://github.com/llvm/llvm-project/commit/c492c7d5c2e49e576fce149706139f37f6aae934
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Avoid implicit conversions from MCRegister to MCPhysReg. NFC (#205260)
Commit: 194da0f3e774426dfa646e9879a1ad109db06c6c
https://github.com/llvm/llvm-project/commit/194da0f3e774426dfa646e9879a1ad109db06c6c
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/CompilerInvocation.h
M clang/include/clang/Frontend/FrontendOptions.h
A clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
Log Message:
-----------
Reland "[clang][ssaf][NFC] Move SSAF flags from FrontendOptions to a dedicated SSAFOptions" (#204798)
Second attempt of #204686
This class will help keeping SSAF options apart from generic
FrontendOptions. It is inspired by AnalyzerOptions.
This way all of these SSAF (and future) options will be at a
centralized place.
In preparation of rdar://179151023
Commit: 576584794d9124c7228f4599e757dc909a534f1c
https://github.com/llvm/llvm-project/commit/576584794d9124c7228f4599e757dc909a534f1c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/AllocAction.h
M orc-rt/include/orc-rt/SPSAllocAction.h
M orc-rt/unittests/AllocActionTest.cpp
Log Message:
-----------
[orc-rt] Add return serialization to AllocActionFunction::handle. (#205271)
Add a Serializer template parameter to AllocActionFunction::handle and
apply it to the handler's return value before forwarding as the action
result. This lets handler authors return types other than
WrapperFunctionBuffer.
For SPS, AllocActionSPSSerializer is the default Serializer used by
SPSAllocActionFunction::handle. It accepts either:
- WrapperFunctionBuffer (identity pass-through, the existing behavior),
or
- Error (success → empty WFB; failure → out-of-band-error WFB carrying
toString(Err)).
Adds AllocActionTest coverage for both Error-return paths.
Commit: 639c5a014fad13c683b01c66a1474b7aa47ce7ee
https://github.com/llvm/llvm-project/commit/639c5a014fad13c683b01c66a1474b7aa47ce7ee
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/ioctl.h
M libc/src/sys/ioctl/linux/CMakeLists.txt
M libc/src/sys/ioctl/linux/ioctl.cpp
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/isatty.cpp
Log Message:
-----------
[libc] Introduce the ioctl syscall wrapper and port all callers (#204640)
This patch adds an ioctl syscall wrapper in linux_syscalls namespace and
migrates all direct SYS_ioctl calls to use it.
To handle the polymorphic nature of ioctl arguments (where some commands
expect pointers, some expect scalar integers like queue_selector, and
some expect no argument at all), I use a helper struct IoctlArg with
implicit constructors. This avoids template bloat and overload
ambiguities (particularly around literal 0) while keeping call sites
clean.
Assisted by Gemini.
Commit: c1bc84866a5ada0ec12c810ca42b381b776d198a
https://github.com/llvm/llvm-project/commit/c1bc84866a5ada0ec12c810ca42b381b776d198a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
[Clang][ABI] Validate consistency between ABI lowering implementation (#203281)
If the LLVM ABI library is used, and assertions are enabled, compute the
ABI both using Clang's implementation the the LLVM ABI library, and
verify that the results are the same.
Commit: ffeb9c1d2612cb5729889b6e82ade060192722dd
https://github.com/llvm/llvm-project/commit/ffeb9c1d2612cb5729889b6e82ade060192722dd
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
Log Message:
-----------
[clang][ssaf][NFC] Make SSAFOptions available in Builders and Extractors (#204684)
Now that we have SSAFOptions, it would make it a lot more ergonomic if
it was accessible from builders and extractors.
This PR does exactly that.
Part of rdar://179151023
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 50838f484bbf4d514386d0717a789600790f1a1f
https://github.com/llvm/llvm-project/commit/50838f484bbf4d514386d0717a789600790f1a1f
Author: Yuxuan Shui <yshuiv7 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-symbolizer.rst
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/test/tools/llvm-symbolizer/pdb/pdb.test
M llvm/tools/llvm-symbolizer/Opts.td
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
Log Message:
-----------
[symbolizer] Add a --pdb option. (#171053)
Closes #142490
Commit: ebaee77528bb1e5b241c4466117772dd3954340e
https://github.com/llvm/llvm-project/commit/ebaee77528bb1e5b241c4466117772dd3954340e
Author: adalal-2441 <adalal at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/avx512-load-store.ll
Log Message:
-----------
[X86] Prevent folding of volatile scalar loads into masked loads in selects (#205103)
X86 select patterns were folding scalar FP loads into AVX-512 masked
loads. Since masked loads suppress memory access when the mask is 0,
this can incorrectly eliminate the observable access of volatile loads,
leading to miscompilation. Non-volatile loads are unaffected.
Multi-use loads already avoid folding, since folding consumes the load
into the instruction's memory operand and leaves no value for the other
users, forcing it to be materialized into a register. Single-use
volatile loads did not, and this must also be prevented, as volatile
loads are required to always perform their memory access.
Fix this by using the isSimple()-guarded simple_load pattern instead of
loadf32/loadf64, ensuring volatile loads are not folded.
Found via @jlebar's X86 LLVM bug hunt / FuzzX effort:
https://github.com/SemiAnalysisAI/FuzzX/blob/master/x86/bugs/093-avx512-vmovs-x86selects-load-fold-mask-suppress
Commit: 635cbc0ebb2851d4cb9d72dcd62f2ef2dd1c25c5
https://github.com/llvm/llvm-project/commit/635cbc0ebb2851d4cb9d72dcd62f2ef2dd1c25c5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
R libc/src/__support/OSUtil/linux/syscall_wrappers/ioctl.h
M libc/src/sys/ioctl/linux/CMakeLists.txt
M libc/src/sys/ioctl/linux/ioctl.cpp
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/isatty.cpp
Log Message:
-----------
Revert "[libc] Introduce the ioctl syscall wrapper and port all callers" (#205277)
Reverts llvm/llvm-project#204640
Breaks libc-x86_64-debian-fullbuild. Reverting while I investigate.
Commit: 9e3fc52b6e15d9ca4c07d014e7ac41ddd462f353
https://github.com/llvm/llvm-project/commit/9e3fc52b6e15d9ca4c07d014e7ac41ddd462f353
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
Log Message:
-----------
[AMDGPU] Fold v2{i|f}64 immediates (#205195)
Commit: 3e69ed4e8aeb3f3773e4551308141af1c91d78cb
https://github.com/llvm/llvm-project/commit/3e69ed4e8aeb3f3773e4551308141af1c91d78cb
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/CompilerInvocation.h
M clang/include/clang/Frontend/FrontendOptions.h
R clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
Log Message:
-----------
Revert some SSAF patches (#205279)
I've started seeing some failures on Windows permissive bots.
I'll revert my patches for now until further investigation.
errors:
https://lab.llvm.org/buildbot/#/builders/107/builds/20548
```
C:\b\slave\sanitizer-windows\llvm-project\clang\lib\Frontend\CompilerInvocation.cpp
C:\b\slave\sanitizer-windows\build\tools\clang\include\clang/Options/Options.inc(9981): error C2065: 'SSAFOpts': undeclared identifier
C:\b\slave\sanitizer-windows\build\tools\clang\include\clang/Options/Options.inc(9982): note: see reference to function template instantiation 'auto GenerateSSAFArgs::<lambda_5f504a9e8792b8b03f1d39701f31dbec>::operator ()<T>(const T &) const' being compiled
with
[
T=std::vector<std::string,std::allocator<std::string>>
]
```
Revert "Reland "[clang][ssaf][NFC] Move SSAF flags from FrontendOptions
to a dedicated SSAFOptions" (#204798)"
This reverts commit 194da0f3e774426dfa646e9879a1ad109db06c6c.
Revert "[clang][ssaf][NFC] Make SSAFOptions available in Builders and
Extractors (#204684)"
This reverts commit ffeb9c1d2612cb5729889b6e82ade060192722dd.
Commit: 115c749cbdada7c2663d4a64c166bafccab5fcfa
https://github.com/llvm/llvm-project/commit/115c749cbdada7c2663d4a64c166bafccab5fcfa
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
Log Message:
-----------
[AMDGPU] Select fneg modifier for v2f64 instructions (#205194)
Commit: 9550cd76cadea9f25a5c0bf3ee06e9f7ce5631ed
https://github.com/llvm/llvm-project/commit/9550cd76cadea9f25a5c0bf3ee06e9f7ce5631ed
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[IR] Remove IRBuilder AddMetadataToInst (#202280)
This avoids an extra check for metadata on every instruction insertion,
makes constructing an IRBuilder cheaper, and therefore slightly improves
performance.
As the C API doesn't expose CollectMetadataToCopy or any other way to
add additional metadata to the IRBuilder, make LLVMAddMetadataToInst an
alias for LLVMSetInstDebugLocation and undeprecate the latter.
Commit: 876439fa00d7e04201f08418297bcdbd85400bb8
https://github.com/llvm/llvm-project/commit/876439fa00d7e04201f08418297bcdbd85400bb8
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Transforms/Inline/X86/call-abi-compatibility.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
Log Message:
-----------
[X86][Inline] Make ABI compatibility check more precise (#205106)
When inlining a function that contains calls with vector arguments, we
have to be careful that inlining does not change the ABI of the call.
E.g. we generally can't inline a function without `+avx` into a
function with `+avx` if there are calls using vectors of size 256 or
larger, because they'd switch from passing in two xmm registers to
passing in a ymm register.
However, the current check is very crude and only allows inlining with
interior calls if the target features match *exactly* (via the base
areTypesABICompatible implementation). This is unnecessarily
conservative, as many target features do not affect the call ABI at all.
Make this check more precise by checking the result of
getRegisterTypeForCallingConv for the type between the TLI instances for
the caller and callee.
Commit: d39923c4df01fdeb10dae4da256c09fdf616157c
https://github.com/llvm/llvm-project/commit/d39923c4df01fdeb10dae4da256c09fdf616157c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/CSKY.cpp
M clang/lib/Basic/Targets/CSKY.h
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Lanai.cpp
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/M68k.h
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/Xtensa.h
Log Message:
-----------
clang: Change TargetInfo::setCPU to take StringRef (#205278)
The related APIs all use StringRef, so use StringRef for
consistency.
Co-Authored-By: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 4057dfd091241ab4784d1355422892b48810edf6
https://github.com/llvm/llvm-project/commit/4057dfd091241ab4784d1355422892b48810edf6
Author: PushkarSingh <149073046+iitianpushkar at users.noreply.github.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/safety-c.c
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Improve destroyed and invalidated diagnostic notes (#204900)
## Summary
Improve Lifetime Safety diagnostic notes by identifying the affected
storage in destruction and invalidation notes.
Examples:
```
{
int value;
ptr = &value;
}
```
Before:
```
note: destroyed here
```
After:
```
note: local variable 'value' is destroyed here
```
For temporaries:
```
note: temporary object is destroyed here
```
For invalidations:
```
note: local variable 'container' is invalidated here
```
For parameters:
```
note: parameter 'container' is invalidated here
```
For explicitly deallocated storage:
```
note: allocated object is freed here
```
## Implementation
The lifetime analysis already knows which object is responsible for a
warning. This change reuses that information when producing the
accompanying destruction, invalidation or deallocation note.
All affected regression tests have been updated to check the complete
diagnostic messages.
Addresses #200234
Commit: 8289d982fb4267d9a5e545276292170a9b0f6700
https://github.com/llvm/llvm-project/commit/8289d982fb4267d9a5e545276292170a9b0f6700
Author: Avhi <oss at avhi.in>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
A llvm/test/Transforms/FixIrreducible/unsupported-terminator.ll
Log Message:
-----------
[FixIrreducible] Use reportFatalUsageError for unsupported terminators (#205244)
`opt -passes=fix-irreducible` crashed via `llvm_unreachable` on a
`switch` terminator incident to an irreducible cycle header. Such
terminators must be lowered first (`lower-switch`); replace the
`llvm_unreachable` at both sites with `reportFatalUsageError` so the
pass fails gracefully instead of crashing.
Fixes #191978
Signed-off-by: AvhiMaz <avhimazumder5 at outlook.com>
Commit: bad300bda1b936f160f49111b6e67731605c95fb
https://github.com/llvm/llvm-project/commit/bad300bda1b936f160f49111b6e67731605c95fb
Author: Ches Burks <chesburks at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/STLExtras.h
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
Log Message:
-----------
[MLIR][ADT] Improve matcher compatability with C++20 STL (#205255)
When building MLIR on C++20 in Visual Studio with clang-cl, there are
several related compiler errors, grouped by project:
MLIRQueryMatcher
```C
type '_Mybase' (aka 'typename conditional<conjunction_v<is_trivially_destructible<DynMatcher>, is_trivially_move_constructible<DynMatcher>, is_trivially_move_assignable<DynMatcher>>, typename conditional<conjunction_v<is_trivially_destructible<DynMatcher>, is_trivially_copy_constructible<DynMatcher>, is_trivially_copy_assignable<DynMatcher>>, _Non_trivial_move<_Optional_construct_base<DynMatcher>, DynMatcher>, _Non_trivial_copy_assign<_Optional_construct_base<DynMatcher>, DynMatcher>>::type, _Non_trivial_move_assign<_Optional_construct_base<DynMatcher>, DynMatcher>>::type') is not a direct or virtual base of 'std::optional<mlir::query::matcher::DynMatcher>'
no member named '_Value' in 'std::optional<mlir::query::matcher::DynMatcher>'
no member named '_Has_value' in 'std::optional<mlir::query::matcher::DynMatcher>'
no matching function for call to '_Destroy_range'
invalid application of 'sizeof' to an incomplete type 'mlir::query::matcher::DynMatcher'
invalid application of 'alignof' to an incomplete type 'mlir::query::matcher::DynMatcher'
```
MLIRQueryMatcher, MLIRQuery, MLIRQueryLib, and mlir-query
```C
no viable conversion from 'std::vector<DynMatcher>' to 'ArrayRef<DynMatcher>'
incomplete type 'mlir::query::matcher::DynMatcher' used in type trait expression
```
MLIRIR
```C
no matching constructor for initialization of 'llvm::detail::indexed_accessor_range_base<mlir::SuccessorRange, mlir::BlockOperand *, mlir::Block *, mlir::Block *, mlir::Block *>::iterator'
invalid operands to binary expression ('const std::reverse_iterator<llvm::detail::indexed_accessor_range_base<mlir::SuccessorRange, mlir::BlockOperand *, mlir::Block *, mlir::Block *, mlir::Block *>::iterator>' and 'const std::reverse_iterator<llvm::detail::indexed_accessor_range_base<mlir::SuccessorRange, mlir::BlockOperand *, mlir::Block *, mlir::Block *, mlir::Block *>::iterator>')
```
std::vector<T> operations require complete type T for pointer
arithmetic, std::optional<T> has a similar problem.
std::reverse_iterator requires a default constructor for iterator.
Adding a default constructor for iterator, and defining VariadicMatcher
functions after DynMatcher is defined, resolves the errors.
Commit: 70c54ff1d5662f5a9ad22b3f6eeb287cef10236f
https://github.com/llvm/llvm-project/commit/70c54ff1d5662f5a9ad22b3f6eeb287cef10236f
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[Clang][RISCV] packed exchanged add/sub intrinsics (#205251)
Add the `__riscv_{pas,psa,psas,pssa,paas,pasa}_x_*` header wrappers over
new `__builtin_riscv_*` builtins.
Commit: 3f7eb27ad40516fc66139e2043b8fc08bfe66d76
https://github.com/llvm/llvm-project/commit/3f7eb27ad40516fc66139e2043b8fc08bfe66d76
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/madd.ll
Log Message:
-----------
[X86] madd.ll - add SSE42 test coverage (#205299)
Commit: e85f1c1cf0f3b938803c1ce4763b096499a7f701
https://github.com/llvm/llvm-project/commit/e85f1c1cf0f3b938803c1ce4763b096499a7f701
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
Log Message:
-----------
[lldb][test] Skip TestConcurrentManyBreakpoints (#205298)
Commit: fbdb644a8b066d9c615077da31f10330e8a2f3d6
https://github.com/llvm/llvm-project/commit/fbdb644a8b066d9c615077da31f10330e8a2f3d6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
AMDGPU: Move AMDGPUTargetID to AMDGPUTargetParser (#205268)
Commit: 11a928ec5cb21d4830fa8029160f33dc621ace5d
https://github.com/llvm/llvm-project/commit/11a928ec5cb21d4830fa8029160f33dc621ace5d
Author: John Brawn <john.brawn at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/Transforms/LoopStrengthReduce/AArch64/use-outside-loop.ll
Log Message:
-----------
[LSR] Don't merge ICmpZero uses outside loop (#205131)
In NarrowSearchSpaceByMergingUsesOutsideLoop don't merge ICmpZero uses
outside the loop with uses inside the loop, as the resulting use will
have a kind that's not ICmpZero, which will mean the compare won't be
expanded correctly later.
Commit: 40dc2b25d8bf421d0194ccb248561d372d168c96
https://github.com/llvm/llvm-project/commit/40dc2b25d8bf421d0194ccb248561d372d168c96
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
Log Message:
-----------
[CIR] Fix LoadOp creation (#205294)
Commit: 649e3e0e23222418bfbd8a4247875823be71143b
https://github.com/llvm/llvm-project/commit/649e3e0e23222418bfbd8a4247875823be71143b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
A llvm/test/Transforms/ArgumentPromotion/X86/struct-load.ll
Log Message:
-----------
[X86][TTI] Handle structs in areTypesABICompatible() (#205308)
Fixes a regression from #205106. getValueType() asserts on aggregate
types. Use CompuateValueVTs() to compute the de-aggregated VTs.
Performing argument promotion for struct types seems pretty
dubious to me, but it was previously allowed, so I'm retaining
that behavior. We may want to disable promotion of aggregates
in ArgPromotion entirely though.
Commit: 3bfec5dd4309a53c0df9f9a59dcfa8232746240d
https://github.com/llvm/llvm-project/commit/3bfec5dd4309a53c0df9f9a59dcfa8232746240d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
Log Message:
-----------
AMDGPU: Temporarily restore disassembler's dependency on TargetParser, again (#205309)
Reverts part of #205268
Commit: 1e3018523042d1b610b6676cf8d056315f6e3bd7
https://github.com/llvm/llvm-project/commit/1e3018523042d1b610b6676cf8d056315f6e3bd7
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
A llvm/test/CodeGen/SystemZ/target-flags.ll
Log Message:
-----------
[SystemZ] Add serialization strings for some MO target flags. (#203053)
These strings are needed for MIR textual representation: If one is
missing it doesn't work to do "-stop-before=XXX and then
-start-before=XXX".
Commit: 0d49a95036d2d4579d3da4cf7b72f6be0fe33bd5
https://github.com/llvm/llvm-project/commit/0d49a95036d2d4579d3da4cf7b72f6be0fe33bd5
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/CompilerInvocation.h
M clang/include/clang/Frontend/FrontendOptions.h
A clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
Log Message:
-----------
Reland "[clang][ssaf][NFC] Move SSAF flags from FrontendOptions to a dedicated SSAFOptions" (#205312)
Third attempt of #204686
Previous attempt was: #204798
This was last reverted in #205279
This class will help keeping SSAF options apart from generic
FrontendOptions. It is inspired by AnalyzerOptions.
This way all of these SSAF (and future) options will be at a
centralized place.
In preparation of rdar://179151023
---
The previous attempt had issues on Windows with `/permissive` configs.
The issue was that `GENERATE_OPTION_WITH_MARSHALLING` had a generic
lambda capture and that does not constitute as an ODR-use of the
captured name - because that name was only used in an unevaluated context.
This meant that MSVC refused to find the function parameter.
My speculative solution is to follow the established pattern of passing
a pointer to the Opts structure instead of passing it directly as a
reference - similar to how `AnalyzerOptions` are passed around that macro.
Commit: 8b7e7fa49b6296eefe422da168a5595102c39870
https://github.com/llvm/llvm-project/commit/8b7e7fa49b6296eefe422da168a5595102c39870
Author: Julian Nagele <j.nagele at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/utils/UnicodeData/UnicodeNameMappingGenerator.cpp
Log Message:
-----------
[NFC] UnicodeNameMappingGenerator: restore #include <unordered_map> (#205316)
#204303 removed this include while converting `unordered_map` uses to
`DenseMap`, but `loadDataFiles` still uses `unordered_multimap`.
See
https://ci.swift.org/job/llvm.org/job/clang-stage2-Rthinlto/job/main/360/
```
[2026-06-23T05:46:26.519Z] /Users/ec2-user/jenkins/workspace/m.org_clang-stage2-Rthinlto_main/llvm-project/llvm/utils/UnicodeData/UnicodeNameMappingGenerator.cpp:34:13: error: missing '#include <unordered_map>'; 'unordered_multimap' must be declared before it is used
[2026-06-23T05:46:26.519Z] 34 | static std::unordered_multimap<char32_t, std::string>
[2026-06-23T05:46:26.519Z] | ^
```
Commit: 18ce6f449e0bc913ffa0ffde48f4305187d86bc4
https://github.com/llvm/llvm-project/commit/18ce6f449e0bc913ffa0ffde48f4305187d86bc4
Author: DmitriiMartynov <31047826+DmitriiMartynov at users.noreply.github.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryFunction.h
A bolt/test/AArch64/constant-island-reproducible.s
Log Message:
-----------
[BOLT][AArch64] reproducible output with constant islands (#204546)
Optimized binaries from subsequent llvm-bolt runs may sometimes differ
due to the unordered set (SmallPtrSet), even if the input binary and
parameters are the same. Usage of SetVector guarantees a deterministic
sequence of binary functions while keeping each function as a single
instance.
Below you can see two different main functions before the fix after two
llvm-bolt runs (same input binaries, same arguments).
```
0000000000210400 <main>:
210400: 10000140 adr x0, 0x210428 <main+0x28>
210404: f9400000 ldr x0, [x0]
210408: 10000140 adr x0, 0x210430 <main+0x30>
21040c: f9400000 ldr x0, [x0]
210410: 10000180 adr x0, 0x210440 <main+0x40>
210414: f9400000 ldr x0, [x0]
210418: 10000180 adr x0, 0x210448 <main+0x48>
21041c: f9400000 ldr x0, [x0]
210420: d65f03c0 ret
210424: d503201f nop
210428: 00000010 udf #0x10
21042c: 00000000 udf #0x0
210430: 00000020 udf #0x20
210434: 00000000 udf #0x0
210438: d503201f nop
21043c: d503201f nop
210440: 00000030 udf #0x30
210444: 00000000 udf #0x0
210448: 00000040 udf #0x40
21044c: 00000000 udf #0x0
210450: d503201f nop
210454: d503201f nop
0000000000210400 <main>:
210400: 100001c0 adr x0, 0x210438 <main+0x38>
210404: f9400000 ldr x0, [x0]
210408: 100001c0 adr x0, 0x210440 <main+0x40>
21040c: f9400000 ldr x0, [x0]
210410: 100000c0 adr x0, 0x210428 <main+0x28>
210414: f9400000 ldr x0, [x0]
210418: 100000c0 adr x0, 0x210430 <main+0x30>
21041c: f9400000 ldr x0, [x0]
210420: d65f03c0 ret
210424: d503201f nop
210428: 00000030 udf #0x30
21042c: 00000000 udf #0x0
210430: 00000040 udf #0x40
210434: 00000000 udf #0x0
210438: 00000010 udf #0x10
21043c: 00000000 udf #0x0
210440: 00000020 udf #0x20
210444: 00000000 udf #0x0
210448: d503201f nop
21044c: d503201f nop
```
Commit: 572cf32ce413f606162759da6c83b5409aa471da
https://github.com/llvm/llvm-project/commit/572cf32ce413f606162759da6c83b5409aa471da
Author: Lucas <lucasribeirolima974 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/bad-signal-to-kill-thread.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/copy-constructor-mutates-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/default-operator-new-on-overaligned-type.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/exception-copy-constructor-throws.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/macro-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/random-generator-seed.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/raw-memory-call-on-non-trivial-type.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/reserved-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/shared-ptr-array-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signal-handler.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-char-misuse.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/spuriously-wake-up-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/suspicious-memory-comparison.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unhandled-self-assignment.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unique-ptr-array-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc32-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/concurrency/thread-canceltype-asynchronous.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/anonymous-namespace-in-header.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/no-recursion.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/predictable-rand.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/static-initialization-cycle.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/throw-by-value-catch-by-reference.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.rst
Log Message:
-----------
[clang-tidy][NFC] Update CERT wiki link across all clang-tidy docs (#205086)
This patch updates the outdated CMU wiki link in the clang-tidy
documentation.
The old link currently returns a `301 Moved Permanently` redirecting to
the new GitHub Pages location. This patch updates the source file to
point directly to the new destination to prevent future link rot.
Closes #200277
Commit: 3abbf06dd15df2288de06749f0bb8dddc4189294
https://github.com/llvm/llvm-project/commit/3abbf06dd15df2288de06749f0bb8dddc4189294
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clang-tidy] Avoid token merging in redundant-parentheses fix-its (#202365)
The readability-redundant-parentheses check emitted fix-its that simply
removed both parentheses. Tools that apply those fix-its directly could
join adjacent tokens and produce invalid code, e.g. `return(0)` becoming
`return0`.
Replace the opening parenthesis with a space when removing it would
merge identifier characters across the removed token.
AI Usage: Test assisted by Codex.
Closes https://github.com/llvm/llvm-project/issues/185108
Commit: 7f567069a4009c651fcfa59d336f6f265ab31c8d
https://github.com/llvm/llvm-project/commit/7f567069a4009c651fcfa59d336f6f265ab31c8d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/phaddsub.ll
Log Message:
-----------
[X86] phaddsub.ll - update PR39921/PR39936 test case to a vector.reduce.v8i32 call (#205310)
Matches middle-end IR produced from the tests' C++ source since #199872
Commit: 516ab1ad34e2da9e03e3098ae2d731c597629853
https://github.com/llvm/llvm-project/commit/516ab1ad34e2da9e03e3098ae2d731c597629853
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/test/CodeGen/SystemZ/args-22.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-ops-i128.ll
M llvm/test/CodeGen/SystemZ/bswap-09.ll
M llvm/test/CodeGen/SystemZ/bswap-10.ll
M llvm/test/CodeGen/SystemZ/call-zos-vec.ll
M llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
M llvm/test/CodeGen/SystemZ/codegenprepare-sink-and-for-tm.ll
M llvm/test/CodeGen/SystemZ/dag-combine-05.ll
M llvm/test/CodeGen/SystemZ/dag-combine-07.ll
M llvm/test/CodeGen/SystemZ/fold-masked-merge.ll
M llvm/test/CodeGen/SystemZ/fp-copysign-03.ll
M llvm/test/CodeGen/SystemZ/fp-half-vector-binops.ll
M llvm/test/CodeGen/SystemZ/fp-half-vector-fcmp-select.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-zEC12.ll
M llvm/test/CodeGen/SystemZ/int-cmp-65.ll
M llvm/test/CodeGen/SystemZ/int-conv-14.ll
M llvm/test/CodeGen/SystemZ/int-conv-15.ll
M llvm/test/CodeGen/SystemZ/int-mul-12.ll
M llvm/test/CodeGen/SystemZ/int-mul-13.ll
M llvm/test/CodeGen/SystemZ/int-uadd-14.ll
M llvm/test/CodeGen/SystemZ/int-usub-13.ll
M llvm/test/CodeGen/SystemZ/machine-combiner-reassoc-fp.ll
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
A llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
A llvm/test/CodeGen/SystemZ/misched-prera-pdiffs.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir
M llvm/test/CodeGen/SystemZ/regcoal_remat_empty_subrange.ll
M llvm/test/CodeGen/SystemZ/risbg-04.ll
M llvm/test/CodeGen/SystemZ/rot-03.ll
M llvm/test/CodeGen/SystemZ/shift-12.ll
M llvm/test/CodeGen/SystemZ/shift-13.ll
M llvm/test/CodeGen/SystemZ/shift-14.ll
M llvm/test/CodeGen/SystemZ/shift-15.ll
M llvm/test/CodeGen/SystemZ/shift-16.ll
M llvm/test/CodeGen/SystemZ/shift-17.ll
M llvm/test/CodeGen/SystemZ/soft-float-args.ll
M llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
M llvm/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
M llvm/test/CodeGen/SystemZ/vec-cmpsel-01.ll
M llvm/test/CodeGen/SystemZ/vec-eval.ll
M llvm/test/CodeGen/SystemZ/vec-move-23.ll
M llvm/test/CodeGen/SystemZ/vec-mul-07.ll
M llvm/test/CodeGen/SystemZ/vec-perm-12.ll
M llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
Log Message:
-----------
[SystemZ] Enable liveness reduction in pre-RA sched strategy. (#188823)
Add some handling of register pressure by scheduling an SU "low" if it closes a
live range (under certain conditions).
As this is checked before latency reduction, the "data-sequnces" check that was
used to selectively enable latency reduction can now be removed.
This gives good improvements on several benchmarks and is also a simplification
of the SystemZPreRASchedStrategy.
Commit: e9d162fabb3eec8af9aa8583e7385e64d9c2a914
https://github.com/llvm/llvm-project/commit/e9d162fabb3eec8af9aa8583e7385e64d9c2a914
Author: adream307 <adream307 at 163.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
Log Message:
-----------
[clang][X86] Add constexpr support for mpsadbw128/256 intrinsics (#202257)
Enable constexpr evaluation for `_mm_mpsadbw_epu8` and
`_mm256_mpsadbw_epu8` (`__builtin_ia32_mpsadbw128`/`mpsadbw256`).
Fixes #157522.
Commit: ebd969f5ffb8f0abb31e8074c84aeea2766d75f5
https://github.com/llvm/llvm-project/commit/ebd969f5ffb8f0abb31e8074c84aeea2766d75f5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
AMDGPU: Rename AMDGPUTargetID to TargetID (#205269)
The AMDGPU prefix is redundant with the namespace.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 9750a8d66da31ab5d5039a2b8acc90168417c244
https://github.com/llvm/llvm-project/commit/9750a8d66da31ab5d5039a2b8acc90168417c244
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Floating.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/IR/Constants.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperands.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/IR/MDBuilderTest.cpp
Log Message:
-----------
[LLVM][ConstantFP] Replace uses of isExactlyValue(+/-1.0) with isOne/isMinusOne. (#204333)
Commit: 7db130470447e9617fe1c169d90933c72254c3da
https://github.com/llvm/llvm-project/commit/7db130470447e9617fe1c169d90933c72254c3da
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/aarch64-bf16-ldst-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/bf16-select.ll
M llvm/test/CodeGen/AArch64/bf16-shuffle.ll
M llvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/bf16.ll
M llvm/test/CodeGen/AArch64/load-insert-undef.ll
M llvm/test/CodeGen/AArch64/load-insert-zero.ll
M llvm/test/CodeGen/AArch64/luti-with-sme2.ll
M llvm/test/CodeGen/AArch64/neon-luti.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-gather-loads-128bit-index.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-scatter-stores-128bit-index.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tblq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tbxq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq1.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq2.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq1.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq2.ll
M llvm/test/CodeGen/AArch64/sve2p1-vector-shuffles.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
M llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
M llvm/test/CodeGen/ARM/bf16-create-get-set-dup.ll
M llvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll
M llvm/test/CodeGen/ARM/bf16-imm.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
M llvm/test/CodeGen/ARM/bf16-shuffle.ll
M llvm/test/CodeGen/ARM/bfloat.ll
Log Message:
-----------
[LLVM][CodeGen] Remove +bf16 for ARM/AArch64 tests that don't strictly need the feature flag. (#204199)
Tests that use bfloat purely as an opaque datatype should not use
instructions that require the bf16 feature.
Commit: d09868bc749f6bcbaa09bbbed7a140aa051aabf7
https://github.com/llvm/llvm-project/commit/d09868bc749f6bcbaa09bbbed7a140aa051aabf7
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
[CI] switch to BuildTools variant of Visual Studio (#201335)
Follow up to:
- https://github.com/swiftlang/swift-docker/pull/566
- https://github.com/swiftlang/swift-docker/pull/565
It's no longer necessary to install packaging at runtime and the new
image will use `BuildTools`.
Commit: e3f6a42532749c55008e38e3e19186ef6b0c0d17
https://github.com/llvm/llvm-project/commit/e3f6a42532749c55008e38e3e19186ef6b0c0d17
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M orc-rt/unittests/AllocActionTest.cpp
M orc-rt/unittests/SPSAllocActionTest.cpp
Log Message:
-----------
[orc-rt] Split AllocAction tests by SPS dependency. (#205322)
Rewrites AllocActionTest.cpp's integration tests (RunBasicAction,
RunFinalize*) to drive AllocActionFunction::handle with a small local
IntPtrDeserializer / IdentitySerializer pair instead of going through
SPS, and moves the existing SPS-using AllocAction tests into
SPSAllocActionTest.cpp.
Also adds two new SPS tests covering previously-uncovered paths:
- RunActionWithSPSArgsAndWFBReturn — SPS argument deserialization plus
AllocActionSPSSerializer's identity (WrapperFunctionBuffer) overload.
- RunActionWithUndecodableArgs — the deserialization-failure path in
AllocActionFunction::handle.
After the split, an AllocActionTest failure indicates problems with the
AllocAction machinery, and an SPSAllocActionTest failure without a
corresponding AllocActionTest failure indicates an SPS encoding /
decoding issue for AllocAction.
Commit: 844136348ef4c03e84bed0a51d8557d53f466b0d
https://github.com/llvm/llvm-project/commit/844136348ef4c03e84bed0a51d8557d53f466b0d
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/test/AST/undocumented-attrs.cpp
Log Message:
-----------
Document the [[clang::annotate]] attribute (#203303)
The new documentation mirrors the existing docs for annotate_type.
Commit: 25f0443ddccf6a03d9b432c246ce97eb535cab52
https://github.com/llvm/llvm-project/commit/25f0443ddccf6a03d9b432c246ce97eb535cab52
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
Log Message:
-----------
[OpenMP] Remove unused isStrictSubset template (NFC) (#202987)
The `isStrictSubset` `ArrayRef<T>` template has no callers, so it never
instantiates and trips `-Wunused-template`. The `VariantMatchInfo`
overload does the work that's actually used, and `isSubset` stays
untouched. Removing the dead template.
NFC.
Part of #202945.
Commit: 59c5c39a76e04fc8cd3af39748e256ca1e6fcda8
https://github.com/llvm/llvm-project/commit/59c5c39a76e04fc8cd3af39748e256ca1e6fcda8
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/test/AST/undocumented-attrs.cpp
Log Message:
-----------
Fix test after 844136348ef4c03e84bed0a51d8557d53f466b0d (#205328)
Commit: 99c80fefdfac69a47773b66f35ae638d63ce5758
https://github.com/llvm/llvm-project/commit/99c80fefdfac69a47773b66f35ae638d63ce5758
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/test/API/macosx/thread_suspend/main.c
Log Message:
-----------
[lldb] Fix race/timeout in TestInternalThreadSuspension (#203202)
This test launches a thread and then waits for a signal from the
launched thread. Below is one possible interleaving, where the
`pthread_cond_signal` (2) wins the race and becomes a no-op while (3) is
locking until the test times out.
```
void *
suspend_func (void *unused) {
[...]
// 2. Created thread reaches this and signals.
pthread_cond_signal(&signal_cond);
[...]
}
int main() {
pthread_mutex_lock(&signal_mutex);
// 1. Thread is created
pthread_create(&suspend_thread, NULL, suspend_func, NULL);
// Enable this to make race reliable:
// sleep(1);
// 3. We start waiting on signal_cond, but 2. already executed.
pthread_cond_wait(&signal_cond, &signal_mutex);
```
This patch guards (2) with signal_mutex so it can only be executed after
pthread_cond_wait unlocks signal_mutex.
Commit: e9aec194f1e034f7b548240bd76b623d80bac034
https://github.com/llvm/llvm-project/commit/e9aec194f1e034f7b548240bd76b623d80bac034
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
Log Message:
-----------
Reapply "[InstCombine] Merge consecutive assumes" (#205177) (#205324)
The crash was caused by using `getOperandBundle` for an assume, which
requires that the operand bundles are unique. This isn't guaranteed by
assume bundles. This patch adds `hasOperandBundle` instead, which
doesn't have the same constraint.
Original message:
This should make assumes a bit more efficient, since it removes a few
instructions. This should also help with optimizations that are
limited in how many instructions they step through.
This reverts commit 3f0ef1efb26206c3f5d5621d86d740c7f466c67b.
Commit: b713aaedb6eedd7d20f666038d945e50eafd4c27
https://github.com/llvm/llvm-project/commit/b713aaedb6eedd7d20f666038d945e50eafd4c27
Author: David Green <david.green at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/ARM/vcombine.ll
Log Message:
-----------
[ARM] Regenerate vcombine.ll. NFC (#205335)
Commit: 0a991b71e78646322876c8db487084ec1840184a
https://github.com/llvm/llvm-project/commit/0a991b71e78646322876c8db487084ec1840184a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM][Runtimes] Forward 'LLVM_LIBDIR_SUFFIX' to runtimes by default (#205182)
Summary:
This option controls the logical path of the installed libraries. The
runtimes obften reach into libraries, or want to install to the same
location as the main build. Previously you had to set this per-runtime,
but we should likely forward it by default.
Fixes: https://github.com/llvm/llvm-project/issues/159762
Commit: d2850baf0ad99c662e224bb522aebdeb09ff8e1b
https://github.com/llvm/llvm-project/commit/d2850baf0ad99c662e224bb522aebdeb09ff8e1b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/test/CodeGen/convergent-functions.cpp
Log Message:
-----------
[Clang] Accept 'noconvergent' attributes outside of CUDA (#205247)
Summary:
There is no reason that `convergent` should be a generic attributes but
not `noconvergent`.
Commit: 9a5e3fdc79cb374550bbf0cac8ad02d8a4ce10ab
https://github.com/llvm/llvm-project/commit/9a5e3fdc79cb374550bbf0cac8ad02d8a4ce10ab
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-offload-binary.rst
A llvm/test/tools/llvm-offload-binary/member-extract.test
M llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
Log Message:
-----------
[llvm-offload-binary] Add `member` key to single out archive members (#205170)
Summary:
Currently, archives offer three approaches.
1. `--archive` which takes an archive and puts all the output in a new
archive
2. No filename, which outputs based on the member names
3. Filename, which just matches everything.
This has a gap for when people wnat a single file without relying on
implicit naming that dumps all the contents to the CWD.
This PR adds `member` which lets you specify the member names as you
would get from `ar t libfoo.a` for this.
Commit: a06ac5d5d555bf01b9ef4ad233a9d3d962b25c43
https://github.com/llvm/llvm-project/commit/a06ac5d5d555bf01b9ef4ad233a9d3d962b25c43
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-fpenv.ll
Log Message:
-----------
[AArch64] Add flag to conditionally write FPMR (#203911)
Add a AArch64 codegen flag to make llvm.aarch64.set.fpmr avoid writing
FPMR when it already contains the requested value.
By default, llvm.aarch64.set.fpmr continues to lower directly to an MSR
FPMR instruction. With -aarch64-conditional-fpmr-write, the backend
lowers the intrinsic to an MRS/MSR conditional branch sequence.
This is based on the initial implementation from:
https://github.com/llvm/llvm-project/pull/114248
However this PR keeps the conditional FPMR write sequence behind a
codegen flag. One reason to change the codegen lowering is because GCC
emits the conditional branch sequence unconditionally. LLVM preserves
the existing direct MSR lowering by default.
Commit: 592e9d3e6a82b13aeccfc755aa5025b41cbfc260
https://github.com/llvm/llvm-project/commit/592e9d3e6a82b13aeccfc755aa5025b41cbfc260
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
Log Message:
-----------
Reland "[clang][ssaf][NFC] Make SSAFOptions available in Builders and Extractors" (#205334)
The original version of this was reverted part of #205279 because I
didn't know if this or the other patch caused the Windows build
failures. It turns out this patch is fine. I'm relating this now.
---
Now that we have SSAFOptions, it would make it a lot more ergonomic if
it was accessible from builders and extractors.
This PR does exactly that.
Part of rdar://179151023
Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
Commit: 81f06366f805c4d60da39c1c9b2eaa4443ef27fc
https://github.com/llvm/llvm-project/commit/81f06366f805c4d60da39c1c9b2eaa4443ef27fc
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/MacroUtils.h
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/MacroUtilsTest.cpp
Log Message:
-----------
[orc-rt] Add MacroUtils.h header for general purpose macros. (#205337)
For now just contains ORC_RT_DEPAREN, a macro for stripping parentheses
from its argument. This will be used in an upcoming commit.
Commit: 7a0829e41228513299c5108685b0bc127463c6a1
https://github.com/llvm/llvm-project/commit/7a0829e41228513299c5108685b0bc127463c6a1
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/OffloadArch.h
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
Log Message:
-----------
[AMDGPU] Define new target gfx1154 (#204816)
Commit: f17453ef75fc4acb0bb8c149bfcc07409881676e
https://github.com/llvm/llvm-project/commit/f17453ef75fc4acb0bb8c149bfcc07409881676e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/test/Dialect/MemRef/runtime-verification.mlir
Log Message:
-----------
[mlir][memref] Add SCFDialect dependency to RuntimeOpVerification (#205241)
Explicitly load SCFDialect as a dependent dialect in
RuntimeOpVerification to avoid unregistered dialect errors when
generating `scf.if`/`scf.yield` ops. Fixes #204295.
Commit: 1416b5f6de966f29e6b9c4f868c330e693ce8952
https://github.com/llvm/llvm-project/commit/1416b5f6de966f29e6b9c4f868c330e693ce8952
Author: Wooseok Lee <wolee at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
Log Message:
-----------
[AMDGPU][DAGCombiner] Fix UADDO/USUBO_CARRY carry-out miscompile and remove redundant AMDGPU combine (#204362)
performAddCarrySubCarryCombine in SIISelLowering folded:
uaddo_carry((x+y), 0, cc) -> uaddo_carry(x, y, cc)
usubo_carry((x-y), 0, cc) -> usubo_carry(x, y, cc)
Both produce the same value but differ in carry-out when x+y (or x-y)
wraps. The fold was missing a !N->hasAnyUseOfValue(1) guard, giving
wrong carry values to consumers. E.g. x=0xFFFFFFFF, y=1, cc=0:
original: ((x+y) mod 2^32 + cc) >= 2^32 = 0 (correct)
folded: (x+y+cc) >= 2^32 = 1 (wrong)
The generic visitUADDO_CARRY (DAGCombiner.cpp) already handles
the UADDO_CARRY/ADD fold with the correct guard. Since target combines
fire before generic ones, the AMDGPU ADD arm was a buggy duplicate.
The USUBO_CARRY/SUB arm is produced by AMDGPU's performAddCombine
which converts add(sub(v,a), sext(cmp)) -> usubo_carry(sub(v,a), 0,
cmp).
There was no generic equivalent for this pattern.
Fix by adding the symmetric fold to visitUSUBO_CARRY:
(usubo_carry (sub X, Y), 0, Carry) -> (usubo_carry X, Y, Carry)
with the same guard, then removing performAddCarrySubCarryCombine
from SIISelLowering entirely as it is now fully subsumed.
Tests: Add AMDGPU tests in uaddo.ll and usubo.ll covering the
carry-out-used (fold suppressed) and carry-out-unused (fold applied)
cases, autogenerated with update_llc_test_checks.py.
Commit: 45a65bb48b5925707f43d08e30df2263a5e4e268
https://github.com/llvm/llvm-project/commit/45a65bb48b5925707f43d08e30df2263a5e4e268
Author: Alex Kremer <godexsoft at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/ReleaseNotes/23.rst
M libcxx/docs/Status/Cxx29Papers.csv
M libcxx/include/__expected/expected.h
M libcxx/include/version
M libcxx/test/libcxx/utilities/expected/nodiscard.verify.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
A libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
Log Message:
-----------
[libc++] P3798R1: The unexpected in std::expected (#204826)
Closes #204394
Implements P3798 and related tests.
Applies the paper as a Defect Report per https://wg21.link/P3798/github.
Commit: ab1ef459069d1dbf4ee9e5a802537ababe294b25
https://github.com/llvm/llvm-project/commit/ab1ef459069d1dbf4ee9e5a802537ababe294b25
Author: John Paul Jepko <john.jepko at ericsson.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
Log Message:
-----------
[Clang][Test] Fix warn-memset-bad-sizeof.cpp after #183004 (#205201)
The new `-Wstringop-overread` warning (added in #183004) fires on the
SemaCXX test warn-memset-bad-sizeof.cpp. This happens on targets where
unsigned matches size_t, such as 32-bit ARM, because clang will match
the declaration with the builtin prototype (specifically, argument
`unsigned n`).
Suppress the warning since this test is exercising
`-Wsizeof-pointer-memaccess`, not source buffer overreads.
Fixes:
- https://lab.llvm.org/buildbot/#/builders/154/builds/32985
- https://lab.llvm.org/buildbot/#/builders/135/builds/3888
- https://lab.llvm.org/buildbot/#/builders/38/builds/9363
Commit: 60b3b30897b3c9549d2083accbba26e1ca8bf44e
https://github.com/llvm/llvm-project/commit/60b3b30897b3c9549d2083accbba26e1ca8bf44e
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR][NFC] Rename zero result flag variable (#205242)
###summary
This is a follow up of https://github.com/llvm/llvm-project/pull/202273
Just a light patch for renaming the zero result flag variable.
Commit: d957d2f2d8e718bd1101e7afad6be62901304cd1
https://github.com/llvm/llvm-project/commit/d957d2f2d8e718bd1101e7afad6be62901304cd1
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
Log Message:
-----------
[analyzer] Allow SVals as llvm::Immutable{Map,Set} keys (#205319)
This will allow maps and sets being declared:
```
REGISTER_MAP_WITH_PROGRAMSTATE(MyMap, SVal, SVal)
REGISTER_SET_WITH_PROGRAMSTATE(MySet, SVal)
```
Commit: 86d380e54fdb637be039f750651421c5b812eae4
https://github.com/llvm/llvm-project/commit/86d380e54fdb637be039f750651421c5b812eae4
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/linux/sched-macros.h
M libc/include/sched.yaml
M libc/src/sched/CMakeLists.txt
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/sched_clrcpuset.cpp
A libc/src/sched/sched_clrcpuset.h
M libc/test/src/sched/CMakeLists.txt
M libc/test/src/sched/cpu_count_test.cpp
Log Message:
-----------
[libc] Add CPU_CLR(_S) macros (#204590)
This patch implements CPU_CLR and CPU_CLR_S macros following the
existing CPU_SET pattern. The macro just forwards to an internal entry
point.
Assisted by Gemini.
Commit: 8ea065becdeb47687ce9717adc2c50e68b939b87
https://github.com/llvm/llvm-project/commit/8ea065becdeb47687ce9717adc2c50e68b939b87
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/SPSAllocAction.h
M orc-rt/unittests/SPSAllocActionTest.cpp
Log Message:
-----------
[orc-rt] Add ORC_RT_SPS_ALLOC_ACTION helper macro. (#205339)
ORC_RT_SPS_ALLOC_ACTION(Name, SPSArgs, Handle) is shorthand for defining
an allocation-action wrapper function whose arguments are SPS-encoded.
It expands to:
static orc_rt_WrapperFunctionBuffer Name(const char *ArgData,
size_t ArgSize);
with a body that deserializes ArgData via
SPSAllocActionFunction<SPSArgs...> and forwards the decoded arguments to
Handle.
SPSArgs is given as a parenthesized comma-separated list of SPS argument
types — e.g. (int32_t, int32_t) — stripped at expansion time via
ORC_RT_DEPAREN.
Commit: 3f526756827fecd80111d1f065b879d292518480
https://github.com/llvm/llvm-project/commit/3f526756827fecd80111d1f065b879d292518480
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/test/CXX/drs/cwg5xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Update C++ DR status page (#205342)
The post-Brno draft will not be out for three more weeks, but Brno
updates for Core issues statuses are already trickling in.
Notably, [CWG507](https://cplusplus.github.io/CWG/issues/507.html)
"Ambiguity with built-in binary operator candidates for class object
convertible to built-in type", which used to be marked as a duplicate of
[CWG260](https://cplusplus.github.io/CWG/issues/260.html) "User-defined
conversions and built-in `operator=`", is open again, presumably because
it contains an example that goes beyond the scope of CWG260. Relatively
recent CWG thread that might be related (WG21 access required):
[link](https://lists.isocpp.org/core/2025/08/18478.php).
Commit: a4a59deb8dc50540c2e2f8b4c0b4addf30761a46
https://github.com/llvm/llvm-project/commit/a4a59deb8dc50540c2e2f8b4c0b4addf30761a46
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
Log Message:
-----------
[LV][NFC] Add SVE tests for masked interleaved accesses with gaps (#205330)
Commit: 7337fe1b09309fedbbdff2eb34043a0821523109
https://github.com/llvm/llvm-project/commit/7337fe1b09309fedbbdff2eb34043a0821523109
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/Basic/Builtins.cpp
A clang/test/AST/builtin-name-registration.c
Log Message:
-----------
[clang] Avoid per-builtin std::string allocation in initializeBuiltins (#205162)
`initializeBuiltins()` previously registered every builtin through an
allocated std::string every time a `CompilerInstance` initialized. This
was hot for module-heavy builds, where each built module re-registered
the full set.
Add `getBuiltinNameInto()`, which writes the name into a caller-provided
buffer and returns a `StringRef`, with no allocation when the shard has
no prefix (the common case). `Info::getName` now delegates to it so the
two cannot diverge. This change is output behavior-preserving.
Resolves: rdar://178672190
Commit: f8aa5f66209d69c2c1f033317a4b4be961f4a78c
https://github.com/llvm/llvm-project/commit/f8aa5f66209d69c2c1f033317a4b4be961f4a78c
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonPseudo.td
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
A llvm/test/CodeGen/Hexagon/kcfi.ll
Log Message:
-----------
[Hexagon] Add KCFI support for forward-edge control flow integrity (#191746)
Add KCFI support for Hexagon. KCFI provides lightweight forward-edge CFI
for indirect calls by embedding a type hash before each function and
checking it before indirect calls, without requiring LTO.
Commit: 34b6e1c3b07d2d18b3112841992378b1057d87cc
https://github.com/llvm/llvm-project/commit/34b6e1c3b07d2d18b3112841992378b1057d87cc
Author: Chirag Wattamwar <119049661+ChiragSW at users.noreply.github.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
M mlir/test/Dialect/common_folders.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][arith] Reject signful integer element types in `arith.constant` (#204937)
Update arith.constant verification to reject integer constants with
signed and unsigned element types including shaped constants like
tensors and vectors, as the arith dialect does not support
signed/unsigned types.
This incidentally address cases where further lowering would crash (e.g.
SPIR-V constant lowering used IntegerAttr::getInt() on an unsigned
integer attribute from tensor<2xui8>)
Fixes #204911
Commit: dc658f1f11d3bf1da4243be9671dcdab597288b5
https://github.com/llvm/llvm-project/commit/dc658f1f11d3bf1da4243be9671dcdab597288b5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/CMakeLists.txt
M libc/docs/headers/index.rst
M libc/include/CMakeLists.txt
A libc/include/libgen.yaml
M libc/src/CMakeLists.txt
M libc/src/__support/CPP/string_view.h
A libc/src/libgen/CMakeLists.txt
A libc/src/libgen/basename.cpp
A libc/src/libgen/basename.h
A libc/src/libgen/dirname.cpp
A libc/src/libgen/dirname.h
M libc/test/src/CMakeLists.txt
A libc/test/src/libgen/CMakeLists.txt
A libc/test/src/libgen/basename_death_test.cpp
A libc/test/src/libgen/basename_test.cpp
A libc/test/src/libgen/dirname_death_test.cpp
A libc/test/src/libgen/dirname_test.cpp
A libc/utils/docgen/libgen.yaml
Log Message:
-----------
Reland "[libc] Implement basename and dirname in libgen.h #204554" (#205352)
Added the POSIX standard functions basename and dirname under a new libgen.h header. The implementations modify the input path in-place using cpp::string_view to determine boundaries safely.
Added find_last_not_of to cpp::string_view to support trailing slash removal.
Implemented:
libc/include/libgen.yaml, libgen.h.def: Public API definitions.
libc/src/libgen/basename.cpp, dirname.cpp: Generic implementations.
libc/test/src/libgen/: Unit and hermetic tests.
Registered the new entrypoints for all active Linux targets (x86_64, aarch64, arm, riscv) and added docgen configuration.
The tests are skipped when using ASan because death tests do not currently work with them.
Assisted-by: Automated tooling, human reviewed.
Commit: 7befba8a76f3ba54b584cbb4b673d749f34054af
https://github.com/llvm/llvm-project/commit/7befba8a76f3ba54b584cbb4b673d749f34054af
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Log Message:
-----------
Silence conversion warning; NFC (#205357)
This was triggering a conversion warning in MSVC.
Commit: 820314fae19408e906ef8144573fca292b411613
https://github.com/llvm/llvm-project/commit/820314fae19408e906ef8144573fca292b411613
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/test/ClangScanDeps/modules-full-by-mult-mod-names-diagnostics.c
Log Message:
-----------
[clang][Dependency Scanning] Fix the Input File for By-Name Lookup's Input CC1 Command Line (#205214)
When the command line is a CC1 command, the scanner does not append the
fake input file to the command line when initializing the compiler
instance. This PR fixes that by passing the compiler instance
initialization the correct modified command line. Without specifying the
fake input file, clang picks up `-` as its input.
An observable behavior is that the diagnostics are pointing to incorrect
files for cc1 commands, hence a test is added to check the diagnostics
messages contain the correct file name.
Commit: 0ce76c77c9e0ee15905d76500bfa0235c2ac3741
https://github.com/llvm/llvm-project/commit/0ce76c77c9e0ee15905d76500bfa0235c2ac3741
Author: owenca <owenpiano at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/Format/CMakeLists.txt
Log Message:
-----------
[clang-format] Don't check the format if diff is unavailable (#205036)
Commit: fdb70dfca31d80ed3a5231819aaab8c54b12b658
https://github.com/llvm/llvm-project/commit/fdb70dfca31d80ed3a5231819aaab8c54b12b658
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
M llvm/test/CodeGen/RISCV/rv32-merge-non-arg-reg.mir
M llvm/test/CodeGen/RISCV/rv32-move-merge-crash.ll
M llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/MC/RISCV/rv32p-aliases-valid.s
Log Message:
-----------
[RISCV][P-ext] Add mvd alias for padd.dw rd, zero, rs. Use for copy idiom. (#205223)
See https://github.com/riscv/riscv-p-spec/pull/304
I've refactored the MoveMerge code to use copyPhysReg to avoid duplication.
Commit: 62c9839e109fa53c0cd52cddb4f28d415a5e7f74
https://github.com/llvm/llvm-project/commit/62c9839e109fa53c0cd52cddb4f28d415a5e7f74
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
Log Message:
-----------
[LegalizeTypes] Fix incorrect EVL1 clip in SplitVecRes_VP_SPLICE. (#205021)
We were incorrectly clipping EVL1 to be a valid index for the VT, in the
range [0, VT.getNumVectorElements() - 1]. It is legal for EVL1 to be
equal to VT.getNumVectorElements() here so that was incorrect.
In case it isn't clear, the clip is necessary to prevent turning poison
into UB by accessing outside the temporary stack object.
Commit: 83528bad5c9b9722280d284a7c35b06d560003bc
https://github.com/llvm/llvm-project/commit/83528bad5c9b9722280d284a7c35b06d560003bc
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Lex/Preprocessor.h
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
Log Message:
-----------
[clangd] fix preprocessor caching-lexer state tracking (#203716)
Fix `recomputeCurLexerKind` to avoid default fallback to
`CurLexerCallback = CLK_CachingLexer;`.
This prevents code-completion EOF handling from accidentally restoring
CLK_CachingLexer while a tentative parse is still active, which could
trigger a caching lexer re-entry assertion in clangd signature help.
Fixes https://github.com/llvm/llvm-project/issues/200677
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: db31a66571857ac2991e0ade1165a0fa81c4fbd1
https://github.com/llvm/llvm-project/commit/db31a66571857ac2991e0ade1165a0fa81c4fbd1
Author: Felipe Novais <felipenovais at users.noreply.github.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/docs/Docker.rst
Log Message:
-----------
[docs] Fix typo in Docker.rst (#205346)
Small typo fix in the Docker documentation: Debian8 -> Debian12.
Signed-off-by: Felipe Novais <contact at felipenovais.com>
Commit: b31886a2af71590b00d13a082b80e7a4a347c1c4
https://github.com/llvm/llvm-project/commit/b31886a2af71590b00d13a082b80e7a4a347c1c4
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libcxx/docs/Status/Cxx23Papers.csv
M libcxx/include/__config
M libcxx/include/__ranges/drop_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__ranges/split_view.h
M libcxx/include/__ranges/take_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/test/std/ranges/range.adaptors/range.drop.while/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.filter/ctor.view_pred.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.split/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take.while/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take/ctor.view_count.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/ctor.view_function.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/ctor.first.last.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/ctor.value.bound.pass.cpp
Log Message:
-----------
[libc++][ranges] Backport P2711R1: Making multi-param constructors of views explicit (#190513)
As discussed in https://gcc.gnu.org/PR114298 - GCC and MSVC STL
implemented P2711R1 as a DR. This PR does the same for libc++.
Co-authored-by: A. Jiang <de34 at live.cn>
Commit: a91e271481cc99ee0ab01aa0affc7ac352963844
https://github.com/llvm/llvm-project/commit/a91e271481cc99ee0ab01aa0affc7ac352963844
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/madd.ll
Log Message:
-----------
[X86] madd.ll - add additional tests for matchPMADDWD folds that fail with larger source types (#205362)
matchPMADDWD handles sext/shl cases as well which don't fold either on SSE/AVX512 targets
Commit: 9acc93f96af24fd3b3598f3cc51520aaff6e688c
https://github.com/llvm/llvm-project/commit/9acc93f96af24fd3b3598f3cc51520aaff6e688c
Author: adams381 <adams at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtins-elementwise-bool-nyi.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
Log Message:
-----------
[CIR] Lower elementwise saturating add/sub builtins (#203112)
`__builtin_elementwise_add_sat` and `__builtin_elementwise_sub_sat` were
still in the `errorBuiltinNYI` batch in `emitBuiltinExpr`, so any use
hit "unimplemented builtin call". That blocks C++26
`std::add_sat`/`std::sub_sat` (libc++
`<__numeric/saturation_arithmetic.h>`), which lower directly onto these
builtins.
This lowers them the way classic CodeGen does in `CGBuiltin.cpp`: select
the signed or unsigned saturating intrinsic from the operand's element
type (`sadd.sat`/`uadd.sat` for add, `ssub.sat`/`usub.sat` for sub).
Test coverage in `builtins-elementwise.c` exercises signed and unsigned,
scalar and vector, at i32 and i16 widths, checking the CIR
`cir.call_llvm_intrinsic` and the lowered `@llvm.{s,u}{add,sub}.sat`
calls on both the CIR and classic `-emit-llvm` paths.
Commit: 7054171f229e2a9d55ed742dcf89782727579926
https://github.com/llvm/llvm-project/commit/7054171f229e2a9d55ed742dcf89782727579926
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/test/C/C23/n3037.c
Log Message:
-----------
Additional test coverage for WG14 N3037 (#202674)
There was a request for additional test coverage in:
https://github.com/llvm/llvm-project/pull/201650#discussion_r3376475306
Commit: 650a05947d5bd0393914b8dfe15a5c50b193dfc9
https://github.com/llvm/llvm-project/commit/650a05947d5bd0393914b8dfe15a5c50b193dfc9
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
A clang/test/CIR/IR/builtin-int-cast.cir
A clang/test/CIR/IR/invalid-builtin-int-cast.cir
A clang/test/CIR/Lowering/builtin-int-cast.cir
A clang/test/CIR/Transforms/builtin-int-cast-fold.cir
Log Message:
-----------
[CIR] Add cir.builtin_int_cast operation to replace uses of builtin.unrealized_conversion_cast (#201592)
This patch adds a new operation builtin_int_cast to handle casting
between CIR integer types and builtin integer types. This will replace
the current use of the builtin.unrealized_conversion_cast since this
operation is only intended to be used temporarily when doing
transformations.
Assisted-by: Cursor/Claude Opus 4.8 High
Commit: a05357175d053b86e6d00df13e39416fb9a18cd7
https://github.com/llvm/llvm-project/commit/a05357175d053b86e6d00df13e39416fb9a18cd7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll
Log Message:
-----------
[SLP]Fix dominance crash for scheduled copyable PHI-operand bundles
Extend the copyable/non-copyable PHI conflict bail-out in
tryScheduleBundle to the scheduled path, not just the non-schedulable
one.
Fixes #205327
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/205372
Commit: 759191045115d966dffc99901e9086289767ff5c
https://github.com/llvm/llvm-project/commit/759191045115d966dffc99901e9086289767ff5c
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/ioctl.h
M libc/src/sys/ioctl/linux/CMakeLists.txt
M libc/src/sys/ioctl/linux/ioctl.cpp
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/isatty.cpp
Log Message:
-----------
Recommit "[libc] Introduce the ioctl syscall wrapper and port all callers (#204640)" (#205317)
This patch reapplies #204640 (reverted in #205277), due to (-Werror)
build failure with gcc. Gcc warned about passing an uninitialized
structure through a `const void *` argument. This isn't a problem
because the ioctls in question write to that argument. The
fix/workaround is to provide a `void *` overload.
The original commit message was:
This patch adds an ioctl syscall wrapper in linux_syscalls namespace and
migrates all direct SYS_ioctl calls to use it.
To handle the polymorphic nature of ioctl arguments (where some commands
expect pointers, some expect scalar integers like queue_selector, and
some expect no argument at all), I use a helper struct IoctlArg with
implicit constructors. This avoids template bloat and overload
ambiguities (particularly around literal 0) while keeping call sites
clean.
Assisted by Gemini.
Commit: 5274b7ffac47a891a932dcc630e6130cc72359ef
https://github.com/llvm/llvm-project/commit/5274b7ffac47a891a932dcc630e6130cc72359ef
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Model pointer-to-data-member access in the fact generator (#204612)
VisitBinaryOperator had no case for `obj.*pm` (BO_PtrMemD) /
`objptr->*pm` (BO_PtrMemI), so a borrow of the accessed member
(`&(obj.*pm)`) dropped the object's loan to an empty origin and a
use-after-scope was missed. Flow the object operand's origin into the
result, mirroring a member access: for `.*` the object is the LHS, for
`->*` it is the LHS pointer's pointee.
Assisted-by: Claude Opus 4.8
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: 0914d20f2f8fc3c85e956d93b643a54f683638c3
https://github.com/llvm/llvm-project/commit/0914d20f2f8fc3c85e956d93b643a54f683638c3
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/linux/CMakeLists.txt
A libc/include/llvm-libc-types/linux/loff_t.h
A libc/include/llvm-libc-types/loff_t.h
M libc/include/sys/types.yaml
Log Message:
-----------
[libc] Add loff_t type (#204641)
Added loff_t type definition. This is a Linux extension required for
large file offsets.
* llvm-libc-types/loff_t.h: Include linux/loff_t.h on Linux.
* llvm-libc-types/linux/loff_t.h: Added Linux definition using
__kernel_loff_t.
* llvm-libc-types/CMakeLists.txt: Include linux subdirectory and add
dependency for loff_t.
* llvm-libc-types/linux/CMakeLists.txt: Registered loff_t.
* sys/types.yaml: Added loff_t to sys/types.
* libc/include/CMakeLists.txt: Added dependency to sys_types target.
Assisted-by: Automated tooling, human reviewed.
Commit: 9928eab6b57b9791e648abc6cac2ac28870f6dbe
https://github.com/llvm/llvm-project/commit/9928eab6b57b9791e648abc6cac2ac28870f6dbe
Author: Sirui Mu <msrlancern at gmail.com>
Date: 2026-06-24 (Wed, 24 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
A clang/test/CIR/CodeGen/atomic-libcall.c
Log Message:
-----------
[CIR] Atomic load and store via library call (#202671)
This patch adds support for atomic load/store operations that go through
calls to the `__atomic_load` and `__atomic_store` library functions.
This could happen when the size of the atomic type is too large or is
not a power of 2.
Assisted-by: Codex / gpt-5.5 xhigh
Commit: 8d2a578b2130742c8790f3dba5fb414962eafcd5
https://github.com/llvm/llvm-project/commit/8d2a578b2130742c8790f3dba5fb414962eafcd5
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
Log Message:
-----------
[LifetimeSafety] Fix liveness propagation for all origin flows (#205323)
Previously, the `transfer` function for `OriginFlowFact` only handled
killing the destination origin. It did not propagate liveness backwards
from destination to source, meaning that if an origin flowed into
another, the source was not marked live even when the destination was.
The `transfer` function now propagates liveness from destination to
source: if the destination origin is live, the source origin is also
marked live with the same `LivenessInfo`, before optionally killing the
destination.
Additionally, `handleMovedArgsInCall` now skips rvalue reference
parameters annotated with `[[clang::lifetimebound]]`, since such
parameters should not be treated as moved-from.
This introduces some false positives for invalidations as container
modifications are not considered self-invalidating. The updated test
expectations reflect this, along with `FIXME` comments explaining that
they are false positives stemming from the lack of distinction between
owner-borrows and content-borrows, which will require more precise
`AccessPath` reasoning to resolve.
Commit: 14670fd9a949958eb4f157a58c34d6179b4bab77
https://github.com/llvm/llvm-project/commit/14670fd9a949958eb4f157a58c34d6179b4bab77
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/CodeGen/ModuleBuilder.h
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
Log Message:
-----------
Add limited vtable address querying to `clang::CodeGenerator` (#202807)
This is being used in Carbon (
https://github.com/carbon-language/carbon-lang/pull/7323 ) to implement
cross-language overriding.
I realize this isn't the fully general feature needed for virtual bases,
etc - but this limited functionality is already wrapped up for, if I
understand it correctly, constexpr use cases and some others. So
hopefully it's still something folks feel is general enough to be
worthwhile exporting. For now Carbon doesn't support deriving from a
type with virtual bases, so the extra complexity isn't needed.
Commit: 053d75c1d580e0c394f4cfb0688bafd05c187b0f
https://github.com/llvm/llvm-project/commit/053d75c1d580e0c394f4cfb0688bafd05c187b0f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/assume-loop-align.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
Log Message:
-----------
Revert "Reapply "[InstCombine] Merge consecutive assumes" (#205177)" (#205380)
This surfaces a bug likely fixed by
https://github.com/llvm/llvm-project/pull/205275. Once that lands this
patch can be landed again.
Reverts llvm/llvm-project#205324
Commit: e8b663ba31d4eed75a6cbc758dbc9f56589c9239
https://github.com/llvm/llvm-project/commit/e8b663ba31d4eed75a6cbc758dbc9f56589c9239
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/loopflatten.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/unswitch-cold-func.ll
A llvm/test/Transforms/PhaseOrdering/unswitch-nontrivial-cold-func.ll
M llvm/test/Transforms/SimpleLoopUnswitch/AMDGPU/uniform-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/PGO-nontrivial-unswitch2.ll
M llvm/test/Transforms/SimpleLoopUnswitch/PGO-nontrivial-unswitch3.ll
A llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-loop-guard.ll
A llvm/test/Transforms/SimpleLoopUnswitch/update-dt.ll
M polly/test/Support/pipelineposition.ll
Log Message:
-----------
[SimpleLoopUnswitch] Reland "Generalize the notion of trivial unswitching" (#204934)
In the original PR for this feature, the third parameter of
`MemorySSAUpdater::applyUpdates` was not set to `true`. This
caused `DT` to be invalid, resulting in the failures. This PR fixes the
issue and provides an additional testcase.
Also in the original commit had three asserts to confirm
`!ModifiedBranch ` when we bail out. One of these is redundant because
it is enclosed in an `if` statement checking the same condition. This PR removes
the redundant `assert` too.
Commit: 2a362bf5a546d9ac6da47412b6f594de58cce722
https://github.com/llvm/llvm-project/commit/2a362bf5a546d9ac6da47412b6f594de58cce722
Author: Nicholas Bishop <nbishop at nbishop.net>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
Log Message:
-----------
Add no-arg constructor and EraseIf method to MultiplexExternalSemaSource (#204458)
The no-arg constructor makes MultiplexExternalSemaSource usable in
situations where two child sources are not immediately available, or
where conditional logic makes it easier to call AddSource rather than
immediately pass child sources to the constructor.
The EraseIf method allows sources to be removed later if they are no
longer needed.
Co-authored-by: Nicholas Bishop <nicholsabishop at google.com>
Commit: c0214621a7492d950d0863501fe178c4e74a70f5
https://github.com/llvm/llvm-project/commit/c0214621a7492d950d0863501fe178c4e74a70f5
Author: AZero13 <gfunni234 at gmail.com>
Date: 2026-06-24 (Wed, 24 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
Log Message:
-----------
[InstCombine] Fold (bw-1) - ctlz(x&-x) to cttz (#205383)
Works for non-powers of 2.
Alive2: https://alive2.llvm.org/ce/z/-cbxFz
Commit: 87789e236d9de4b8d688a0d7291c7390fc2c58b4
https://github.com/llvm/llvm-project/commit/87789e236d9de4b8d688a0d7291c7390fc2c58b4
Author: adams381 <adams at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
A clang/test/CIR/CodeGen/member-pointer-null-init.cpp
Log Message:
-----------
[CIR] Handle non-zero-initializable types in emitNullInitialization (#201654)
Value-initializing an aggregate containing a pointer-to-data-member
(e.g. `new Inner()` where `Inner` has an `int Inner::*` field) crashed
with "type is not zero initializable" because `emitNullInitialization`
unconditionally called `errorNYI` for types where `isZeroInitializable`
returns false.
Member pointers use -1 as the null sentinel, so a plain zero store is
incorrect. Replace the `errorNYI` with `emitNullConstant`, which already
builds the correct per-field pattern (-1 for member-pointer fields, zero
elsewhere), and store the result. Types with virtual bases are still
guarded with `errorNYI` since `emitNullConstant` does not yet handle
them.
Commit: db078760b01d8b533c5d8d2e1017516823ae9a3d
https://github.com/llvm/llvm-project/commit/db078760b01d8b533c5d8d2e1017516823ae9a3d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Remove isCodeGenOnly=0 from PseudoLA_TLSDESC. (#205366)
The default for a Pseudo is isCodeGenOnly=1. With isCodeGenOnly=0 the
'la.tlsdesc' is a valid mnemonic for the assembly parser, but crashes in
the encoder.
I don't think this was meant to be a valid assembly mnemonic so remove
it.
Commit: 05f4625e7282294d556653ca11fc4ccb8f2aedca
https://github.com/llvm/llvm-project/commit/05f4625e7282294d556653ca11fc4ccb8f2aedca
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/test/API/lang/objc/hidden-ivars/Makefile
Log Message:
-----------
[lldb][test] Fix TestHiddenIvars rebuild failures in hidden-ivars Makefile (#205114)
Two rebuild-state bugs surfaced when running `./bin/lldb-dotest -p
TestHiddenIvars.py`:
```
FAILED (errors=6, skipped=7, expected failures=2)
```
1. `mkdir: stripped: File exists`, mkdir failed on the second build
because the directory already existed. Switch to `mkdir -p`.
2. `cp -r a.out.dSYM stripped/a.out.dSYM` recurses *into* the existing
destination on rebuild, producing a nested `stripped/a.out.dSYM/
a.out.dSYM/`. The outer dSYM keeps its stale UUID, so lldb cannot
match it to the freshly relinked stripped binary (which gets a new
UUID per link via -Wl,-random_uuid), causing source breakpoints to
fail to resolve. Remove the destination before copying.
Commit: e09eee295e86bd3e01de5a9ef3eb3d6b9446578b
https://github.com/llvm/llvm-project/commit/e09eee295e86bd3e01de5a9ef3eb3d6b9446578b
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/include/llvm/Transforms/IPO/InstrumentorRuntimeHelper.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
A llvm/test/Instrumentation/Instrumentor/compare.ll
A llvm/test/Instrumentation/Instrumentor/compare_config.json
M llvm/test/Instrumentation/Instrumentor/default_config.json
M llvm/test/Instrumentation/Instrumentor/default_rt.h
Log Message:
-----------
[Instrumentor] Add comparison instrumentation opportunity (#204069)
This patch adds an instrumentation opportunity for comparison
instructions (`icmp` and `fcmp`).
Commit: 044f0a53e3a011739572037d9880cb71eb988dcd
https://github.com/llvm/llvm-project/commit/044f0a53e3a011739572037d9880cb71eb988dcd
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
Log Message:
-----------
[TableGen] Use llvm_unreachable in switch guard for all except gcc 8- (#205385)
Follow-up to https://github.com/llvm/llvm-project/pull/194728.
For gccs older than v9 use abort. That seems to make everybody happy.
Commit: 5d4296c10053158c8193748994f7a49ae88c626b
https://github.com/llvm/llvm-project/commit/5d4296c10053158c8193748994f7a49ae88c626b
Author: adams381 <adams at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-bitwise.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
Log Message:
-----------
[CIR] Lower bitwise vector reduce builtins
`__builtin_reduce_or`, `__builtin_reduce_and`, and `__builtin_reduce_xor` were caught by the batch `errorBuiltinNYI` switch in CIRGen and rejected with an NYI diagnostic. They now lower to the matching `llvm.vector.reduce.{or,and,xor}` intrinsics on the vector element type, mirroring classic CodeGen in `CGBuiltin.cpp`.
The emission routes through `emitBuiltinWithOneOverloadedType`, extended with an optional result type: a vector reduction returns the element type, and CIR has no intrinsic registry to derive it the way classic's `getIntrinsic(ID, argTy)` does, so the element type is supplied explicitly (the default keeps the existing callers unchanged). The intrinsic name is passed without the `llvm.` prefix, which `LowerToLLVM` prepends, producing LLVM output byte-identical to OGCG.
The `builtin-undef-rvalue` regression test previously pinned `reduce_or` as NYI; it is retargeted to `reduce_add`, which is still NYI, so the undef-rvalue path stays covered.
Commit: 88eaad84c9832a2eaa335d90505b33870cc4b2e8
https://github.com/llvm/llvm-project/commit/88eaad84c9832a2eaa335d90505b33870cc4b2e8
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/docs/InternalsManual.rst
M clang/lib/Frontend/CompilerInvocation.cpp
M llvm/include/llvm/Option/OptParser.td
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[llvm][option] Remove bitfield marshalling (#203051)
Marshaling of bitfield options is adding some extra complexity in the
form of extractors and mergers, but is now unused. This PR removes that
feature.
Commit: 289e243d2b481ceb604c798f239350108bcd9585
https://github.com/llvm/llvm-project/commit/289e243d2b481ceb604c798f239350108bcd9585
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
Log Message:
-----------
Revert "[flang][cuda] Do not emit data transfer for constant read on the rhs" (#205394)
Reverts llvm/llvm-project#205185
this is making couple of downstream tests failing. Another approach is
needed
Commit: c70d01a0a6b76e8b34a470cf9ef57a68cfa7cc0d
https://github.com/llvm/llvm-project/commit/c70d01a0a6b76e8b34a470cf9ef57a68cfa7cc0d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Core/Module.cpp
M lldb/unittests/Core/ModuleTest.cpp
Log Message:
-----------
[lldb] Fix data race in Module::GetSectionList (#205226)
Module::GetSectionList built the section list (m_sections_up) without a
lock, so parallel module loading (e.g. crashlog.py's thread pool) could
race two builders on the unique_ptr and the SectionList vector, crashing
in AppleObjCRuntime::GetObjCVersion.
Build through ObjectFile::GetSectionList instead of locking the module
mutex and calling CreateSections directly: that path locks the object
file's section mutex before the module mutex, and the build can re-enter
it, so holding the module mutex across the build would invert the order
and risk a deadlock. The Module-level counterpart to a0176fd9dfc5.
rdar://180308581
Commit: e0359327d544d593f4bbf6af9479eb55ddf342d0
https://github.com/llvm/llvm-project/commit/e0359327d544d593f4bbf6af9479eb55ddf342d0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 7591910 (#205377)
This fixes 759191045115d966dffc99901e9086289767ff5c.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: dd1685d5a9f4f0af759ec29dc7f39951e262467c
https://github.com/llvm/llvm-project/commit/dd1685d5a9f4f0af759ec29dc7f39951e262467c
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll
Log Message:
-----------
[SLP] Don't recognize rotated widened strided stores in analyzeRtStrideCandidate() (#204013)
These cases which are nearly strided stores are being incorrectly
recognized as strided stores. Fixes #204011
Commit: 361f3b24f2a8703eb7a32c1ae081f490888238f3
https://github.com/llvm/llvm-project/commit/361f3b24f2a8703eb7a32c1ae081f490888238f3
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Model GNU statement expressions (#204841)
Commit: 3f48c6728c06f270f3126394ef8e6e65ef9d7174
https://github.com/llvm/llvm-project/commit/3f48c6728c06f270f3126394ef8e6e65ef9d7174
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/tools/dsymutil/X86/bundle-mtime.test
Log Message:
-----------
[dsymutil] Use more portable way to compare timestamp (NFC) (#204680)
`find` on AIX does not support `-maxpath` option. This patch is
to use python to compare the `mtime` of the file/directory.
Commit: 95decf7ce8bdcee2ab3f2b6932d951bd70babf91
https://github.com/llvm/llvm-project/commit/95decf7ce8bdcee2ab3f2b6932d951bd70babf91
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/phi-aa.ll
M llvm/test/Analysis/BasicAA/phi-and-select.ll
M llvm/test/Analysis/BasicAA/recphi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVersioning/exit-block-dominates-rt-check-block.ll
Log Message:
-----------
[BasicAA] Allow some more recursion across GEPs/phis. (#205010)
Allow recursive base-object analysis for some GEPs. The new version
still retains some bail-outs to avoid some redundant work.
This has a notable impact across a large IR corpus (32k modules from
large set of C/C++ workloads).
Some of the highlights include:
aa.NumNoAlias +1.52%
aa.NumMayAlias −0.10%
licm.NumMovedLoads +20.47%
licm.NumHoisted +2.03%
early-cse.NumCSELoad +1.59%
SLP.NumVectorInstructions +0.86%
loop-vectorize.LoopsVectorized +0.21%
instcount.TotalInsts −0.05%
instcount.NumLoadInst −0.10%
basicaa.SearchTimes +0.98%
basicaa.SearchLimitReached +14.39%
LV runtime alias check −1.3%
Compile-time has 2 notable changes
stage1-ReleaseThinLTO: +0.04%
stage1-ReleaseLTO-g: +0.18%
https://llvm-compile-time-tracker.com/compare.php?from=26ed0c17c0de84add0513a0e9699479f8c88b8fe&to=476e7466c5f543ac74c86bad728d79892f668f73&stat=instructions:u
The stage1-ReleaseLTO-g regression in particular is almost exclusively
due to tramp3d-v4, for which we also generate +1.18% more code, so the
majority of the increase is coming from additional transforms/codegen,
not the analysis itself.
PR: https://github.com/llvm/llvm-project/pull/205010
Commit: dcec4dda91608ddeee72cf2f503b3cb56e427fcb
https://github.com/llvm/llvm-project/commit/dcec4dda91608ddeee72cf2f503b3cb56e427fcb
Author: yueshe <yueshe at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
M llvm/test/CodeGen/SystemZ/misched-prera-pdiffs.mir
Log Message:
-----------
[SystemZ] Add missing asserts requirement for pre-RA sched mir tests (#205403)
This is based off https://github.com/llvm/llvm-project/pull/188823 and
is needed because tests are failing in release (non-asserts) builds
Commit: 7a4dfab07d1f76e5609be940213495060cecb078
https://github.com/llvm/llvm-project/commit/7a4dfab07d1f76e5609be940213495060cecb078
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/Basic/SourceManager.h
M clang/lib/Basic/SourceManager.cpp
M clang/test/DebugInfo/Generic/macro.c
A clang/test/Preprocessor/hardlink-include-names.c
M clang/unittests/Basic/SourceManagerTest.cpp
Log Message:
-----------
[clang] Fix incorrect filenames for hardlinks (#189475)
Previously hardlinked files would be discovered based on their inode,
leading to incorrect filepaths printed in some cases.
Fixes https://github.com/llvm/llvm-project/issues/26953
Fixes https://github.com/llvm/llvm-project/issues/58726
Related https://reviews.llvm.org/D137304
Assisted-by: codex
Commit: 0628d3586aee3f880a75934e4f7c314bf5c221f2
https://github.com/llvm/llvm-project/commit/0628d3586aee3f880a75934e4f7c314bf5c221f2
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
A clang/test/CIR/CodeGen/const-label-addr.c
Log Message:
-----------
[CIR] Implement support for emitting label address constants (#203644)
The evalloop.c test in the llvm-test-suite single source tests contains
a static array that is initialized with the address of labels within the
enclosing function. This wasn't implemented in CIR.
This change adds an implementation. The constant emitter change was
trivial. We just needed to create a #cir.block_addr_info attribute.
However, using that attribute as an initializer for a global requires
some additional handling and special lowering for the initializer.
The goto solver also needed to be updated to consider uses of labels in
global initializers.
The test case here was copied over directly from classic codegen. The
original test has an additional test case for the difference between two
label addresses. Support for that case will be added in a future change.
Assisted-by: Cursor / claude-opus-4.8
Commit: 5ab7ad96b05277467b2bab27f510affd337fa3be
https://github.com/llvm/llvm-project/commit/5ab7ad96b05277467b2bab27f510affd337fa3be
Author: vitbur <vittorioburani at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV][XCV] Add missing IsRV32 predicate to the XCVmac block (#205095)
The XCVmac instruction block was missing the `IsRV32` predicate that
every other XCV block already carries. `HasVendorXCVmac` on its own does
not require RV32, so `-mtriple=riscv64 -mattr=+xcvmac` could select
these RV32-only vendor instructions on RV64. Add `IsRV32` to the XCVmac
block to match the other XCV extensions and prevent selecting invalid
instructions on RV64.
Split out of #204879 at review request (one fix per PR).
Part of a CORE-V (XCV) series; see RFC:
https://discourse.llvm.org/t/rfc-core-v-xcv-support-for-cv32e40p-clang-builtins-xcvsimd-intrinsics-and-generic-auto-selection/91111
Commit: 6709bcde07752b38038bafda35eac3f16c38c4ba
https://github.com/llvm/llvm-project/commit/6709bcde07752b38038bafda35eac3f16c38c4ba
Author: Thurston Dang <thurston at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/unittests/Support/GlobPatternTest.cpp
Log Message:
-----------
Revert "[NFC][Support] Add test for inverted slash-agnostic matching" (#205397)
Reverts llvm/llvm-project#203290 as part of the process of reverting
https://github.com/llvm/llvm-project/pull/202854 due to downstream
breakage (see discussion in
https://github.com/llvm/llvm-project/pull/202854#issuecomment-4746579478)
Commit: 0b5c006208cf7b0fee3709f468152e7de81607ef
https://github.com/llvm/llvm-project/commit/0b5c006208cf7b0fee3709f468152e7de81607ef
Author: Thurston Dang <thurston at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/unittests/Basic/DiagnosticTest.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/unittests/Support/SpecialCaseListTest.cpp
Log Message:
-----------
Revert "Make sanitizer special case list slash-agnostic" (#205399)
Reverts llvm/llvm-project#149886 as part of the process of reverting
https://github.com/llvm/llvm-project/pull/202854 due to downstream
breakage (see discussion in
https://github.com/llvm/llvm-project/pull/202854#issuecomment-4746579478)
Commit: 92f058a8b351def1c10cb3f37d05adf813fb9638
https://github.com/llvm/llvm-project/commit/92f058a8b351def1c10cb3f37d05adf813fb9638
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
A llvm/test/tools/llvm-pdbutil/forward-cxx-to-c-odr.test
A llvm/test/tools/llvm-pdbutil/forward-cxx-to-c.test
Log Message:
-----------
[DebugInfo][CodeView] Resolve forward references to types without unique name (#203781)
In the following code:
```cpp
// header.h
typedef struct lua_State lua_State;
lua_State *getState();
// source.c
#include "header.h"
struct lua_State { int field; };
lua_State *getState() {
static lua_State state = {.field=42}; // make sure the type is emitted
return &state;
}
// main.cpp
extern "C" {
#include "header.h"
}
int main() { return getState() != 0; }
```
We'll get two forward references for `lua_State` when compiling with
clang-cl. One with a unique name (from C++) and one without (from C).
There's one complete definition for the type (from `source.c`). Since
this is from C, it doesn't have a unique name. Before, we could only
resolve the forward reference from C, not from C++.
With this PR, we can resolve both references. I also tested that the VS
debugger resolves the reference correctly.
I'm not sure if this is a clang bug, because when compiling with MSVC,
the C type also has a unique name. Clang omits the unique name, because
C doesn't have ODR like C++.
Commit: f9db256c63b5ecc802183f6e58fda039e36816c4
https://github.com/llvm/llvm-project/commit/f9db256c63b5ecc802183f6e58fda039e36816c4
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
[X86] Hoist getMOVriOpcode to X86InstrInfo.h and share it, NFC (#205187)
The x86 backend often needs to materialize potentially 64-bit immediates
into registers, and the logic to pick between the available opcodes
exists in 3 places at least. Move this to X86InstrInfo.h so we can share
it over the x86 backend without copying it.
An LLM did the refactoring.
Commit: 4c02baa7db33dcebd6b9eb51837b176869c8d327
https://github.com/llvm/llvm-project/commit/4c02baa7db33dcebd6b9eb51837b176869c8d327
Author: Sergei Barannikov <barannikov88 at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
Log Message:
-----------
[lldb] Add missing dependency on lldbPluginObjectFilePlaceholder (#204831)
Fixes shared library build after 882d0251.
Commit: 094c10f9c6a7ff039c682fd2c5d90f92e2579f1e
https://github.com/llvm/llvm-project/commit/094c10f9c6a7ff039c682fd2c5d90f92e2579f1e
Author: adams381 <adams at nvidia.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
A clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
Log Message:
-----------
[CIR] Lower byval/byref args in CallConvLowering (#201717)
[CIR] Lower byval/byref args in CallConvLowering
ArgKind::Indirect arguments were hitting an errorNYI in
CIRABIRewriteContext. Add the lowering: in the callee the block argument
type changes to !cir.ptr<T>, a load is inserted at entry so the body sees
the original value type, and llvm.byval or llvm.byref is attached based on
ownership. At call sites, both byval and byref are lowered by allocating a
stack slot, copying the value in, and passing the pointer.
For byval, llvm.noalias and llvm.noundef are also added -- llvm.noalias
because the call-site rewrite always produces a fresh alloca+store
(equivalent to -fpass-by-value-is-noalias), and llvm.noundef because the
copy is always fully defined. byref carries only llvm.byref and llvm.align
since it does not assert exclusive ownership.
Commit: 594cce3cbcdbe46d6f9ac3c6a53f86ae63c5bc42
https://github.com/llvm/llvm-project/commit/594cce3cbcdbe46d6f9ac3c6a53f86ae63c5bc42
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
A llvm/test/CodeGen/AMDGPU/uniform-intrin-combine-wqm-demote.ll
Log Message:
-----------
[AMDGPU] Change static NOP last terminator SI_DEMOTE_I1 to be replaced by S_BRANCH instead of assert (#204649)
This issue was first discovered in some testing downstream. A specific
chain of transformations on a ballot instruction with a constant
argument followed by an llvm.amgcn.wqm.demote call leads to an
instruction of `SI_DEMOTE_I1 -1, 0` being the last terminator of a block
with a single successor. This instruction is a NOP and can safely be
replaced with an S_BRANCH to the block's successor instead of asserting
failure.
The test added in this change is a very simplified recreation of the
pattern seen in the shader compilation in the downstream that lead to
assertion failure
Commit: 9757708126ff8defac247ed5a8a04b5daa8cd7c1
https://github.com/llvm/llvm-project/commit/9757708126ff8defac247ed5a8a04b5daa8cd7c1
Author: seantalts <me at seantalts.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/pred-inst-discount-vector-library-call.ll
Log Message:
-----------
[LoopVectorize] Don't assert in getVectorCallCost for vector library variants (#202085)
During loop vectorization, `computePredInstDiscount` queries the cost of
instructions at vector VF using `getInstructionCost`. A `CallInst` with
a vector library variant delegates to `getVectorCallCost`, which
asserted that such variants should not reach it.
A predicated call can however reach `getVectorCallCost` via
`computePredInstDiscount` — before its widening decision is made — when
a predicated user (e.g. a scatter store) is being considered for
scalarization. Remove the assert and fall through to the existing
scalarization cost, which is the cost relevant to that analysis.
Adds a regression test exercising that path.
Commit: ebf518b37a85a418ef887d77ff688d17d2bd8fa5
https://github.com/llvm/llvm-project/commit/ebf518b37a85a418ef887d77ff688d17d2bd8fa5
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
Log Message:
-----------
[MLIR][XeGPU] Refactor XeGPU layout propagation: passing lane_layout/lane_data with inst_data (#203156)
**Motivation**
Enhance setup* rules in layout propagation to pass lane_layout, and
lane_data information during inst_data propagation, so that the
propagation can have lane level information when choosing an optimal
inst_data. This branch makes that relationship explicit and uniform
across all setup rules.
**Invariant**
All setup rules now produce layouts that satisfy:
Nd ops + dpas/dpas_mx: inst_data = k * (lane_layout * lane_data), k ≥ 1
Scatter/matrix ops + non-anchor ops: inst_data = lane_layout * lane_data
**Key changes in XeGPULayoutImpl**
- New per-op anchor setup rules: setupStoreNdAnchorLayout,
setupPrefetchNdAnchorLayout,
setupLoadNdAnchorLayout (replacing a generic block-IO path) — Nd ops
have rigid lane info
and fit inst_data to the lane factorization.
- New complete*LayoutFromInstData helpers: fill in lane info on
user-provided anchors that
specify only inst_data, by re-running the op's Lane-kind setup with
inst_data as the
destination shape. Covers scatter load/store, block store/load, DPAS,
and DPAS_MX.
- BlockIOInstructionInterface (new in uArchBase.h): shared abstraction
over the
load/store/prefetch 2D-block instructions; the three Xe2 instructions
now implement it.
- setupMultiReductionResultLayout reorganized so the InstData and Lane
branches share the
same lane-layout logic (computeReductionLaneLayoutAndData).
- createScaleLayout (dpas_mx): caps the scale lane_layout by inst_data
so the scale
operand's load_nd satisfies the multiple-of invariant.
- getValidLayouts → getSgLayoutCandidates: renamed and generalized from
2D to N-D
factorization.
- inferShapeCastSourceLayout preserves lane info through 1D↔ND
collapse-style casts.
- chunkSize → contiguousChunkSize parameter rename for the scatter
inst_data decision.
- ResolveLayoutConflicts: retargets an existing convert_layout instead
of chaining a second
one; UnrollConvertLayoutOp short-circuits when input == target.
- Sub-byte (4-bit) element support added to the block-load uArch table.
- Tests updated: propagate-layout-inst-data.mlir, propagate-layout.mlir,
resolve-layout-conflicts.mlir.
Assisted-by-claude
---------
Co-authored-by: Claude Opus 4.7 (1M context) <noreply at anthropic.com>
Commit: cf78c5484ae7d39464d7b46f9fb3769dd6f9a2b7
https://github.com/llvm/llvm-project/commit/cf78c5484ae7d39464d7b46f9fb3769dd6f9a2b7
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
Log Message:
-----------
[MemoryBuiltins][NFC] Clang format and fixed coding style (#205205)
Commit: 0fdfa2b597aa0dbe76bc89fa313e2aa00da04430
https://github.com/llvm/llvm-project/commit/0fdfa2b597aa0dbe76bc89fa313e2aa00da04430
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
Log Message:
-----------
[RISCV] Remove assembly string from PseudoLA_TLSDESC. NFC (#205406)
Commit: 7e510f6adca203c3e347a85dc0e5a9016cd645a5
https://github.com/llvm/llvm-project/commit/7e510f6adca203c3e347a85dc0e5a9016cd645a5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
[LV] Remove unused getInt/Fp/PointerInductionDescriptor accessors (NFC) (#205414)
getIntOrFpInductionDescriptor and getPointerInductionDescriptor are
unused, remove them.
Commit: 5794f4e183d2612bb3aa4cd529d0c5c8c0f267dd
https://github.com/llvm/llvm-project/commit/5794f4e183d2612bb3aa4cd529d0c5c8c0f267dd
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/ProfileSummaryInfo.h
M llvm/lib/Analysis/ProfileSummaryInfo.cpp
Log Message:
-----------
[PSI] Drop AllowSynthetic parameter to getProfileCount
This was not set anywhere and synthetic profile counts are not
emitted/used anywhere, so remove it.
Reviewers: david-xl, mtrofin, teresajohnson
Pull Request: https://github.com/llvm/llvm-project/pull/204765
Commit: ee682b8b050a16dc7c2f6bcb6e3409b3241d4022
https://github.com/llvm/llvm-project/commit/ee682b8b050a16dc7c2f6bcb6e3409b3241d4022
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
Log Message:
-----------
[BFI] Drop AllowSynthetic Parameter
This was never set anywhere to something other than the default outside
of the implementation and synthetic profile counts are slated for
removal.
Reviewers: teresajohnson, mtrofin, david-xl
Pull Request: https://github.com/llvm/llvm-project/pull/204767
Commit: c0ddb5040488a60f5c454eeb50b7d6bcda89c360
https://github.com/llvm/llvm-project/commit/c0ddb5040488a60f5c454eeb50b7d6bcda89c360
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-23 (Tue, 23 Jun 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
M .github/CODEOWNERS
M .github/workflows/new-prs.yml
M .github/workflows/subscriber.yml
M .gitignore
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Utils/CommandLineOpts.h
M bolt/lib/Core/BinaryEmitter.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Passes/Aligner.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/MachORewriteInstance.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/AArch64/constant-island-reproducible.s
A bolt/test/binary-analysis/AArch64/cfg-warning.s
M bolt/test/eh-frame-hdr.test
M clang-tools-extra/clang-tidy/bugprone/MisplacedWideningCastCheck.cpp
M clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/test/did-change-configuration-params.test
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/assignment-in-selection-statement.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/bad-signal-to-kill-thread.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/copy-constructor-mutates-argument.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/default-operator-new-on-overaligned-type.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/exception-copy-constructor-throws.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/macro-parentheses.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/random-generator-seed.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/raw-memory-call-on-non-trivial-type.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/reserved-identifier.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/shared-ptr-array-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signal-handler.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/signed-char-misuse.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/spuriously-wake-up-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/suspicious-memory-comparison.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unhandled-self-assignment.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unique-ptr-array-mismatch.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/err60-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/mem57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc30-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc32-c.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc50-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/msc51-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/cert/oop57-cpp.rst
M clang-tools-extra/docs/clang-tidy/checks/concurrency/thread-canceltype-asynchronous.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/anonymous-namespace-in-header.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/no-recursion.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/predictable-rand.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/static-initialization-cycle.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/throw-by-value-catch-by-reference.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/enum-initial-value.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/misplaced-widening-cast-bitfield.cpp
M clang/docs/ConstantInterpreter.rst
M clang/docs/InternalsManual.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/LifetimeSafety.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/OffloadArch.h
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/riscv_sifive_vector.td
M clang/include/clang/Basic/riscv_vector_common.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/CodeGen/ModuleBuilder.h
M clang/include/clang/Driver/Action.h
M clang/include/clang/Driver/Compilation.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Job.h
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Frontend/CompilerInstance.h
M clang/include/clang/Frontend/CompilerInvocation.h
M clang/include/clang/Frontend/FrontendOptions.h
A clang/include/clang/Frontend/SSAFOptions.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
M clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
M clang/include/clang/Sema/MultiplexExternalSemaSource.h
M clang/include/clang/Sema/SemaOpenCL.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Floating.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/FlowSensitive/FormulaSerialization.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/OffloadArch.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/AVR.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/Basic/Targets/BPF.h
M clang/lib/Basic/Targets/CSKY.cpp
M clang/lib/Basic/Targets/CSKY.h
M clang/lib/Basic/Targets/Hexagon.cpp
M clang/lib/Basic/Targets/Hexagon.h
M clang/lib/Basic/Targets/Lanai.cpp
M clang/lib/Basic/Targets/Lanai.h
M clang/lib/Basic/Targets/LoongArch.h
M clang/lib/Basic/Targets/M68k.cpp
M clang/lib/Basic/Targets/M68k.h
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/NVPTX.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/SystemZ.h
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/Basic/Targets/Xtensa.h
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.h
M clang/lib/CIR/CodeGen/CIRGenValue.h
M clang/lib/CIR/Dialect/IR/CIRAttrs.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
M clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/EHABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/GotoSolver.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/ModuleBuilder.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/Action.cpp
M clang/lib/Driver/Compilation.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CSKYToolChain.cpp
M clang/lib/Driver/ToolChains/CSKYToolChain.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CrossWindows.cpp
M clang/lib/Driver/ToolChains/CrossWindows.h
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/FreeBSD.cpp
M clang/lib/Driver/ToolChains/FreeBSD.h
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Fuchsia.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/HLSL.cpp
M clang/lib/Driver/ToolChains/HLSL.h
M clang/lib/Driver/ToolChains/Haiku.cpp
M clang/lib/Driver/ToolChains/Haiku.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSP430.cpp
M clang/lib/Driver/ToolChains/MSP430.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/Managarm.cpp
M clang/lib/Driver/ToolChains/Managarm.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/NetBSD.h
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/OHOS.h
M clang/lib/Driver/ToolChains/OpenBSD.cpp
M clang/lib/Driver/ToolChains/OpenBSD.h
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Driver/ToolChains/SPIRVOpenMP.cpp
M clang/lib/Driver/ToolChains/SPIRVOpenMP.h
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/ToolChains/Serenity.cpp
M clang/lib/Driver/ToolChains/Serenity.h
M clang/lib/Driver/ToolChains/Solaris.cpp
M clang/lib/Driver/ToolChains/Solaris.h
M clang/lib/Driver/ToolChains/VEToolchain.cpp
M clang/lib/Driver/ToolChains/VEToolchain.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/WebAssembly.h
M clang/lib/Driver/ToolChains/XCore.cpp
M clang/lib/Driver/ToolChains/XCore.h
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Driver/ToolChains/ZOS.h
M clang/lib/Format/CMakeLists.txt
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/FormatTokenLexer.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/DependencyFile.cpp
M clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M clang/lib/Headers/avx512vlvnniintrin.h
M clang/lib/Headers/avx512vnniintrin.h
M clang/lib/Headers/avxvnniintrin.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Lex/PPCaching.cpp
M clang/lib/Lex/PPLexerChange.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/lib/Sema/MultiplexExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenCL.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/StaticAnalyzer/Checkers/Yaml.h
M clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/lib/Tooling/DependencyScanningTool.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
A clang/test/AST/ByteCode/command-line-options.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/dynamic-cast.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/builtin-name-registration.c
A clang/test/AST/pr198903.cpp
M clang/test/AST/undocumented-attrs.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/malloc.c
A clang/test/Analysis/pr169302.cpp
M clang/test/Analysis/pr22954.c
M clang/test/C/C23/n3037.c
A clang/test/CIR/CodeGen/agg-atomic-cast.cpp
A clang/test/CIR/CodeGen/atomic-libcall.c
A clang/test/CIR/CodeGen/const-label-addr.c
A clang/test/CIR/CodeGen/member-pointer-null-init.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
A clang/test/CIR/CodeGen/unary-expr-or-type-trait-32bit.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-nontemporal.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-bitwise.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
A clang/test/CIR/CodeGenBuiltins/builtins-elementwise-bool-nyi.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
A clang/test/CIR/IR/builtin-int-cast.cir
A clang/test/CIR/IR/invalid-builtin-int-cast.cir
M clang/test/CIR/IR/invalid-data-member.cir
A clang/test/CIR/Lowering/builtin-int-cast.cir
M clang/test/CIR/Lowering/const-array-bulk-lowering-fallbacks.cir
M clang/test/CIR/Lowering/const-array-of-pointers.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
A clang/test/CIR/Transforms/builtin-int-cast-fold.cir
M clang/test/CMakeLists.txt
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/ClangScanDeps/modules-full-by-mult-mod-names-diagnostics.c
M clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-lane-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-ldst-intrinsics.c
M clang/test/CodeGen/AArch64/bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-luti.c
M clang/test/CodeGen/AArch64/neon/add.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e4m3_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/non-overloaded/sf_mm_e5m2_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e4m3_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e4m3.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_e5m2_e5m2.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_f_f.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_s.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_s_u.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_s.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-sifive/non-policy/overloaded/sf_mm_u_u.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512vlvnni-builtins.c
M clang/test/CodeGen/X86/avx512vnni-builtins.c
M clang/test/CodeGen/X86/avxvnni-builtins.c
M clang/test/CodeGen/X86/bmi2-builtins.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/arm-bf16-reinterpret-intrinsics.c
M clang/test/CodeGen/builtins-elementwise-math.c
M clang/test/CodeGen/convergent-functions.cpp
M clang/test/CodeGen/ubsan-aggregate-null-align-bounds.c
A clang/test/CodeGenHLSL/BasicFeatures/OutArgLifetime.hlsl
A clang/test/CodeGenHLSL/resources/ConstantBufferT.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
M clang/test/DebugInfo/Generic/macro.c
M clang/test/Driver/amdgpu-macros.cl
M clang/test/Driver/amdgpu-mcpu.cl
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-link-bundle-archive.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/invalid-target-id.cl
M clang/test/Driver/lto.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Misc/target-invalid-cpu-note/amdgcn.c
M clang/test/Misc/target-invalid-cpu-note/nvptx.c
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_target_local_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/distribute_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/distribute_simd_private_codegen.cpp
M clang/test/OpenMP/distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/nvptx_lambda_capturing.cpp
R clang/test/OpenMP/nvptx_teams_reduction_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/spirv_target_teams_reduction_addrspace.c
M clang/test/OpenMP/target_codegen_global_capture.cpp
M clang/test/OpenMP/target_default_codegen.cpp
M clang/test/OpenMP/target_defaultmap_codegen_03.cpp
M clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
M clang/test/OpenMP/target_firstprivate_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen_01.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_array_section_no_length_codegen.cpp
M clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
M clang/test/OpenMP/target_map_codegen_03.cpp
M clang/test/OpenMP/target_map_codegen_hold.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_offload_mandatory_codegen.cpp
M clang/test/OpenMP/target_ompx_dyn_cgroup_mem_codegen.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-2.cpp
M clang/test/OpenMP/target_parallel_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_parallel_if_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_codegen.cpp
M clang/test/OpenMP/target_parallel_num_threads_strict_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_order_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_if_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_order_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_generic_loop_uses_allocators_codegen.cpp
M clang/test/OpenMP/target_teams_map_codegen.cpp
M clang/test/OpenMP/target_teams_num_teams_codegen.cpp
A clang/test/OpenMP/target_teams_reduction_codegen.cpp
M clang/test/OpenMP/target_teams_thread_limit_codegen.cpp
M clang/test/OpenMP/teams_codegen.cpp
M clang/test/OpenMP/teams_distribute_codegen.cpp
M clang/test/OpenMP/teams_distribute_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_if_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_proc_bind_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_collapse_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_lastprivate_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_private_codegen.cpp
M clang/test/OpenMP/teams_distribute_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_firstprivate_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_codegen-1.cpp
M clang/test/OpenMP/teams_generic_loop_collapse_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_private_codegen.cpp
M clang/test/OpenMP/teams_generic_loop_reduction_codegen.cpp
M clang/test/OpenMP/teams_private_codegen.cpp
A clang/test/Preprocessor/hardlink-include-names.c
M clang/test/Preprocessor/hexagon-predefines.c
M clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/dangling-global.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
M clang/test/Sema/LifetimeSafety/safety-c.c
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/aarch64-neon-immediate-ranges/luti.c
M clang/test/Sema/aarch64-neon-target.c
M clang/test/Sema/aarch64-neon-without-target-feature.cpp
M clang/test/Sema/arm-neon-target.c
M clang/test/Sema/builtin-memcpy.c
M clang/test/Sema/builtin-object-size.c
M clang/test/Sema/builtins-elementwise-math.c
M clang/test/Sema/enable_if.c
M clang/test/Sema/sifive-xsfmm.c
M clang/test/Sema/warn-fortify-source.c
A clang/test/Sema/warn-stringop-overread.c
M clang/test/SemaCXX/enable_if.cpp
M clang/test/SemaCXX/ext-int.cpp
M clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
A clang/test/SemaOpenCL/read-image-integer-linear-filter.cl
M clang/test/SemaTemplate/instantiate-member-template.cpp
M clang/test/lit.cfg.py
M clang/unittests/Basic/DiagnosticTest.cpp
M clang/unittests/Basic/SourceManagerTest.cpp
M clang/unittests/CodeGen/CodeGenExternalTest.cpp
M clang/unittests/Driver/DXCModeTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/FindDecl.h
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSADefs.h
A compiler-rt/lib/profile/InstrProfilingPlatformROCmInternal.h
M compiler-rt/lib/tsan/rtl/tsan_platform.h
M compiler-rt/test/asan/TestCases/Windows/issue64990.cpp
M compiler-rt/test/builtins/Unit/lit.cfg.py
A compiler-rt/test/profile/AMDGPU/device-basic.hip
A compiler-rt/test/profile/AMDGPU/device-early-collect.hip
A compiler-rt/test/profile/AMDGPU/device-no-kernel.hip
A compiler-rt/test/profile/AMDGPU/device-symbols.hip
A compiler-rt/test/profile/AMDGPU/lit.local.cfg.py
A compiler-rt/test/profile/GPU/instrprof-hip-basic.hip
A compiler-rt/test/profile/GPU/instrprof-hip-collect-after.hip
A compiler-rt/test/profile/GPU/instrprof-hip-counter-correctness.hip
A compiler-rt/test/profile/GPU/instrprof-hip-coverage.hip
A compiler-rt/test/profile/GPU/instrprof-hip-device-branching.hip
A compiler-rt/test/profile/GPU/instrprof-hip-fork-safety.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-gpu.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-process-merge.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multiple-kernels.hip
A compiler-rt/test/profile/GPU/instrprof-hip-nondefault-device.hip
A compiler-rt/test/profile/GPU/instrprof-hip-pgo-use.hip
A compiler-rt/test/profile/GPU/lit.local.cfg.py
A compiler-rt/test/profile/instrprof-rocm-bounds-dedup.cpp
A compiler-rt/test/profile/instrprof-rocm-grow-array.cpp
M compiler-rt/test/profile/lit.cfg.py
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/lib/runtime/CMakeLists.txt
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/MultiImageFortran.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/Support/ReductionProcessor.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/check-omp-atomic.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
M flang/test/Integration/split-lto-unit-2.f90
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M flang/test/Lower/MIF/coarray_allocation3.f90
M flang/test/Lower/MIF/coarray_allocation4.f90
M flang/test/Lower/MIF/coarray_allocation5.f90
M flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
M flang/test/Lower/OpenMP/declare-reduction-character-allocatable.f90
M flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-intrinsic.f90
M flang/test/Lower/OpenMP/declare-reduction-no-initializer-target-derived.f90
A flang/test/Lower/OpenMP/declare-reduction-same-name-different-scope.f90
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M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
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M flang/test/Semantics/OpenMP/requires03.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/requires06.f90
M flang/test/Semantics/OpenMP/requires07.f90
M flang/test/Semantics/OpenMP/requires08.f90
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M flang/test/Semantics/OpenMP/single03.f90
M flang/test/Semantics/OpenMP/single04.f90
M flang/test/Semantics/call47.f90
A flang/test/Transforms/debug-fake-use-multiple-dimensions.fir
A flang/test/Transforms/debug-fake-use-multiple-returns.fir
M flang/test/Transforms/debug-fake-use.fir
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/freebsd/x86_64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
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M libc/include/CMakeLists.txt
A libc/include/libgen.yaml
M libc/include/llvm-libc-macros/linux/sched-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/linux/CMakeLists.txt
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A libc/include/llvm-libc-types/loff_t.h
M libc/include/sched.yaml
M libc/include/sys/types.yaml
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M libc/src/__support/CPP/string_view.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/ioctl.h
A libc/src/libgen/CMakeLists.txt
A libc/src/libgen/basename.cpp
A libc/src/libgen/basename.h
A libc/src/libgen/dirname.cpp
A libc/src/libgen/dirname.h
M libc/src/sched/CMakeLists.txt
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/sched_clrcpuset.cpp
A libc/src/sched/sched_clrcpuset.h
M libc/src/sys/ioctl/linux/CMakeLists.txt
M libc/src/sys/ioctl/linux/ioctl.cpp
M libc/src/termios/linux/CMakeLists.txt
M libc/src/termios/linux/tcdrain.cpp
M libc/src/termios/linux/tcflow.cpp
M libc/src/termios/linux/tcflush.cpp
M libc/src/termios/linux/tcgetattr.cpp
M libc/src/termios/linux/tcgetsid.cpp
M libc/src/termios/linux/tcsendbreak.cpp
M libc/src/termios/linux/tcsetattr.cpp
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M libc/src/unistd/linux/isatty.cpp
M libc/test/src/CMakeLists.txt
A libc/test/src/libgen/CMakeLists.txt
A libc/test/src/libgen/basename_death_test.cpp
A libc/test/src/libgen/basename_test.cpp
A libc/test/src/libgen/dirname_death_test.cpp
A libc/test/src/libgen/dirname_test.cpp
M libc/test/src/sched/CMakeLists.txt
M libc/test/src/sched/cpu_count_test.cpp
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M libcxx/docs/Status/Cxx29Papers.csv
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M libcxx/include/__cstddef/byte.h
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M libcxx/include/__random/binomial_distribution.h
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M libcxx/include/__random/chi_squared_distribution.h
M libcxx/include/__random/discard_block_engine.h
M libcxx/include/__random/discrete_distribution.h
M libcxx/include/__random/exponential_distribution.h
M libcxx/include/__random/extreme_value_distribution.h
M libcxx/include/__random/fisher_f_distribution.h
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M libcxx/include/__random/generate_canonical.h
M libcxx/include/__random/geometric_distribution.h
M libcxx/include/__random/independent_bits_engine.h
M libcxx/include/__random/linear_congruential_engine.h
M libcxx/include/__random/lognormal_distribution.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/negative_binomial_distribution.h
M libcxx/include/__random/normal_distribution.h
M libcxx/include/__random/piecewise_constant_distribution.h
M libcxx/include/__random/piecewise_linear_distribution.h
M libcxx/include/__random/poisson_distribution.h
M libcxx/include/__random/random_device.h
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M libcxx/include/__random/shuffle_order_engine.h
M libcxx/include/__random/student_t_distribution.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__random/uniform_int_distribution.h
M libcxx/include/__random/uniform_real_distribution.h
M libcxx/include/__random/weibull_distribution.h
M libcxx/include/__ranges/drop_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__ranges/split_view.h
M libcxx/include/__ranges/take_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__utility/constant_wrapper.h
M libcxx/include/map
M libcxx/include/string
M libcxx/include/string.h
M libcxx/include/utility
M libcxx/include/version
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
M libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
M libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
M libcxx/test/libcxx/language.support/nodiscard.verify.cpp
A libcxx/test/libcxx/numerics/rand/nodiscard.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bernoulli/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.bin/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.geo/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.bern/rand.dist.bern.negbin/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.cauchy/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.chisq/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.f/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.lognormal/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.normal/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.norm/rand.dist.norm.t/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.exp/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.extreme/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.gamma/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.poisson/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.pois/rand.dist.pois.weibull/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.discrete/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.pconst/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.samp/rand.dist.samp.plinear/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.int/bad_engine.verify.cpp
M libcxx/test/libcxx/numerics/rand/rand.dist/rand.dist.uni/rand.dist.uni.real/bad_engine.verify.cpp
M libcxx/test/libcxx/utilities/expected/nodiscard.verify.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/for_each.associative.pass.cpp
M libcxx/test/std/algorithms/alg.nonmodifying/alg.foreach/ranges.for_each.associative.pass.cpp
M libcxx/test/std/containers/associative/map/map.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/associative/map/map.cons/move_assign.pass.cpp
M libcxx/test/std/containers/associative/map/map.modifiers/merge.pass.cpp
M libcxx/test/std/containers/associative/map/map.ops/contains.pass.cpp
M libcxx/test/std/containers/associative/map/map.ops/contains_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/empty.pass.cpp
M libcxx/test/std/containers/associative/multimap/get_allocator.pass.cpp
M libcxx/test/std/containers/associative/multimap/incomplete_type.pass.cpp
M libcxx/test/std/containers/associative/multimap/iterator.pass.cpp
M libcxx/test/std/containers/associative/multimap/max_size.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/assign_initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/compare_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/copy_assign.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/deduct.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/deduct_const.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/default.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/default_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/dtor_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/from_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list_compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/initializer_list_compare_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/iter_iter_comp_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_alloc.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_assign.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.cons/move_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.erasure/erase_if.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/clear.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/emplace.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/emplace_hint.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/erase_key.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/extract_iterator.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/extract_key.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_allocator_requirements.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_cv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_initializer_list.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_cv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_iter.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_iter_rv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_node_type.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_node_type_hint.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/insert_rv.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.modifiers/merge.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.nonmember/compare.three_way.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.nonmember/op_compare.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.observers/key_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.observers/value_comp.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/count_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range_transparent.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/find.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/member_swap.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/non_member_swap.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.special/swap_noexcept.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.value_compare/invoke.pass.cpp
M libcxx/test/std/containers/associative/multimap/multimap.value_compare/types.pass.cpp
M libcxx/test/std/containers/associative/multimap/size.pass.cpp
M libcxx/test/std/containers/associative/multimap/types.pass.cpp
M libcxx/test/std/containers/container.node/node_handle.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/bitint.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/digits.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/digits10.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/max.pass.cpp
M libcxx/test/std/language.support/support.limits/limits/numeric.limits.members/min.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/utility.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/language.support/support.types/byte.compile.pass.cpp
R libcxx/test/std/language.support/support.types/byte.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/and.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/and.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/enum_direct_init.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/lshift.assign.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.assign.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/lshift.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/lshift.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/not.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/or.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/or.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/rshift.assign.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.assign.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/rshift.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/rshift.pass.cpp
R libcxx/test/std/language.support/support.types/byteops/to_integer.compile.fail.cpp
M libcxx/test/std/language.support/support.types/byteops/to_integer.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/xor.assign.pass.cpp
M libcxx/test/std/language.support/support.types/byteops/xor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_ceil.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_floor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_width.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/has_single_bit.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/popcount.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
M libcxx/test/std/numerics/bit/byteswap.pass.cpp
M libcxx/test/std/numerics/bit/byteswap.verify.cpp
M libcxx/test/std/numerics/c.math/abs.pass.cpp
M libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating.bitint.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop.while/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.drop/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.filter/ctor.view_pred.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.split/ctor.range.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.split/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take.while/ctor.view.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.take/ctor.view_count.pass.cpp
M libcxx/test/std/ranges/range.adaptors/range.transform/ctor.view_function.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/ctor.first.last.pass.cpp
M libcxx/test/std/ranges/range.factories/range.iota.view/ctor.value.bound.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/convert.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/ctad.compile.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/cw.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/cw_fixed.array.ctor.pass.cpp
R libcxx/test/std/utilities/const.wrap.class/cw_fixed.ctor.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/subscript.pass.cpp
A libcxx/test/std/utilities/const.wrap.class/template.verify.cpp
M libcxx/test/std/utilities/const.wrap.class/types.compile.pass.cpp
M libcxx/test/std/utilities/const.wrap.class/unary_ops.pass.cpp
A libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
A libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
R libcxx/test/std/utilities/format/format.arguments/format.arg.store/make_format_args.bitint.verify.cpp
M libcxx/test/std/utilities/utility/utility.intcmp/intcmp.bitint.pass.cpp
M libcxx/test/support/test_macros.h
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/run-benchbot
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/gdb/libcxx/printers.py
M libcxx/utils/generate_feature_test_macro_components.py
M libunwind/src/UnwindRegistersSave.S
M lld/ELF/Arch/AArch64.cpp
M lld/MachO/ICF.cpp
M lld/test/ELF/aarch64-tls-le.s
M lld/test/ELF/aarch64-tlsld-ldst.s
A lld/test/MachO/icf-safe-data-addrsig.s
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Core/Section.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.cpp
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Lua/LuaState.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/source/Plugins/SymbolVendor/PECOFF/SymbolVendorPECOFF.cpp
M lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
M lldb/source/Target/Memory.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/FileSpec.cpp
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
M lldb/test/API/functionalities/thread/concurrent_events/TestConcurrentManyBreakpoints.py
M lldb/test/API/lang/objc/hidden-ivars/Makefile
A lldb/test/API/macosx/deny-attach/Makefile
A lldb/test/API/macosx/deny-attach/TestDenyAttach.py
A lldb/test/API/macosx/deny-attach/main.c
M lldb/test/API/macosx/thread_suspend/main.c
A lldb/test/Shell/ObjectFile/ELF/build-id-case-debug-only.yaml
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/RNBRemote.cpp
M lldb/unittests/Core/ModuleTest.cpp
M llvm/CMakeLists.txt
M llvm/README.txt
M llvm/docs/AMDGPUAsyncOperations.rst
M llvm/docs/AMDGPUExecutionSynchronization.rst
M llvm/docs/AMDGPUUsage.rst
A llvm/docs/CMake.md
R llvm/docs/CMake.rst
A llvm/docs/CodeGenerator.md
R llvm/docs/CodeGenerator.rst
A llvm/docs/CodingStandards.md
R llvm/docs/CodingStandards.rst
A llvm/docs/CommandGuide/index.md
R llvm/docs/CommandGuide/index.rst
M llvm/docs/CommandGuide/llvm-offload-binary.rst
M llvm/docs/CommandGuide/llvm-symbolizer.rst
A llvm/docs/Contributing.md
R llvm/docs/Contributing.rst
A llvm/docs/DeveloperPolicy.md
R llvm/docs/DeveloperPolicy.rst
M llvm/docs/Docker.rst
A llvm/docs/GettingInvolved.md
R llvm/docs/GettingInvolved.rst
A llvm/docs/GettingStarted.md
R llvm/docs/GettingStarted.rst
A llvm/docs/GettingStartedTutorials.md
R llvm/docs/GettingStartedTutorials.rst
A llvm/docs/GitHub.md
R llvm/docs/GitHub.rst
M llvm/docs/GitRepositoryPolicy.md
M llvm/docs/InstrRefDebugInfo.md
A llvm/docs/Passes.md
R llvm/docs/Passes.rst
A llvm/docs/ProgrammersManual.md
R llvm/docs/ProgrammersManual.rst
M llvm/docs/ProjectGovernance.rst
A llvm/docs/RFCProcess.md
R llvm/docs/RFCProcess.rst
A llvm/docs/Reference.md
R llvm/docs/Reference.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/RemoveDIsDebugInfo.md
A llvm/docs/SourceLevelDebugging.md
R llvm/docs/SourceLevelDebugging.rst
M llvm/docs/SphinxQuickstartTemplate.md
A llvm/docs/TableGen/index.md
R llvm/docs/TableGen/index.rst
A llvm/docs/TestingGuide.md
R llvm/docs/TestingGuide.rst
A llvm/docs/UserGuides.md
R llvm/docs/UserGuides.rst
A llvm/docs/WritingAnLLVMBackend.md
R llvm/docs/WritingAnLLVMBackend.rst
A llvm/docs/WritingAnLLVMNewPMPass.md
R llvm/docs/WritingAnLLVMNewPMPass.rst
A llvm/docs/WritingAnLLVMPass.md
R llvm/docs/WritingAnLLVMPass.rst
M llvm/docs/conf.py
A llvm/docs/index.md
R llvm/docs/index.rst
M llvm/examples/OrcV2Examples/CMakeLists.txt
A llvm/examples/OrcV2Examples/LLJITWithSymbolAliases/CMakeLists.txt
A llvm/examples/OrcV2Examples/LLJITWithSymbolAliases/LLJITWithSymbolAliases.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/STLExtras.h
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/LoopCacheAnalysis.h
M llvm/include/llvm/Analysis/MemoryBuiltins.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/CAS/ActionCache.h
M llvm/include/llvm/CAS/MappedFileRegionArena.h
M llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/include/llvm/CAS/OnDiskGraphDB.h
M llvm/include/llvm/CAS/OnDiskKeyValueDB.h
M llvm/include/llvm/CAS/OnDiskTrieRawHashMap.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CGData/StableFunctionMap.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MIR2Vec.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/DebugInfo/Symbolize/Symbolize.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
M llvm/include/llvm/IR/BasicBlock.h
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Option/ArgList.h
M llvm/include/llvm/Option/OptParser.td
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/SandboxIR/Argument.h
M llvm/include/llvm/SandboxIR/BasicBlock.h
M llvm/include/llvm/SandboxIR/Function.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Use.h
M llvm/include/llvm/Support/Allocator.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/ConvertUTF.h
M llvm/include/llvm/Support/DataExtractor.h
M llvm/include/llvm/Support/GlobPattern.h
M llvm/include/llvm/Support/KnownBits.h
M llvm/include/llvm/Support/LSP/Logging.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/include/llvm/Transforms/IPO/InstrumentorRuntimeHelper.h
M llvm/include/llvm/Transforms/Utils/DebugSSAUpdater.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterBulk.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/Delinearization.cpp
M llvm/lib/Analysis/DependenceAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CAS/OnDiskKeyValueDB.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalMerge.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineCopyPropagation.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DWP/DWP.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/PDB/Native/TpiStream.cpp
M llvm/lib/DebugInfo/Symbolize/Symbolize.cpp
M llvm/lib/ExecutionEngine/JITLink/COFF_x86_64.cpp
M llvm/lib/Frontend/OpenMP/OMPContext.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/IR/CMakeLists.txt
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
A llvm/lib/IR/VerifierAMDGPU.cpp
A llvm/lib/IR/VerifierInternal.h
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCELFStreamer.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/MCWinCOFFStreamer.cpp
M llvm/lib/ObjCopy/COFF/COFFObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.cpp
M llvm/lib/ObjCopy/MachO/MachOLayoutBuilder.h
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOWriter.cpp
M llvm/lib/ObjectYAML/MachOEmitter.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/ProfileData/SampleProfReader.cpp
M llvm/lib/Remarks/RemarkStreamer.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/ConvertUTFWrapper.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/WithColor.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/CMakeLists.txt
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
A llvm/lib/Target/AArch64/SVEShuffleOpts.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUBarrierLatency.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
M llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
M llvm/lib/Target/AMDGPU/R600ISelLowering.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMMCInstLower.cpp
M llvm/lib/Target/ARM/ARMRegisterInfo.td
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.cpp
M llvm/lib/Target/BPF/BPFFrameLowering.h
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYTargetStreamer.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
M llvm/lib/Target/Hexagon/HexagonPseudo.td
M llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
A llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
M llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/InstrumentorConfigFile.cpp
M llvm/lib/Transforms/IPO/InstrumentorUtils.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/Reassociate.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
M llvm/lib/Transforms/Utils/FixIrreducible.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/runtimes/CMakeLists.txt
M llvm/test/Analysis/BasicAA/phi-aa.ll
M llvm/test/Analysis/BasicAA/phi-and-select.ll
M llvm/test/Analysis/BasicAA/recphi.ll
M llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
A llvm/test/Analysis/Delinearization/inconsistent-types.ll
A llvm/test/Analysis/DependenceAnalysis/find-gcd-overflow.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/loads-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/matvecmul.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/multi-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/single-store.ll
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/stencil.ll
M llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll
M llvm/test/Analysis/LoopCacheAnalysis/interchange-cost-beneficial.ll
M llvm/test/Analysis/LoopCacheAnalysis/interchange-refcost-overflow.ll
M llvm/test/Analysis/LoopCacheAnalysis/partially-perfect-nest.ll
A llvm/test/Analysis/ValueTracking/knownbits-pdep.ll
A llvm/test/Analysis/ValueTracking/knownbits-pext.ll
A llvm/test/Bitcode/Inputs/invalid-summary-version.bc
A llvm/test/Bitcode/invalid-summary-version.test
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
A llvm/test/CodeGen/AArch64/GlobalISel/pr204118.mir
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/aarch64-bf16-ldst-intrinsics.ll
M llvm/test/CodeGen/AArch64/arm64-build-vector.ll
M llvm/test/CodeGen/AArch64/arm64-fpenv.ll
M llvm/test/CodeGen/AArch64/bf16-select.ll
M llvm/test/CodeGen/AArch64/bf16-shuffle.ll
M llvm/test/CodeGen/AArch64/bf16-vector-bitcast.ll
M llvm/test/CodeGen/AArch64/bf16-vector-shuffle.ll
M llvm/test/CodeGen/AArch64/bf16.ll
A llvm/test/CodeGen/AArch64/extend-bool-vector-load.ll
M llvm/test/CodeGen/AArch64/load-insert-undef.ll
M llvm/test/CodeGen/AArch64/load-insert-zero.ll
M llvm/test/CodeGen/AArch64/lower-range-metadata-func-call.ll
M llvm/test/CodeGen/AArch64/luti-with-sme2.ll
M llvm/test/CodeGen/AArch64/neon-luti.ll
A llvm/test/CodeGen/AArch64/pr204118.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.ll
M llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
M llvm/test/CodeGen/AArch64/sve-extract-scalable-vector.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-insert-vector.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll
M llvm/test/CodeGen/AArch64/sve-masked-gather.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-scaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter-64b-unscaled.ll
M llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
A llvm/test/CodeGen/AArch64/sve-tbl-folding-new-pm.ll
A llvm/test/CodeGen/AArch64/sve-tbl-folding-opts.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-gather-loads-128bit-index.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-scatter-stores-128bit-index.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tblq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-tbxq.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq1.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-uzpq2.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq1.ll
M llvm/test/CodeGen/AArch64/sve2p1-intrinsics-zipq2.ll
M llvm/test/CodeGen/AArch64/sve2p1-vector-shuffles.ll
M llvm/test/CodeGen/AArch64/vector-extract-last-active.ll
A llvm/test/CodeGen/AArch64/windows-elf-frame-record-pairing.ll
M llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add.vni16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_flat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local_2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-add-sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-and.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bitcast_38_i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/br-constant-invalid-sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-byte-short.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-load-store-pointers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/buffer-schedule.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/bug_shuffle_vector_to_scalar.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-fmed3-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/clamp-minmax-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combiner-crash.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/floor.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3-min-max-const-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin3-fmax3-combine.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.v2f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp-int-conversions.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr-new-regbank-select.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value-addrspaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/i1-copy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/icmp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/implicit-kernarg-backend-usage-global-isel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement-stack-lower.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.dispatch.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fmul.legacy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.kernarg.segment.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.live.mask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mul24.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.queue.ptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.integer-minmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.strictwqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
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M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wwm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.atomic.cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.inline.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.powi.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant32bit.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-divergent.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform-in-vgpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-zero-and-sign-extending-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mad.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/madmix-constant-bus-violation.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-buffer-stores.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs-i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/minmaxabs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mmra.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-ctlz-from-umul-to-lshr-in-postlegalizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/readanylane-combines.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.subdword.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readlane.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll
R llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sbfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shader-epilogs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shufflevector.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smrd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/smul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-divergent-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/store-uniform-addr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/subo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc-brc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ubfx.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/unsupported-ptr-add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/a-v-global-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
M llvm/test/CodeGen/AMDGPU/add-max.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast-known-non-null.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
M llvm/test/CodeGen/AMDGPU/addsub64_carry.ll
M llvm/test/CodeGen/AMDGPU/allow-check.ll
M llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/amdgcn-sin-cos-f16-f32.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-break-large-phis.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
M llvm/test/CodeGen/AMDGPU/amdgpu.work-item-intrinsics.deprecated.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination-gfx12.ll
M llvm/test/CodeGen/AMDGPU/barrier-elimination.ll
M llvm/test/CodeGen/AMDGPU/bfi_int.ll
M llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/bitop3.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/buffer-rsrc-ptr-ops.ll
M llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
M llvm/test/CodeGen/AMDGPU/call-argument-types.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/call-constexpr.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/call-encoding.ll
M llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
M llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/call-reqd-group-size.ll
M llvm/test/CodeGen/AMDGPU/call-return-types.ll
M llvm/test/CodeGen/AMDGPU/call-skip.ll
M llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
M llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
M llvm/test/CodeGen/AMDGPU/check-subtarget-features.ll
M llvm/test/CodeGen/AMDGPU/cluster-dims.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cube.ll
M llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
M llvm/test/CodeGen/AMDGPU/dag-divergence.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
M llvm/test/CodeGen/AMDGPU/ds-alignment.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
A llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system_noprivate.ll
M llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fma.f16.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fmaxnum.ll
M llvm/test/CodeGen/AMDGPU/fmed3-cast-combine.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.v2f16.ll
M llvm/test/CodeGen/AMDGPU/fminnum.ll
M llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs-v2f32.ll
M llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
A llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-image-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-flat-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpenv.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub-as-fneg-src-modifier.ll
M llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
M llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/global-address.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/gws_agpr.ll
M llvm/test/CodeGen/AMDGPU/hsa-default-device.ll
M llvm/test/CodeGen/AMDGPU/hsa-func.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
A llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
M llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/invariant-image-load.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/issue92561-restore-undef-scc-verifier-error.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/lds-barrier-memoperand.ll
M llvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
M llvm/test/CodeGen/AMDGPU/lds-size.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.add.min.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load-last-use.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bvh8_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.async.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.flat.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.workgroup.max.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-agent.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-basic.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-singlethread.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-system.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-wavefront.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cooperative.atomic-workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.e5m3.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.off.f32.i4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.pk16.gfx1250.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scalef32.sr.pk16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.swizzle.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.lds.gfx950.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.wave32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.tr.gfx1250.w32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mulhi.i24.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.bcast.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.idx.gen.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.up.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.swap.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane32.swap.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.lds.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.getreg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx12.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
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M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.shuffle.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id-unsupported-calling-convention.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll
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M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
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M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
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M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/load-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/load-range-metadata-sign-bits.ll
M llvm/test/CodeGen/AMDGPU/load-saddr-offset-imm.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-nontemporal-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-opt.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lrint.ll
M llvm/test/CodeGen/AMDGPU/lround.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/make-buffer-rsrc-lds-fails.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
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M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/module-lds-false-sharing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
M llvm/test/CodeGen/AMDGPU/nor-divergent-lanemask.ll
M llvm/test/CodeGen/AMDGPU/offset-split-flat.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/overlapping-tuple-copy-implicit-op-failure.ll
M llvm/test/CodeGen/AMDGPU/packed-fneg-fsub-fp16.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/permlane16_opsel.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/ps-shader-arg-count.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/ptr-buffer-alias-scheduling.ll
M llvm/test/CodeGen/AMDGPU/read-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/read_register.ll
M llvm/test/CodeGen/AMDGPU/readcyclecounter.ll
M llvm/test/CodeGen/AMDGPU/readsteadycounter.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
M llvm/test/CodeGen/AMDGPU/ret.ll
M llvm/test/CodeGen/AMDGPU/returnaddress.ll
M llvm/test/CodeGen/AMDGPU/roundeven.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/s-barrier.ll
M llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll
M llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
A llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
M llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir
M llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-count-graphics.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shlN_add.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/sign_extend.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-block.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/stackguard.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.invalid.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-flat.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-global.ll
M llvm/test/CodeGen/AMDGPU/store-atomic-local.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fmul.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_fsub.f64.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f32.ll
M llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
M llvm/test/CodeGen/AMDGPU/swizzle.bit.extract.ll
M llvm/test/CodeGen/AMDGPU/tail-call-amdgpu-gfx.ll
A llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/CodeGen/AMDGPU/trap.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/unaligned-buffer.ll
A llvm/test/CodeGen/AMDGPU/uniform-intrin-combine-wqm-demote.ll
M llvm/test/CodeGen/AMDGPU/unsupported-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
M llvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/v_pack.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-add.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-and.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-or.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
M llvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
M llvm/test/CodeGen/AMDGPU/write-register-invalid-register.ll
M llvm/test/CodeGen/AMDGPU/write_register.ll
M llvm/test/CodeGen/ARM/atomic-load-store.ll
M llvm/test/CodeGen/ARM/bf16-create-get-set-dup.ll
M llvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll
M llvm/test/CodeGen/ARM/bf16-imm.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
M llvm/test/CodeGen/ARM/bf16-shuffle.ll
M llvm/test/CodeGen/ARM/bfloat.ll
A llvm/test/CodeGen/ARM/machine-outliner-thunk-tcgpr.mir
M llvm/test/CodeGen/ARM/vcombine.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/load-constant-buffer-t.ll
A llvm/test/CodeGen/Hexagon/kcfi.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/double-convert.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/float-convert.ll
M llvm/test/CodeGen/PowerPC/ucmp.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/make-compressible-zilsd.mir
A llvm/test/CodeGen/RISCV/qc-access-marking.ll
M llvm/test/CodeGen/RISCV/rv32-merge-non-arg-reg.mir
M llvm/test/CodeGen/RISCV/rv32-move-merge-crash.ll
M llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
M llvm/test/CodeGen/SPARC/bswap.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-void-call-aggregate-arg.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-large-vector-shader.ll
A llvm/test/CodeGen/SPIRV/instructions/phi-large-vector.ll
A llvm/test/CodeGen/SPIRV/instructions/undef-composite.ll
M llvm/test/CodeGen/SystemZ/args-22.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-ops-i128.ll
M llvm/test/CodeGen/SystemZ/bswap-09.ll
M llvm/test/CodeGen/SystemZ/bswap-10.ll
M llvm/test/CodeGen/SystemZ/call-zos-vec.ll
M llvm/test/CodeGen/SystemZ/canonicalize-vars.ll
M llvm/test/CodeGen/SystemZ/codegenprepare-sink-and-for-tm.ll
M llvm/test/CodeGen/SystemZ/dag-combine-05.ll
M llvm/test/CodeGen/SystemZ/dag-combine-07.ll
M llvm/test/CodeGen/SystemZ/fold-masked-merge.ll
M llvm/test/CodeGen/SystemZ/fp-copysign-03.ll
M llvm/test/CodeGen/SystemZ/fp-half-vector-binops.ll
M llvm/test/CodeGen/SystemZ/fp-half-vector-fcmp-select.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs-zEC12.ll
M llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-zEC12.ll
M llvm/test/CodeGen/SystemZ/int-cmp-65.ll
M llvm/test/CodeGen/SystemZ/int-conv-14.ll
M llvm/test/CodeGen/SystemZ/int-conv-15.ll
M llvm/test/CodeGen/SystemZ/int-mul-12.ll
M llvm/test/CodeGen/SystemZ/int-mul-13.ll
M llvm/test/CodeGen/SystemZ/int-uadd-14.ll
M llvm/test/CodeGen/SystemZ/int-usub-13.ll
M llvm/test/CodeGen/SystemZ/machine-combiner-reassoc-fp.ll
M llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
M llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
A llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
A llvm/test/CodeGen/SystemZ/misched-prera-pdiffs.mir
M llvm/test/CodeGen/SystemZ/regcoal-subranges-update.mir
M llvm/test/CodeGen/SystemZ/regcoal_remat_empty_subrange.ll
M llvm/test/CodeGen/SystemZ/risbg-04.ll
M llvm/test/CodeGen/SystemZ/rot-03.ll
M llvm/test/CodeGen/SystemZ/shift-12.ll
M llvm/test/CodeGen/SystemZ/shift-13.ll
M llvm/test/CodeGen/SystemZ/shift-14.ll
M llvm/test/CodeGen/SystemZ/shift-15.ll
M llvm/test/CodeGen/SystemZ/shift-16.ll
M llvm/test/CodeGen/SystemZ/shift-17.ll
M llvm/test/CodeGen/SystemZ/soft-float-args.ll
M llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll
A llvm/test/CodeGen/SystemZ/target-flags.ll
M llvm/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
M llvm/test/CodeGen/SystemZ/vec-cmpsel-01.ll
M llvm/test/CodeGen/SystemZ/vec-eval.ll
M llvm/test/CodeGen/SystemZ/vec-move-23.ll
M llvm/test/CodeGen/SystemZ/vec-mul-07.ll
M llvm/test/CodeGen/SystemZ/vec-perm-12.ll
M llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
M llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
M llvm/test/CodeGen/VE/Scalar/atomic.ll
M llvm/test/CodeGen/VE/Scalar/atomic_cmp_swap.ll
M llvm/test/CodeGen/X86/atomic-load-store.ll
M llvm/test/CodeGen/X86/avx512-load-store.ll
M llvm/test/CodeGen/X86/bmi.ll
M llvm/test/CodeGen/X86/bmi2.ll
M llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
M llvm/test/CodeGen/X86/madd.ll
M llvm/test/CodeGen/X86/phaddsub.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
A llvm/test/DebugInfo/BPF/dbg-location-fbreg.ll
A llvm/test/ExecutionEngine/JITLink/x86-64/COFF_dllimport_iat.s
A llvm/test/Instrumentation/Instrumentor/compare.ll
A llvm/test/Instrumentation/Instrumentor/compare_config.json
M llvm/test/Instrumentation/Instrumentor/default_config.json
M llvm/test/Instrumentation/Instrumentor/default_rt.h
M llvm/test/Instrumentation/MemorySanitizer/bmi.ll
M llvm/test/Instrumentation/MemorySanitizer/pdep.ll
M llvm/test/Instrumentation/MemorySanitizer/pext.ll
A llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
A llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
A llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/buffer-op-swz-operand.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/COFF/seh-unwindv3-inheritance.s
M llvm/test/MC/COFF/seh-unwindv3-large.s
M llvm/test/MC/COFF/seh-unwindv3-nonmirror.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Mips/mips64r6/invalid.s
M llvm/test/MC/RISCV/rv32p-aliases-valid.s
M llvm/test/MC/RISCV/rv64p-aliases-valid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-valid.s
M llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
A llvm/test/ObjectYAML/MachO/endianness.yaml
M llvm/test/TableGen/directive1.td
M llvm/test/TableGen/directive2.td
A llvm/test/Transforms/ArgumentPromotion/X86/struct-load.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
A llvm/test/Transforms/Attributor/callbr.ll
M llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll
A llvm/test/Transforms/FixIrreducible/unsupported-terminator.ll
M llvm/test/Transforms/IRCE/correct-loop-info.ll
M llvm/test/Transforms/IndVarSimplify/lcssa-preservation.ll
M llvm/test/Transforms/Inline/X86/call-abi-compatibility.ll
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/alloca-big.ll
M llvm/test/Transforms/InstCombine/and-or-icmps.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/or.ll
M llvm/test/Transforms/InstCombine/pdep.ll
M llvm/test/Transforms/InstCombine/pext.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
M llvm/test/Transforms/InstCombine/select-to-cmp.ll
M llvm/test/Transforms/InstCombine/set.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maximumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maxnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minimumnum.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-minnum.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/InstCombine/zext.ll
M llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/use-outside-loop.ll
A llvm/test/Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
M llvm/test/Transforms/LoopStrengthReduce/preserve-lcssa.ll
M llvm/test/Transforms/LoopUnroll/runtime-loop-multiexit-dom-verify.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-derived-ivs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops-and-casts.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-wide-ops.ll
A llvm/test/Transforms/LoopVectorize/AArch64/vplan-native-outer-loop-wide-type.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
A llvm/test/Transforms/LoopVectorize/X86/predicated-replicate-feeding-cast.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-with-uniform-ops.ll
M llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
M llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/narrow-interleave-groups-scalable-vf.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar-widen-gep-scalable.ll
M llvm/test/Transforms/LoopVectorize/pr47343-expander-lcssa-after-cfg-update.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
A llvm/test/Transforms/LoopVectorize/pred-inst-discount-vector-library-call.ll
M llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalable-assume.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll
M llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
M llvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
A llvm/test/Transforms/LoopVectorize/shl-shift-amount-out-of-range-scev.ll
M llvm/test/Transforms/LoopVectorize/single-scalar-cast-minbw.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/vector-freeze.ll
A llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/version-mem-access.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
A llvm/test/Transforms/LoopVectorize/widen-call-op-scalar-vector.ll
M llvm/test/Transforms/LoopVersioning/exit-block-dominates-rt-check-block.ll
M llvm/test/Transforms/OpenMP/add_attributes.ll
M llvm/test/Transforms/OpenMP/single_threaded_execution.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/loopflatten.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
M llvm/test/Transforms/PhaseOrdering/X86/madd.ll
M llvm/test/Transforms/PhaseOrdering/X86/sad.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PhaseOrdering/unswitch-cold-func.ll
A llvm/test/Transforms/PhaseOrdering/unswitch-nontrivial-cold-func.ll
A llvm/test/Transforms/Reassociate/reassociate-distribute.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/rotated-strided-loads.ll
A llvm/test/Transforms/SLPVectorizer/X86/copyable-phi-scheduled-non-copyable.ll
A llvm/test/Transforms/SLPVectorizer/X86/insertvalue-reordered-operands.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-replace-extractelement-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/revec-ordered-reductions.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SROA/struct-to-vector-subpartition.ll
M llvm/test/Transforms/SimpleLoopUnswitch/AMDGPU/uniform-unswitch.ll
M llvm/test/Transforms/SimpleLoopUnswitch/PGO-nontrivial-unswitch2.ll
M llvm/test/Transforms/SimpleLoopUnswitch/PGO-nontrivial-unswitch3.ll
A llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-loop-guard.ll
A llvm/test/Transforms/SimpleLoopUnswitch/update-dt.ll
A llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-pseudoprobe.ll
A llvm/test/Transforms/SimplifyCFG/hoist-common-skip-pseudoprobe.ll
M llvm/test/Transforms/VectorCombine/AArch64/load-extractelement-scalarization.ll
M llvm/test/Transforms/VectorCombine/AArch64/partial-reduce-crash.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop-inseltpoison.ll
M llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
A llvm/test/Transforms/VectorCombine/X86/shuffle-chain-reduction-subvector.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-chain-reduction-umin.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-intrinsics.ll
M llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll
M llvm/test/Verifier/callbr-intrinsic.ll
M llvm/test/Verifier/memprof-metadata-bad.ll
M llvm/test/Verifier/nofpclass-metadata.ll
A llvm/test/Verifier/nonnull-metadata.ll
R llvm/test/Verifier/nonnull_metadata.ll
A llvm/test/Verifier/noundef-metadata.ll
R llvm/test/Verifier/range-1.ll
A llvm/test/Verifier/range-metadata.ll
M llvm/test/tools/dsymutil/X86/bundle-mtime.test
M llvm/test/tools/llubi/assume_invalid_align.ll
M llvm/test/tools/llubi/controlflow.ll
M llvm/test/tools/llubi/intr_vector_manip.ll
M llvm/test/tools/llubi/invoke_poison.ll
M llvm/test/tools/llubi/metadata.ll
A llvm/test/tools/llubi/reset_return_value_slot.ll
A llvm/test/tools/llubi/verify.ll
M llvm/test/tools/llvm-cas/validation.test
A llvm/test/tools/llvm-cov/show-colors-uninit.test
A llvm/test/tools/llvm-mca/AArch64/Cortex/A55-in-order-bottleneck-analysis.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-direct-branch.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-forwarding.s
A llvm/test/tools/llvm-mca/AArch64/Cortex/A57-shifted-register.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/direct-branch.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/in-order-bottleneck-analysis.s
R llvm/test/tools/llvm-mca/AArch64/Cortex/shifted-register.s
R llvm/test/tools/llvm-objcopy/ELF/compress-debug-sections-zstd-err.test
M llvm/test/tools/llvm-objcopy/ELF/compress-sections-within-segment.s
A llvm/test/tools/llvm-objcopy/ELF/compress-sections-zlib-unsupported.test
A llvm/test/tools/llvm-objcopy/ELF/compress-sections-zstd-unsupported.test
R llvm/test/tools/llvm-objcopy/ELF/decompress-debug-sections-unsupported-zlib.test
A llvm/test/tools/llvm-objcopy/ELF/decompress-sections-unsupported-zlib.test
A llvm/test/tools/llvm-objcopy/ELF/decompress-sections-unsupported-zstd.test
A llvm/test/tools/llvm-objcopy/MachO/linkedit-alignment.test
M llvm/test/tools/llvm-objcopy/MachO/linkedit-order-1.test
M llvm/test/tools/llvm-objcopy/MachO/linkedit-order-2.test
M llvm/test/tools/llvm-objcopy/MachO/symbol-table.test
M llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
A llvm/test/tools/llvm-offload-binary/member-extract.test
A llvm/test/tools/llvm-pdbutil/forward-cxx-to-c-odr.test
A llvm/test/tools/llvm-pdbutil/forward-cxx-to-c.test
A llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
M llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
M llvm/test/tools/llvm-symbolizer/pdb/pdb.test
M llvm/tools/llubi/lib/Interpreter.cpp
M llvm/tools/llubi/llubi.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-debuginfod/llvm-debuginfod.cpp
M llvm/tools/llvm-dwarfdump/Statistics.cpp
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objdump/SourcePrinter.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h
M llvm/tools/llvm-readobj/ELFDumper.cpp
M llvm/tools/llvm-readobj/ObjDumper.h
M llvm/tools/llvm-readobj/llvm-readobj.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOperands.cpp
M llvm/tools/llvm-symbolizer/Opts.td
M llvm/tools/llvm-symbolizer/llvm-symbolizer.cpp
M llvm/tools/obj2yaml/elf2yaml.cpp
M llvm/tools/reduce-chunk-list/reduce-chunk-list.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/CMakeLists.txt
M llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
M llvm/unittests/IR/MDBuilderTest.cpp
M llvm/unittests/Option/OptionMarshallingTest.cpp
M llvm/unittests/Support/AllocatorTest.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/unittests/Support/DataExtractorTest.cpp
M llvm/unittests/Support/GlobPatternTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/unittests/Support/SpecialCaseListTest.cpp
M llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/UnicodeData/UnicodeNameMappingGenerator.cpp
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/build/write_cmake_config.gni
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/Inputs/shtest-define/examples/param-subst.txt
M llvm/utils/yaml-bench/YAMLBench.cpp
M mlir/include/mlir/Conversion/MathToXeVM/MathToXeVM.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Dialect/Affine/Analysis/LoopAnalysis.h
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/UnstructuredControlFlow.h
M mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
M mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
M mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
M mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/include/mlir/IR/BuiltinAttributes.td
M mlir/include/mlir/Query/Matcher/MatchersInternal.h
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/PtrToLLVM/PtrToLLVM.cpp
M mlir/lib/Dialect/Affine/Analysis/LoopAnalysis.cpp
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Affine/Transforms/AffineLoopInvariantCodeMotion.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp
M mlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
M mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/LoopUtils.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
M mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/ExecutionEngine/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Conversion/MathToXeVM/math-to-ocl.mlir
M mlir/test/Conversion/PtrToLLVM/ptr-to-llvm.mlir
A mlir/test/Dialect/Affine/trip-count.mlir
M mlir/test/Dialect/Arith/int-range-opts-crash.mlir
M mlir/test/Dialect/Arith/invalid.mlir
M mlir/test/Dialect/Arith/one-shot-bufferize-memory-space-invalid.mlir
M mlir/test/Dialect/Bufferization/Transforms/test-one-shot-module-bufferize.mlir
M mlir/test/Dialect/ControlFlow/one-shot-bufferize-invalid.mlir
M mlir/test/Dialect/EmitC/wrap-func-in-class.mlir
M mlir/test/Dialect/MemRef/runtime-verification.mlir
M mlir/test/Dialect/SCF/one-shot-bufferize-invalid.mlir
M mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
M mlir/test/Dialect/common_folders.mlir
M mlir/test/Target/LLVMIR/allocatable_gpu_reduction_teams.mlir
M mlir/test/Target/LLVMIR/omptarget-multi-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction-array-descriptor.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-distribute-reduction.mlir
M mlir/test/Target/LLVMIR/omptarget-teams-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
A mlir/test/Target/LLVMIR/openmp-task-in-reduction.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
M mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M offload/ci/openmp-offload-amdgpu-libc-runtime.py
M offload/include/Shared/Environment.h
M offload/libomptarget/omptarget.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/test/CMakeLists.txt
M offload/test/tools/omp-kernel-replay/record-replay-diff-teams-threads.cpp
M offload/test/tools/omp-kernel-replay/record-replay-diff-threads.cpp
A offload/test/tools/omp-kernel-replay/record-replay-empty-memory.cpp
M offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
M openmp/device/include/Interface.h
M openmp/device/src/Reduction.cpp
M openmp/module/CMakeLists.txt
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/AllocAction.h
A orc-rt/include/orc-rt/InProcessControllerAccess.h
A orc-rt/include/orc-rt/MacroUtils.h
A orc-rt/include/orc-rt/QueueingRunner.h
R orc-rt/include/orc-rt/QueueingTaskDispatcher.h
M orc-rt/include/orc-rt/SPSAllocAction.h
R orc-rt/include/orc-rt/ScopeExit.h
M orc-rt/include/orc-rt/Session.h
M orc-rt/include/orc-rt/SimplePackedSerialization.h
R orc-rt/include/orc-rt/TaskDispatcher.h
A orc-rt/include/orc-rt/ThreadPoolRunner.h
R orc-rt/include/orc-rt/ThreadPoolTaskDispatcher.h
A orc-rt/include/orc-rt/scope_exit.h
M orc-rt/lib/executor/AllocAction.cpp
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/InProcessControllerAccess.cpp
R orc-rt/lib/executor/QueueingTaskDispatcher.cpp
M orc-rt/lib/executor/Session.cpp
R orc-rt/lib/executor/TaskDispatcher.cpp
A orc-rt/lib/executor/ThreadPoolRunner.cpp
R orc-rt/lib/executor/ThreadPoolTaskDispatcher.cpp
M orc-rt/unittests/AllocActionTest.cpp
M orc-rt/unittests/BootstrapInfoTest.cpp
M orc-rt/unittests/CMakeLists.txt
M orc-rt/unittests/CommonTestUtils.h
A orc-rt/unittests/InProcessControllerAccessTest.cpp
A orc-rt/unittests/MacroUtilsTest.cpp
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
A orc-rt/unittests/QueueingRunnerTest.cpp
R orc-rt/unittests/QueueingTaskDispatcherTest.cpp
M orc-rt/unittests/SPSAllocActionTest.cpp
R orc-rt/unittests/ScopeExitTest.cpp
M orc-rt/unittests/SessionTest.cpp
M orc-rt/unittests/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/unittests/SimpleNativeMemoryMapTest.cpp
M orc-rt/unittests/SimplePackedSerializationTest.cpp
A orc-rt/unittests/ThreadPoolRunnerTest.cpp
R orc-rt/unittests/ThreadPoolTaskDispatcherTest.cpp
A orc-rt/unittests/scope_exit-test.cpp
M polly/test/CodeGen/scop_expander_insert_point.ll
M polly/test/Support/pipelineposition.ll
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/bc32aecfd8ba...c0ddb5040488
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