[all-commits] [llvm/llvm-project] 39f535: [flang][cuda] Apply implicit managed attribute to ...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Mon Jun 22 13:05:13 PDT 2026
Branch: refs/heads/users/boomanaiden154/main.scev-preserve-lcssa-when-reusing-dominating-variable
Home: https://github.com/llvm/llvm-project
Commit: 39f5357397ef97aa2143360f3613decef981d02b
https://github.com/llvm/llvm-project/commit/39f5357397ef97aa2143360f3613decef981d02b
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
Log Message:
-----------
[flang][cuda] Apply implicit managed attribute to pointer variables under -gpu=mem:managed (#204634)
When -gpu=mem:managed is active with CUDA Fortran enabled, only
allocatable variables were implicitly given the managed CUDA data
attribute. Pointer variables were left without it, causing their
allocations to use host memory instead of cudaMallocManaged.
This patch extends the implicit managed attribute in
FinishSpecificationPart to also cover pointer symbols. A
LanguageFeature::CUDA guard is added so the attribute is only applied
when CUDA Fortran semantics are active. The implicit pinned attribute
(-gpu=mem:pinned) remains allocatable-only.
Commit: 04baf7ed88bc833a599d20bafb07fbceccade4a7
https://github.com/llvm/llvm-project/commit/04baf7ed88bc833a599d20bafb07fbceccade4a7
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
[SDAG][LegalizeType] Implement result vector widening for VECTOR_DEINTERLEAVE (#203105)
I accidentally found that we haven't implemented result vector widening
for `ISD::VECTOR_DEINTERLEAVE`. This patch implements such type
legalization.
---------
Co-authored-by: Simon Pilgrim <git at redking.me.uk>
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Commit: 738fecbc68e2e3ca04efd26db648eff57f2456ff
https://github.com/llvm/llvm-project/commit/738fecbc68e2e3ca04efd26db648eff57f2456ff
Author: Kunal Pathak <kunalspathak.github at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
Log Message:
-----------
[llvm-profgen] Enable all AArch64 instructions for disassembly (#204619)
llvm-profgen builds its MCSubtargetInfo from
`ObjectFile::getFeatures()`. For AArch64 ELF objects this often produces
an empty feature set, so the disassembler falls back to the baseline
Armv8.0-A ISA and rejects valid feature-gated instructions such as LSE
atomics and RCPC loads.
`llvm-objdump` already handles this by [adding +all for AArch64
disassembly](https://github.com/llvm/llvm-project/blob/1e2d1bbc12f6a5f5931c77d39894ee1b8679f5f8/llvm/tools/llvm-objdump/llvm-objdump.cpp#L2823-L2824)
when neither -mattr nor -mcpu is specified. Match that behavior in
`llvm-profgen` so valid AArch64 instructions are not reported as invalid
and their addresses are preserved in profgen's code and branch maps.
Add a regression test covering an AArch64 binary containing `ldaddal`
and `ldapr` without object-level feature metadata.
---------
Co-authored-by: Kunal Pathak <kupathak at fb.com>
Commit: 56434aaf66507e567317655a05dd7da918f90d81
https://github.com/llvm/llvm-project/commit/56434aaf66507e567317655a05dd7da918f90d81
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/CMakeLists.txt
Log Message:
-----------
Bump minimum required sphinx Python to 3.8 (#203963)
There seems to be de-facto use of at least 3.6 in docs, namely:
* Use of pathlib (3.4) in various places
* Format f-strings (3.6) and used in clang/docs/ghlinks.py
I don't see a strong reason to maintain the divide in minimum version
between test/docs, especially considering the "FIXME" indicating
the 3.0 lower bound was just a guess to begin with.
Change-Id: I11e00295ae0a13ec0f1c5cefbb2fdd2db272b152
Commit: bf3652b1e7eb0633c13afcc23bbc238f5e7f9ec8
https://github.com/llvm/llvm-project/commit/bf3652b1e7eb0633c13afcc23bbc238f5e7f9ec8
Author: Iñaki Amatria Barral <140811900+inaki-amatria at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-cov/show-colors-uninit.test
M llvm/tools/llvm-cov/CodeCoverage.cpp
Log Message:
-----------
[llvm-cov] Init `ViewOpts.Colors` before `error()` (#205001)
The `commandLineParser` lambda calls `error()` at several points before
`ViewOpts.Colors` is set. `error()` uses `ViewOpts.colored_ostream()`
which reads `Colors`, triggering undefined behavior (load of
uninitialized `bool`).
Fix by moving the `Colors` initialization block to just after
`ParseCommandLineOptions`, before any `error()` call in the lambda. This
ensures error messages are always rendered with properly initialized
color settings.
Commit: a60ad3e35514a733f19e6f2ac6bb7fe558c04441
https://github.com/llvm/llvm-project/commit/a60ad3e35514a733f19e6f2ac6bb7fe558c04441
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 46995fb (#205155)
This fixes 46995fb32b999c6332fbd1bdfb84d79cad47195f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 55d7f777d958a64ed5ef31be269c3005ddd6c7a6
https://github.com/llvm/llvm-project/commit/55d7f777d958a64ed5ef31be269c3005ddd6c7a6
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSADefs.h
A compiler-rt/lib/profile/InstrProfilingPlatformROCmInternal.h
A compiler-rt/test/profile/AMDGPU/device-basic.hip
A compiler-rt/test/profile/AMDGPU/device-early-collect.hip
A compiler-rt/test/profile/AMDGPU/device-no-kernel.hip
A compiler-rt/test/profile/AMDGPU/device-symbols.hip
A compiler-rt/test/profile/AMDGPU/lit.local.cfg.py
A compiler-rt/test/profile/GPU/instrprof-hip-basic.hip
A compiler-rt/test/profile/GPU/instrprof-hip-collect-after.hip
A compiler-rt/test/profile/GPU/instrprof-hip-counter-correctness.hip
A compiler-rt/test/profile/GPU/instrprof-hip-coverage.hip
A compiler-rt/test/profile/GPU/instrprof-hip-device-branching.hip
A compiler-rt/test/profile/GPU/instrprof-hip-fork-safety.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-gpu.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-process-merge.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multiple-kernels.hip
A compiler-rt/test/profile/GPU/instrprof-hip-nondefault-device.hip
A compiler-rt/test/profile/GPU/instrprof-hip-pgo-use.hip
A compiler-rt/test/profile/GPU/lit.local.cfg.py
A compiler-rt/test/profile/instrprof-rocm-bounds-dedup.cpp
A compiler-rt/test/profile/instrprof-rocm-grow-array.cpp
M compiler-rt/test/profile/lit.cfg.py
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
Log Message:
-----------
[PGO][HIP] HSA-introspection device profile drain + GPU PGO tests (#203056)
## Summary
Follow-up to #202095 (now landed). #202095's host-shadow device-profile
drain can
only collect device counters for kernels that registered a host-side
shadow via
`__hipRegisterVar`. Device-linked programs (e.g. RCCL), whose
instrumented code
objects are linked directly into the device image with no host shadow,
are never
drained.
This adds a **supplemental, Linux-only HSA-introspection drain** that
runs after
the host-shadow drain: it walks each GPU agent, enumerates only the code
objects
actually resident there, reads each one's `__llvm_profile_sections`
table on the
device, and routes them through the existing `processDeviceOffloadPrf()`
path so
the emitted `.profraw` layout is identical. A content-dedup set keyed on
the
`(data, counters, names)` device-pointer triple ensures a section
already drained
by the host-shadow pass is not drained twice, so the two passes compose
without
double-counting.
It is purely additive — it does not modify #202095's host-shadow drain
or its
launch-tracking. Highlights:
- `compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp`: HSA
agent/segment/
symbol walk + dedup; record drained bounds after each host-shadow drain;
lazy
HSA init (no library constructor, for fork-safety).
- Because the HSA walk only touches resident code objects, it lets us
avoid the
host-shadow drain's collect-all fallback on Linux. When **no** kernel
launch was
tracked (program never launches, collects before its first launch, or
launches
only via an untracked API), the host-shadow pass is skipped and the HSA
drain
covers it safely — instead of faulting/hanging reading a non-resident
device on
a multi-GPU host. This also closes the silent-data-loss gap for
untracked launch
APIs (`hipExtLaunchKernel`, cooperative/graph launches).
- `clang/lib/Driver/ToolChains/Clang.cpp` / `HIPAMD.cpp`: link the
device profile
runtime on both the new-offload-driver (`LinkerWrapper::ConstructJob`)
and
traditional (`lld`) link paths, guarded by `needsProfileRT` + VFS
existence.
- New GPU/AMDGPU HIP device-PGO lit tests, gated by `hip`/`amdgpu`
features
(auto-detected from the toolchain + a visible GPU) so they report
UNSUPPORTED
rather than fail when no GPU is present. Plus GPU-free host unit tests
for the
device-profile host helpers that run everywhere, including upstream CI.
## Test plan
- 4x gfx90a (`gfx90a:sramecc+:xnack-`), ROCm 7.1.
- GPU device tests run through standard lit:
`llvm-lit -sv <build>/.../compiler-rt/test/profile/Profile-x86_64` over
the
`GPU/` and `AMDGPU/` subdirectories. The profile `lit.cfg.py`
auto-detects a
visible GPU (`amdgpu-arch`) and the HIP runtime (`libamdhip64`) and
exposes the
`hip`/`amdgpu`/`multi-device` features and the `%amdgpu_arch` /
`%hip_lib_path`
substitutions; both are overridable via `--param amdgpu_arch=… /
hip_lib_path=…`.
- **15 device tests passed, 0 failed.** Covers: basic/coverage/pgo-use,
multiple-kernels, device-branching, multi-gpu and non-default-device
drain,
early-collect / no-kernel edges, RDC vs non-RDC
`__llvm_profile_sections`,
dedup (host-shadow drains the used device, HSA finds it and dedups), and
fork-safety (the RCCL parent-no-HIP / kernel-in-forked-child pattern).
- On a host without a GPU + ROCm/HIP (e.g. upstream CI) those device
tests report
UNSUPPORTED instead of failing, and the GPU subdirectories serialize via
a
size-1 `gpu` lit parallelism group when they do run.
- GPU-free host unit tests run anywhere the profile suite runs
(including upstream
CI): `instrprof-rocm-grow-array.cpp` (the dynamic-array helper) and
`instrprof-rocm-bounds-dedup.cpp` (the `(data, counters, names)` dedup
table
that backs the "drain each counter set once" guarantee).
- Build is warning-clean and `clang-format` clean.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 42d6d5b44d6170cceeacd2ae1b83335f72f0fcba
https://github.com/llvm/llvm-project/commit/42d6d5b44d6170cceeacd2ae1b83335f72f0fcba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/hsa-default-device.ll
M llvm/test/CodeGen/AMDGPU/hsa-func.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
A llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
A llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
A llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/buffer-op-swz-operand.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
Log Message:
-----------
AMDGPU: Refactor AMDGPUTargetID to not store MCSubtargetInfo (#204315)
Store the triple string and GPUKind instead. The dependence
on checking AMDHSA seems like an anti-feature, but maintain the
behavior of not printing the modifiers for other OSes. Start
parsing the target ID instead of performing a direct string
comparison. Also improve test coverage for the treatment of the
environment component of the triple. The main behavioral change
is this will now produce normalized triples in the output and
diagnostics. Practially, this means all of the places that
currently emit "--" will be expanded into "-unknown-".
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Commit: 9b1b03ef26a936efc51b11c1955ff270e80d87e9
https://github.com/llvm/llvm-project/commit/9b1b03ef26a936efc51b11c1955ff270e80d87e9
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
Log Message:
-----------
[AMDGPU] Update packed FP32 intrinsic cost model (#205145)
Intrinsics will not have packed vector benefit if they don't have
the corresponding packed instructions.
Commit: 81638b092dd0c0a0c299081a6accd2f59e3f6a7c
https://github.com/llvm/llvm-project/commit/81638b092dd0c0a0c299081a6accd2f59e3f6a7c
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU] Add MC omod support for bf16 trans instructions (#205144)
Based on recent gfx1250 sp3 update. Refer to DEGFXSP3-664
Commit: cd89a8675cfef4e1efca258a89fae9ae903e3e3c
https://github.com/llvm/llvm-project/commit/cd89a8675cfef4e1efca258a89fae9ae903e3e3c
Author: Henry Jiang <henry_jiang2 at apple.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-pseudoprobe.ll
A llvm/test/Transforms/SimplifyCFG/hoist-common-skip-pseudoprobe.ll
Log Message:
-----------
[SimplifyCFG] Allow hoisting in the presence of pseudoprobes (#199753)
Fix regressions in the presence of pseudoprobes that prevents
SimplifyCFG from hoisting instructions into the predecessor. Teach
`hoistCommonCodeFromSuccessors` and `foldBranchToCommonDest` to ignore
pseudo probes and drop them when the BB is eliminated.
The minor loss of profile quality for these cases are justified, as not
performing these hoists degrades performance more and blocks downstream
passes like loop-vectorize (can be upto 30% in 526.blender_r and
525.x264_r).
Commit: dc520fcd90527d196a676795d20539440de9442b
https://github.com/llvm/llvm-project/commit/dc520fcd90527d196a676795d20539440de9442b
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
Log Message:
-----------
[lldb][tests] Fix FS timing issue in `TestRerunAndExprDylib`. (#205116)
This PR fixes a timing issue that made `TestRerunAndExprDylib` fail with
a small probability. The test rebuilds a library; however, the build and
the re-build may fall into the same timestamp if the underlying
filesystem only has second granularity such that LLDB doesn't reload the
rebuilt library for the second execution.
The fix consists in artifically aging the library file from the first
build, i.e., setting its timestamp 10 seconds into the past. This not
only guarantees that LLDB reloads the file but also also that it is
rebuilt, so the explicit removing is now unnecessary and removed.
This issue exists for at least six months, possible since the tests
exists; I was not able to test older versions. However, we have recently
seen frequent failures, probably due to some change in our underlying
testing infrastructure.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: e6199d8f36263f018b47ba8fd1fd2f77e477b0ac
https://github.com/llvm/llvm-project/commit/e6199d8f36263f018b47ba8fd1fd2f77e477b0ac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
Log Message:
-----------
AMDGPU: Temporarily restore disassembler's dependency on TargetParser (#205175)
Reverts part of #204315
Commit: c046d4b47cd5c8c75efa8b93d0c1fbfff54c2559
https://github.com/llvm/llvm-project/commit/c046d4b47cd5c8c75efa8b93d0c1fbfff54c2559
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[GitHub] Add googlewalt to Bazel codeowners (#205174)
Commit: 63692a910c10abb0a6ae67f99da7ffc8a1f3f964
https://github.com/llvm/llvm-project/commit/63692a910c10abb0a6ae67f99da7ffc8a1f3f964
Author: newgre <jannewger at gmail.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/ProfileData/MemProfReader.cpp
Log Message:
-----------
[ProfileData] Avoid unnecessary copies. (#204875)
Make `Frame` moveable and avoid some unnecessary copies in `RawMemProfReader`. Unnecessary copies fixed in this PR were found by the CSan prototype described in the RFC [1] CopySanitizer (CSan): Detecting unneccessary object copies at runtime.
[1] https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038
Co-authored-by: Jan Newger <jannewger at google.com>
Commit: 223bdef73f761f22353744eeea46663ed0941926
https://github.com/llvm/llvm-project/commit/223bdef73f761f22353744eeea46663ed0941926
Author: Mohammed Ashraf <125150223+Holo-xy at users.noreply.github.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
Log Message:
-----------
[BoundsSafety] unify ParseLexedAttribute (#186033)
Resolves #93263
Commit: a1cfa786c96fee1ce63d034674d7aeb4cc9cc5d9
https://github.com/llvm/llvm-project/commit/a1cfa786c96fee1ce63d034674d7aeb4cc9cc5d9
Author: Greg Clayton <gclayton at fb.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/source/Plugins/SymbolVendor/PECOFF/SymbolVendorPECOFF.cpp
M lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
A lldb/test/Shell/ObjectFile/ELF/build-id-case-debug-only.yaml
Log Message:
-----------
Fix SectionList::ReplaceSection to not replace incorrect section. (#204677)
We use SectionList::ReplaceSection to check for some sections in the
main object file and in separate debug info files. It was relying on
section IDs being consistent between different individual section lists
in different object files which does not work. I fixed this by not using
a section ID when replacing a section, but using the section shared
pointer so there can be no errors.
Commit: 982646f33d1ac7872832c2f3969dc83a762eab5d
https://github.com/llvm/llvm-project/commit/982646f33d1ac7872832c2f3969dc83a762eab5d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
A llvm/test/Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
Log Message:
-----------
[LSR] Preserve LCSSA in SCEVRewriter
This is necessery to fix some regressions when switching to the NewPM
and seems to improve optimization quality in some cases due to LSR
currently not understanding loop nests (usage of getSCEV vs
getSCEVScoped). This patch just enables LCSSA
preservation for SCEVRewriter and updates all the relevant tests. There
are some further fixes that are needed to get this fully working that
will be included in follow up patches. This patch also only changes
behavior in the NewPM path to get that unblocked while more work is done
on ensuring LCSSA preservation/requirements do not regress LSR.
Similar to #185373 (although without follow up fixes and a regression
test).
Regression test added for the specific NewPM case noticed is in
Transforms/LoopStrengthReduce/X86/lcssa-preservation-regression.ll
(does not reproduce without the target triple).
Reviewers: arsenm, Meinersbur, fhahn, nikic, vikramRH
Pull Request: https://github.com/llvm/llvm-project/pull/191665
Commit: b71b3318e816206a2f94eb424ef81af2d89af922
https://github.com/llvm/llvm-project/commit/b71b3318e816206a2f94eb424ef81af2d89af922
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-22 (Mon, 22 Jun 2026)
Changed paths:
M .github/CODEOWNERS
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseCXXInlineMethods.cpp
M clang/lib/Parse/ParseDecl.cpp
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSA.cpp
A compiler-rt/lib/profile/InstrProfilingPlatformROCmHSADefs.h
A compiler-rt/lib/profile/InstrProfilingPlatformROCmInternal.h
A compiler-rt/test/profile/AMDGPU/device-basic.hip
A compiler-rt/test/profile/AMDGPU/device-early-collect.hip
A compiler-rt/test/profile/AMDGPU/device-no-kernel.hip
A compiler-rt/test/profile/AMDGPU/device-symbols.hip
A compiler-rt/test/profile/AMDGPU/lit.local.cfg.py
A compiler-rt/test/profile/GPU/instrprof-hip-basic.hip
A compiler-rt/test/profile/GPU/instrprof-hip-collect-after.hip
A compiler-rt/test/profile/GPU/instrprof-hip-counter-correctness.hip
A compiler-rt/test/profile/GPU/instrprof-hip-coverage.hip
A compiler-rt/test/profile/GPU/instrprof-hip-device-branching.hip
A compiler-rt/test/profile/GPU/instrprof-hip-fork-safety.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-gpu.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multi-process-merge.hip
A compiler-rt/test/profile/GPU/instrprof-hip-multiple-kernels.hip
A compiler-rt/test/profile/GPU/instrprof-hip-nondefault-device.hip
A compiler-rt/test/profile/GPU/instrprof-hip-pgo-use.hip
A compiler-rt/test/profile/GPU/lit.local.cfg.py
A compiler-rt/test/profile/instrprof-rocm-bounds-dedup.cpp
A compiler-rt/test/profile/instrprof-rocm-grow-array.cpp
M compiler-rt/test/profile/lit.cfg.py
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M lldb/include/lldb/Core/Section.h
M lldb/source/Core/Section.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
M lldb/source/Plugins/SymbolVendor/PECOFF/SymbolVendorPECOFF.cpp
M lldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
M lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py
A lldb/test/Shell/ObjectFile/ELF/build-id-case-debug-only.yaml
M llvm/CMakeLists.txt
M llvm/include/llvm/ProfileData/MemProf.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/ProfileData/MemProfReader.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
M llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
M llvm/test/CodeGen/AMDGPU/elf-notes.ll
M llvm/test/CodeGen/AMDGPU/gfx902-without-xnack.ll
M llvm/test/CodeGen/AMDGPU/hsa-default-device.ll
M llvm/test/CodeGen/AMDGPU/hsa-func.ll
M llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll
M llvm/test/CodeGen/AMDGPU/hsa.ll
M llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-off-2.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-1.ll
M llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-any-on-2.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-any.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
M llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
A llvm/test/MC/AMDGPU/amd-amdgpu-isa-malformed-target-id.s
A llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
A llvm/test/MC/AMDGPU/amdgcn-target-malformed-target-id.s
M llvm/test/MC/AMDGPU/buffer-op-swz-operand.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/hsa-diag-v4.s
M llvm/test/MC/AMDGPU/hsa-exp.s
M llvm/test/MC/AMDGPU/hsa-gfx12-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
M llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
M llvm/test/MC/AMDGPU/hsa-tg-split.s
M llvm/test/MC/AMDGPU/hsa-v4.s
M llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
M llvm/test/MC/AMDGPU/isa-version-hsa.s
M llvm/test/MC/AMDGPU/isa-version-pal.s
M llvm/test/MC/AMDGPU/isa-version-unk.s
M llvm/test/MC/AMDGPU/user-sgpr-count.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
A llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-pseudoprobe.ll
A llvm/test/Transforms/SimplifyCFG/hoist-common-skip-pseudoprobe.ll
A llvm/test/tools/llvm-cov/show-colors-uninit.test
A llvm/test/tools/llvm-profgen/aarch64-disassemble-all-features.test
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.cpp
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/cd0753650d4b...b71b3318e816
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