[all-commits] [llvm/llvm-project] 3d3768: [AMDGPU] Make SGPR occupancy the exact inverse of ...

[michaelselehov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3d37689b894457acb02efa6b33e9a113c022bdb9
      https://github.com/llvm/llvm-project/commit/3d37689b894457acb02efa6b33e9a113c022bdb9
  Author: michaelselehov <michael.selehov at amd.com>
  Date:   2026-06-18 (Thu, 18 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
    M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/CodeGen/AMDGPU/agpr-register-count.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
    M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
    M llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
    M llvm/test/CodeGen/AMDGPU/occupancy-levels.ll
    M llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll
    M llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
    M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
    M llvm/test/MC/AMDGPU/mcexpr_amd_err.s
    M llvm/test/MC/AMDGPU/occupancy_mcexpr.s
    M llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp

  Log Message:
  -----------
  [AMDGPU] Make SGPR occupancy the exact inverse of getMaxNumSGPRs (#201342)

The SGPR->occupancy table ignored the allocation granule and the
trap-handler reservation, so it disagreed with getMaxNumSGPRs() (e.g. 80
and 81 SGPRs reported the same occupancy and hid the cliff). Compute
occupancy by inverting the per-wave SGPR budget instead, sharing one
helper (getSGPRBudgetPerWave) with getMaxNumSGPRs()/getMinNumSGPRs() so
the budget and its inverse cannot drift apart. Thread that budget
(total/granule/trap reserve) through the occupancy MCExpr because the
asm printer's MCSubtargetInfo does not carry the implicit amdhsa
+trap-handler feature.

This aligns the SGPR-limited occupancy heuristic with the register
budget for all pre-GFX10 targets (including non-trap), which accounts
for the codegen test updates.

Assisted-by: Claude Opus

---------

Co-authored-by: mselehov <mselehov at amd.com>



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