[all-commits] [llvm/llvm-project] bc5c33: [AMDGPU] Keep i64 carry chains on VCC when feeding...

[Shilei Tian via All-commits]

  Branch: refs/heads/users/shiltian/add-carry-chain
  Home:   https://github.com/llvm/llvm-project
  Commit: bc5c332eebee061846f38badb1f8ec51ed7844b9
      https://github.com/llvm/llvm-project/commit/bc5c332eebee061846f38badb1f8ec51ed7844b9
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2026-06-17 (Wed, 17 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    A llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll

  Log Message:
  -----------
  [AMDGPU] Keep i64 carry chains on VCC when feeding VALU users

This PR fixes an issue where ISel could mix scalar and vector carry chains when
lowering widened integer add/sub operations. A scalar-looking i64 carry producer
may feed a divergent carry consumer, so ISel now keeps that carry chain on VCC
to avoid invalid MIR.



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