[all-commits] [llvm/llvm-project] 98bd01: [VPlan] Recognize lshr in getSCEVExprForVPValue. (...

[Mel Chen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 98bd0156821f613897ad83215e8a89bca4ef154c
      https://github.com/llvm/llvm-project/commit/98bd0156821f613897ad83215e8a89bca4ef154c
  Author: Mel Chen <mel.chen at sifive.com>
  Date:   2026-06-16 (Tue, 16 Jun 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll

  Log Message:
  -----------
  [VPlan] Recognize lshr in getSCEVExprForVPValue. (#203496)

When lshr v, const occurs and const is less than the type's bitwidth, it
can be treated as udiv v, (1 << const). This enables vectorizer to
convert more gathers into strided loads.

Pre-commit test #203488



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