[all-commits] [llvm/llvm-project] 0a6e02: [SPIR-V] Lower freeze instructions with aggregate ...

[Dmitry Sidorov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0a6e0210df5596f4aa35b6d01d0dcedc9414dab9
      https://github.com/llvm/llvm-project/commit/0a6e0210df5596f4aa35b6d01d0dcedc9414dab9
  Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
  Date:   2026-06-12 (Fri, 12 Jun 2026)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
    A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_poison_freeze/freeze-aggregate.ll
    A llvm/test/CodeGen/SPIRV/freeze-aggregate.ll

  Log Message:
  -----------
  [SPIR-V] Lower freeze instructions with aggregate operands (#203584)

An aggregate freeze takes its result type from its operand, like a PHI
or select, but was handled by neither the up-front value-id mutation nor
replaceMemInstrUses, so the pass aborted with "illegal aggregate
intrinsic user". Mutate aggregate freezes to the i32 value-id type and
replace their operands alongside PHIs and selects.



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