[all-commits] [llvm/llvm-project] 2350c1: [test][Support] Disable CFI-icall for DynamicLibra...
Ziqing Luo via All-commits
all-commits at lists.llvm.org
Fri Jun 12 14:08:46 PDT 2026
Branch: refs/heads/users/ziqingluo/PR-179173940
Home: https://github.com/llvm/llvm-project
Commit: 2350c1f5e01189f7018b12276d0d53a26d3da31e
https://github.com/llvm/llvm-project/commit/2350c1f5e01189f7018b12276d0d53a26d3da31e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
Log Message:
-----------
[test][Support] Disable CFI-icall for DynamicLibrary Overload test (#202446) (#202684) (#202794)
The test performs manual symbol lookup and calls, which triggers
Control Flow Integrity indirect call checks.
Reland of #202446 and #202684 reverted with #202550 #202446.
Here we are going to use LLVM_NO_SANITIZE and check `__clang__`.
Commit: e160695032d838fdeb3ff313f99dbffc38f94a7a
https://github.com/llvm/llvm-project/commit/e160695032d838fdeb3ff313f99dbffc38f94a7a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedAdd-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M clang/test/SemaHLSL/parameter_modifiers.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/InterlockedAdd.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd_spv_i64.ll
Log Message:
-----------
[HLSL] Add InterlockedAdd HLSL functions (#195742)
This PR adds the `InterlockedAdd` function to HLSL.
For now, only integer references are accepted: resources passed as a
parameter, and this function as a member method to certain resources,
will be addressed in a separate PR.
Addresses https://github.com/llvm/llvm-project/issues/99122
Assisted by: Github Copilot
Commit: 9f30981a2f4c1d3fa808938bf3703e8468be2e55
https://github.com/llvm/llvm-project/commit/9f30981a2f4c1d3fa808938bf3703e8468be2e55
Author: 🍌Shawn <m18824909883 at 163.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/OffloadBundler.h
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
Log Message:
-----------
[clang-offload-bundler] Convert `std::vector` to `llvm::SmallVector` in `OffloadBundlerConfig` (#192259)
Replace `std::vector<std::string>` with `llvm::SmallVector<std::string,
4>`
for TargetNames, InputFileNames, and OutputFileNames to avoid heap
allocation for small number of elements.
Commit: 87e5d3898c2dbc73f9e75aa16be27757e3969f52
https://github.com/llvm/llvm-project/commit/87e5d3898c2dbc73f9e75aa16be27757e3969f52
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lld/MachO/InputFiles.cpp
A lld/test/MachO/compact-unwind-local-label.s
Log Message:
-----------
[lld][MachO] Handle compact unwind entries with no matching symbol (#180009)
Context: This change is to support [MachO basic block hot-cold
splitting](https://discourse.llvm.org/t/rfc-support-fsplit-machine-functions-on-macho-arm64/89739)
- though it's presented below outside of this context.
Compact unwind entries can reference function addresses that have no
corresponding symbol in the object's symbol table (e.g. functions with
temporary local labels). Previously, this would trigger an assertion
failure in assert-enabled builds, or silently drop the unwind entry in
release builds, resulting in missing unwind info at runtime.
Fix this by synthesizing a local `Defined` symbol when no symbol exists
at the target address of a compact unwind entry, so that unwind info is
correctly emitted.
[Assisted-by](https://t.ly/Dkjjk): Cursor IDE + claude-opus-4.6-high +
gpt-5.2-xhigh
Commit: 5e8d4064bc74ba2a0766d7c89ebe0dcf0271a716
https://github.com/llvm/llvm-project/commit/5e8d4064bc74ba2a0766d7c89ebe0dcf0271a716
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/test/CodeGen/RISCV/GlobalISel/add-imm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-add-sub.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitreverse-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine-neg-abs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/div-by-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/fastcc-float.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64p.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shift.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shifts.ll
M llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/add_sext_shl_constant.ll
M llvm/test/CodeGen/RISCV/add_shl_constant.ll
M llvm/test/CodeGen/RISCV/addc-adde-sube-subc.ll
M llvm/test/CodeGen/RISCV/addcarry.ll
M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/alu64.ll
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
M llvm/test/CodeGen/RISCV/and-shl.ll
M llvm/test/CodeGen/RISCV/arith-with-overflow.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/avgceils.ll
M llvm/test/CodeGen/RISCV/avgceilu.ll
M llvm/test/CodeGen/RISCV/avgfloors.ll
M llvm/test/CodeGen/RISCV/avgflooru.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/bfloat-maximum-minimum.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
M llvm/test/CodeGen/RISCV/bitreverse-shift.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/branch-on-zero.ll
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
M llvm/test/CodeGen/RISCV/bswap-known-bits.ll
M llvm/test/CodeGen/RISCV/bswap-shift.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-float.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls-cf-branch.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/RISCV/clmulh.ll
M llvm/test/CodeGen/RISCV/clmulr.ll
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
M llvm/test/CodeGen/RISCV/combine-storetomstore.ll
M llvm/test/CodeGen/RISCV/compress.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/constpool-known-bits.ll
M llvm/test/CodeGen/RISCV/copyprop.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/csr-first-use-cost.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/di-assignment-tracking-vector.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div-pow2.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/double_reduct.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/fastcc-bf16.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-half.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fixed-csr.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/float-select-icmp.ll
M llvm/test/CodeGen/RISCV/fma-combine.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/fold-masked-merge.ll
M llvm/test/CodeGen/RISCV/fold-mem-offset-zilsd.ll
M llvm/test/CodeGen/RISCV/fold-mem-offset.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/fpenv.ll
M llvm/test/CodeGen/RISCV/frm-write-in-loop.ll
M llvm/test/CodeGen/RISCV/get-setcc-result-type.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/half-fcmp.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-maximum-minimum.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/half-zfa.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/i64-icmp.ll
M llvm/test/CodeGen/RISCV/iabs.ll
M llvm/test/CodeGen/RISCV/icmp-non-byte-sized.ll
M llvm/test/CodeGen/RISCV/idiv_large.ll
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-modifier-N.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-modifier-N.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/jump-is-expensive.ll
M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
M llvm/test/CodeGen/RISCV/jumptable.ll
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/load-store-pair.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
M llvm/test/CodeGen/RISCV/machine-cse.ll
M llvm/test/CodeGen/RISCV/machine-sink-load-immediate.ll
M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/mask-variable-shift.ll
M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memmove.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/memset-pattern.ll
M llvm/test/CodeGen/RISCV/min-max.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul-expand.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/musttail-indirect-args.ll
M llvm/test/CodeGen/RISCV/narrow-shl-cst.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr135206.ll
M llvm/test/CodeGen/RISCV/pr142004.ll
M llvm/test/CodeGen/RISCV/pr145360.ll
M llvm/test/CodeGen/RISCV/pr148084.ll
M llvm/test/CodeGen/RISCV/pr176001.ll
M llvm/test/CodeGen/RISCV/pr186969.ll
M llvm/test/CodeGen/RISCV/pr190868.ll
M llvm/test/CodeGen/RISCV/pr51206.ll
M llvm/test/CodeGen/RISCV/pr56457.ll
M llvm/test/CodeGen/RISCV/pr58511.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/pr64645.ll
M llvm/test/CodeGen/RISCV/pr65025.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
M llvm/test/CodeGen/RISCV/pr90652.ll
M llvm/test/CodeGen/RISCV/pr94145.ll
M llvm/test/CodeGen/RISCV/pr95271.ll
M llvm/test/CodeGen/RISCV/pr95284.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
M llvm/test/CodeGen/RISCV/reassoc-shl-addi-add.ll
M llvm/test/CodeGen/RISCV/redundant-copy-from-tail-duplicate.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/rv32zbs.ll
M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-demanded-bits.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
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M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rv64zba.ll
M llvm/test/CodeGen/RISCV/rv64zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbb.ll
M llvm/test/CodeGen/RISCV/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvp-unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
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M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
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M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/combine-store-extract-crash.ll
M llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vectors-constant-stride.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
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M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/double-round-conv.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
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M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
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M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmaccbf16.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-fp-vp-bf16.ll
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M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
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M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr125306.ll
M llvm/test/CodeGen/RISCV/rvv/pr165232.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr83017.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr88799.ll
M llvm/test/CodeGen/RISCV/rvv/pr90559.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/redundant-vfmvsf.ll
M llvm/test/CodeGen/RISCV/rvv/regcoal-liveinterval-pruning-crash.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/reproducer-pr146855.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfnrclip_x_f_qf.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfnrclip_xu_f_qf.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/splats-with-mixed-vl.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/stlf.ll
M llvm/test/CodeGen/RISCV/rvv/stores-of-loads-merging.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vadc.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vasub.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu.ll
M llvm/test/CodeGen/RISCV/rvv/vclmul.ll
M llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop-shl-zext-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-compress.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-reassociations.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-w-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-bf-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-bf-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-alt.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmaccbf16-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-w-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-evl-tail-folding.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-live-out.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vle_vid-vfcvt.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
M llvm/test/CodeGen/RISCV/rvv/vmerge.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
M llvm/test/CodeGen/RISCV/rvv/vmseq.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgtu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsif.ll
M llvm/test/CodeGen/RISCV/rvv/vmsle.ll
M llvm/test/CodeGen/RISCV/rvv/vmsleu.ll
M llvm/test/CodeGen/RISCV/rvv/vmslt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsltu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsne.ll
M llvm/test/CodeGen/RISCV/rvv/vmsof.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.x.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor.ll
M llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
M llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/vp-cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-float.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-valid-elen-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsext.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-mask-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/vwsll.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub-mask-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vzext.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-sdnode.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/scmp.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select-constant-xor.ll
M llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
M llvm/test/CodeGen/RISCV/select-pseudo-merge-with-stack-adj.ll
M llvm/test/CodeGen/RISCV/select-zbb.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shift-masked-shamt.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-load-atomic-acquire-seq_cst.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-load.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-mul.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-qcloads.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-store.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-clash-prologue.ll
M llvm/test/CodeGen/RISCV/stack-folding.ll
M llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/typepromotion-overflow.ll
M llvm/test/CodeGen/RISCV/uadd_sat.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/ucmp.ll
M llvm/test/CodeGen/RISCV/udiv-const-optimization.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvmem-heuristic.ll
M llvm/test/CodeGen/RISCV/xcvmem.ll
M llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
M llvm/test/CodeGen/RISCV/xqcia.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xqcibm-cto-clo-brev.ll
M llvm/test/CodeGen/RISCV/xqcibm-extract.ll
M llvm/test/CodeGen/RISCV/xqcibm-insbi.ll
M llvm/test/CodeGen/RISCV/xqcibm-insert.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
M llvm/test/CodeGen/RISCV/xqcilia.ll
M llvm/test/CodeGen/RISCV/xqcilsm-memset.ll
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
M llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
M llvm/test/CodeGen/RISCV/zcb-regalloc-hints.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
M llvm/test/CodeGen/RISCV/zibi.ll
M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
M llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/CodeGen/RISCV/zilsd-spill.ll
M llvm/test/CodeGen/RISCV/zilsd.ll
Log Message:
-----------
[RISCV] Adopt SpacemitX60's scheduling model for `-mtune=generic` (#167008)
Per our discussions in RISC-V roundtable during LLVM Dev Meeting 2025,
there has been a consensus to create a base / generic scheduling model
for the most common performance tuning usages. As the first step, we
agree to use SpacemitX60's scheduling model for that purpose for the
time being, with an expectation to create a standalone generic model
that could evolve independently in the future.
This patch sets `-mtune=generic` to use SpacemitX60's scheduling model,
and documents the rationale behind it, including the roadmap ahead as we
discussed.
Commit: 350f4851d7070757545d65aba54b19b6bfceb6da
https://github.com/llvm/llvm-project/commit/350f4851d7070757545d65aba54b19b6bfceb6da
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/EntityLinkage.h
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
A clang/test/Analysis/Scalable/PointerFlow/external-inline-function-in-multi-tu.test
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
Log Message:
-----------
[SSAF] Let function parameters inherit linkage from their parent functions (#201946)
SSAF treats parameters as entities and may not always associate them
back to their parent functions. Therefore, it needs to identify
parameters of functions with external linkage across different TUs.
Treating them as having no linkage (as in C++) causes the same parameter
in different TUs to be assigned different EntityIDs. As a result, the
behavior of the parameter across multiple TUs cannot be correlated.
rdar://178844032
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 3c21c3d6095821e78690fc056522f9857c178ad3
https://github.com/llvm/llvm-project/commit/3c21c3d6095821e78690fc056522f9857c178ad3
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/triple.ll
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[NFC][clang-sycl-linker] Standardize error messages to LLVM coding style (#202767)
Follow LLVM coding standards for error messages: use lowercase first
letter and no trailing period. This matches the style used throughout
LLVM tools (llvm-objcopy, lld, etc.) and aligns with the official
guidance in llvm/docs/CodingStandards.rst.
Updated corresponding test assertions in basic.ll and triple.ll.
Commit: 0411e39a35866c125750810e59a15e00c9484fc9
https://github.com/llvm/llvm-project/commit/0411e39a35866c125750810e59a15e00c9484fc9
Author: Mingjie Xu <xumingjie.enna1 at bytedance.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header PHIs (#201572)
Every cached SCEV varies with Loop `L` transitively contains an
`AddRec`, and every `AddRec` for the loop is recorded in `LoopUsers[L]`.
`forgetMemoizedResults` already closes this set transitively through
`SCEVUsers` and `ExprValueMap`.
Therefore `forgetLoop` does not need to walk the def-use chain starting
from header PHIs, it only needs to initialize `ToForget` with
`LoopUsers[L]` and explicitly remove each header PHI's entries from
`ValueExprMap` and `ConstantEvolutionLoopExitValue`, push its cached
SCEVs into `ToForget`.
As a side effect, cached SCEVs that reside in the loop body but do not
depend on any `AddRec` for the loop (e.g. a `SCEVUnknown` for an icmp)
are no longer invalidated.
Commit: ef7d2c97b4e5158a230aca54100b15cd3b9fa815
https://github.com/llvm/llvm-project/commit/ef7d2c97b4e5158a230aca54100b15cd3b9fa815
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/llvm-readtapi/BUILD.gn
Log Message:
-----------
[gn] port 108b06f1797b3a6 (llvm-readtapi driver_executable) (#202826)
Commit: fb2d6709f289525497cdf731bf32085401c6b962
https://github.com/llvm/llvm-project/commit/fb2d6709f289525497cdf731bf32085401c6b962
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
Log Message:
-----------
[CIR] Support zero-result ops in clangir TableGen lowering (#202273)
### summary
This is follow-up to https://github.com/llvm/llvm-project/pull/199599
A CIR op can set the llvmOp field to have cir-tblgen auto-generate its
CIR→LLVM lowering instead of using a hand-written pattern.However, the
generated body forwards the result type via op.getType(), which only
compiles for single-result ops. As a result, ops with zero results could
not use this feature.
To fix this, teach CIRLoweringEmitter to emit an empty mlir::TypeRange{}
for zero-result ops. Then switch cir.lifetime.start and cir.lifetime.end
to use llvmOp (dropping their hand-written lowering). The lifetime.cir
test covers the generated path.
Commit: ffb7404d1eb1fa8cca49e2cc800b4c97688f8bab
https://github.com/llvm/llvm-project/commit/ffb7404d1eb1fa8cca49e2cc800b4c97688f8bab
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/index/SymbolID.h
Log Message:
-----------
[clangd] Add missing direct includes for bit.h. NFC (#202840)
This currently compile only because llvm/ADT/Hashing.h transitively
pulls in llvm/Support/SwapByteOrder.h (which includes llvm/ADT/bit.h).
Commit: 45fd70d800b6bdb7cae464bee3e78bd0d898ba5e
https://github.com/llvm/llvm-project/commit/45fd70d800b6bdb7cae464bee3e78bd0d898ba5e
Author: Vladimir Vereschaka <vvereschaka at accesssoftek.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Options/Options.td
A clang/test/CodeGenCXX/cl-pathmap.cpp
A clang/test/Driver/cl-pathmap.c
A clang/test/Preprocessor/cl-pathmap.c
Log Message:
-----------
Reland [clang-cl] Add new option /pathmap:<from>=<to> to replace the path prefix <from> with <to>. (#202830)
This option matches MSVC options and does the path substitution for the
file references in the preprocessor macros, debug and coverage
information.
This option acts as a clang's ``-ffile-prefix-map=value`` and with some
known differences in behavior with original CL's option that do not
affect the functionality:
* nomalizes the macro prefix map pathes -- removes `./` and uses the
target's
platform-specific path separator character when exanding the
preprocessor
macros -- ``-ffile-reproducible`` (but not the debug and coverage prefix
maps).
* does not require ``/experimental:deterministic`` as by MSVC. It needed
for
removing a hostname from a mangling hash gen, but clang-cl does not use
a hostname when generates the hashes.
Known issues:
* does not remap the pathes within PCH/PCM files.
Reland #198664
Commit: fe5c70101ec5ffe4db4b4ee657b341514da9008e
https://github.com/llvm/llvm-project/commit/fe5c70101ec5ffe4db4b4ee657b341514da9008e
Author: Feng Zou <feng.zou at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/test/CodeGen/X86/apx/ccmp.ll
M llvm/test/CodeGen/X86/apx/ctest.ll
M llvm/test/CodeGen/X86/apx/setzucc.ll
M llvm/test/CodeGen/X86/fast-isel-fcmp.ll
M llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
M llvm/test/CodeGen/X86/pr27591.ll
M llvm/test/CodeGen/X86/pr32284.ll
M llvm/test/CodeGen/X86/pr54369.ll
Log Message:
-----------
[X86][APX] Enable PreferLegacySetCC tuning for Novalake and Diamondrapids (#202480)
Performance measurements show legacy SetCC is still good on these platforms.
Commit: 4143eee75d13ce3a10fbf81b56220e1e13b915f1
https://github.com/llvm/llvm-project/commit/4143eee75d13ce3a10fbf81b56220e1e13b915f1
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/Hashing.h
Log Message:
-----------
[Hashing] Replace hash_integer_value with splitmix64 finalizer (#199471)
hash_integer_value used a CityHash-era construction: read the uint64_t
value as two endian-normalized 4-byte halves via fetch32, then combine
through hash_16_bytes. Treat the integer as a number instead.
A direct hash_16_bytes(value, seed) has the right shape but inherits a
defect from its Murmur three-multiply chain: the top input bit maps
deterministically to the top output bit. Use the splitmix64 finalizer
(xmxmx) instead -- the same shape xxh3 uses for its 4-8 byte path.
bit-independence bias on eight input classes (sequential/step-aligned
ints, stack-, malloc-, code-segment-shaped pointers, random uint64):
```
// Read https://jonkagstrom.com/bit-mixer-construction/ for columns
bic_mean bic_max
fetch32 + 16_bytes: 0.04-0.14% 7-13%
hash_16_bytes: 0.18% 42%
splitmix64 xmxmx: 0.04% 0.17%
```
This also drops fetch32 and hash_16_bytes from the header; the three
byte-stable out-of-header callers were already moved to file-local
copies.
Depends on #196854
Aided by Claude Opus 4.7
Commit: 5748dcd89b907d3df745069298ad8c93bfde925a
https://github.com/llvm/llvm-project/commit/5748dcd89b907d3df745069298ad8c93bfde925a
Author: juan.vazquez <juvazq at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/BreakFalseDeps.cpp
Log Message:
-----------
[CodeGen] Update break-false-deps to track updates to the machine function (#202081)
Commit: 240752e73c97c49890c5d8ddb436ccbc9619bca9
https://github.com/llvm/llvm-project/commit/240752e73c97c49890c5d8ddb436ccbc9619bca9
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
A llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
Log Message:
-----------
[AMDGPU] Lower mem intrinsics on LDS pointers in AMDGPUSwLowerLDS (#202552)
memcpy/memset/memmove on LDS pointers were left in the local address
space, silently writing into the malloc'ed pointer LDS cell instead of
the global buffer backing the lowered LDS
Collect and translate them to the global pointer like the other LDS
memory operations under asan
Commit: 5868847241e2d761843a3a9bed9f4c3703e2ac2c
https://github.com/llvm/llvm-project/commit/5868847241e2d761843a3a9bed9f4c3703e2ac2c
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
Log Message:
-----------
[RISCV] Add Zvfbfa to RISCVABIInfo::coerceVLSVector checks. (#202812)
Commit: a46c5ee4eb7f5dadc38dabb9481564a9b74687c2
https://github.com/llvm/llvm-project/commit/a46c5ee4eb7f5dadc38dabb9481564a9b74687c2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/GlobPattern.cpp
Log Message:
-----------
[NFC][Support] Refactor bracket parsing in GlobPattern (#202848)
Extract BitVector from Expected before flipping to
prepare for future modifications.
Assisted-by: Gemini
Commit: ac7161671cc3d64e104fa37f75f12c60150bdb1d
https://github.com/llvm/llvm-project/commit/ac7161671cc3d64e104fa37f75f12c60150bdb1d
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUtils.cpp
A llvm/test/Transforms/LoopVectorize/minmax-reduction-unknown-prof.ll
Log Message:
-----------
[LoopUtils] Mark createMinMaxOp's new select with unknown branch weights (#201750)
`createMinMaxOp()` lowers an FP min/max reduction to a freshly built
fcmp+select. That select is not derived from any existing branch, so it
carries no real profile data, and prof-verify reports a "select
annotation missing" failure. Mark the synthesized select's branch
weights as explicitly unknown when the enclosing function is profiled,
guarded by the existing profcheck-disable-metadata-fixes option.
Add a unit test covering the profiled and non-profiled cases.
Commit: d20eca15e888b6f70412792ff63a4de960a3fb2e
https://github.com/llvm/llvm-project/commit/d20eca15e888b6f70412792ff63a4de960a3fb2e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt/sps-ci/CallSPSCI.h
M orc-rt/lib/executor/CMakeLists.txt
A orc-rt/lib/executor/sps-ci/CallSPSCI.cpp
M orc-rt/unittests/CMakeLists.txt
A orc-rt/unittests/CallSPSCITest.cpp
Log Message:
-----------
[orc-rt] Add initial call-function SPS CIs. (#202860)
Adds orc_rt_call_void_void and orc_rt_call_main, which can be used to
call functions with `void(void)` and `int(int, char*[])` signatures,
respectively.
Commit: 3c191d65110b5f54faf68d8438a9d989a1ef133d
https://github.com/llvm/llvm-project/commit/3c191d65110b5f54faf68d8438a9d989a1ef133d
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/tools/yaml2obj/ELF/bb-addr-map-pgo-analysis-map.yaml
Log Message:
-----------
[ObjectYAML] Fix yaml2obj crash when BBAddrMap entry has invalid feature (#201729)
Warn and skip the entry instead of dereferencing the Error-holding
Expected returned by Features::decode.
Commit: 55f4ff4306e1c64f08f5ee58164b49cee3d461fc
https://github.com/llvm/llvm-project/commit/55f4ff4306e1c64f08f5ee58164b49cee3d461fc
Author: Himadhith <79003240+Himadhith at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/tools/CMakeLists.txt
Log Message:
-----------
[cmake] Add llvm-readobj before lldb (#202715)
After #199152, following CMake error is found when building llvm-lit:
```
CMake Error at cmake/modules/AddLLVM.cmake:2816 (get_target_property):
get_target_property() called with non-existent target "llvm-readobj".
Call Stack (most recent call first):
cmake/modules/AddLLVM.cmake:1513 (get_host_tool_path)
cmake/modules/AddLLVM.cmake:1556 (export_executable_symbols)
tools/llvm-lto2/CMakeLists.txt:27 (export_executable_symbols_for_plugins)
```
Fixed by adding llvm-readobj before lldb. (Similar to
https://github.com/llvm/llvm-project/pull/201648)
Co-authored-by: himadhith <himadhith.v at ibm.com>
Commit: d4d061b85f8579397c1522febbcd25af969f423d
https://github.com/llvm/llvm-project/commit/d4d061b85f8579397c1522febbcd25af969f423d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/codegen.c
Log Message:
-----------
[clang][bytecode] Fix right shifts greater than bitwidth (#202851)
We're not erroring in C, but we did compute the wrong result.
Commit: 696f4d5628479a828a14aa9999974d48f0aa698f
https://github.com/llvm/llvm-project/commit/696f4d5628479a828a14aa9999974d48f0aa698f
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Log Message:
-----------
[AMDGPU] Fix immediate parsing for packed types (#202417)
We should use the element, instead of the vector type, to get floating
point Semantics.The issue is not exposed in upstream yet, but still better to
be fixed.
Commit: dac9338f7af15561910137523f73cd93422c575b
https://github.com/llvm/llvm-project/commit/dac9338f7af15561910137523f73cd93422c575b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/IR/Function.cpp
Log Message:
-----------
[IR] Base attribute queries on Argument::getAttributes() (NFC) (#202686)
Fetch the AttributeSet for the argument and then do queries on that.
This is both less code than going through the function AttributeList,
and avoids redundant AttributeSet fetches in case where multiple
attributes are queried.
Commit: fe298c3006e1866df074aba59e4d0ca667ad341b
https://github.com/llvm/llvm-project/commit/fe298c3006e1866df074aba59e4d0ca667ad341b
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.h
Log Message:
-----------
[NFC][lldb] Delete dead variables in AppleObjCClassDescriptor (#202542)
Some of those were related to caching of information. However, this
cache is never consulted, making the current code misleading: one may
think we are benefiting from the cache, but we're not.
Commit: 66a0203502d2105c027b8494f6fd6d22cc9b6cfc
https://github.com/llvm/llvm-project/commit/66a0203502d2105c027b8494f6fd6d22cc9b6cfc
Author: Nikita Taranov <nikita.taranov at clickhouse.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libcxx/include/__hash_table
A libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/exceptions.pass.cpp
Log Message:
-----------
[libc++] Fix exception safety of `__hash_table::__copy_construct` (avoid memory leak) (#201452)
Slightly easier to digest repro: https://godbolt.org/z/ejjs5br5f
Commit: a983a3e76268b449dde64bc23edc8dab6d1d38de
https://github.com/llvm/llvm-project/commit/a983a3e76268b449dde64bc23edc8dab6d1d38de
Author: David Green <david.green at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll
Log Message:
-----------
[AArch64] Return basic cost for Sub instructions. (#202561)
This mirrors the cost we return for Add, where the custom lowering
otherwise increases the base cost to 2.
Commit: e7dcdf00efaac9d859f39347ab2e32e19914ab6b
https://github.com/llvm/llvm-project/commit/e7dcdf00efaac9d859f39347ab2e32e19914ab6b
Author: mbhade-amd <mbhade at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/reset-fpenv-mmo.ll
Log Message:
-----------
[X86] LowerRESET_FPENV - use MOLoad for the constant-pool FLDENVm MMO (#201832)
LowerRESET_FPENV builds a MachineMemOperand with the MOStore flag and
attaches it to X86ISD::FLDENVm, which is mayLoad = 1. The direction
contradicts the SDNode, and SelectionDAGISel's memref filter (in
SelectCodeCommon) silently drops the MMO, leaving the final MachineInstr
without any memrefs - no miscompile, but no useful load-side metadata
either.
Sister path LowerGET_FPENV_MEM already flips MOStore -> MOLoad before
attaching its MMO to FLDENVm. Match that here so the MMO survives ISel.
Adds a MIR-trailer regression test asserting FLDENVm carries the
expected `:: (load (s224) from constant-pool, align 4)` memref.
This was found as part of @jlebar's X86 LLVM bug hunt / FuzzX effort:
https://github.com/SemiAnalysisAI/FuzzX/tree/master/x86 :
x86/bugs/014-resetfpenv-mmo-flagged-as-store-on-load
cc @jlebar
Commit: dc352aa211095ddea1292fb99be867bd6ec5f65c
https://github.com/llvm/llvm-project/commit/dc352aa211095ddea1292fb99be867bd6ec5f65c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Avoid unnecessary canBeFreed() calls (NFC) (#202685)
Do not call canBeFreed() if the value can't ever be freed (e.g. for
globals) or if there are no known dereferenceable bytes. The check is
relatively expensive.
(The compile-time impact is only visible when enabling deref-at-point
semantics.)
Commit: 2a3342ce298fde653769ab8ecde070078f865012
https://github.com/llvm/llvm-project/commit/2a3342ce298fde653769ab8ecde070078f865012
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M orc-rt/lib/executor/sps-ci/CallSPSCI.cpp
M orc-rt/unittests/CallSPSCITest.cpp
Log Message:
-----------
[orc-rt] Fix off-by-one error in d20eca15e88 (SPS CI for calls). (#202872)
The main-function shaped caller in d20eca15e88 had an off-by-one error
that I missed as I was looking at a stale build folder. This commit
fixes the error, and makes some changes to related unit test variable
names for consistency.
Commit: 1dc53bacd24fb555dfd2ec030a5ee33f5db3fadf
https://github.com/llvm/llvm-project/commit/1dc53bacd24fb555dfd2ec030a5ee33f5db3fadf
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/test/CodeGen/RISCV/rv32-move-merge.ll
Log Message:
-----------
[RISCV][P-ext] Merge paired pli/plui in RISCVMoveMerger (#202566)
64-bit packed-splat constants are returned as i64, which SelectionDAG
splits into two i32 halves materialized as single-reg
pli.b/pli.h/plui.h. Merge matching pairs writing the two halves of a
GPRPair into the paired pli.db/pli.dh/plui.dh form.
Commit: 2865ba749a8b7612b3b22fdb498b392e814c2e84
https://github.com/llvm/llvm-project/commit/2865ba749a8b7612b3b22fdb498b392e814c2e84
Author: David Green <david.green at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
Log Message:
-----------
[AArch64] Add SVE cost tests for fp128 vectors. NFC (#202874)
Commit: 992f140ce80746282fae345abbc655e0db1afb42
https://github.com/llvm/llvm-project/commit/992f140ce80746282fae345abbc655e0db1afb42
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/lib/Analysis/InstructionSimplify.cpp
Log Message:
-----------
[InstSimplify] Expose simplifyIntrinsic (NFC) (#202577)
With the objective of using it in the constant-folder.
Commit: 81967cfb4ca816c59a1c9719f4aa773730686310
https://github.com/llvm/llvm-project/commit/81967cfb4ca816c59a1c9719f4aa773730686310
Author: ritter-x2a <9519134+ritter-x2a at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Document that only naturally aligned atomics of up to 64 bits are supported by the AMDGPU backend (#200167)
We get an error from AtomicExpandPass if those constraints are not satisfied.
The 64-bit limit is set [here, in AMDGPUISelLowering.cpp](https://github.com/llvm/llvm-project/blob/5cac2751fb9cf3112d16717b278e40d07dd6cfdc/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp#L645).
This patch also introduces a new "Unsupported IR Constructs" section to the AMDGPUUsage doc, where we can document more such cases.
Commit: daa49cfc2e01ff9df3400321ee308ec82b23ff34
https://github.com/llvm/llvm-project/commit/daa49cfc2e01ff9df3400321ee308ec82b23ff34
Author: Peiqi Li <voyager.lpq at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
Log Message:
-----------
[clang-tidy] Fix false positive in bugprone-use-after-move with std::forward on derived classes (#199905)
The `bugprone-use-after-move` check correctly identified partial moves
when using `std::move` by matching the `ImplicitCastExpr`
(DerivedToBase) as the parent of the call. However, when using
`std::forward<Base>`, the cast occurs inside the argument, causing the
matcher to miss the cast and falsely report a use-after-move.
This patch uses `traverse(TK_AsIs, expr(hasParent(...)))` on the first
argument to navigate bottom-up, reliably capturing the hidden
`ImplicitCastExpr`. This ensures both partial moves and forwards are
consistently recognized, eliminating the false positive.
Assisted by AI to check code.
Fixes #63202
Commit: a424861be0f82ca8e05dd0ae3fb433805a1fec20
https://github.com/llvm/llvm-project/commit/a424861be0f82ca8e05dd0ae3fb433805a1fec20
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/CallGraph.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
Log Message:
-----------
[clang][ssaf] CallGraph extractor should ignore objc callees for now (#202606)
Ignoring them is better than crashing/asserting on nullptr derefs.
Fixes: rdar://179104950
Commit: 1dcb977d17611721e3b3b51b6557197c45762275
https://github.com/llvm/llvm-project/commit/1dcb977d17611721e3b3b51b6557197c45762275
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Basic/OpenMPKinds.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Improve loop structure for distributed loops (pt 1: reductions) (#201670)
This is a part of a series of patches that rework OpenMP cross-team
reductions.
This patches wires the existing
`kmp_sched_distr_static_chunk_sched_static_chunkone` to be used by
CodeGen (this patch is restricted to reduction loops).
Example of the intended change of this patch:
```
target teams distribute parallel for reduction(+:s)
for (i = 0; i < N; i++) s += a[i];
```
Before:
```
__kmpc_distribute_static_init(91)
for (team_lb = team*nthreads; team_lb < N; team_lb += nteams*nthreads) {
__kmpc_for_static_init(33)
for (iv = team_lb + tid; iv < team_lb + nthreads; iv += nthreads) {
priv += a[iv];
}
__kmpc_nvptx_parallel_reduce_nowait_v2
}
__kmpc_nvptx_teams_reduce_nowait_v2
```
After:
```
__kmpc_for_static_init(93)
for (iv = team*nthreads + tid;
iv < N;
iv += nteams*nthreads) {
priv += a[iv];
}
__kmpc_nvptx_parallel_reduce_nowait_v2
__kmpc_nvptx_teams_reduce_nowait_v2
```
Performance:
All performance tests can be reproduced with
https://github.com/ro-i/xteam-test @ commit
6025e5afc14dd6e65ee2658e5001c16e9b9245ff. To reproduce, simply create a
`local.mk` file in the cloned directory with a suitable `OFFLOAD_ARCH`
for your machine and `CXX_trunk` + `CXX_trunk_cg` set to the paths of
the clang++ binaries for llvm/main and this patch. (llvm/main should
best be at the commit that is currently the base for this PR. At the
moment, this is 69f7aeb52e71ebb7d264bc9e613bc4bc90cb0c47). Then, run
`make trunk trunk_cg` to build the benchmark binaries for 208 and 10400
teams. Run them with `./run_bench.sh -rq -n10 red_trunk_208
red_trunk_cg_208 red_trunk_10400 red_trunk_cg_10400` to get the avg
performance numbers over 10 rounds. This tests multiple reduction
workloads, including reductions that run in the Generic-SPMD mode, with
208 teams and with 10400 teams, both Ă 512 threads, and with a reduction
array size of 177,777,777. I tested on a gfx942 and found the following
numbers showing the performance of this patch relative to the baseline:
```
red_comb_sep_arr_32 double change for 208 teams: +0.01% change for 10400 teams: +5.53%
red_sum_arr_32 double change for 208 teams: +570.47% change for 10400 teams: -2.23%
red_comb double change for 208 teams: +350.30% change for 10400 teams: +0.72%
red_comb_sep double change for 208 teams: +4.82% change for 10400 teams: +2.18%
red_dot double change for 208 teams: +202.45% change for 10400 teams: +3.48%
red_indirect double change for 208 teams: +239.33% change for 10400 teams: +4.63%
red_kernel_part double change for 208 teams: +3.30% change for 10400 teams: +3.43%
red_max double change for 208 teams: +273.46% change for 10400 teams: +5.12%
red_mult double change for 208 teams: +239.50% change for 10400 teams: +5.23%
red_sum double change for 208 teams: +239.47% change for 10400 teams: +5.15%
red_pi double change for 208 teams: +90.06% change for 10400 teams: +78.67%
red_comb_sep_arr_32 uint change for 208 teams: -0.16% change for 10400 teams: +26.98%
red_sum_arr_32 uint change for 208 teams: +139.64% change for 10400 teams: -14.55%
red_dot uint change for 208 teams: +202.92% change for 10400 teams: +5.11%
red_max uint change for 208 teams: +221.41% change for 10400 teams: +6.54%
red_sum uint change for 208 teams: +220.83% change for 10400 teams: +7.80%
red_comb_sep_arr_32 ulong change for 208 teams: -0.19% change for 10400 teams: +5.80%
red_sum_arr_32 ulong change for 208 teams: +523.98% change for 10400 teams: -3.17%
red_dot ulong change for 208 teams: +232.14% change for 10400 teams: +3.57%
red_max ulong change for 208 teams: +279.87% change for 10400 teams: +6.17%
red_sum ulong change for 208 teams: +261.54% change for 10400 teams: +5.72%
red_comb_sep_arr_32 Value change for 208 teams: +0.22% change for 10400 teams: +0.04%
red_sum_arr_32 Value change for 208 teams: +423.38% change for 10400 teams: +9.08%
red_dot Value change for 208 teams: +153.87% change for 10400 teams: -2.62%
red_max Value change for 208 teams: +1097.62% change for 10400 teams: +261.16%
red_sum Value change for 208 teams: +358.88% change for 10400 teams: +21.44%
```
Claude assisted with this patch.
Commit: 8da9d925ac73becc1733c6733ffabc2020131912
https://github.com/llvm/llvm-project/commit/8da9d925ac73becc1733c6733ffabc2020131912
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
M mlir/test/Transforms/mem2reg.mlir
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][mem2reg] fix 197158 by moving visitReplacedValues call (#198552)
Fix #197158 and #200844 by moving the `visitReplacedValues` calls
between `promoteInRegion` and `removeBlockingUses` , as well as setting
the insertion point before the replaced store operation before calling
the `PromotableMemOpInterface::getStored` API (instead of setting the
insertion point after).
The action order change is done at the top level. The `promoteInRegion`
are done for all regions in post order, then the `visitReplacedValues`
are done for all regions, and then only the `removeBlockingUses` are
done for all regions in post order. This ensures that any load results
that would happen to be used in a later stored is not deleted by
`removeBlockingUses` before it is used by `visitReplacedValues`.
The insertion point change ensures that the stored values passed to
`visitReplacedValues` dominate the related store operations. Otherwise,
typical `visitReplacedValues` that set insertion points at the store
operation and use the stored values generated invalid IR when
`getStored` generates new IR (like bitcasts for the LLVM dialect
implementation).
Commit: be1f53f568394ee7c1976a9a5785c8127dbcdf39
https://github.com/llvm/llvm-project/commit/be1f53f568394ee7c1976a9a5785c8127dbcdf39
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Save a `Type*` in integral pointers instead of a descriptor (#202835)
This way we don't need to allocate a descriptor via the `Program`, which
is for global data.
Commit: e1110dabc49d10c9353d6af7555c56f55fb0cca8
https://github.com/llvm/llvm-project/commit/e1110dabc49d10c9353d6af7555c56f55fb0cca8
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
A flang/test/Semantics/OpenMP/target-enter-data-temp-descriptor-omp61.f90
A flang/test/Semantics/OpenMP/target-enter-data-temp-descriptor.f90
Log Message:
-----------
[Flang][OpenMP][Sema] Add OpenMP warning when mapping local descriptors to device on enter without a corresponding exit (#201060)
This PR aims to add a new warning to Flang that will emit when a user
tries to map a local/temporary descriptor to device on an enter
directive without also applying it to a corresponding exit directive.
This problem can cause some pretty unique and difficult to track down
errors in programs as it can result in a user unintentionally locking
into place a stack allocated descriptor that has fallen out of scope,
which can result in a later clash with another stack allocated variable
that's being mapped and just happens to reside in the old descriptor
address range.
So this PR attempts to warn about this problem to prevent users doing
so, it's of note that we handle some of these cases in our
MapInfoFinalization pass, but I believe we should still include these
cases for portability reasons and incase we ever backtrack on our
decision to silently support some of these cases.
Made this warning as it was a suggestion from Michael Klemm and seemed
like a good PR to add to guide users to avoid this pattern (as it
unfortunately seems to be a common one that pops up). I'll perhaps look
into an optimization pass that tries to resolve some of these cases
silently in the future, but this will have to do in the meantime.
Commit: e65b4e7fa233fd15fb1e84a66329b8936a594b2d
https://github.com/llvm/llvm-project/commit/e65b4e7fa233fd15fb1e84a66329b8936a594b2d
Author: flovent <flbven at protonmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/DeleteNullPointerCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
Log Message:
-----------
[clang-tidy] Avoid invalid fixes in `readability-delete-null-pointer` (#202488)
Only provide warnings (not fixits) when `IfStmt` has condition variable
or initializer.
Note that i didn't provide fixit for the situation that conditon
variable is different with the pointer variable being cast to bool
because i think this is rare. (the third newly added testcase)
Closes #202312.
---------
Co-authored-by: Zeyi Xu <zeyi2 at nekoarch.cc>
Commit: 6f2726dc2c03aa78532d60746cdfdff069033cc6
https://github.com/llvm/llvm-project/commit/6f2726dc2c03aa78532d60746cdfdff069033cc6
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libcxx/include/__type_traits/rank.h
Log Message:
-----------
[libc++] Assume that __array_rank is provided by the compiler (#202511)
All compilers we support have `__array_rank`, so we can remove the
preprocessor branch for supporting compilers which don't provide it.
Commit: 389e924ac7df45d34b613a46d24940abcfeb879d
https://github.com/llvm/llvm-project/commit/389e924ac7df45d34b613a46d24940abcfeb879d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/LICM/scalar-promote.ll
M llvm/test/Transforms/SimplifyCFG/speculate-store.ll
Log Message:
-----------
[LICM][SimplifyCFG] Ignore frees for writable dereferenceability check (#202589)
Both of these places only explicitly check for dereferenceability
because this is required for the `writable` attribute. Actual
dereferenceability has already been established at this point, e.g.
based on a prior access. As such, we can ignore frees here. We only care
that the argument has an appropriately sized `dereferenceable`
attribute.
Commit: caa0f0395f4fb95f1d51cd5fdddfe6fcdef038e9
https://github.com/llvm/llvm-project/commit/caa0f0395f4fb95f1d51cd5fdddfe6fcdef038e9
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
Log Message:
-----------
[LICM] Fix typo in variable name (NFC) (#202889)
Commit: 1a09ed10e5c417b5e71f893e63a21498216dd258
https://github.com/llvm/llvm-project/commit/1a09ed10e5c417b5e71f893e63a21498216dd258
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
Log Message:
-----------
[VPlan] Insert VPBlendRecipes in post order. NFC (#201782)
#201783 wants to optimize blend masks by peeking through the contents of
other phi nodes. Currently we eagerly convert phis to blends in reverse
post order, so switch it to post order so that phis at the bottom can
see the phis in their uses.
Commit: 93e03fc2666e10b4e32091bc27d35709f49c9443
https://github.com/llvm/llvm-project/commit/93e03fc2666e10b4e32091bc27d35709f49c9443
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/floatdidf.S
A compiler-rt/lib/builtins/arm/floatdisf.S
A compiler-rt/lib/builtins/arm/floatsidf.S
A compiler-rt/lib/builtins/arm/floatsisf.S
A compiler-rt/lib/builtins/arm/floatundidf.S
A compiler-rt/lib/builtins/arm/floatunsidf.S
A compiler-rt/lib/builtins/arm/floatunsisf.S
A compiler-rt/test/builtins/Unit/floatdidfnew_test.c
A compiler-rt/test/builtins/Unit/floatdisfnew_test.c
A compiler-rt/test/builtins/Unit/floatsidfnew_test.c
A compiler-rt/test/builtins/Unit/floatsisfnew_test.c
A compiler-rt/test/builtins/Unit/floatundidfnew_test.c
A compiler-rt/test/builtins/Unit/floatundisfnew_test.c
A compiler-rt/test/builtins/Unit/floatunsidfnew_test.c
A compiler-rt/test/builtins/Unit/floatunsisfnew_test.c
Log Message:
-----------
[compiler-rt][ARM] Optimized integer -> FP conversions (#179928)
This commit adds a total of 8 new functions, all converting an integer
to a floating-point number, varying in 3 independent choices:
* input integer size (32-bit or 64-bit)
* input integer type (signed or unsigned)
* output float format (32-bit or 64-bit)
The two conversions of 64-bit integer to 32-bit float live in the same
source file, to save code size, since that conversion is one of the more
complicated ones and the two functions can share most of their code,
with only a few instructions differing at the start to handle negative
numbers (or not).
Commit: 851919b9c4e4e9a32b86b4a79853dcb58cbea7be
https://github.com/llvm/llvm-project/commit/851919b9c4e4e9a32b86b4a79853dcb58cbea7be
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Target/SPIRV/Serialization/Serializer.cpp
M mlir/test/Target/SPIRV/struct.mlir
Log Message:
-----------
[mlir][SPIR-V] Serialize BufferBlock struct decoration (#202870)
Add BufferBlock to the no-operand decoration switch
Commit: d602a9343a0e5db98548e360370cebb02bfd421c
https://github.com/llvm/llvm-project/commit/d602a9343a0e5db98548e360370cebb02bfd421c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libcxx/include/__configuration/availability.h
M libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp
M libcxx/utils/libcxx/test/features/availability.py
M libcxxabi/test/test_demangle.pass.cpp
Log Message:
-----------
[libc++] Fill in Apple availability for LLVM 21 (#202347)
macOS 26.4 and aligned platforms have been released and they are roughly
synchronized to libc++ 21. As a drive-by, also add missing versions for
previous releases.
This also allows reverting #199682 which moved an XFAIL to UNSUPPORTED
to silence CI failures temporarily.
Commit: 1e0a4c7a9154e46ef52a7c5b0ddbca69fbdcfacd
https://github.com/llvm/llvm-project/commit/1e0a4c7a9154e46ef52a7c5b0ddbca69fbdcfacd
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
M mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
M mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ConvertToEmitC/ConvertToEmitCPass.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Target/Cpp/func.mlir
Log Message:
-----------
[mlir][emitc] Lower multiple results as a struct (#200659)
Previously, func-to-emitc lowering rejected func.{func,call,return} with
more than one result/operand. Such ops are directly handled by the
translator which emits an `std::tuple` packing ther results, but is only
relevant for C++ users. This patch lifts that restriction by packing
multiple return values into an automatically-generated struct, e.g. for
a function returning (i32, i32):
emitc.class struct @return_i32_i32 {
emitc.field @field0 : i32
emitc.field @field1 : i32
}
On return, the operands are packed into a local struct variable which is
then loaded and returned. On call sites, the struct is stored in a local
variable, and each field is extracted to recreate the individual SSA
values of the original results. As with single-result functions,
`emitc.array` return types are not supported.
If a class with that name already exists, it is verified to have exactly
the expected fields with the correct types and no methods. Two functions
with the same return type tuple share a single class definition.
Backward compatibility is maintained by a new lower-to-cpp option which
defaults to `true` (unlike the same flag in memref-to-emitc), in which case
func-to-emitc continues to bail out on multi-return functions.
Assisted-by: Copilot
Commit: 2b201d89bab6d0f4f3c017ed3ab358500c1d8960
https://github.com/llvm/llvm-project/commit/2b201d89bab6d0f4f3c017ed3ab358500c1d8960
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaTargetStreamer.cpp
A llvm/test/CodeGen/Xtensa/literal.ll
Log Message:
-----------
[Xtensa] Fix literal section emit for ConstantPool entries. (#200132)
Fix literal section switching in XtensaTargetStreamer.
https://github.com/llvm/llvm-project/issues/190204
Commit: 14229de6dfe069ff781b47d3757854f561d79f59
https://github.com/llvm/llvm-project/commit/14229de6dfe069ff781b47d3757854f561d79f59
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
Log Message:
-----------
[MIPS] int <-> `half` conversions with `+msa` (#201897)
Currently these conversions hit an instruction selection failure
https://godbolt.org/z/5YK4T71Wf. The backend marks most operations on
`f16` as `Promote`, but these conversions were (I assume) forgotten.
I've modeled this based on the implementation for s390x, because like
MIPS the `f16` type is storage-only there: you can pass it around etc.
but actual operations are done via promotion to `f32` or `f64`.
https://github.com/llvm/llvm-project/blob/a4e48b5d1a5dc7af00c4adb4076145afd9846739/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp#L7027-L7091
Commit: 0a45515e9e386233970b56b34a65d7442ac37e5f
https://github.com/llvm/llvm-project/commit/0a45515e9e386233970b56b34a65d7442ac37e5f
Author: Mel Chen <mel.chen at sifive.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan][NFC] Simplify reverse access pattern detection in EVL vectorization (#199510)
This PR demonstrates how to decouple the transformation of reverse
accesses during `VPlanTransforms::optimizeEVLMasks` from the reverse
operations of load results or stored values. First, `optimizeEVLMask`
transforms:
```
vptr = vec_end_ptr (ptr, VF)
res = masked.load(vptr, vector.reverse(mask))
-->
vptr = vec_end_ptr (ptr, evl)
load = vp.load(vptr, vp.reverse(mask_w/o_header_mask), evl)
res = splice.left(poison, load, evl)
```
```
vptr = vec_end_ptr (ptr, VF)
masked.store(stored_val, vptr, vector.reverse(mask))
-->
vptr = vec_end_ptr (ptr, evl)
splice = splice.right(store_val, poison, evl)
vp.store(splice, vp.reverse(mask_w/o_header_mask), evl)
```
To maintain cost model consistency, `optimizeEVLMasks` introduces the
following simplification rules to fold splice and vector.reverse to
vp.reverse.
```
vector.reverse(splice.left(poison, v, evl))
-->
vp.reverse(v, true, evl)
splice.right(vector.reverse(v), poison, evl)
-->
vp.reverse(v, true, evl)
```
As a result, the permutations elimination can now take place directly
before the EVL lowering. However, a side effect is that we might
subsequently need to clean up redundant splices after EVL lowering.
Commit: dce55a9f6cfce57e922e0e8f4583da781628e234
https://github.com/llvm/llvm-project/commit/dce55a9f6cfce57e922e0e8f4583da781628e234
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/AssumeBundleBuilder.h
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Remove knowledge retention folding (#202890)
The knowledge retention API for simplifying assumes isn't that useful
anymore, since most simplifications done by it are now done
unconditionally directly in InstCombine. It's also known to miscompoile
multiple patterns.
Commit: b000f9032911f32c0e68e373e083ccc90aae0005
https://github.com/llvm/llvm-project/commit/b000f9032911f32c0e68e373e083ccc90aae0005
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/riscv_packed_simd.h
A clang/test/CodeGen/RISCV/rvp-intrinsics.c
A cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV] Add riscv_packed_simd.h for P extension intrinsics (#181115)
Add `riscv_packed_simd.h` with initial RISC-V P extension intrinsics, covering:
- Packed Splat
- Packed Addition and Subtraction
- Packed Addition with Scalar
- Packed Saturating Addition and Subtraction
- Packed Shift-Add
- Packed Minimum and Maximum
- Packed Shifts
- Packed Logical Operations
The intrinsics are implemented as thin wrappers over standard C operators
and existing generic builtins (`__builtin_elementwise_add_sat` etc.), letting
the RISC-V backend lower the resulting `<N x iN>` IR to P-ext instructions.
No new clang builtins or `llvm.riscv.*` intrinsics are introduced.
Spec: https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc
Commit: 7087ea37449027cc4c73a375b542cdc397c4474b
https://github.com/llvm/llvm-project/commit/7087ea37449027cc4c73a375b542cdc397c4474b
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/multi-function-printf.ll
Log Message:
-----------
[SPIR-V] Look up printf format string type in the correct function (#201523)
addPrintfRequirements() resolved the SPIR-V type of the format string
operand via getSPIRVTypeForVReg() without passing the instruction's
parent MachineFunction, so the lookup defaulted to the registry's CurMF:
whichever function happened to be processed last. Virtual register
numbers are only unique within a function, so in multi-function modules
the check could inspect an unrelated function's type, misreading its
second operand as the format string's storage class (an OpTypeInt's
width immediate, in the added test). For a format string in the constant
address space this spuriously triggered the fatal
"SPV_EXT_relaxed_printf_string_address_space is required" error, or
silently added the unnecessary extension when it was available;
conversely, the requirement could be silently omitted when the colliding
vreg had no recorded type.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: ee28f5d4a3ed32c2759516983f66988e31ea1824
https://github.com/llvm/llvm-project/commit/ee28f5d4a3ed32c2759516983f66988e31ea1824
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libcxx/include/__utility/is_pointer_in_range.h
Log Message:
-----------
[libc++] Make __is_less_than_compatable a variable template (#202525)
This makes the code a bit more readable and improves compile times a
bit, since variable templates are faster to instantiate than class
templates.
Commit: d8388a15b33e67fd297a47a0e6ee80c3a5cd947a
https://github.com/llvm/llvm-project/commit/d8388a15b33e67fd297a47a0e6ee80c3a5cd947a
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/predicate-as-counter-phi.ll
Log Message:
-----------
[AArch64] Use PNR rather than PPR register class for aarch64svcount (#202394)
While predicates and predicate-as-counter both use the same underlying
registers, within LLVM they use different register classes (PPR vs PNR).
Mapping aarch64svcount to the PPRRegClass results in some unnecessary
cross register class copies around PHIs, which results in some
unnecessary moves.
Commit: a4c8e3dd883cbaa61c75fef25bf496bb3bd3350a
https://github.com/llvm/llvm-project/commit/a4c8e3dd883cbaa61c75fef25bf496bb3bd3350a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/docs/resources/lldbplatformpackets.md
M lldb/docs/resources/overview.md
Log Message:
-----------
[lldb][docs] Document what a Platform is (#202332)
Fixes #201875.
In #201875 a user was understandably confused what a platform even is,
and I had never had to explain it from the conceptual point of view
either.
So I wrote a long explanation
(https://github.com/llvm/llvm-project/issues/201875#issuecomment-4634087717)
specific to what they were trying to do. I don't think we need all that
in the docs and we don't have a great place for it anyway.
My alternative is:
* A high level explanation in the overview, to say what a platform does.
* A link from there to https://lldb.llvm.org/use/remote.html which has a
practical example of using one.
* A note in the platform extensions doc that our platform mode is not
related to gdb's extended remote.
It should be possible to locate all that from website search, and
failing that, lldb experts will be able to find it and link to it in
future discussions.
Commit: 78d49002ce6595237f7702999c8f30b00d7a4302
https://github.com/llvm/llvm-project/commit/78d49002ce6595237f7702999c8f30b00d7a4302
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
Log Message:
-----------
AMDGPU/GlobalISel: Implement RegBankLegalize rules for SALUFloat variants of G_INTRINSIC_TRUNC, G_FFLOOR and G_FCEIL. (#187679)
As requested on PR #179954.
Commit: 40457f351f1dd9edda9679a6c63b48c7c73dcb4c
https://github.com/llvm/llvm-project/commit/40457f351f1dd9edda9679a6c63b48c7c73dcb4c
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M llvm/include/llvm/ADT/ImmutableList.h
M llvm/unittests/ADT/ImmutableListTest.cpp
Log Message:
-----------
[llvm][ADT] Make ImmutableList conform the fwd iterator concept (#202580)
We missed post increment and a couple of typedefs. This would enable
llvm algorithms like filter_range, etc.
Commit: 51fb7eee9f460c22fe898ea5defcca94290109bb
https://github.com/llvm/llvm-project/commit/51fb7eee9f460c22fe898ea5defcca94290109bb
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
Log Message:
-----------
[SPIR-V] Remove duplicate SPV_INTEL_int4 extension map entry (#202871)
Commit: 0345e7d8edb268dc9318f439cb50bbaff399067a
https://github.com/llvm/llvm-project/commit/0345e7d8edb268dc9318f439cb50bbaff399067a
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
Log Message:
-----------
[AMDGPU] Support Wave Reduction for i16 types - 1 (#194808)
Supported Ops: `min`, `umin`, `max`, `umax`.
16-bit wave reduce ops are promoted to 32-bit
operations before ISEL. From there they use the
existing implementations for 32-bit reductions.
Assisted by - Claude-sonnet:4.6
Commit: ac0f0407a8b37c7c22ae4b7a0e32ef7df078b1b7
https://github.com/llvm/llvm-project/commit/ac0f0407a8b37c7c22ae4b7a0e32ef7df078b1b7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt/NativeDylibManager.h
M orc-rt/lib/executor/NativeDylibManager.cpp
M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Treat empty path as "process symbols" in NativeDylibManager. (#202905)
NativeDylibManager::load now handles an empty path by returning the
process's global lookup handle (RTLD_DEFAULT on POSIX) directly,
bypassing dlopen and the shutdown-time dlclose registration. This
matches the behavior of OrcTargetProcess's SimpleExecutorDylibManager.
Commit: e6a70ac8858998edde9c7bdd243ec9d169ae9e45
https://github.com/llvm/llvm-project/commit/e6a70ac8858998edde9c7bdd243ec9d169ae9e45
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
M mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
M mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ConvertToEmitC/ConvertToEmitCPass.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Target/Cpp/func.mlir
Log Message:
-----------
Revert "[mlir][emitc] Lower multiple results as a struct (#200659)" (#202911)
This reverts commit 1e0a4c7a9154e46ef52a7c5b0ddbca69fbdcfacd.
Failed buildbot:
https://lab.llvm.org/buildbot/#/builders/116/builds/29302
Commit: 651afa86119fd138488490862d1418eb40a43473
https://github.com/llvm/llvm-project/commit/651afa86119fd138488490862d1418eb40a43473
Author: Peter Smith <peter.smith at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lld/ELF/Relocations.cpp
A lld/test/ELF/aarch64-thunk-bti-overlay-reuse.s
A lld/test/ELF/arm-thunk-overlay-reuse.s
Log Message:
-----------
[LLD][ELF] Do not reuse thunks in OVERLAYs (#200415)
We cannot guarantee that a thunk in an OVERLAY will be in memory at the
same time as the caller if the caller is not in the same output section.
It is safe for a caller in an OVERLAY to reuse a thunk in a non-OVERLAY
section as we know that will be in memory. Thunks that are placed
before their target, are alternative entry points and can also be reused.
Resurrect the isThunkSectionCompatible function that was recently
removed as it served a similar purpose for thunks in different
partitions.
Potentially fixes #199966 which mentions a similar problem for sections
assigned to TCM (Tightly Coupled Memory). It should be possible to model
a TCM as an OVERLAY. If not then there may need to be a command-line
option to inhibit thunk sharing across output sections.
Commit: 322f5d0e2d082f1115c28e66d477aafc2c5e47f9
https://github.com/llvm/llvm-project/commit/322f5d0e2d082f1115c28e66d477aafc2c5e47f9
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
Log Message:
-----------
[AMDGPU] Support Wave Reduction for i16 types - 2 (#194810)
Supported Ops: `add`, `sub`.
Commit: b7c9fd965dbd24189e3b757e8f74eea985d1edc5
https://github.com/llvm/llvm-project/commit/b7c9fd965dbd24189e3b757e8f74eea985d1edc5
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
Log Message:
-----------
[AMDGPU] Support Wave Reduction for i16 types - 3 (#194812)
Supported Ops: `and`, `or`, `xor`.
Commit: f7bfc6c256e6a0937cfae569c1bbaaea4ca60d5b
https://github.com/llvm/llvm-project/commit/f7bfc6c256e6a0937cfae569c1bbaaea4ca60d5b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine][NFC] Drop ignore bundles when iterating the bundles (#202903)
Commit: ce811aacef9a35c0765aa39381340993459fbd33
https://github.com/llvm/llvm-project/commit/ce811aacef9a35c0765aa39381340993459fbd33
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/pr53842.ll
Log Message:
-----------
[X86] pr53842.ll - add test coverage for ICMP_SGT/SLT cases (#202906)
Commit: 690b0b0c63125aaf6b517df9d528789bb8c9c08a
https://github.com/llvm/llvm-project/commit/690b0b0c63125aaf6b517df9d528789bb8c9c08a
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
Log Message:
-----------
[LV] Add initial costs for VPInstructionWithType::computeCost (#198291)
I noticed this was previously always returning a cost of 0
due to fear of triggering the (now deleted) legacy/vplan
cost model assert. Since the assert has now been removed
this should be safe to implement properly. I haven't
filled in the costs for all types yet, since there is
currently no way to expose those code paths. I suspect
for things like VPInstruction::StepVector the recipe is
always in the vector preheader and we never ask for its
cost.
Commit: c2112e925e99d93dff671e2254e3e999dccf25dd
https://github.com/llvm/llvm-project/commit/c2112e925e99d93dff671e2254e3e999dccf25dd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Fix ECHO_TO_FILE/ECHO_APPEND_FILE (#202612)
The Windows recipes for these macros were `printf "%s\n" $(1)`. The
callers wrap content in single quotes (for the POSIX printf), but the
test recipes run under `cmd.exe` on Windows, which keeps the single
quotes literal and word-splits on spaces, and the bundled `printf`
additionally mangles backslashes and spaces. The result is garbage
generated files (e.g. a modulemap whose first line is `'module`, or a
truncated SDK path from a "Program Files" directory).
Write the file with cmd's `echo` after stripping the callers' single
quotes. `echo` runs in the recipe shell, so unlike GNU make's `$(file
...)` it still works after a preceding `MKDIR_P` in the same recipe.
rdar://179218545
Commit: d4445f38fbf35ff11dfeb7870aae5dff2a9baecd
https://github.com/llvm/llvm-project/commit/d4445f38fbf35ff11dfeb7870aae5dff2a9baecd
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
Log Message:
-----------
[lldb][NFC] Use unique ptr in AppleObjCRuntime::GetMetaclass (#202893)
These methods have no reason to return a shared pointer.
Commit: 84285e4b27c7a286e864823904dc4a67aa09cca5
https://github.com/llvm/llvm-project/commit/84285e4b27c7a286e864823904dc4a67aa09cca5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
Log Message:
-----------
[NFC][lldb][Windows] Clean up DebuggerThread (#202719)
- Fix typos in a llvm_unreachable string and a local variable name.
- Replace a C-style downcast to HostProcessWindows with static_cast.
- Drop redundant braces around a single-statement if and add the
namespace-closer comment in the header.
Commit: d1f15d05f73a6f9edbc678055c35ac0232a0f837
https://github.com/llvm/llvm-project/commit/d1f15d05f73a6f9edbc678055c35ac0232a0f837
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeThreadWindows.cpp
Log Message:
-----------
[NFC][lldb][Windows] Clean up NativeThreadWindows (#202723)
- Drop unused #includes lldb/Target/Process.h and lldb/lldb-forward.h.
- Inline the one-shot NativeProcessProtocol& local in DoResume and
modernize GetStopReason's stale legacy log->Printf idiom to LLDB_LOGF.
Commit: 284681ed94060d41cab926ea2b82de309d43c1f8
https://github.com/llvm/llvm-project/commit/284681ed94060d41cab926ea2b82de309d43c1f8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.h
Log Message:
-----------
[NFC][lldb][Windows] Clean up TargetThreadWindows (#202722)
- Drop dead `//#include "ForwardDecl.h"` and stale `class HostThread;`
forward declaration.
- Remove redundant `m_thread_reg_ctx_sp()` default-init in the
constructor initializer list.
Commit: e518b414496154af21569ceadd14bd473d22110b
https://github.com/llvm/llvm-project/commit/e518b414496154af21569ceadd14bd473d22110b
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine][NFC] Don't try non-bundle folds on assumes with bundles (#202914)
Commit: 53ae585a95aeff1c86ebd1943bdb9206dfa0837f
https://github.com/llvm/llvm-project/commit/53ae585a95aeff1c86ebd1943bdb9206dfa0837f
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16-fake16.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
Log Message:
-----------
[AMDGPU][NFC] Templatise and roundtrip gfx11_asm_vop3_dpp16.s (#202721)
I tried to make sure this covers all important cases from asm/disasm
tests here upstream and the true16 branch downstream.
This will resolve ~4k lines of differences vs the true16 branch.
Commit: e63f9bec814bde36f0aa13cd01c1a9abb8527c83
https://github.com/llvm/llvm-project/commit/e63f9bec814bde36f0aa13cd01c1a9abb8527c83
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaType.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p5.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
M clang/test/SemaCXX/crash-GH173943.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
Log Message:
-----------
[Clang] Accept auto parameters pre-C++20 as an extension (#200670)
GCC already accepts auto parameters as an extenion.
Commit: 80460f175cc1db1faa7bfe851139817b8a51e91d
https://github.com/llvm/llvm-project/commit/80460f175cc1db1faa7bfe851139817b8a51e91d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/CastOps.cpp
M mlir/test/Dialect/SPIRV/IR/cast-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Fix ConvertUToPtr verifier error message (NFC) (#202899)
Commit: 7b1dc59f476e86a616cd3343a066fdad29d7341d
https://github.com/llvm/llvm-project/commit/7b1dc59f476e86a616cd3343a066fdad29d7341d
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar-widen-gep-scalable.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
Log Message:
-----------
[VPlan] Simplify WidenGEP::execute (#193543)
WidenGEP::execute is currently dependent on whether or not a given
operand is defined outside loop regions, but it loop-invariant operands
are not guaranteed to be hoisted outside the loop, and neither are
single-scalar operands guaranteed to be maximally narrowed to
single-scalars. Use the vputils::isSingleScalar helper to analyze the
single-scalar status of each operand and the result instead, simplifying
the execute, while also leading to some improvements.
Commit: 3e470fc2f368d2a11146ef014daac09f360bc35d
https://github.com/llvm/llvm-project/commit/3e470fc2f368d2a11146ef014daac09f360bc35d
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN div_fixup builtins (#197468)
Adds codegen for the following AMDGCN division fixup builtins:
- __builtin_amdgcn_div_fixup (double)
- __builtin_amdgcn_div_fixupf (float)
- __builtin_amdgcn_div_fixuph (half)
These are lowered to the corresponding `llvm.amdgcn.div.fixup` intrinsic.
Commit: 49affe5954453474ba9f1b2b7aec82c28d03e54d
https://github.com/llvm/llvm-project/commit/49affe5954453474ba9f1b2b7aec82c28d03e54d
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
Document the warn_unused attribute (#201881)
Basically, this attribute is useful for getting -Wunused-variable
diagnostics from class types with a nontrivial constructor or
destructor.
Commit: 14a9660dc371c1ed7778890a6c3eb22352cc6620
https://github.com/llvm/llvm-project/commit/14a9660dc371c1ed7778890a6c3eb22352cc6620
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr53842.ll
Log Message:
-----------
[X86] combineConcatVectorOps - add 512-bit PCMPEQ/PCMPGT handling (#202928)
If we can freely concatenate both operands, then its worth replacing
with a VPCMP+VPMOVM2 pair
Managed to notice this while triaging #198162 - and the AVX512DQ SGT
test shows another vpmovq2m+vpmovm2q pair codegen issue :(
Commit: c838b5d66bc1db15de84a8e4692905cbda293672
https://github.com/llvm/llvm-project/commit/c838b5d66bc1db15de84a8e4692905cbda293672
Author: lntue <lntue at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A libc/shared/math/check/exp.h
A libc/shared/math_check_exceptions.h
A libc/src/__support/math/check/exp_exceptions.h
M libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_check_exp_test.cpp
Log Message:
-----------
[libc][math] Add shared functions to check exceptions for exp* functions. (#202503)
To be used inside LLVM and other projects.
Commit: 10060098acf4e02677328128b8bbae6142ddc2f5
https://github.com/llvm/llvm-project/commit/10060098acf4e02677328128b8bbae6142ddc2f5
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
Log Message:
-----------
Revert "[LV] Add initial costs for VPInstructionWithType::computeCost (#198291)" (#202933)
This reverts commit 690b0b0c63125aaf6b517df9d528789bb8c9c08a.
Fixes buildbot failure:
https://lab.llvm.org/buildbot/#/builders/132/builds/6656
Commit: 6ec2261fa29de72fe9520192a3e8b2f5f2082b67
https://github.com/llvm/llvm-project/commit/6ec2261fa29de72fe9520192a3e8b2f5f2082b67
Author: Peter Smith <peter.smith at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lld/ELF/Relocations.cpp
Log Message:
-----------
[ARM][LLD] Fix buildbot failure due to ununsed variable [NFC] (#202925)
The variable was used in an assert, have altered the code to use in an a
non-assert context.
Commit: e00f23b3db8b5f8387c78d58144c50915fe2bbf2
https://github.com/llvm/llvm-project/commit/e00f23b3db8b5f8387c78d58144c50915fe2bbf2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
Log Message:
-----------
[AMDGPU] Reject invalid flags immarg for amdgcn.cs.chain (#202708)
The flags operand must be 0 or 1
Commit: 01fd39a7620e7005a98b3bc3d26ec3c828811847
https://github.com/llvm/llvm-project/commit/01fd39a7620e7005a98b3bc3d26ec3c828811847
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Refactor rematerializer unit tests to reduce boilerplate (NFC) (#197575)
Taking inspiration from other unit tests, this refactors the
rematerializer's unit tests with the aim of reducing the amount of
repetitive boilerplate code in each individual test, making the addition
of new tests easier/faster in the future.
Each unit test defines some input MIR to instantiate a rematerializer
on; a user-provided callback is then invoked with a pre-initialized
rematerializer wrapped in a helper object that factors out as much
common verification logic as possible.
Commit: 6dc519bbfc956da873ab527d6d5e3a214b902496
https://github.com/llvm/llvm-project/commit/6dc519bbfc956da873ab527d6d5e3a214b902496
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
Log Message:
-----------
[AMDGPU] Fix value swap for potentially aliased out arguments in RewriteOutArguments (#202922)
When two out argument pointers may alias, MemoryDependence returns the
last aliasing store for both, so each argument was paired with the other
stored value
Match each store pointer to its argument and store them in pairs instead
Commit: 6e934ab34bf4fe09e29edb4f98436743ca93a843
https://github.com/llvm/llvm-project/commit/6e934ab34bf4fe09e29edb4f98436743ca93a843
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/bzip_reverse_loops.ll
Log Message:
-----------
[LV] Regen some tests with UTC. NFC (#202960)
Commit: e5e61fc32f6a9dd4fa75d932e9a7177a1b2bec28
https://github.com/llvm/llvm-project/commit/e5e61fc32f6a9dd4fa75d932e9a7177a1b2bec28
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
Log Message:
-----------
[lldb][Windows] Surface DebugBreakProcess Halt() as a SIGSTOP signal stop (#201885)
With #201884, each keystroke arriving while the debuggee is running
triggers a `\x03` BREAK. On Windows, the halt is implemented by
injecting a thread that fires an int3. However, the resulting breakpoint
exception was being reported as a real `__debugbreak()` (SIGTRAP). The
client treats that as a genuine stop, ends the continue, and stdin
forwarding ships at most one byte per BP hit.
With this patch, when a halt is pending, the server treats the next
breakpoint as the halt acknowledgement and report it as SIGSTOP instead
of SIGTRAP. The client then resumes the debuggee automatically, making
the brief halt transparent.
This is a follow up to https://github.com/llvm/llvm-project/pull/201884.
rdar://178725947
---------
Co-authored-by: Nerixyz <nero.9 at hotmail.de>
Commit: 9f276ae1ea69a536dcfab1ea0edd46950f0b2fb8
https://github.com/llvm/llvm-project/commit/9f276ae1ea69a536dcfab1ea0edd46950f0b2fb8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine][NFC] Don't insert trivial assumes when simplifying assume bundles (#202951)
When removing the only element in an assume bundle an `@llvm.assume(i1
true)` is currently inserted, which will just be removed again. Instead,
just remove the assume call to save a few cycles.
Commit: b90d496353e34f82dfde430990246fa3c43aecd3
https://github.com/llvm/llvm-project/commit/b90d496353e34f82dfde430990246fa3c43aecd3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
Log Message:
-----------
[mlir][SPIR-V] Fix swapped GL/CL SAbs ops in arith.remsi lowering (#202959)
Could be treated as NFC:
The GL/CL template args were confused but in fact it did not affect the
actual result, so no test modification is required. The reason is that
driver legalizes ops by target env capabilities and rewriter that
created the unsupported variant of the op is dropped and another one is
picked
Commit: 28ec8f6757746253d6ef1ba3d73873ef8f4200c9
https://github.com/llvm/llvm-project/commit/28ec8f6757746253d6ef1ba3d73873ef8f4200c9
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A llvm/test/CodeGen/X86/stack-coloring-setjmp.ll
Log Message:
-----------
[StackColoring] Add test for stack-coloring and setjmp (#199959)
As in title. The stack-coloring issue has been fixed here:
https://github.com/llvm/llvm-project/pull/196542
I've attempted some other fix here
https://github.com/llvm/llvm-project/pull/181370 that wasn't right (it
sill missed some cases);
I believe explicit test-case would be valuable to have for this
behavior. The test is reduced from real life application that suffered
from this bug
Commit: 7fe41b00f5698395fa8998388de3ee8f2af5e2d5
https://github.com/llvm/llvm-project/commit/7fe41b00f5698395fa8998388de3ee8f2af5e2d5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[NFC][lldb][Windows] Clean up NativeProcessWindows (#202720)
A second pass over NativeProcessWindows after b1142bf99486:
- Fix "implemenation" typo in CacheLoadedModules.
- Simplify OnExitThread to use llvm::erase_if.
Commit: edf5305fee7e67f4d6fd5e1228970dba757ebc71
https://github.com/llvm/llvm-project/commit/edf5305fee7e67f4d6fd5e1228970dba757ebc71
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
Log Message:
-----------
[flang][OpenMP] Fix privatization of linear in TARGET (#202443)
Linear symbols are privatized by OpenMP IRBuilder, except when they are
enclosed within TARGET, in which case their privatization must occur in
DataSharingProcessor.
Fixes #201628
Commit: 6f47b6de08a38ce89349231d970bcb9d999678a3
https://github.com/llvm/llvm-project/commit/6f47b6de08a38ce89349231d970bcb9d999678a3
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/IncludeSorter.cpp
Log Message:
-----------
[clang-tidy] Preserve newline style in utility fix-its. NFC. [1/N] (#202483)
This commit avoids introducing LF-only lines into files that use CRLF
when clang-tidy inserts new includes or adds missing header guards.
As of AI Usage: Assisted by Codex
Follow-up of #202271
Commit: f3632e0b6f14c5c749791ad154692e5a169c8836
https://github.com/llvm/llvm-project/commit/f3632e0b6f14c5c749791ad154692e5a169c8836
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
Revert "[lldb][Windows] Fix ECHO_TO_FILE/ECHO_APPEND_FILE (#202612)" (#202967)
This reverts commit c2112e925e99d93dff671e2254e3e999dccf25dd.
The change was done on the wrong branch.
Commit: 0a909ff75143edfaec355d3de20d41ee3cb17764
https://github.com/llvm/llvm-project/commit/0a909ff75143edfaec355d3de20d41ee3cb17764
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode][NFC] Avoid a getIntWidth() call in pushInteger() (#202873)
We only need to get the bitwdith in the IntAP/IntAPS case, so avoid it
in the others.
Commit: da0119eb10b23babec9142022ef834633a39452c
https://github.com/llvm/llvm-project/commit/da0119eb10b23babec9142022ef834633a39452c
Author: Gaurav Dhingra <gauravdhingra.gxyd at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/loop-convert/structures.h
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-basic.cpp
Log Message:
-----------
[clang-tidy] Fix modernize-loop-convert by introducing space (#202015)
Fixes #105508
Commit: 1cd9c0d69d268b67bb29c314c12de630ffce8513
https://github.com/llvm/llvm-project/commit/1cd9c0d69d268b67bb29c314c12de630ffce8513
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/COFF.h
M llvm/include/llvm/ExecutionEngine/JITLink/COFF_x86_64.h
M llvm/include/llvm/ExecutionEngine/JITLink/DWARFRecordSectionSplitter.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch32.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_ppc64.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_riscv.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_systemz.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_x86.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_x86_64.h
M llvm/include/llvm/ExecutionEngine/JITLink/XCOFF.h
M llvm/include/llvm/ExecutionEngine/JITLink/XCOFF_ppc64.h
M llvm/include/llvm/ExecutionEngine/JITLink/systemz.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorResolutionGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in ExecutionEngine (#202927)
This updates most LLVM_ABI annotations in the ExecutionEngine headers to
match expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 08d4a8ac0cb84acdd5145eb196ebcd1c36de83b9
https://github.com/llvm/llvm-project/commit/08d4a8ac0cb84acdd5145eb196ebcd1c36de83b9
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/MC/ConstantPools.h
M llvm/include/llvm/MC/DXContainerPSVInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/MCCodeView.h
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCGOFFObjectWriter.h
M llvm/include/llvm/MC/MCLabel.h
M llvm/include/llvm/MC/MCParser/MCAsmParserUtils.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSPIRVObjectWriter.h
M llvm/include/llvm/MC/MCSectionCOFF.h
M llvm/include/llvm/MC/MCSectionXCOFF.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/include/llvm/MC/MCSymbolELF.h
M llvm/include/llvm/MC/MCSymbolGOFF.h
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/include/llvm/MC/MCWasmObjectWriter.h
M llvm/include/llvm/MC/MCWasmStreamer.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
M llvm/include/llvm/MC/MCWinCOFFStreamer.h
M llvm/include/llvm/MC/MCXCOFFObjectWriter.h
M llvm/include/llvm/MC/MCXCOFFStreamer.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/MCA/CustomBehaviour.h
M llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h
M llvm/include/llvm/MCA/HardwareUnits/RetireControlUnit.h
M llvm/include/llvm/MCA/Stages/DispatchStage.h
M llvm/include/llvm/MCA/Stages/ExecuteStage.h
M llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
M llvm/include/llvm/MCA/Stages/MicroOpQueueStage.h
M llvm/include/llvm/MCA/Stages/RetireStage.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in MC/MCA (#202930)
This updates most LLVM_ABI annotations in the MC/MCA headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: f99ad325b987c3f2fb2d298f1569377c989b06d3
https://github.com/llvm/llvm-project/commit/f99ad325b987c3f2fb2d298f1569377c989b06d3
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/ObjCopy/DXContainer/DXContainerObjcopy.h
M llvm/include/llvm/ObjCopy/XCOFF/XCOFFObjcopy.h
M llvm/include/llvm/Object/BBAddrMap.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/Object/OffloadBundle.h
M llvm/include/llvm/ObjectYAML/ArchiveYAML.h
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/include/llvm/ObjectYAML/CodeViewYAMLTypeHashing.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/include/llvm/ObjectYAML/GOFFYAML.h
M llvm/include/llvm/ObjectYAML/MachOYAML.h
M llvm/include/llvm/ObjectYAML/MinidumpYAML.h
M llvm/include/llvm/ObjectYAML/ObjectYAML.h
M llvm/include/llvm/ObjectYAML/OffloadYAML.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/ObjectYAML/XCOFFYAML.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in Obj* (#202940)
This updates most LLVM_ABI annotations in the Obj* headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: ad21f597afee8740991158a07542a9eed109c562
https://github.com/llvm/llvm-project/commit/ad21f597afee8740991158a07542a9eed109c562
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/CodeView/DebugSubsectionVisitor.h
M llvm/include/llvm/DebugInfo/CodeView/DebugSymbolRVASubsection.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugAddr.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugAranges.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFGdbIndex.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypeUnit.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV1.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV2.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReaderV1.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReaderV2.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/IPDBDataStream.h
M llvm/include/llvm/DebugInfo/PDB/IPDBSectionContrib.h
M llvm/include/llvm/DebugInfo/PDB/IPDBTable.h
M llvm/include/llvm/DebugInfo/PDB/Native/EnumTables.h
M llvm/include/llvm/DebugInfo/PDB/Native/InjectedSourceStream.h
M llvm/include/llvm/DebugInfo/PDB/Native/InputFile.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeCompilandSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumGlobals.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumInjectedSources.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumLineNumbers.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumModules.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumSymbols.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumTypes.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeExeSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeFunctionSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeInlineSiteSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeLineNumber.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativePublicSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeSymbolEnumerator.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeArray.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeBuiltin.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeEnum.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeFunctionSig.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypePointer.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeTypedef.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeUDT.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeVTShape.h
M llvm/include/llvm/DebugInfo/PDB/PDBContext.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolAnnotation.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolBlock.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCompilandDetails.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCompilandEnv.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCustom.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeCustom.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeDimension.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeFriend.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeManaged.h
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in DebugInfo (#202915)
This updates most LLVM_ABI annotations in the DebugInfo headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 398694988742d26a5eaca038c337c193d25c0268
https://github.com/llvm/llvm-project/commit/398694988742d26a5eaca038c337c193d25c0268
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Transforms/Passes.td
M mlir/lib/Dialect/Affine/Transforms/SimplifyAffineWithBounds.cpp
M mlir/test/Dialect/Affine/simplify-with-bounds.mlir
Log Message:
-----------
[MLIR][Affine] Simplify affine.for bounds by pruning redundant expressions via ValueBoundsConstraintSet (#199032)
This PR introduces a new pattern `SimplifyAffineForBoundMap` to simplify
multi-result lower and upper bounds of `affine.for` loops by pruning
redundant expressions leveraging `ValueBoundsConstraintSet`. This PR
addresses the limitation where the built-in folder of `affine.for` can
only handle constant bounds.
Commit: 31541b9f50e133aa0b2f21efa27f402550c42ac7
https://github.com/llvm/llvm-project/commit/31541b9f50e133aa0b2f21efa27f402550c42ac7
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/clmul.ll
Log Message:
-----------
[AArch64] Add missing test for clmul.i128 (#202961)
Commit: a6b58e00ceddef9c363fa8e19eb2ab530d0d9658
https://github.com/llvm/llvm-project/commit/a6b58e00ceddef9c363fa8e19eb2ab530d0d9658
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitData.cpp
A mlir/test/Dialect/OpenACC/acc-implicit-data-defaultnone.mlir
Log Message:
-----------
[mlir][acc] Add ignore-default-none option to ACCImplicitData (#202442)
ACCImplicitData currently skips implicit data mapping when a visible
default(none) clause is present, per the OpenACC rule that no implicit
data attributes apply in that case.
That default is reasonable when a frontend already verifies
default(none) and ensures all user variables have an explicit data
clause. Without that checking, generating implicit mappings would risk
silently mapping user variables that should have been explicit under
default(none).
There are still cases where implicit mapping is needed even with
default(none):
- The frontend reports default(none) violations as warnings and
compilation continues, so some user variables may reach this pass
without explicit data clauses and still need implicit mapping.
- Compiler-generated temps or interior pointers may be live-in to the
region and still require implicit mapping even when all user variables
are already explicitly mapped.
In those cases, skipping implicit data entirely is too conservative.
Add an ignore-default-none pass option (default: false) to generate
implicit data mappings even when default(none) is present.
Commit: bc94cdb7fe17f61fc791ab02f7a0869ae905f4b8
https://github.com/llvm/llvm-project/commit/bc94cdb7fe17f61fc791ab02f7a0869ae905f4b8
Author: Artem Chikin <achikin at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
M clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
Reapply "[clang][deps] Add in-flight query caching to `DependencyScanningFilesystemSharedCache`" (#202804) (#202881)
Revert the revert in https://github.com/llvm/llvm-project/pull/202804,
and add an additional guard for the test which is not applicable on all
platforms.
Commit: fcfa763b96ecd4b165ddb3c0ef8e8cedbea01a28
https://github.com/llvm/llvm-project/commit/fcfa763b96ecd4b165ddb3c0ef8e8cedbea01a28
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Log Message:
-----------
AMDGPU: Fix finding TRI from TRI (#202970)
Commit: ce0668b7346c3bbde4e17907d678a739ab1877dd
https://github.com/llvm/llvm-project/commit/ce0668b7346c3bbde4e17907d678a739ab1877dd
Author: Aviral Goel <aviralg at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-entry-missing-data.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-entry-missing-summary-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-entity-id-in-data-map.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-entity.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-summary-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-missing-entity-summary.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-suffix.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-usr.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/invalid-syntax.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-duplicate-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-linkage-invalid-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-linkage-missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-missing-linkage.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-extra-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-invalid-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-missing-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-data.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-id-table.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-linkage-table.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-lu-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-invalid-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-missing-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/not-json-extension.txt
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-first-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-pairs-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-second-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-first-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-pairs-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-second-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/read-entity-summary-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-empty-data-entry.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-empty-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-external.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-internal.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-multiple.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-none.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-multiple-namespace-elements.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-single-namespace-element.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-two-summary-types.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/id-table.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/io.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/linkage.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/permissions.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/round-trip.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/summary-data.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/top-level.test
M clang/unittests/ScalableStaticAnalysisFramework/Serialization/JSONFormatTest/LUSummaryTest.cpp
Log Message:
-----------
[clang][ssaf] Convert `JSONFormat` tests for `LUSummary` and `LUSummaryEncoding` to lit tests (#192738)
Commit: 8e4b90f8cae583e3f7212b30c2c86c5b0fcb7499
https://github.com/llvm/llvm-project/commit/8e4b90f8cae583e3f7212b30c2c86c5b0fcb7499
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Log Message:
-----------
[clang][StaticAnalyzer] Optimize standard-library summaries for size (#202662)
StdLibraryFunctionsChecker::initFunctionSummaries is a large one-time
initialization routine. Its initializer-list construction is cold, but
optimizing it for speed causes extensive inlining and repeated
construction code in the binary.
Mark initFunctionSummaries with LLVM_ATTRIBUTE_MINSIZE so the optimizer
keeps the existing table construction out of line and selects
size-oriented code generation. Analyzer behavior and the runtime summary
representation are unchanged.
In the LLVM 22 Bazel build, standalone clang decreases from 130,098,288
to 130,015,696 bytes (-82,592), and stripped clang decreases from
108,098,128 to 107,999,520 bytes (-98,608).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: dcf9adde9375a9843d90cf8df6d2e0a0e498b0ed
https://github.com/llvm/llvm-project/commit/dcf9adde9375a9843d90cf8df6d2e0a0e498b0ed
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/issue-write.yml
A .github/workflows/test-suite.yml
A .github/workflows/test-suite/aarch64.cmake
A .github/workflows/test-suite/configure-and-build.sh
A .github/workflows/test-suite/llvm.cmake
A .github/workflows/test-suite/riscv64.cmake
A .github/workflows/test-suite/x86_64.cmake
Log Message:
-----------
[Github][RFC] Add workflow to diff codegen on llvm-test-suite (#190010)
A common task when reviewing PRs in the LLVM subproject is checking out
the PR locally, building it, running it on some benchmarks e.g.
llvm-test-suite, and comparing the codegen against some known version.
The process is fairly laborious so this PR adds a GitHub workflow to
automate it. It's triggered by commenting "/test-suite" on a PR. The
workflow will kick off, build clang with the head and base of the PR,
build the benchmarks in llvm-test-suite for several configurations with
each version of clang, compute the diff in the output assembly via the
[tdiff.py
script](https://github.com/llvm/llvm-test-suite/blob/main/utils/tdiff.py),
and then report back with the diffs in a comment.
Here's an example on my fork where you can see the diff of a codegen
change in the RISC-V backend:
https://github.com/lukel97/llvm-project/pull/7#issuecomment-4283315532
At the moment it's very simple but could be fleshed out later. Currently
it builds llvm-test-suite for handful of common configurations, some
cross-compiled:
- `-target aarch64-linux-gnu -march=armv9-a -O3`
- `-target riscv64-linux-gnu -march=rva23u64 -O3`
- `-target x86_64-linux-gnu -O3`
We could eventually extend this to accept arbitrary targets and flags in
the comment. It would also be nice to support LTO diffs in future but we
will need to add some extra support in llvm-test-suite to extract the
asm during the link step.
It also just comments a link to download the codegen diffs, but could
eventually also include some output from the ./utils/compare.py script
about e.g. changes in code size or statistics. For now, those results
are just uploaded as an artifact.
In terms of worker resources, running it on the free GitHub hosted
workers is good enough. Building Clang takes a while, over an hour, but
building the test-suite only takes around 10 minutes. But we could stick
it on something beefier if we wanted the feedback to be faster.
This workflow requires the PR to be mergeable, as it wants to get the
diff of the "mergeability" commit that GitHub generates for each PR.
That way the diff is always between the latest version of the base
branch and the PR, not the base branch at the time the PR was created.
Commit: e5d74b05e324953397fcaab5df3c50f330d85875
https://github.com/llvm/llvm-project/commit/e5d74b05e324953397fcaab5df3c50f330d85875
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M runtimes/cmake/config-Fortran.cmake
Log Message:
-----------
[flang-rt][cmake] Fix Windows build with CMAKE_Fortran_SIMULATE_ID (#202981)
The PR #198205 sets CMAKE_Fortran_SIMULATE_ID to "GNU", since Flang has
no alternative driver such as an equivalent to clang-cl. But it breaks
the Windows build with
```
LINK : warning LNK4044: unrecognized option '/lpsapi'; ignored
LINK : warning LNK4044: unrecognized option '/lshell32'; ignored
LINK : warning LNK4044: unrecognized option '/lole32'; ignored
LINK : warning LNK4044: unrecognized option '/luuid'; ignored
LINK : warning LNK4044: unrecognized option '/ladvapi32'; ignored
LINK : warning LNK4044: unrecognized option '/lws2_32'; ignored
LINK : warning LNK4044: unrecognized option '/lntdll'; ignored
LINK : warning LNK4044: unrecognized option '/ldelayimp'; ignored
```
The reason is interesting. With CMAKE_Fortran_SIMULATE_ID=GNU, CMake
will include the Windows-GNU.cmake
platform file. That file overwrites CMAKE_LINK_LIBRARY_FLAG with
`-l` which is GNU convention for the linker flag. But since
CMAKE_LINK_LIBRARY_FLAG is global (in contrast to a per-language
setting), it changes the flags for link.exe/lld-link.exe even when
compiling C/C++ applications. CMake internally converts `-l` to `/l` for
convenience.
Set CMAKE_Fortran_SIMULATE_ID to the same as CMAKE_CXX_SIMULATE_ID as
originally proposed in #198205. While flang.exe is a GNU-style driver,
setting it to "MSVC" still works, probably because there is no
alternative set of flags for Flang. Also define some additional
variables that CMake stores in `CMakeFortranCompiler.cmake` in the build
directory when CMake is allowed to introspect the Flang driver itself.
Should fix the buildbots
flang-arm64-windows-msvc-testsuite,
flang-arm64-windows-msvc,
flang-x86_64-windows
Commit: f3d5fda2faef6d7098f8dfb2b0278e2a278c83e6
https://github.com/llvm/llvm-project/commit/f3d5fda2faef6d7098f8dfb2b0278e2a278c83e6
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Fix ECHO_TO_FILE/ECHO_APPEND_FILE (#202968)
The Windows recipes for these macros were printf "%s\n" $(1). The
callers wrap content in single quotes (for the POSIX printf), but the
test recipes run under cmd.exe on Windows, which keeps the single quotes
literal and word-splits on spaces, and the bundled printf additionally
mangles backslashes and spaces. The result is garbage generated files
(e.g. a modulemap whose first line is 'module, or a truncated SDK path
from a "Program Files" directory).
Write the file with cmd's echo after stripping the callers' single
quotes. echo runs in the recipe shell, so unlike GNU make's $(file ...)
it still works after a preceding MKDIR_P in the same recipe.
This is a reland of https://github.com/llvm/llvm-project/pull/202612
which add the changes in the wrong if/else branch.
rdar://179218545
Commit: 750701257bd9010d97fd4d680d749e13c21db803
https://github.com/llvm/llvm-project/commit/750701257bd9010d97fd4d680d749e13c21db803
Author: Abhinav Garg <abhinav.garg at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
Log Message:
-----------
[AMDGPU][GISEL] Adding new reg bank select rules for G_DYN_STACKALLOC (#200369)
Add register bank selection and legalization support for
G_DYN_STACKALLOC in the new RegBankLegalize framework.
Commit: 5fba4d0bcc2355cbec1f73ad052acfd54a98dd3f
https://github.com/llvm/llvm-project/commit/5fba4d0bcc2355cbec1f73ad052acfd54a98dd3f
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Fix whitespace in test-suite.yml (#202992)
Commit: b7da9565017e32c18b927a7637714d1b660b558d
https://github.com/llvm/llvm-project/commit/b7da9565017e32c18b927a7637714d1b660b558d
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/release-doxygen.yml
M bolt/docs/CMakeLists.txt
M bolt/docs/doxygen.cfg.in
M clang-tools-extra/docs/CMakeLists.txt
M clang-tools-extra/docs/doxygen.cfg.in
M clang/docs/CMakeLists.txt
M clang/docs/doxygen.cfg.in
M cmake/Modules/HandleDoxygen.cmake
M flang/CMakeLists.txt
M flang/docs/CMakeLists.txt
M flang/docs/doxygen.cfg.in
M lldb/docs/CMakeLists.txt
M lldb/docs/doxygen.cfg.in
M llvm/CMakeLists.txt
M llvm/docs/CMakeLists.txt
M llvm/docs/doxygen.cfg.in
M mlir/docs/CMakeLists.txt
M mlir/docs/doxygen.cfg.in
M openmp/docs/CMakeLists.txt
M openmp/docs/doxygen.cfg.in
M polly/docs/CMakeLists.txt
M polly/docs/doxygen.cfg.in
Log Message:
-----------
[docs] update CI to use latest release of doxygen (#202420)
Resubmitting https://github.com/llvm/llvm-project/pull/191501 for
review, with added https://github.com/llvm/llvm-project/pull/202404 for
SHA checksum verification and fix for cmake target name conflicts.
Tested with `./llvm/utils/release/build-docs.sh -no-sphinx` locally.
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 3c342a4c2df5c66fe5b1698425986d4e210d7fbb
https://github.com/llvm/llvm-project/commit/3c342a4c2df5c66fe5b1698425986d4e210d7fbb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP][NFC]Add another memory alias test, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/202995
Commit: 1f0c41367bf42fc335ce10b267080a491327bba2
https://github.com/llvm/llvm-project/commit/1f0c41367bf42fc335ce10b267080a491327bba2
Author: Lucas Ramirez <11032120+lucas-rami at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/unittests/CodeGen/RematerializerTest.cpp
Log Message:
-----------
[CodeGen] Gate rematerializer unit tests on AMDGPU target being enabled (#202966)
Issue introduced in #197575. Initialization functions for the AMDGPU
target only work if the target is enabled.
Commit: 006d3f84ee80b1d5d51de7bc7c2cdf60d322ef9f
https://github.com/llvm/llvm-project/commit/006d3f84ee80b1d5d51de7bc7c2cdf60d322ef9f
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Use require-team-membership workflow for test-suite.yml (#202997)
The workflow doesn't have org-level permissions so the
getMembershipForUserInOrg api call fails. Reuse the new
require-team-membership workflow instead.
Commit: d88791498d2ba453a393ea72a3dc76384f8a7804
https://github.com/llvm/llvm-project/commit/d88791498d2ba453a393ea72a3dc76384f8a7804
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
A llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling-no-outstanding.ll
Log Message:
-----------
[AMDGPU][SIInsertWaitcnts] Fix underflow in expand-waitcnt-profiling when Outstanding is 0 on Pre-GFX12 (#202465)
When -amdgpu-expand-waitcnt-profiling expands a wait and the number of
outstanding operations for a counter is 0, "--Outstanding" wraps 0 to
UINT_MAX looping ~4 billion times. -amdgpu-waitcnt-forcezero
deterministically requests an all-zero wait even when nothing is
outstanding (e.g. before the first instruction), exercising that edge.
The GFX12+ generator already guarded against the wrap; this does the
same for PreGFX12.
The test in this PR should show the existing infinite loop problem that
this PR aims to fix.
Commit: 2683d309e1c3fec684b691486ad85822f05f27f4
https://github.com/llvm/llvm-project/commit/2683d309e1c3fec684b691486ad85822f05f27f4
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Use converted vector type in VectorStoreOpConverter (#202962)
Mirror VectorLoadOpConverter implementation and fix the crash
Convert the vector type before building the bitcast pointer so emulated
element types (like index) do not produce type mismatch
Commit: c54fae14c05d312bddd744c86bd894057ff5956d
https://github.com/llvm/llvm-project/commit/c54fae14c05d312bddd744c86bd894057ff5956d
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Move permissions check to separate job in test-suite.yml (#203002)
Copy what's done in libcxx-run-benchmarks.yml. Also checkout the llvm
repo beforehand.
Commit: 687b4c8ed4fe3b3cd8b4f23f5968f00dfdacfe82
https://github.com/llvm/llvm-project/commit/687b4c8ed4fe3b3cd8b4f23f5968f00dfdacfe82
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
Log Message:
-----------
[FunctionAttrs] Remove unused legacy-PM runImpl template (NFC) (#202983)
`runImpl` here is a leftover from the legacy pass manager (it takes
`CallGraphSCC`), with no callers since the legacy PM was removed. It
never instantiates, so it trips `-Wunused-template`. Removing the dead
template.
NFC.
Part of #202945.
Commit: f281b029ab91e65fd482405aab08cfe8954993b8
https://github.com/llvm/llvm-project/commit/f281b029ab91e65fd482405aab08cfe8954993b8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
Log Message:
-----------
[SPIR-V] Fix result type deduction for sub-byte G_TRUNC (#202717)
G_TRUNC fell through to the default operand-based deduction, so a
sub-byte truncation inherited its wider source type and fed an ill-typed
value into i32 consumers
Commit: 9f45efe69a3f744588780e132064d3bba3de1bfe
https://github.com/llvm/llvm-project/commit/9f45efe69a3f744588780e132064d3bba3de1bfe
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Add main-branch-only environment to test-suite.yml permissions check (#203004)
Commit: caea959905154fa29032296678cda1caaa0a64bc
https://github.com/llvm/llvm-project/commit/caea959905154fa29032296678cda1caaa0a64bc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__expected/expected.h
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/disjunction.h
R libcxx/include/__type_traits/lazy.h
M libcxx/include/module.modulemap.in
M libcxx/include/tuple
Log Message:
-----------
[libc++] Remove _Lazy (#202303)
We don't actually need to evaluate anything as lazily as `_Lazy` does or
we can achieve the same amount of laziness in other ways, so we can get
rid of it. This was required previously in some places due to a Clang
bug, which has been resolved and implemented by all compilers we
support.
Commit: 2fa0d3197e8d5401abd8252ca7971b6dc7f9a545
https://github.com/llvm/llvm-project/commit/2fa0d3197e8d5401abd8252ca7971b6dc7f9a545
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/Contributing.rst
Log Message:
-----------
[clang-tidy] Add newline style note to contributing guide. NFC. (#202999)
Recently I found around 10 checks that hardcode `\n` in their fix-its.
This is not ideal, the generated fix-it should probably preserve the
newline style of the file, rather than always inserting LF. Otherwise,
applying a fix-it may unexpectedly change part of a CRLF file to LF.
This commit documents this expectation in contributing guide.
Commit: 71a19716198adcd11c67d6a433e37b2d87afe4f1
https://github.com/llvm/llvm-project/commit/71a19716198adcd11c67d6a433e37b2d87afe4f1
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Verifier.cpp
Log Message:
-----------
[IR] Remove unused and mark debug-only verifier templates (NFC) (#202975)
Two verifier templates trip `-Wunused-template`.
In `Verifier.cpp`, `isValidMetadataArray` is a leftover declaration with
no definition and no callers, so it's removed. In
`SafepointIRVerifier.cpp`, `PrintValueSet` is only used inside
`LLVM_DEBUG`, so it gets compiled out in release builds and never
instantiates; it's marked `[[maybe_unused]]`.
NFC.
Part of #202945.
Commit: 9cc82cf29405683b9813350bb68f3fed9732eb70
https://github.com/llvm/llvm-project/commit/9cc82cf29405683b9813350bb68f3fed9732eb70
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Remove old permissions call from test-suite.yml (#203006)
Commit: 12089b1cc56d24d75bf1294a9f64e8a72a50709f
https://github.com/llvm/llvm-project/commit/12089b1cc56d24d75bf1294a9f64e8a72a50709f
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/docs/ProgrammersManual.rst
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Support/StringMap.cpp
M llvm/lib/Transforms/IPO/StripSymbols.cpp
M llvm/unittests/ADT/StringMapTest.cpp
M llvm/utils/gdb-scripts/prettyprinters.py
Log Message:
-----------
Revert "[StringMap] Invalidate iterators in remove() (#203003)
This reverts commit
https://github.com/llvm/llvm-project/commit/bccd1b9cb744e5dd96ee59baa4bf4583457feea3.
and
https://github.com/adrian-prantl/llvm-project/commit/9dfcf7663b1604ae5ced030a69e2be0e93632d5e.
They breaks the LLDB bots:
https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake/22124/
Commit: 90297b8aa167248e7bf73a384476d12218b9375b
https://github.com/llvm/llvm-project/commit/90297b8aa167248e7bf73a384476d12218b9375b
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
A llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
Log Message:
-----------
[AMDGPU] Fix wrong truth table in BitOp3_Op for shared sub-expressions. (#198556)
When the LHS and RHS of a boolean node share a common sub-expression,
LHS recursion can decompose that shared node via the "replace parent
operator" mechanism in getOperandBits (Src[I] = Op where Src[I] == In).
This replaces the Src slot that RHS was originally mapped to with a
sub-operand. If RHS recursion then fails to re-derive its own
decomposition, RHSBits still refers to the old slot index — but the slot
now holds a different value, producing an incorrect truth table.
Fix this by tracking which Src slot RHS occupies before LHS recursion.
If RHS recursion fails and that specific slot was modified, roll back
Src and the bit assignments to the pre-recursion state.
Add a test to show a specific example.
Assisted-by: Cursor (Claude)
Commit: 0bb5833071e9684e53f112b3351224b5dbab2218
https://github.com/llvm/llvm-project/commit/0bb5833071e9684e53f112b3351224b5dbab2218
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/ids-check.yml
M llvm/utils/git/ids-check-helper.py
Log Message:
-----------
[ids-check] Update the workflow and script (#199710)
In compnerd/ids#58, support was added to parse a header file using a
given source file's flags. This solves many of the issues we had
encountered with the `ids-check-helper.py` script and its corresponding
workflow.
* Update ids to the current version, which includes the `--main-file`
changes.
* Use a more recent LLVM compiler to build a subset of LLVM.
* Build a subset of LLVM targets to properly parse more header files.
* Use the `--main-file` argument when invoking `idt`.
* Add explicit overrides and exclude header lists.
This was tested on every public header in LLVM and forthcoming PRs will
land the changes found with the updated script. Once all of the headers
have been updated, the workflow will be re-enabled. This effort is
tracked in #109483.
Commit: 2b836309b4090cc5001167282a3689d860bafae3
https://github.com/llvm/llvm-project/commit/2b836309b4090cc5001167282a3689d860bafae3
Author: Egor Zhdan <e_zhdan at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Sema/SemaAPINotes.cpp
Log Message:
-----------
[APINotes] Early return when no apinotes files are loaded
When no APINotes readers are available, let's not spend time trying to
determine the current decl's context or do other redundant work.
Resolves https://github.com/llvm/llvm-project/issues/202214
Commit: 8035ae5f42959a0325d5438e63011587950f43a7
https://github.com/llvm/llvm-project/commit/8035ae5f42959a0325d5438e63011587950f43a7
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSetByValParamAlign.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMProperties.cpp
M llvm/lib/Target/NVPTX/NVVMProperties.h
M llvm/test/CodeGen/NVPTX/nvvm-annotations-D120129.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
A llvm/test/CodeGen/NVPTX/ret-align-mismatch.ll
Log Message:
-----------
[NVPTX] Cleanup and refactor param align computation, addressing a few minor bugs and discrepancies (#188588)
Commit: d5364060df42ca6a401439f16c094336ab019519
https://github.com/llvm/llvm-project/commit/d5364060df42ca6a401439f16c094336ab019519
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip unused SetOperations hdr (NFC) (#202993)
Commit: f5a429456f3375c8d2e1a2a0b768cd0ee6651f1d
https://github.com/llvm/llvm-project/commit/f5a429456f3375c8d2e1a2a0b768cd0ee6651f1d
Author: ivanrodriguez3753 <48269053+ivanrodriguez3753 at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
A flang/test/Semantics/declaration-explicit-array-bounds.f90
Log Message:
-----------
[flang][semantic] parser node types and rewrite for explicit-shape-bounds-spec (#188447)
This commit lays the groundwork for semantic analysis of rank-1 integer array expressions being used as bounds in a declaration with explicit bounds.
Commit: 652915c8bb58dc5e8370fe417f64949207c0f593
https://github.com/llvm/llvm-project/commit/652915c8bb58dc5e8370fe417f64949207c0f593
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc.ll
Log Message:
-----------
[InstCombine] Preserve no wrap kinds for trunc in EvaluateInDifferentType (#202233)
proof: https://alive2.llvm.org/ce/z/M2ghfG
Commit: 8342bf926db0436f0a64f69b4b38238e4fa78ae9
https://github.com/llvm/llvm-project/commit/8342bf926db0436f0a64f69b4b38238e4fa78ae9
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
M mlir/test/Dialect/OpenACC/invalid-cg.mlir
M mlir/test/Dialect/OpenACC/ops-cg.mlir
Log Message:
-----------
[mlir][acc] Add acc.predicate_region for redundant/single semantics (#203011)
Add acc.predicate_region, an intermediate codegen operation that groups
statements at intermediate points in a loop nest within
acc.compute_region. OpenACC distinguishes partitioned loop execution
from single and redundant execution at nest transitions: for example,
gang-redundant code runs on all gangs but not as partitioned gang-loop
iterations, and worker-single or vector-single code runs on one worker
or vector lane rather than across the full worker or vector partition.
This grouping marks code whose execution scope differs from surrounding
partitioned loops, so predication and synchronization can be applied
correctly during lowering.
Commit: 5784cd3d997c84b42f6eda733949dc260b322170
https://github.com/llvm/llvm-project/commit/5784cd3d997c84b42f6eda733949dc260b322170
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
Log Message:
-----------
AMDGPU/UniformityAnalysis: For G_AMDGPU_WHOLE_WAVE_FUNC_SETUP, always divergent (#203000)
Commit: 3443243ded167229ddc37e64b7e754854ae1ba2c
https://github.com/llvm/llvm-project/commit/3443243ded167229ddc37e64b7e754854ae1ba2c
Author: Jerry Shih <bignose1007 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/test/Dialect/Linalg/canonicalize.mlir
Log Message:
-----------
[mlir][linalg] add more pattern to fold pack op padding_value. (#198468)
No padding is needed for unit tile size.
Commit: 22cdece9e73a303253dc1b655dc4269dc3e8b79c
https://github.com/llvm/llvm-project/commit/22cdece9e73a303253dc1b655dc4269dc3e8b79c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CSKYToolChain.cpp
M clang/lib/Driver/ToolChains/CSKYToolChain.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Fuchsia.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSP430.cpp
M clang/lib/Driver/ToolChains/MSP430.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/NetBSD.h
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Driver/ToolChains/SPIRVOpenMP.cpp
M clang/lib/Driver/ToolChains/SPIRVOpenMP.h
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/ToolChains/VEToolchain.cpp
M clang/lib/Driver/ToolChains/VEToolchain.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/WebAssembly.h
M clang/lib/Driver/ToolChains/XCore.cpp
M clang/lib/Driver/ToolChains/XCore.h
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Driver/ToolChains/ZOS.h
Log Message:
-----------
clang: Add BoundArch argument to addClangTargetOptions (#196504)
addClangTargetOptions already has an OffloadKind argument,
but it kind of doesn't make sense for any function to know the
OffloadKind, but not the associated BoundArch.
The current process is kind of convoluted. TranslateArgs
synthesizes a -mcpu argument from BoundArch, and later
addClangTargetOptions re-parses that -mcpu argument each
time it wants the architecture. Add this argument so this
can be cleaned up in a future change.
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: ebcb4cee9d37a383c9668ddecc818cbe728a3c02
https://github.com/llvm/llvm-project/commit/ebcb4cee9d37a383c9668ddecc818cbe728a3c02
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
Log Message:
-----------
[AMDGPU][GISel] Handle G_AMDGPU_COPY_VCC_SCC in isLaneMaskFromSameBlock (#202923)
This avoids generating some redundant ANDs with exec.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 90545897c07094221c202b959f6192cfb624f94b
https://github.com/llvm/llvm-project/commit/90545897c07094221c202b959f6192cfb624f94b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
Log Message:
-----------
[X86] combineTargetShuffle - fold vpermv3(widen(x),mask,widen(y)) -> vpermv(widen(concat(x,y)),mask') (#203031)
We already handle the case where the src vectors were half size, but we
can generalize this to widening from xmm to zmm as well - mainly to help
non-VLX builds
A couple of codesize increases in non-VLX builds - mostly from
additional asm / kill comments, but also due to a couple of poor folds
in combineConcatVectorOps that need further yak shaving.
Commit: f30f721f7e5f38b2327b443a462f8cf7791e4b73
https://github.com/llvm/llvm-project/commit/f30f721f7e5f38b2327b443a462f8cf7791e4b73
Author: cmtice <cmtice at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
Log Message:
-----------
[LLDB] Update DIL assignment test to not break on arm-32. (#203007)
Test included a case that was not valid on arm-32. This removes that
case.
Commit: 826a4840096630bb8a84c4d7dbe9e3c5970cb511
https://github.com/llvm/llvm-project/commit/826a4840096630bb8a84c4d7dbe9e3c5970cb511
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Remove CheckSymbolName{,s}, NFC (#202811)
These functions checked if each OmpObject had a symbol, and emitted a
diagnostic if not. Name not having a symbol is an internal compiler
error (which will be detected separately), and not something actionable
for the user.
Remove these functions since they don't serve any purpose anymore.
Commit: cb78ee9c55cf1b48f3c8d17cf34353bd26c4c5a1
https://github.com/llvm/llvm-project/commit/cb78ee9c55cf1b48f3c8d17cf34353bd26c4c5a1
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for WHOLE_WAVE_FUNC setup and return (#203001)
Commit: e1abcb00a5d897987d71fcb012a5aaa928b826b8
https://github.com/llvm/llvm-project/commit/e1abcb00a5d897987d71fcb012a5aaa928b826b8
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.h
Log Message:
-----------
[clang] restore Alloca from CreateAggTemp (#202978)
Noticed in post-review feedback on #200427
Commit: 06cc1baa0e0eced548df56e3f1fdb7df10e4fd86
https://github.com/llvm/llvm-project/commit/06cc1baa0e0eced548df56e3f1fdb7df10e4fd86
Author: Peter Collingbourne <pcc at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
lsan: Document that ptrace_scope needs to be disabled.
As far as I'm aware, this is the reason why
http://45.33.8.238/linux/201640/step_9.txt is failing.
Reviewers: vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/202838
Commit: 939860e16212b40ae1f15cb5dc360eaf653cec2d
https://github.com/llvm/llvm-project/commit/939860e16212b40ae1f15cb5dc360eaf653cec2d
Author: adams381 <adams at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/test/CIR/CodeGen/inline-asm.c
Log Message:
-----------
[CIR] Fix inline asm operand-attr indexing (#202790)
Inline asm with a register operand ordered before a memory operand, e.g. `asm("" :: "r"(i), "m"(g))`, crashes CIRGen at the `"pointer type expected"` / `"element type differs from pointee type"` assertions in `emitAsmStmt`.
The element-type-attribute loop walks `argElemTypes` with a counter that only advances on entries that have an element type, but uses that counter to index the parallel `args` array. The two arrays are the same length (every operand pushes to both, and `assert(args.size() == operandAttrs.size())` enforces it), so the matching value for `argElemTypes[k]` is `args[k]`. As soon as a register operand (null element type) precedes a memory operand (non-null), the counter desyncs and reads the wrong operand — a non-pointer, or a pointer with the wrong pointee.
The fix indexes `args` positionally with `llvm::enumerate`, matching classic CodeGen in `CGStmt.cpp`, which iterates `llvm::enumerate(ArgElemTypes)` and attaches the element-type attribute at `Pair.index()`. New `t35` in `inline-asm.c` covers the register-before-memory ordering and checks the lowered IR against classic codegen.
Commit: c5c33597bfdba185a6f8d04c0330e386a2e52abf
https://github.com/llvm/llvm-project/commit/c5c33597bfdba185a6f8d04c0330e386a2e52abf
Author: Justin T. Gibbs <gibbs at scsiguy.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M compiler-rt/lib/asan/CMakeLists.txt
Log Message:
-----------
[asan] Fix asan_new_delete.cpp C++ header resolution under -nostdinc++ (#202816)
The COMPILER_RT_ASAN_ENABLE_EXCEPTIONS gate in asan/CMakeLists.txt
enables -fexceptions on the C++ slice (RTAsan_cxx /
RTAsan_dynamic_cxx — asan_new_delete.cpp) and tries to expose C++
standard headers to that TU (for forthcoming std::bad_alloc support)
by stripping -nostdinc++ from its cflags. The strip works for native
standalone builds but is wrong for cross builds: the host C++ headers
aren't valid for the target.
Split the C++-slice flag handling into two paths inside the existing
EXCEPTIONS gate:
* In-tree libc++ available (TARGET cxx-headers OR HAVE_LIBCXX):
keep -nostdinc++, append ${COMPILER_RT_CXX_CFLAGS} (a generator
expression that expands to "-isystem <prepared cxx-headers dir>"),
and add cxx-headers to DEPS so the header tree is staged before
the compile. Mirrors the pattern in orc / fuzzer / memprof /
tsan / xray.
* No in-tree libc++ (typical standalone build): drop -nostdinc++
for the C++ slice TU only so the host toolchain supplies C++ headers.
Reject COMPILER_RT_CXX_LIBRARY=none +
COMPILER_RT_ASAN_ENABLE_EXCEPTIONS=ON
at configure time: that combination opts out of any C++ stdlib while
asking for an exception-enabled C++ slice, silently leaking host headers
into a `none`-mode build.
Assisted by: Claude Opus 4.7
Commit: dc2a534ba625c7c44dea88b10d6763674bb564ae
https://github.com/llvm/llvm-project/commit/dc2a534ba625c7c44dea88b10d6763674bb564ae
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/abi-lower-after-unreachable.cpp
M clang/test/CIR/CodeGen/abstract-cond.c
M clang/test/CIR/CodeGen/agg-expr-lvalue.c
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/assume-attr.cpp
M clang/test/CIR/CodeGen/atomic-thread-fence.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/base-to-derived.cpp
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binassign.c
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/bitfield-union.c
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGen/call-via-class-member-funcptr.cpp
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/cast-cxx20.cpp
M clang/test/CIR/CodeGen/cast.c
M clang/test/CIR/CodeGen/cast.cpp
M clang/test/CIR/CodeGen/choose-expr.cpp
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/cleanup-automatic-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/cleanup-derived-to-base-ref.cpp
M clang/test/CIR/CodeGen/cleanup-scope-goto-out.cpp
M clang/test/CIR/CodeGen/cleanup-scope-goto-within.cpp
M clang/test/CIR/CodeGen/cleanup-scope-tmp-with-exception.cpp
M clang/test/CIR/CodeGen/cleanup-scope-tmp.cpp
M clang/test/CIR/CodeGen/cleanup-throw-from-cleanup.cpp
M clang/test/CIR/CodeGen/cleanup-throwing-dtor.cpp
M clang/test/CIR/CodeGen/cleanup.cpp
M clang/test/CIR/CodeGen/cmp.cpp
M clang/test/CIR/CodeGen/comma.c
M clang/test/CIR/CodeGen/complex-atomic-cast.c
M clang/test/CIR/CodeGen/complex-builtins.cpp
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex-plus-minus.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/compound_literal.cpp
M clang/test/CIR/CodeGen/concept-specialization.cpp
M clang/test/CIR/CodeGen/constant-expr.cpp
M clang/test/CIR/CodeGen/copy-constructor.cpp
M clang/test/CIR/CodeGen/coro-exceptions.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/count-of.c
M clang/test/CIR/CodeGen/ctor-alias-prev-decl.cpp
M clang/test/CIR/CodeGen/ctor-alias.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CIR/CodeGen/cxx-conversion-operators.cpp
M clang/test/CIR/CodeGen/cxx-default-init.cpp
M clang/test/CIR/CodeGen/cxx-rewritten-binary-operator.cpp
M clang/test/CIR/CodeGen/cxx-traits.cpp
M clang/test/CIR/CodeGen/cxx23-explicit-object-member.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
M clang/test/CIR/CodeGen/deferred-fn-defs.cpp
M clang/test/CIR/CodeGen/delegating-ctor-exceptions.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
M clang/test/CIR/CodeGen/delete-array.cpp
M clang/test/CIR/CodeGen/delete-destroying.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/derived-to-base.cpp
M clang/test/CIR/CodeGen/destructors.cpp
M clang/test/CIR/CodeGen/dtor-alias-prev-decl.cpp
M clang/test/CIR/CodeGen/dtor-alias.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/embed-expr.c
M clang/test/CIR/CodeGen/empty-union.c
M clang/test/CIR/CodeGen/empty-union.cpp
M clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/forrange.cpp
M clang/test/CIR/CodeGen/generic-selection.c
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
M clang/test/CIR/CodeGen/gnu-null.cpp
M clang/test/CIR/CodeGen/gnu-ptr-math.c
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/implicit-return-zero.c
M clang/test/CIR/CodeGen/implicit-value-init-expr.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/init-list-lvalue.cpp
M clang/test/CIR/CodeGen/initializer-list-two-pointers.cpp
M clang/test/CIR/CodeGen/inline-asm.c
M clang/test/CIR/CodeGen/inline-cxx-func.cpp
M clang/test/CIR/CodeGen/instantiate-init.cpp
M clang/test/CIR/CodeGen/kr-func-promote.c
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/label.c
M clang/test/CIR/CodeGen/lambda-decomp-decl-captures.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker-agg-return.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/launder.cpp
M clang/test/CIR/CodeGen/local-vars.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGen/mem-expr-fn.cpp
M clang/test/CIR/CodeGen/member-functions.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/CIR/CodeGen/new-array-in-ternary.cpp
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/new-delete.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/noexcept.cpp
M clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/nullptr-init.cpp
M clang/test/CIR/CodeGen/opaque.c
M clang/test/CIR/CodeGen/opaque.cpp
M clang/test/CIR/CodeGen/openmp_default_simd_align.c
M clang/test/CIR/CodeGen/pack-indexing.cpp
M clang/test/CIR/CodeGen/paren-init-list-eh.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/pass-object-size.c
M clang/test/CIR/CodeGen/placement-new.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGen/replace-global.cpp
M clang/test/CIR/CodeGen/requires-expr.cpp
M clang/test/CIR/CodeGen/self-assign.c
M clang/test/CIR/CodeGen/size-of-vla.cpp
M clang/test/CIR/CodeGen/source-loc.cpp
M clang/test/CIR/CodeGen/statement-exprs.c
M clang/test/CIR/CodeGen/static-local-arm-guard.cpp
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/stmt-expr.cpp
M clang/test/CIR/CodeGen/string-literals.cpp
M clang/test/CIR/CodeGen/struct-init.cpp
M clang/test/CIR/CodeGen/struct.c
M clang/test/CIR/CodeGen/struct.cpp
M clang/test/CIR/CodeGen/switch-cleanup.cpp
M clang/test/CIR/CodeGen/switch.cpp
M clang/test/CIR/CodeGen/switch_flat_op.cpp
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
M clang/test/CIR/CodeGen/temporary-materialization-adjust.cpp
M clang/test/CIR/CodeGen/temporary-materialization.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/thread-local-in-func.cpp
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/throws.cpp
M clang/test/CIR/CodeGen/thunks.cpp
M clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
M clang/test/CIR/CodeGen/try-catch-all-with-cleanup.cpp
M clang/test/CIR/CodeGen/try-catch-non-trivial-copy.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
M clang/test/CIR/CodeGen/try-no-throwing-calls.cpp
M clang/test/CIR/CodeGen/typedef.c
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/union-agg-init.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
M clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
M clang/test/CIR/CodeGen/virtual-function-calls.cpp
M clang/test/CIR/CodeGen/vla-pointer-arith.c
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-address-of.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bcopy.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-call.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
M clang/test/CIR/CodeGenBuiltins/builtin-offset-of.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-prefetch.c
M clang/test/CIR/CodeGenBuiltins/builtin-printf.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-setjmp-longjmp.c
M clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCUDA/device-printf.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/lvalue-nttp.cpp
M clang/test/CIR/CodeGenCXX/new-array-init-list-non-trivial-dtor.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
M clang/test/CIR/CodeGenCXX/simple-reinterpret-const-cast.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
M clang/test/CIR/CodeGenCXX/typeid.cpp
M clang/test/CIR/CodeGenCXX/vtable-virt-thunk-adj.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-read.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-write.cpp
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
M clang/test/CIR/CodeGenOpenCL/address-space-local-var.clcpp
M clang/test/CIR/CodeGenOpenCL/as_type.cl
M clang/test/CIR/CodeGenOpenCL/vector.cl
M clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/IR/alloca.cir
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/array.cir
M clang/test/CIR/IR/binassign.cir
M clang/test/CIR/IR/bitfield_info.cir
M clang/test/CIR/IR/cmp.cir
M clang/test/CIR/IR/construct-catch-param.cir
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/indirect-br.cir
M clang/test/CIR/IR/inline-asm.cir
M clang/test/CIR/IR/invalid-complex.cir
M clang/test/CIR/IR/invalid-construct-catch-param.cir
M clang/test/CIR/IR/invalid-data-member.cir
M clang/test/CIR/IR/invalid-throw.cir
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/lifetime.cir
M clang/test/CIR/IR/method-attr.cir
M clang/test/CIR/IR/resume-flat.cir
M clang/test/CIR/IR/struct.cir
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/unary.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/address-space.cir
M clang/test/CIR/Lowering/alloca.cir
M clang/test/CIR/Lowering/binop-bool.cir
M clang/test/CIR/Lowering/binop-fp.cir
M clang/test/CIR/Lowering/binop-signed-int.cir
M clang/test/CIR/Lowering/binop-unsigned-int.cir
M clang/test/CIR/Lowering/cast.cir
M clang/test/CIR/Lowering/goto.cir
M clang/test/CIR/Lowering/inline-asm.cir
M clang/test/CIR/Lowering/lifetime.cir
M clang/test/CIR/Lowering/omp-target-map.cir
M clang/test/CIR/Lowering/resume-flat.cir
M clang/test/CIR/Lowering/switch.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-int-to-record.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-return-larger.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-to-int.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-to-record-via-memory.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-vector-to-complex.cir
M clang/test/CIR/Transforms/canonicalize.cir
M clang/test/CIR/Transforms/complex-create-fold.cir
M clang/test/CIR/Transforms/complex-imag-fold.cir
M clang/test/CIR/Transforms/complex-real-fold.cir
M clang/test/CIR/Transforms/eh-abi-lowering-construct-catch-invalid.cir
M clang/test/CIR/Transforms/eh-abi-lowering-construct-catch.cir
M clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-eh.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-multi-exit.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-simple.cir
M clang/test/CIR/Transforms/flatten-throwing-in-cleanup.cir
M clang/test/CIR/Transforms/flatten-try-op.cir
M clang/test/CIR/Transforms/goto_solver.cir
M clang/test/CIR/Transforms/hoist-allocas.cir
M clang/test/CIR/Transforms/mem2reg.cir
M clang/test/CIR/Transforms/scope.cir
M clang/test/CIR/Transforms/switch-fold.cir
M clang/test/CIR/Transforms/switch.cir
M clang/test/CIR/Transforms/ternary-fold.cir
M clang/test/CIR/Transforms/ternary.cir
M clang/test/CIR/Transforms/vector-extract-fold.cir
M clang/test/CIR/func-simple.cpp
M clang/unittests/CIR/PointerLikeTest.cpp
Log Message:
-----------
[CIR] Add custom assembly format for alloca op to fix flag parsing (#198962)
The previously used assembly format was generating code like:
```cpp
if (::mlir::succeeded(parser.parseOptionalComma())) {
props.init = parser.getBuilder().getUnitAttr();
if (parser.parseKeyword("init"))
return ::mlir::failure();
}
```
This means that upon seeing any comma, the parser would immediately set
the `init` attribute and then expect the keyword "init" to follow. So a
valid input like `["n", const]` would fail with:
```bash
error: expected 'init'
```
Commit: 91f2a3008d3d0fb15b7e2a70229002403c140493
https://github.com/llvm/llvm-project/commit/91f2a3008d3d0fb15b7e2a70229002403c140493
Author: Vinit Deodhar <vadeodhar89 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgEnums.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
Log Message:
-----------
[mlir][linalg] Add inverse triag, log to elementwise ops (#202786)
Follow up to #200950
Add acos, acosh, asin, asinh, atan, atanh, log10, log1p, log2 to
elementwise ops
These math operations are added as UnaryFn enum cases and supported
through linalg.elementwise only, with no named op definitions. The
specialize pass converts linalg.generic containing these math ops to
linalg.elementwise when emitting category ops
Co-authored-by: Vinit Deodhar <vinitdeodhar at users.noreply.github.com>
Commit: 3a2fbe5fe6264e73e338042808ea094ef7b7632b
https://github.com/llvm/llvm-project/commit/3a2fbe5fe6264e73e338042808ea094ef7b7632b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/unittests/ObjectFile/MachO/MachOTrieTest.cpp
Log Message:
-----------
[lldb] Add more Mach-O export trie unit tests (NFC) (#202814)
Extend MachOTrieTest with cases that exercise ParseTrieEntries paths the
existing tests miss, all against the current parser with no functional
change. They cover well-formed edge cases (sibling breadth, empty and
single-character edge labels, large multi-byte addresses, ARM/Thumb and
stub-resolver handling, mixed exports and re-exports) and malformed
input that must be tolerated or rejected without crashing (a shared
subtree, an unterminated edge string, an excessive children count, a
truncated terminalSize, and an out-of-range start offset).
Assisted-by: Claude
Commit: 5643415c597627672a78208ab30c9ac0ae7c2982
https://github.com/llvm/llvm-project/commit/5643415c597627672a78208ab30c9ac0ae7c2982
Author: Johannes Doerfert <jdoerfert.llvm at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/declare_target_codegen.cpp
M clang/test/OpenMP/target_codegen.cpp
M clang/test/OpenMP/target_depend_codegen.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_parallel_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_simd_codegen.cpp
M clang/test/OpenMP/target_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-to-host.mlir
Log Message:
-----------
[OpenMP] Use ext linkage for kernels handles and globals handles keep… (#202827)
… linkage
Host handles are now emmitted with external linkage to clash if two
kernels with the same name are registered. This could have happen right
now and silently corrupt the program, but it can happen more easily once
we allow users to name their kernels.
In the same patch we make global variable handles retain the linkage of
the global variable, forcing clashes for external ones and continue to
support weak use cases. The exception is common linkage, which we
transform into weak for the entry as there is no zero initialization.
Commit: e0111e951c105e3975b6aad2b0adf94a6d005028
https://github.com/llvm/llvm-project/commit/e0111e951c105e3975b6aad2b0adf94a6d005028
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
Log Message:
-----------
[clang] Fix -Wunused-template in frontend helpers (NFC) (#202980)
Two frontend templates trip `-Wunused-template`.
In `ASTUnit.cpp`, `moveOnNoError` is an unused duplicate (the live copy
lives in `PrecompiledPreamble.cpp`), so it's removed.
In `CompilerInvocation.cpp`, `mergeMaskValue` and `extractMaskValue` are
the option-marshalling helpers that `OptParser.td` names for bitfield
options. No option currently uses that kind, so they never instantiate.
They're kept and marked `[[maybe_unused]]`, since deleting them would
break any future bitfield option.
NFC.
Part of #202945.
Commit: 037e0f1f7d02efd7a680236dbbcc36b779fef22a
https://github.com/llvm/llvm-project/commit/037e0f1f7d02efd7a680236dbbcc36b779fef22a
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/CAS/OnDiskGraphDB.cpp
Log Message:
-----------
[CAS] Bypass IO sandbox in `OnDiskGraphDB::store()` (#202760)
The sandbox is currently only bypassed in
`OnDiskGraphDB::createStandaloneLeaf()`, but the calling function
`store()` may also initiate some IO by calling `MappedTempFile::keep()`
whose parent `TempFile::keep()` calls `sys::fs::closeFile()`. Let's move
the sandbox disablement to the caller to avoid violations.
rdar://177274700
Commit: 5fc41f90ebb19f7b28c8a11c477856634a9a868f
https://github.com/llvm/llvm-project/commit/5fc41f90ebb19f7b28c8a11c477856634a9a868f
Author: Aditya Medhane <sherlockedaditya at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
Log Message:
-----------
[clang] Fix -Wunused-template in AST and analysis helpers (NFC) (#202977)
Several function templates across clang's AST and analysis code trip
`-Wunused-template`. Three kinds of fix here:
- Header templates with internal linkage (`static`), which gives each TU
its own copy and a latent ODR hazard. Drop `static` in `InterpHelpers.h`
(`handleOverflow`), `Marshallers.h` (the `matcherMarshall*`,
`mergePolyMatchers`, and `outvalueToVariantMatcher` helpers), and
`LifetimeSafety/Utils.h` (`join`). Templates are implicitly inline, so
nothing else changes.
- Dead code: `castAttrAs` in `ASTImporter.cpp` has no callers, so it's
removed.
- Assert-only helpers compiled out in release builds, marked
`[[maybe_unused]]`: `getKeys` in `DataflowAnalysisContext.cpp` and the
`hasBodyOrInit` template in `CrossTranslationUnit.cpp`.
NFC.
Part of #202945.
Commit: b25bc371ac5a97b4e91b5b4632923007e33f20f1
https://github.com/llvm/llvm-project/commit/b25bc371ac5a97b4e91b5b4632923007e33f20f1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/test/Driver/aarch64-cortex-a35.c
M clang/test/Driver/aarch64-cortex-a53.c
M clang/test/Driver/aarch64-cortex-a55.c
M clang/test/Driver/aarch64-cortex-a57.c
M clang/test/Driver/aarch64-cortex-a72.c
M clang/test/Driver/aarch64-cortex-a73.c
M clang/test/Driver/aarch64-cortex-a75.c
M clang/test/Driver/aarch64-cortex-a76.c
M clang/test/Driver/aarch64-fp16.c
M clang/test/Driver/aarch64-march.c
M clang/test/Driver/aarch64-mcpu.c
M clang/test/Driver/aarch64-oryon-1.c
M clang/test/Driver/aarch64-thunderx2t99.c
M clang/test/Driver/aarch64-thunderx3t110.c
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
M clang/test/Driver/aarch64-v8a.c
Log Message:
-----------
clang: Construct toolchains with normalized triples (#201869)
Avoid littering calls to normalize around by ensuring toolchains
always use a normalized triple. The test changes are due to
inconsistencies in the behavior of the triple APIs. If the arch name
is empty, normalize leaves it unchanged. If the triple is archname--,
normalize will expand the empty groups to be unknown. setArchName
will introduce the empty groups, which occurs in some of the triple
modifying driver path (mostly the handling of the endianness -m flags).
Driver is still holding onto a raw, unnormalized string triple but
leave that for a later cleanup.
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: 8d478d367bfd57630c483eb50c7984dc819269f0
https://github.com/llvm/llvm-project/commit/8d478d367bfd57630c483eb50c7984dc819269f0
Author: Devon Loehr <DKLoehr at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
Revert "[clang] Reland: fix getTemplateInstantiationArgs (#202088)" (#203024)
This reverts commit aca0ce5a7339a892e6405f23f19cb7a9931e18e7.
That commit is causing several compile failures (in
[chromium](https://github.com/llvm/llvm-project/pull/202088#issuecomment-4664022394))
and assertion failures (#202109, #202106), so let's back it out for now.
Commit: b9b624f3479156be71379beefec5d936d5eb078f
https://github.com/llvm/llvm-project/commit/b9b624f3479156be71379beefec5d936d5eb078f
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.cpp
M lldb/unittests/ObjectFile/MachO/MachOTrieTest.cpp
Log Message:
-----------
[lldb] Reject a zero child offset in the Mach-O export trie (#203055)
A child node offset of 0 points back at the root. ParseTrieEntries
silently skipped such a child because of a leftover guard from before
the walk tracked visited nodes, letting a malformed trie parse as valid.
Drop the guard so the visited-node set rejects it as the cycle it is,
matching how LLVM's MachO export-trie reader treats a child pointing at
an already-visited node.
Commit: 1b06b0b5795523e0b14b9f5ff9756bf78eed5567
https://github.com/llvm/llvm-project/commit/1b06b0b5795523e0b14b9f5ff9756bf78eed5567
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/Preprocessor/cl-pathmap.c
Log Message:
-----------
[clang][test] Fix cl-pathmap.c test failure on mac (#203043)
Add '--' before '%s' in the preprocessor test to
prevent the path (which typically starts with '/Users'
on macOS) from being interpreted as an option.
Commit: 281f5d0c739fbc6a27dee7d6075985e002614711
https://github.com/llvm/llvm-project/commit/281f5d0c739fbc6a27dee7d6075985e002614711
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
Log Message:
-----------
[AVR][NFC] Remove useless include statements (#202950)
Commit: 976282b5bd3c7aa628c12edaad30b17e07817bc4
https://github.com/llvm/llvm-project/commit/976282b5bd3c7aa628c12edaad30b17e07817bc4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
Log Message:
-----------
clang: Remove BoundArch assert in AMDGPUToolChain::addClangTargetOptions (#203060)
This was assuming that the offload languages use a subclass, and
only OpenCL hits the AMDGPUToolChain base class. Flang violates this,
and passes in the wrong values. Delete the assert for now.
Commit: 42baf9535ec3874dd53d28e27ca3d7653233605b
https://github.com/llvm/llvm-project/commit/42baf9535ec3874dd53d28e27ca3d7653233605b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Use helper for version checks (#203023)
Commit: 6ee9d90c58c4c7194f3a552e01a3e44c376cdfbe
https://github.com/llvm/llvm-project/commit/6ee9d90c58c4c7194f3a552e01a3e44c376cdfbe
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
Log Message:
-----------
[lldb] Fix mod-while-iteration in IRForTarget (#203035)
We modify the IR module here while iterating over it. Use the usual list
trick to delay modification until after the loop.
This was uncovered by bccd1b9cb744e5dd96ee59baa4bf4583457feea3
Commit: 9fa5f887d051c0ab63cfdd41dd15f0b350b20f93
https://github.com/llvm/llvm-project/commit/9fa5f887d051c0ab63cfdd41dd15f0b350b20f93
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/test/Other/dump-before-after.ll
Log Message:
-----------
[llvm] Fix crash with -ir-dump-directory & analysis passes (#202477)
The `StandardInstrumentations` were not filtering out analysis passes
(e.g. `-print-after-all`, etc).
* When printing to `stdout`, this results in additional output that is
unnecessary.
* When using `-ir-dump-directory` because the `PassID` is used for the
filename it results in an invalid file path causing the compiler to
crash. This becomes apparent with `-O1` or higher (e.g. `clang++ -mllvm
-print-before-all -mllvm -ir-dump-directory=dumpdir -O1 -S test.cpp`).
An example of the crash is shown below:
```
fatal error: error in backend: Failed to open dumpdir\18-a1a2011b35962283-module-RequireAnalysisPass<llvm::GlobalsAA, llvm::Module,
llvm::AnalysisManager<Module>>-before.ll to support -ir-dump-directory: invalid argument
```
Note that with `LLVM_ENABLE_IO_SANDBOX` the error is more ambiguous
showing up as `fatal error: error in backend: IO sandbox violation`.
Commit: 52e6b3612a3a27c69be9f86e7272e7ec01df9f9e
https://github.com/llvm/llvm-project/commit/52e6b3612a3a27c69be9f86e7272e7ec01df9f9e
Author: Jonathan L'Work <113400649+Jonathan03ant at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
Log Message:
-----------
[AMDGPU][GISEL] Adding RegBankLegalize rules for G_AMDGPU_SPONENTRY (#200864)
Commit: 2a6eae60aca0fbf27a151b6f7f44971572cf07ae
https://github.com/llvm/llvm-project/commit/2a6eae60aca0fbf27a151b6f7f44971572cf07ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Compute VPDominatorTree upfront, pass to passes (NFC) (#203058)
createHeaderPhiRecipes and replaceSymbolicStrides both run on the
initial plain-CFG VPlan0 before loop regions are created, and each
recomputed its own VPDominatorTree internally. Since the block-level CFG
is unchanged between them, compute the dominator tree once in the caller
and pass it in by const reference, avoiding a redundant recalculation.
Commit: 054a840e0370704c9a9705f5660861f0364d08d8
https://github.com/llvm/llvm-project/commit/054a840e0370704c9a9705f5660861f0364d08d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-inbounds-gep-with-pointer-casts.ll
Log Message:
-----------
Reapply "[VPlan] Use VPInstructionWithType for uniform casts." (#202427) (#203057)
This reverts commit 5eae7dc2ac7d8dde06a943771b792aeb91c31f57.
Recommitted version moved out ::getAsRecipe to the .cpp to avoid
https://lab.llvm.org/buildbot/#/builders/160 build failures.
Original message:
Use VPInstructionWithType instead of VPReplicate recipe for uniform
casts. This is a first step towards breaking up VPReplicateRecipe. Using
the general VPInstructionWithType has the additional benefit that we can
now apply a number of simplifications directly.
Depends on https://github.com/llvm/llvm-project/pull/140621
PR: https://github.com/llvm/llvm-project/pull/140623
Commit: fe4316d67a8bfbaf12a650429fb4c1e5d5003f44
https://github.com/llvm/llvm-project/commit/fe4316d67a8bfbaf12a650429fb4c1e5d5003f44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
Log Message:
-----------
clang/AMDGPU: Pass BoundArch through device libs handling (#196586)
Pre-work to consolidate target identification for future target
option bug fixes. Also requires updating flang to match recent
clang changes.
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: 8d2510ecde24beacb50bff51a1a62c7feae12c00
https://github.com/llvm/llvm-project/commit/8d2510ecde24beacb50bff51a1a62c7feae12c00
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
Log Message:
-----------
[AMDGPU][NFC] Restore clamp modifiers in gfx11_asm_vop3_dpp16.s (#203062)
Were dropped by mistake in
https://github.com/llvm/llvm-project/pull/202721.
Commit: c36815b3e2c42b70923ef6509532640c940dc00d
https://github.com/llvm/llvm-project/commit/c36815b3e2c42b70923ef6509532640c940dc00d
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libc/src/__support/threads/raw_rwlock.h
Log Message:
-----------
[libc][rwlock] fix timeout writer signal stealing problem (#201937)
When a timeout triggers, the waiting thread wakes up, unregisters
itself from the waiting queue, and exits. However, if the timing-out
thread is preempted after waking up but before it can unregister,
and a concurrent unlock occurs during this window, the timing-out
thread may consume the wake-up signal.
For example, assume the lock is in writer-preference mode and a
writer (W0) holds the lock. A reader (R) and another writer (W1,
with a short timeout) arrive and join the queue. W1's timeout
expires, so it wakes up and attempts to acquire the queue lock,
but is preempted before succeeding. W0 then releases the lock and,
preferring writers, sends a wake-up signal to W1. When W1 resumes,
it acquires the queue lock, unregisters, and exits due to the
timeout, ignoring the wake-up signal. As a result, the reader (R)
is left waiting indefinitely, leading to a deadlock.
To fix this, we track whether the serialization number changed
specifically for writers, and propagate the wake signal if it did.
If the timing-out thread is a reader, signal consumption is safe
because:
1. If there are pending writers, they will be woken up first.
2. Otherwise, if there are pending readers, they are all woken up
via broadcasting (notify_all), so one reader timing out does not
steal others' signal.
Assisted-by: AI tools, manually checked
Commit: 79aaf537bda3cefbd778dc92b533bbf6e8e5d435
https://github.com/llvm/llvm-project/commit/79aaf537bda3cefbd778dc92b533bbf6e8e5d435
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/zos-abi.c
Log Message:
-----------
[SystemZ][NFC] Sync downstream zos-abi.c test changes (#202437)
Syncs downstream changes to SystemZ zos-abi.c test:
1. Add test for char type parameter passing with sign extension
2. Rename pass_complexlike_float2 to pass_complexlike_float for
consistency
NFC - test-only changes.
Commit: 84e806d259626d79ae20ebd76e5fb0fed34ef7c0
https://github.com/llvm/llvm-project/commit/84e806d259626d79ae20ebd76e5fb0fed34ef7c0
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][lit] set spirv-tools feature when tools are available (#203067)
When the spirv tools are available (e.g. built with
-DLLVM_INCLUDE_SPIRV_TOOLS_TESTS) register the spirv-tools lit feature
in clang/test/lit.cfg.py.
This can then be used to skip tests that are not applicable when these
tools are available.
Fixes: #203049
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: e4945cff7f120323d3f3da42923b87c24029d82f
https://github.com/llvm/llvm-project/commit/e4945cff7f120323d3f3da42923b87c24029d82f
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/CodeGenCoverage.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/OptionStrCmp.h
M llvm/include/llvm/Support/VirtualOutputBackend.h
M llvm/include/llvm/Support/VirtualOutputBackends.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/include/llvm/Support/VirtualOutputFile.h
M llvm/include/llvm/Support/Watchdog.h
M llvm/include/llvm/Support/circular_raw_ostream.h
M llvm/include/llvm/Support/raw_ostream_proxy.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in Support (#202932)
This updates most LLVM_ABI annotations in the Support headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 7bcdec0b48ee8f64c16d1c13d7940073c3cb03a7
https://github.com/llvm/llvm-project/commit/7bcdec0b48ee8f64c16d1c13d7940073c3cb03a7
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[MLIR][XeGPU] Enable WG-level mxfp GEMM via generalized shape_cast collapse inference (#201496)
Summary
Bringing up two WG-level mxfp GEMM integration tests —
simple_mxfp_gemm_quantizeA_F4 and
simple_mxfp_gemm_dequantizeB_F4 — exposed several gaps in the XeGPU
layout-propagation and unroll paths
that previously kept them from compiling end-to-end. This PR lands those
two tests as the motivating
workloads, plus the supporting changes:
1. A generalized shape_cast collapse layout inference — required because
the mxfp lowering inserts
vector.shape_cast ops that collapse multiple src dims into a single dst
dim with non-trivial sg / lane
layouts spanning across them. The previous matchCollapseToInnermostDim
only covered the narrow […] →
[N] / [1, N] shape and could not infer correct source layouts for these
patterns.
2. A small primitive (expandDims) on the layout attribute so the new
code stays as elegant as the use
case of collapseDims.
3. Bug fixes uncovered while running these workloads end-to-end
(transpose layout check, layout-attr
unroll cast crash, drop-dims order pollution).
What's in this PR
Motivating integration tests (the driving force)
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
These exercise WG-level GEMM with mxfp quantization (BF16 Ă— F4 paths).
They depend on every other
change in the PR; without them, layout propagation crashes or yields
conflicting layouts on the
inserted vector.shape_cast and xegpu.load_matrix / xegpu.store_matrix
ops.
Generalized shape_cast collapse inference
- New utility xegpu::matchDimCollapse(srcShape, resShape, collapseDims)
in XeGPUUtils.{h,cpp} — the
dual of matchSplitDimExpansion, returning per-dst-dim groups of src
indices.
- inferShapeCastSourceLayout use case 3 now handles arbitrary collapse
patterns:
- sg_layout / lane_layout spread outer-to-inner, so each subgroup / lane
owns a contiguous run in the
collapsed dst dim's row-major linearization.
- sg_data / lane_data / inst_data fill innermost-first, with per-dim
caps from any layout already placed.
- inst_data is seeded from lane_layout * lane_data per dim; the
remaining factor spreads innermost-first.
- order is rewritten by walking dst order fastest-first and emitting
each group's src dims innermost-fastest.
- Net effect for the mxfp tests: no data movement across sg / lane
boundaries when shape_cast collapses dims.
Refactor: expandDims interface method
- Added expandDims(int64_t dim, ArrayRef<int64_t> targetShape) to the
DistributeLayoutAttr interface,
with implementations on both LayoutAttr and SliceAttr. It's the
rank-increasing dual of collapseDims
and bakes in the distribution policy above.
- inferShapeCastSourceLayout use case 3 now mirrors use case 2's
per-group loop:
auto srcLayout = resLayout;
for (dst dim in reverse) {
if (group.empty()) srcLayout = srcLayout.dropDims({dstIdx});
else if (group.size() > 1) srcLayout = srcLayout.expandDims(dstIdx,
targetShape);
}
return srcLayout;
- Replaces ~190 lines of inlined per-field distribution logic with a
handful of lines.
Bug fixes uncovered while bringing up the integration tests
- LayoutAttr::isTransposeOf: corrected the per-dim check to match
vector.transpose semantics (dst[i] =
src[perm[i]]); the old comparison indexed src and dst inversely.
- LayoutAttr::dropDims: stop synthesizing a default [rank-1,...,0] order
when the input had none — that
synthesized order tripped collapseDims's adjacency check downstream.
- UnrollLoadMatrixOp / UnrollStoreMatrixOp: stop assuming the op's
layout is always a LayoutAttr. Use
DistributeLayoutAttr and guard dropInstData() so SliceAttr /
missing-layout inputs no longer crash
unrolling.
Unit-test coverage
- New shape_cast collapse coverage in both
propagate-layout-subgroup.mlir and
propagate-layout-inst-data.mlir for: plain innermost collapse, layout
spill across multiple src dims,
and multi-group collapse.
- Updated one lane_layout expectation in propagate-layout.mlir to
reflect the generalized distribution.
Files changed
- mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td — interface + class
declarations for expandDims
- mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h — declaration for
matchDimCollapse
- mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp — expandDims impls,
dropDims order fix, isTransposeOf fix
- mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp — refactored use
case 3
- mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp — load/store_matrix
unroll hardening
- mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp — matchDimCollapse impl
- mlir/test/Dialect/XeGPU/propagate-layout-{subgroup,inst-data,}.mlir —
new tests / updated expectation
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_{dequantizeB_F4,quantizeA_F4}.mlir
— new
motivating integration tests
---------
Co-authored-by: Claude Opus 4.7 (1M context) <noreply at anthropic.com>
Commit: 077ec06128e27e3dce2b97563dab703f89024ddf
https://github.com/llvm/llvm-project/commit/077ec06128e27e3dce2b97563dab703f89024ddf
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Avoid errors with 23-bit division and remainder. (#202753)
Extensive testing of expandDivRem24 found an error when calculating Y/X
when Y = (0x7FFFFF/X)*X-1. There are
36 values of X for which this happens. Limit expansion to 23-bit signed
and 22-bit unsigned to avoid this issue.
Testing added in https://github.com/llvm/llvm-test-suite/pull/419.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: c04e776213f2eb2da2df538adaa50b840cc64112
https://github.com/llvm/llvm-project/commit/c04e776213f2eb2da2df538adaa50b840cc64112
Author: David Green <david.green at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Minor rearrangement of cost instructions. NFC (#203080)
This just moves the existing cost checks to a more standard order and
cleans up
how v2i64 is processed.
Commit: 437140c6a0bdfe4991f62603cecb4c19e86a75c9
https://github.com/llvm/llvm-project/commit/437140c6a0bdfe4991f62603cecb4c19e86a75c9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Add findRule helpers (#203025)
Introduce findRule helpers to RegexMatcher, GlobMatcher, and Matcher.
These helpers find the rule name matching a given line number.
This is a non-functional change (NFC) and will be used in a subsequent
commit to provide better warning messages when deprecated dot-slash
matching is triggered.
Assisted-by: Gemini
Commit: 92ce588505c722a3bfa2185933070c3f61797dd5
https://github.com/llvm/llvm-project/commit/92ce588505c722a3bfa2185933070c3f61797dd5
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/test/API/macosx/branch-islands/TestBranchIslands.py
Log Message:
-----------
[lldb/test] Skip TestBranchIslands on remote targets (#203068)
The test builds four 120 MB padding object files and links them into
a.out specifically to force the linker to emit an arm64 branch island
between main() and foo(). On a remote target the resulting ~480 MB
binary has to be uploaded byte-by-byte over gdb-remote vFile:write,
which on its own consumes the bulk of the lit timeout budget before any
debugging work happens; the test then times out at 600s.
The test verifies a host-toolchain artifact (the linker's branch island
generation), not anything about the runtime; running it on-device adds
nothing. Skip on remote.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 1352de2d51f52dd8e2a0a167a48ff43d9bf75df8
https://github.com/llvm/llvm-project/commit/1352de2d51f52dd8e2a0a167a48ff43d9bf75df8
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/CIR/CodeGen/inline-asm.c
Log Message:
-----------
[CIR][NFC] Fix lit tests after chaning alloca format (#203075)
Fixing lit tests after changes in the alloca format
Commit: 6f57b648974fb90cc6c495c83596e3022a42c146
https://github.com/llvm/llvm-project/commit/6f57b648974fb90cc6c495c83596e3022a42c146
Author: Andre Kuhlenschmidt <andre.kuhlenschmidt at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/docs/Extensions.md
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Semantics/c_loc01-relaxed.f90
Log Message:
-----------
[flang][semantics] Clean up -frelaxed-c-loc-checks warning flag handling (#203071)
When I originally implemented this I was confused about how
LanguageFeature warning flags work. Drop the separate UsageWarning::CLoc
in favour of using LanguageFeature::RelaxedCLocChecks (renamed from
RelaxedCLoc to match the feature flag) as the warning flag directly. The
warning is off by default since the user has already opted into this
extension using the feature flag; use -Wrelaxed-c-loc-checks alongside
-frelaxed-c-loc-checks to opt in. Update the test and docs accordingly.
Commit: 6766eea39e4b362066f1e2678a09a78ad98c2183
https://github.com/llvm/llvm-project/commit/6766eea39e4b362066f1e2678a09a78ad98c2183
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/X86/scalarize-wide-load-for-address-use.ll
M llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
M llvm/test/Transforms/LoopVectorize/VPlan/for-phi-ordering.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[VPlan] Create header phi recipes after initial scalar optimizations. (#200920)
Move createHeaderPhiRecipes after initial scalar transformations.
Header phi creation effectively is the first step of the widening
process. Running scalar opimizations before it can clean up dead header
phis and also also results in a cleaned up scalar VPlan that can be used
to compute the cost of the scalar loop accurately
(https://github.com/llvm/llvm-project/pull/196845).
Now that creating header phis happens after replaceSymbolicStrides we
are looking up the stride from the VPlan directly if possible.
PR: https://github.com/llvm/llvm-project/pull/200920
Commit: fd0d43df9e58f712b96827ca115664b7e665beaa
https://github.com/llvm/llvm-project/commit/fd0d43df9e58f712b96827ca115664b7e665beaa
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
Log Message:
-----------
[lldb/test] Skip TestCancelAttach on remote targets (#203069)
The existing decorator AND-combined three conditions:
```
@skipIf(remote=True, hostoslist=["windows", "linux"], bugnumber=...)
```
which only skipped when the test was running remotely AND the host was windows or linux. On a remote-darwin run from a Mac host the host condition is false, so the AND is false, and the test runs.
The waitfor-attach cancel path doesn't reliably interrupt a wait forwarded on a remote target, so SendAsyncInterrupt() doesn't unblock the attach thread on the host; the attempt then hangs to the lit timeout (600s) instead of completing the assertion.
Split the decorator into two: @skipIfRemote unconditionally, plus the existing @skipIf(hostoslist=["windows", "linux"]) for the original windows/linux issue. Both apply independently.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: e07b47ee180559fafb6ce37dece10200c19f1941
https://github.com/llvm/llvm-project/commit/e07b47ee180559fafb6ce37dece10200c19f1941
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/docs/LFI.rst
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/lib/Target/AArch64/AArch64LFI.td
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
A llvm/test/MC/AArch64/LFI/exclusive.s
A llvm/test/MC/AArch64/LFI/fp.s
A llvm/test/MC/AArch64/LFI/jumps-only.s
A llvm/test/MC/AArch64/LFI/literal.s
A llvm/test/MC/AArch64/LFI/lse.s
A llvm/test/MC/AArch64/LFI/mem-lr.s
A llvm/test/MC/AArch64/LFI/mem.s
A llvm/test/MC/AArch64/LFI/no-lfi-loads.s
A llvm/test/MC/AArch64/LFI/no-lfi-stores.s
A llvm/test/MC/AArch64/LFI/passthrough.s
A llvm/test/MC/AArch64/LFI/prefetch.s
A llvm/test/MC/AArch64/LFI/rcpc.s
A llvm/test/MC/AArch64/LFI/simd.s
A llvm/test/MC/AArch64/LFI/stack.s
M llvm/test/MC/AArch64/LFI/sys.s
Log Message:
-----------
[LFI][AArch64] Add rewrites for memory accesses (#195167)
This patch adds LFI rewrites for loads and stores, and guards for stack
pointer modifications.
This also introduces the `+no-lfi-stores` and `+no-lfi-loads` features
to control the granularity of memory sandboxing.
With these changes the rewriter now supports making fully
software-sandboxed programs. There are some minor changes
needed in libunwind to avoid emitting SVE/MTE instructions that
cause verification failure, which will be addressed in a future patch.
Future work includes the guard elimination optimization, which will
improve performance, Clang flags to control the LFI subtarget
features from the frontend, and that can also set a macro that
communicates the LFI feature level.
Commit: 084ab17b3c602f8e34ea471a4cc7297d1e8f05dd
https://github.com/llvm/llvm-project/commit/084ab17b3c602f8e34ea471a4cc7297d1e8f05dd
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/cmake/config-ix.cmake
Log Message:
-----------
[cmake] Add pthread to required libraries before dl and rt checks (#203054)
This fixes detection of shm_open on glibc < 2.34.
On glibc before 2.34 (released 2021), librt may depend on symbols from
libpthread. LLVM's HAVE_LIBRT probe uses check_library_exists(rt
shm_open ...), which links a small test against librt and
CMAKE_REQUIRED_LIBRARIES. If pthread is not included in the test link,
the probe can fail even though shm_open is available and LLVM targets
later link with pthread.
Move the dl and rt library checks after pthread detection and add the
detected pthread library to CMAKE_REQUIRED_LIBRARIES. This also lets us
remove later logic that temporarily made pthread a required library for
pthread symbol checks.
Modern C libraries (glibc 2.34+ and musl) integrate pthread-related
functionality into libc, so there is little practical benefit to
avoiding a libpthread dependency on pre-2021 glibc versions when
LLVM_ENABLE_THREADS is disabled.
Commit: 86cdbe62070fc4699696d6652c7a28553cff3703
https://github.com/llvm/llvm-project/commit/86cdbe62070fc4699696d6652c7a28553cff3703
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb/test] Tolerate ENOENT when cleaning per-test build directory (#203072)
makeBuildDir() removes any leftover bdir from a prior run before the new
test starts. shutil.rmtree() walks the tree via scandir+unlink, so if an
entry vanishes between those two calls it raises FileNotFoundError and
the test aborts in setUp.
We see this on bots when a previous test's implicit clang module build
left a *.pcm.lock file behind. clang's LockFileManager ties the lock's
lifetime to the holding process, so the file can disappear under us as
soon as that process exits.
Pass an onerror handler that swallows ENOENT (the entry is already gone,
which is what we wanted) and re-raises anything else.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 72afc58a92544635d5a8f2daf74377ee528f40d4
https://github.com/llvm/llvm-project/commit/72afc58a92544635d5a8f2daf74377ee528f40d4
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip LogicalAnd from live-in-folder (NFC) (#202934)
The various simplifications performed in simplifyRecipe subsume it.
Commit: 1579432afdcd14bc4031ad0eff5fea42367c0523
https://github.com/llvm/llvm-project/commit/1579432afdcd14bc4031ad0eff5fea42367c0523
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/copysign.ll
Log Message:
-----------
[InstCombine] Fold copysign(floor(fabs(X)), X) to trunc(X) (#200836)
Fixes #200519.
Adds an InstCombine fold for the pattern `copysign(floor(fabs(X)), X)
--> trunc(X)`.
Commit: 0e8cdad82e52063578ef5fe02e1313c186ce988b
https://github.com/llvm/llvm-project/commit/0e8cdad82e52063578ef5fe02e1313c186ce988b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/ifma-combine-vpmadd52.ll
M llvm/test/CodeGen/X86/madd.ll
M llvm/test/CodeGen/X86/pmaddubsw.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
Log Message:
-----------
[SelectionDAG] Fold extracts spanning concat operands (#200936)
Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.
AI note: an LLM generated the code and the test, I've read them
Co-Authored-By: OpenAI Codex <codex at openai.com>
---------
Co-authored-by: OpenAI Codex <codex at openai.com>
Commit: 1b4d60d7f67130d693c7b11d8fd35f59f6911cae
https://github.com/llvm/llvm-project/commit/1b4d60d7f67130d693c7b11d8fd35f59f6911cae
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/include/lldb/Target/StackFrameRecognizer.h
Log Message:
-----------
[lldb] Remove ValueObjectRecognizerSynthesizedValue::IsSynthetic override (#199117)
Removes the `IsSynthetic` override on
`ValueObjectRecognizerSynthesizedValue`. This class does not also
override `GetNonSyntheticValue`.
There was a bug in which code assumed that when `IsSynthetic()` returned
true, that `GetNonSyntheticValue` would produce a different value
object. However the default behavior of `GetNonSyntheticValue` is to
return itself.
It seems to me that either:
1. `ValueObjectSynthetic` should be the only class to override
`IsSynthetic` to true
2. or, that classes which override `IsSynthetic` should also override
`GetNonSyntheticValue`
In either case, I think it's best to remove this `IsSynthetic` on
`ValueObjectRecognizerSynthesizedValue`.
Commit: 55611ddbaec24686d5702255fbd6033b38dd9ea4
https://github.com/llvm/llvm-project/commit/55611ddbaec24686d5702255fbd6033b38dd9ea4
Author: Mariusz Masztalerczuk <mariusz at masztalerczuk.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/test/CodeGen/X86/hipe-cc64.ll
M llvm/test/CodeGen/X86/musttail-tailcc.ll
M llvm/test/CodeGen/X86/sibcall.ll
M llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
Log Message:
-----------
[X86] Fix musttail miscompilation when arguments are passed on the stack (#199691)
After commit 782bf6a, a musttail call with matching CC was always
treated as a sibcall, which skips the stores of outgoing stack
arguments. Any non-forwarded stack argument was silently dropped.
Only treat musttail as a sibcall when every argument is in a register;
otherwise fall back to full tail-call lowering.
Fix #199224
---------
Co-authored-by: Reid Kleckner <rkleckner at nvidia.com>
Commit: a80b840f9db475233656203f4ebe21faecdc1aae
https://github.com/llvm/llvm-project/commit/a80b840f9db475233656203f4ebe21faecdc1aae
Author: LuĂs Ferreira <contact at lsferreira.net>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Demangle/DLangDemangle.cpp
M llvm/unittests/Demangle/DLangDemangleTest.cpp
Log Message:
-----------
[Demangle] Implement type D demangling and add all D basic type encodings (#202834)
This patch adds type name output to D demangler `parseType` and adds all
D basic type encodings to it.
Commit: f5c08d6d63bbb7e2c1f07fe980ad2b93029651a8
https://github.com/llvm/llvm-project/commit/f5c08d6d63bbb7e2c1f07fe980ad2b93029651a8
Author: UebelAndre <github at uebelandre.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A utils/bazel/llvm-project-overlay/flang-rt/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang-rt/lib/runtime/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang-rt/unittests/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Analysis/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Builder/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/CodeGen/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Dialect/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Dialect/CUF/Attributes/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Dialect/CUF/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Dialect/FIRCG/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Dialect/MIF/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/HLFIR/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/OpenACC/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/OpenMP/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Passes/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/include/flang/Optimizer/Transforms/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Decimal/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Evaluate/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Frontend/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/FrontendTool/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Lower/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Analysis/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Builder/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/CodeGen/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/CUF/Attributes/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/CUF/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/FIRCG/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/MIF/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Dialect/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/IR/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Analysis/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Transforms/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenMP/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenMP/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Passes/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Transforms/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Parser/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Semantics/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Support/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Testing/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/lib/Utils/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/tools/flang-driver/BUILD.bazel
A utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
A utils/bazel/llvm-project-overlay/openmp/BUILD.bazel
A utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
A utils/bazel/llvm-project-overlay/openmp/runtime/tools/BUILD.bazel
A utils/bazel/llvm-project-overlay/openmp/runtime/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Added targets for flang, flang-rt, and openmp (#202791)
This change adds the necessary targets for a fortran toolchain. `flang`
for the compiler itself, `flang-rt` for executable support, and `openmp`
for `!$omp` directives within fortran code.
Commit: 47ca5e84d9f7458fb5bf0fc82eeac3bac3495724
https://github.com/llvm/llvm-project/commit/47ca5e84d9f7458fb5bf0fc82eeac3bac3495724
Author: Ethan Luis McDonough <ethanluismcdonough at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/test/Instrumentation/Instrumentor/default_config.json
M llvm/test/Instrumentation/Instrumentor/module_and_globals.ll
A llvm/test/Instrumentation/Instrumentor/numeric.ll
A llvm/test/Instrumentation/Instrumentor/numeric_config.json
R llvm/test/Instrumentation/Instrumentor/operations.json
R llvm/test/Instrumentation/Instrumentor/operations.ll
Log Message:
-----------
[Instrumentor] Add instruction flags to NumericIO (#200709)
Commit: 358412632f118765935980f5f927764f11a2d800
https://github.com/llvm/llvm-project/commit/358412632f118765935980f5f927764f11a2d800
Author: crockeea <ecrockett0 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
Log Message:
-----------
[MLIR][ODS] Do not emit code when printing empty lists in Type/Attr assembly printer (NFC) (#201174)
In TableGen's code generator, `DefFormat::genCommaSeparatedPrinter` can
emit code like
```
void FooType::print(::mlir::AsmPrinter &odsPrinter) const {
::mlir::Builder odsBuilder(getContext());
odsPrinter << "<";
{
bool _firstPrinted = true;
}
odsPrinter << ">";
}
```
This results in unused variable warnings for `_firstPrinted` when
compiling the table-gen'd code:
```
warning: unused variable '_firstPrinted' [-Wunused-variable]
158 | bool _firstPrinted = true;
```
The solution to this is to not emit the `{ bool _firstPrinted = true; }`
block when list being printed is empty. This PR adds a guard around the
code that emits the `{ bool _firstPrinted = true; }`: it is now only
emitted if there are arguments to print. In this case, additional code
is emitted which uses `_firstPrinted`.
Commit: e7aff7b0f5552f8c775724a3c48338db656b1ab2
https://github.com/llvm/llvm-project/commit/e7aff7b0f5552f8c775724a3c48338db656b1ab2
Author: jofrn <jo7frn1 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/atomic-load-store.ll
Log Message:
-----------
[X86] Add aligned atomic vector store tests wider than 128 bits (NFC) (#202537)
These >128-bit stores are expanded to __atomic_store libcalls regardless
of alignment, since x86 caps atomic ops at 128 bits.
Commit: 87381740d8c5e86a7818a84c28ad51049d6ddf7b
https://github.com/llvm/llvm-project/commit/87381740d8c5e86a7818a84c28ad51049d6ddf7b
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes f5c08d6 (#203102)
This fixes f5c08d6d63bbb7e2c1f07fe980ad2b93029651a8.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 90a1eeb0446f258567c8aa99748cb417a20dfe5b
https://github.com/llvm/llvm-project/commit/90a1eeb0446f258567c8aa99748cb417a20dfe5b
Author: adams381 <adams at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
A clang/test/CIR/CodeGen/global-pointer-array-fast-lowering.cpp
A clang/test/CIR/Lowering/const-array-bulk-lowering-fallbacks.cir
A clang/test/CIR/Lowering/const-array-of-pointers.cir
Log Message:
-----------
[CIR] Lower pointer const_array globals without insertvalue chains (#198427)
`cir.global` initializers that are `const_array` of `global_view` (no
indices) or null pointers were lowered through an initializer region
full of `llvm.insertvalue` ops even though the elements are all
attribute-representable. That forced the O(N²) MLIR-to-LLVM IR path
on large tables (SPEC CPU 2026 `gcc/insn-automata.cc`).
When `lowerConstArrayAttr` can build the whole initializer, emit the
global with one aggregate attribute instead. String literals with
`trailing_zeros` are padded into `DenseElementsAttr` so C string tables
take the same bulk path. Indexed `global_view`, `#cir.zero` arrays, and
other non-bulk cases still use the insertvalue path.
MLIR prerequisite
[#198424](https://github.com/llvm/llvm-project/pull/198424) is merged on
`main`; this branch is rebased and CIR-only.
---------
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Commit: 59eb0d2c6126a5b84cfb7f7c351c2bcfefa88bb0
https://github.com/llvm/llvm-project/commit/59eb0d2c6126a5b84cfb7f7c351c2bcfefa88bb0
Author: Vedant Neve <vedantneve13 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/math.yaml
M libc/shared/math.h
A libc/shared/math/isnanf128.h
M libc/src/__support/math/CMakeLists.txt
A libc/src/__support/math/isnanf128.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/isnanf128.cpp
A libc/src/math/isnanf128.h
M libc/test/shared/CMakeLists.txt
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/isnanf128_test.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
Log Message:
-----------
[libc][math] Add isnanf128 (#199206)
## Summary
- Add a fputil-based isnanf128 implementation and wire it into libc math
entrypoints, public math header generation, and shared math wrappers.
- Add smoke test coverage for float128 NaN classification and shared
math runtime/constexpr coverage.
Part of #195400
---------
Signed-off-by: Vedant Neve <vedantneve13 at gmail.com>
Commit: a848df2d1f818cf38fef5852841d91e9ed118497
https://github.com/llvm/llvm-project/commit/a848df2d1f818cf38fef5852841d91e9ed118497
Author: Amara Emerson <amara at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/module.modulemap
Log Message:
-----------
[IR] Add BundleAttributes.def to modulemap as textual header (#203106)
Fixes stage 2 builds broken by 88bd366041fd539d2e8d75f2b2ae081940922f8e
Commit: 0e8fe7904865ed56de4f572781f687cb2c3791a1
https://github.com/llvm/llvm-project/commit/0e8fe7904865ed56de4f572781f687cb2c3791a1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/GlobPattern.cpp
Log Message:
-----------
[NFC][Support] Define Prefix/SuffixMetacharacters constants (#202850)
Extract literal metacharacter strings used in GlobPattern into static
constexpr arrays to improve consistency and maintainability.
Assisted-by: Gemini
Commit: 4a21c2a6ed924e53f5dd42776b019a5b94a9330e
https://github.com/llvm/llvm-project/commit/4a21c2a6ed924e53f5dd42776b019a5b94a9330e
Author: Justin Bogner <mail at justinbogner.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
Log Message:
-----------
[DirectX] Fix -Wunused-variable warning (#203107)
Commit: 4221ca9146de74ac27eeb0359808bb8c28649b84
https://github.com/llvm/llvm-project/commit/4221ca9146de74ac27eeb0359808bb8c28649b84
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/test/Integration/Dialect/XeGPU/LANE/xegpu_dpas_mx_prepacked_bf8.mlir
M mlir/test/Integration/Dialect/XeGPU/LANE/xegpu_dpas_mx_prepacked_e2m1.mlir
Log Message:
-----------
[MLIR][XeGPU] Use updated dpas_mx op print format. (#202700)
Old assembly format causes parse error.
Commit: 6b281d1821bdc14ca92380cd39abb794347cf742
https://github.com/llvm/llvm-project/commit/6b281d1821bdc14ca92380cd39abb794347cf742
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-alloca.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-embox.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-rebox.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-type_desc.F90
Log Message:
-----------
[flang][acc] Add tests for implicit `acc declare` of type descriptors (#203100)
Adds 4 tests to cover different cases which requires implicit `acc
declare` for type descriptors.
Commit: 27139b7f0c8f0ad8a9f3cb842e06ca991f5c82ff
https://github.com/llvm/llvm-project/commit/27139b7f0c8f0ad8a9f3cb842e06ca991f5c82ff
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Introduce QueryOptions struct (#203098)
Refactor the RemoveDotSlash boolean parameter into a QueryOptions
struct.
This struct will hold all matching options and simplifies the Matcher
constructor signature. This is a preparation step for adding more
options
in subsequent patches.
Assisted-by: Gemini
Commit: 0d62bf31128a504f8acffa967752385c02d0c85e
https://github.com/llvm/llvm-project/commit/0d62bf31128a504f8acffa967752385c02d0c85e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Introduce Matcher::matchInternal helper (#203097)
Extract the core matching logic (std::visit on the variant) from
Matcher::match
into a private Matcher::matchInternal helper method. This is a
preparation step
for implementing warning logic that will need to call the matching logic
multiple times.
Also make Matcher's M and Options member variables private as part of
this
refactoring.
Assisted-by: Gemini
Commit: 245186ef957cb1d98ad1444a49e3bd307cbaa2a4
https://github.com/llvm/llvm-project/commit/245186ef957cb1d98ad1444a49e3bd307cbaa2a4
Author: Osman Yasar <osmanyas05 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
A llvm/test/CodeGen/AArch64/GlobalISel/combine-or-and-xor.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-or-and-xor.mir
Log Message:
-----------
[GlobalISel] Add `or_and_xor_to_or` pattern from SelectionDAG (#201108)
This PR adds the `fold (or (and X, (xor Y, -1)), Y) -> (or X, Y)`
pattern from SelectionDAG to GlobalISel.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 127a4c1a883d333033470c1a243dc60e8b064f1c
https://github.com/llvm/llvm-project/commit/127a4c1a883d333033470c1a243dc60e8b064f1c
Author: Santhosh Kumar Ellendula <quic_sellendu at quicinc.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
A lldb/test/Shell/Disassemble/TestDisassembleRISCVInstructions.test
M lldb/test/Shell/lit.cfg.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/unittests/Disassembler/RISCV/TestMCDisasmInstanceRISCV.cpp
Log Message:
-----------
[LLDB] RISCV feature attribute support and allows overriding additional(default) feature (#147990)
Parse ELF attributes to automatically set disassembler features.
llvm-objdump calls ELFObjectFile::getFeatures, then turns that into a
cstr to pass to createMCSubtargetInfo.
The lldb disassembler builds features for various architectures manually
and adds in the value from the command line.
If this is empty, it uses the default. then it turns that into a cstr
and passes it to createMCSubtargetInfo.
For Hexagon and RISC-V, parse the attributes, set up features, add
anything else needed.
If this is empty, pick the default.
Then turn into a cstr and pass to createMCSubtargetInfo (via
MCDisasmInstance::Create).
This patch adds RISCV feature attribute support and allows overriding
additional(default) feature.
---------
Co-authored-by: Santhosh Kumar Ellendula <sellendu at hu-sellendu-hyd.qualcomm.com>
Co-authored-by: Santhosh Kumar Ellendula <sellendu at hu-sellendu-lv.qualcomm.com>
Commit: d9e7704e07672cf180ed5d3b89132a08e7d14b1d
https://github.com/llvm/llvm-project/commit/d9e7704e07672cf180ed5d3b89132a08e7d14b1d
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/test/Integration/GPU/ROCM/lit.local.cfg
Log Message:
-----------
[mlir][ROCM] Disable integration tests on shared library builds (#203114)
Recent ROCm builds cause conflicts when loading the HIP library into
mlir-rocm-runner when LLVM is built as a shared library (this manifests
as duplicate command-line options).
Fixing this properly would require dlopen()-ing the HIP libraries or
some other such workaround, which can be done later.
For now, disable these tests on such builds.
Commit: ca4246669006ec9d6bc88ab2acb03f308a07d422
https://github.com/llvm/llvm-project/commit/ca4246669006ec9d6bc88ab2acb03f308a07d422
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx942.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for gfx90a/gfx942 MFMAs (#194076)
Add rules for gfx90a/gfx942 MFMA/SMFMAC intrinsics.
I see some regressions with imm splat tests and stores that could have
taken agprs. I will try to address those in a follow-up patch.
Commit: e9fbddf223976da11f40291a310d3308c61ea778
https://github.com/llvm/llvm-project/commit/e9fbddf223976da11f40291a310d3308c61ea778
Author: Alexandre Perez <alexandreperez at meta.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/include/lldb/API/SBProcess.h
M lldb/source/API/SBProcess.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
M lldb/test/API/python_api/process/TestProcessAPI.py
Log Message:
-----------
[lldb] Expose SBProcess::IsLiveDebugSession() (#203111)
Expose the existing `Process::IsLiveDebugSession()` through the SB API
as `SBProcess::IsLiveDebugSession()`, letting clients distinguish a live
debuggee from a post-mortem session such as a core file or minidump. It
returns `false` when there is no underlying process, consistent with
other `SBProcess` query methods.
Commit: 4b5f74b154228f5d129ccd7dcb1e09e7193643ae
https://github.com/llvm/llvm-project/commit/4b5f74b154228f5d129ccd7dcb1e09e7193643ae
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/OpenMP/declare-target-resolve.f90
A flang/test/Semantics/OpenMP/declare-target-symbols.f90
M flang/test/Semantics/OpenMP/declare-target08.f90
Log Message:
-----------
[flang][OpenMP] Implicit declarations of procedures in DECLARE_TARGET (#201935)
This replaces commit 8f5df8891840b, since it was rejecting the following
case:
```
function baz(a)
!$omp declare target to(baz)
real, intent(in) :: a
baz = a
end
program main
!$omp declare target(baz)
integer, save :: baz ! error: 'baz' is already declared
end
```
Instead of flagging an error, the 'baz' in the directive should be
resolved to the explicitly declared variable.
The original motivating example was to allow the case where the main
program (from the above snippet) looked like the following:
```
program main
real :: a
!$omp declare target(baz) ! 'baz' should be resolved to the
!$omp target ! external function
a = baz(a) ! <- because of this call
!$omp end target
end
```
The problem is that "declare_target(baz)" despite being the same in both
cases, should lead to two different outcomes in symbol resolution.
This fix will treat declarations introduced by a DECLARE_TARGET as
eligible for overriding with a potentially conflicting declaration
stemming from the use of that name in a language construct or
expression. Since a mere mention of a name alone declares an object,
such conflict occurs when the name would have been otherwise resolved to
a procedure.
This changes the behavior introduced in 8f5df8891840b, where
yet-undeclared names on a DECLARE_TARGET were preferentially resolved to
external procedures.
The function HandleProcedureName was modified to "undeclare" names
implicitly declared due to their appearance in a DECLARE_TARGET.
Commit: d5a18603b0d825fbe743f299dc3ee226be789f49
https://github.com/llvm/llvm-project/commit/d5a18603b0d825fbe743f299dc3ee226be789f49
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/docs/CMakeLists.txt
M lldb/docs/python_api_enums.md
A lldb/scripts/gen-python-api-enums.py
Log Message:
-----------
[lldb][docs] Generate the Python API enums page from headers (#202780)
The "Python API enumerators and constants" page was added by
3cae8b33297b as an explicit stop-gap: its contents were grepped out of
the headers by hand, with the few available doc strings copied over
manually. That commit noted the real fix would be a tool that parses the
enum/constant headers and emits the page automatically.
Being hand-maintained, the page drifted badly out of sync. By now it was
missing 19 enums and 60+ enumerators, still documented three values that
no longer exist, and carried stale descriptions.
Add gen-python-api-enums.py, which parses lldb-enumerations.h and
lldb-defines.h and emits the page at build time. It is pulled into
python_api_enums.md via the {build-include} directive, the same
mechanism already used for the generated settings page, so the page can
stay in sync with the source.
Enums from the separately generated SBLanguages.h (eLanguageName*) are
still not covered, matching the previous page's scope.
Assisted-by: Claude
Commit: 5b8402744696bd1e6bb6849e87bd63c7401e4791
https://github.com/llvm/llvm-project/commit/5b8402744696bd1e6bb6849e87bd63c7401e4791
Author: Yao Qi <qiyaoltc at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.cpp
M lldb/unittests/ObjectFile/MachO/MachOTrieTest.cpp
Log Message:
-----------
[lldb][Mach-O] Bound export-trie symbol name length (#202947)
`ParseTrieEntries` assembles a symbol name by appending every edge label
along a trie path into a `std::string`. A corrupt export trie can encode
an edge label whose terminator is far away in the trie data, making a
single label many megabytes long. Appending it requests an unbounded
allocation, which can crash lldb while parsing the symbol table.
Reject a trie whose assembled name exceeds a sane bound (1 MiB) as
corrupt data, the same way an unterminated edge label is already
handled. Add a unit test covering an oversized edge label.
Assisted-by: Claude
Commit: f5e325267c75a1cde29913ed9447cd97cb2060b7
https://github.com/llvm/llvm-project/commit/f5e325267c75a1cde29913ed9447cd97cb2060b7
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
A llvm/test/tools/opt/print-pipeline-passes.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
Log Message:
-----------
[Passes] Enhance `--print-pipeline-passes` (#202892)
Allow users to specify output format, make pipeline output more
palatable to FileCheck. Currently, it only support `text` and `tree`
format.
Fixes #200926.
Commit: 990543b73ad82913c831ea76ccb69a8e365d595b
https://github.com/llvm/llvm-project/commit/990543b73ad82913c831ea76ccb69a8e365d595b
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUArrayLengthOptimization.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/test/Dialect/XeGPU/peephole-optimize.mlir
Log Message:
-----------
[MLIR][XeGPU] Enable peephole optimization for the CRI target (#201655)
Enable the XeGPU transpose peephole and array-length optimizations for
the Crescent Island (cri) target alongside pvc and bmg. Skip sub-byte (<
8-bit) element types in array-length optimizations, which are not yet
supported.
Add tests in peephole-optimize.mlir covering the cri target and the
array-length optimization rejecting sub-byte
Commit: e408c75f8617b314a9cc30a19f61988004eecb85
https://github.com/llvm/llvm-project/commit/e408c75f8617b314a9cc30a19f61988004eecb85
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
Log Message:
-----------
[MLIR][XeGPU] Extend 8-bit load_nd support in XeVM lowering (#201645)
2D block load on 8bit element type has a shape 32x16 supported by OpenCL
API
```
void intel_sub_group_2d_block_read_transform_8b_32r16x1c( // reads eight uints
global void* base_address,
int width, int height, int pitch, int2 coord, private uint* destination);
```
The API is for load with transform/VNNI request.
OpenCL does not provide a load API for the same vector type and no
transform request. But value returned is identical for this special
vector type. <32x16x"8b">
The PR adds support for this vector type with no transform request.
Commit: af2e3e7881013acbc0309efdb82d1d386eb68d6f
https://github.com/llvm/llvm-project/commit/af2e3e7881013acbc0309efdb82d1d386eb68d6f
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/API/macosx/thread-names/TestInterruptThreadNames.py
Log Message:
-----------
Revert "[lldb][test] Increase polling in TestInterruptThreadNames.py (#201554)" (#203126)
This reverts commit fdfd1c1344187d64b63504ea8e3662ae4936503a.
The Intel mac CI bot is timing out often with these new timeouts and
we're getting failing runs. Raphael will adjust and re-land.
Commit: 9617b2af712286cdfc01c11d9054cf8656ff42e7
https://github.com/llvm/llvm-project/commit/9617b2af712286cdfc01c11d9054cf8656ff42e7
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Support partial subgroup lane distribution (#201667)
for convert_layout
Add lowering support in XeGPUSgToLaneDistribute for values that are
distributed across only a fraction of the subgroup.
- SgToLaneConvertLayout now lowers a rank-2 xegpu.convert_layout that
shrinks the lane layout along the outer (distributed) dimension while
keeping lane_data unchanged (e.g. [16, 1] -> [8, 1]). The partial-subgroup
case is detected directly in the pattern: equal order, rank 2, unit inner
lane layout, and a genuinely distributed outer lane layout (> 1, which also
rules out the degenerate [1, 1] layout). Because the data is no longer
replicated in every lane, it is gathered across lanes and the distributed
outer dimension is doubled when the lane count is halved.
- The cross-lane gather is factored into a dedicated helper,
shuffleDataAsLaneLayoutChange(): it bitcasts the source to i32, issues
gpu.shuffle up to fetch the values from the dropped lanes, and concatenates
the lane-local and gathered data with vector.shuffle. Only halving the lane
count (factor of two), rank-2 vectors, and bit widths that are a multiple
of 32 are supported; other cases fail the match.
- SgToLaneVectorExtractStridedSlice now adjusts the effective subgroup size
when the source lane layout along the distributed dimension is smaller than
the hardware subgroup size, so slice offsets/sizes are scaled correctly
(e.g. a subgroup-space offset of 8 maps to a distributed offset of 1).
Add a unit test exercising the dpas_mx scale operand path.
Commit: 8b625b2c515d3e44a814b6bd029814c12c501a93
https://github.com/llvm/llvm-project/commit/8b625b2c515d3e44a814b6bd029814c12c501a93
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/MC/RISCV/rv32c-invalid.s
M llvm/test/MC/RISCV/rv64c-invalid.s
M llvm/test/MC/RISCV/rvc-hints-invalid.s
M llvm/test/MC/RISCV/xqcibm-invalid.s
Log Message:
-----------
[RISC-V] Add --implicit-check-not="error:" to a few tests
Ensures that the test checks for every error emitted by llvm-mc. To do this
we have to move the CHECK lines to the next line rather than the same line
since otherwise we get a false-positive match.
This adds a few missing CHECK line in the xqcibm-invalid test and is needed
to minimize the diff in one of my subsequent commit.
Pull Request: https://github.com/llvm/llvm-project/pull/203091
Commit: 3c7cea8273bd06fdd9f84197293fb3d7f4b94435
https://github.com/llvm/llvm-project/commit/3c7cea8273bd06fdd9f84197293fb3d7f4b94435
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
R llvm/test/CodeGen/AArch64/GlobalISel/combine-or-and-xor.ll
R llvm/test/CodeGen/AArch64/GlobalISel/combine-or-and-xor.mir
Log Message:
-----------
Revert "[GlobalISel] Add `or_and_xor_to_or` pattern from SelectionDAG" (#203136)
Reverts llvm/llvm-project#201108
Commit: 1272df242660de7154cf64eb99fafb844af9b7f0
https://github.com/llvm/llvm-project/commit/1272df242660de7154cf64eb99fafb844af9b7f0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP][NFC] Add tests with non-movable calls, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/203140
Commit: a36610c9db6c05cccd6bed251f2b4df1730c1130
https://github.com/llvm/llvm-project/commit/a36610c9db6c05cccd6bed251f2b4df1730c1130
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/include/llvm/IR/PrintPasses.h
M llvm/include/llvm/Pass.h
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/Pass.cpp
M llvm/lib/IR/PrintPasses.cpp
M llvm/test/Other/print-changed-machine.ll
Log Message:
-----------
[CodeGen] Support --print-changed for legacy codegen IR passes (#202252)
--print-changed is only wired into MachineFunctionPass (
https://reviews.llvm.org/D133055), so the IR-level passes in the codegen
pipeline (atomic-expand, codegenprepare, etc.) are not reported.
Report them from FPPassManager/MPPassManager instead, via a new
Pass::printIRUnit hook that MachineFunctionPass overrides to print MIR.
Analyses are skipped, matching the new pass manager.
Aided by Claude Opus 4.8
Commit: 1cda91dad0208cccdeafc4a04ffcbb9626e3f157
https://github.com/llvm/llvm-project/commit/1cda91dad0208cccdeafc4a04ffcbb9626e3f157
Author: LuĂs Ferreira <contact at lsferreira.net>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Demangle/DLangDemangle.cpp
Log Message:
-----------
[Demangle] Fix leak of temporary TypeBuf buffer in DLangDemangle (#203116)
Detected by sanitizer
https://lab.llvm.org/buildbot/#/builders/55/builds/28902 after merge.
Commit: b19f4db597216648f9527adae256caf09642f3b4
https://github.com/llvm/llvm-project/commit/b19f4db597216648f9527adae256caf09642f3b4
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/EvergreenInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
AMDGPU: Remove AMDGPUbfm (#203148)
It wasn't actually used. We select [SV]_BFM_B32 by directly matching
shift-based patterns.
Commit: 7588c957cf4f686ce4ced4b1df717695be295bf0
https://github.com/llvm/llvm-project/commit/7588c957cf4f686ce4ced4b1df717695be295bf0
Author: David Tenty <daltenty at ibm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/lit.cfg.py
Log Message:
-----------
Revert "[Compiler-rt][test] Fix circular link dependency between builtins and libc" (#203152)
Reverts llvm/llvm-project#199482 due to failures when it's used on
platforms with non-ELF linkers. The patch needs additional guards, but
it's not immediately clear which platform linkers support the required
options.
Commit: 4a3fe8e38a6cebe805c12722b1505134d1625ce1
https://github.com/llvm/llvm-project/commit/4a3fe8e38a6cebe805c12722b1505134d1625ce1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
Log Message:
-----------
[AMDGPU] Gate rootn(x, +-2) -> sqrt/rsqrt fold on nsz/ninf (#200578)
Commit: dd315a54d0e95a98948fb6b57d27f0cce4418198
https://github.com/llvm/llvm-project/commit/dd315a54d0e95a98948fb6b57d27f0cce4418198
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
Log Message:
-----------
[AMDGPU] Set success flag for weak cmpxchg in LowerBufferFatPointers (#203033)
Commit: 9b06039665f0013bc7ce13fb9ce7bbe406c2226a
https://github.com/llvm/llvm-project/commit/9b06039665f0013bc7ce13fb9ce7bbe406c2226a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/examples/standalone/test/lit.cfg.py
Log Message:
-----------
[MLIR] Use internal shell for standalone tests (#203134)
The external shell will be removed soon
(https://discourse.llvm.org/t/rfc-removal-of-the-lit-external-shell/90951),
and this is one of the places where it hasn't been enabled by default.
There are no test failures caused by this, so we can just turn it on by
not explicitly setting execute_external as it defaults to False.
Commit: 5cf20a6c9ed5693e5a075f458380eaea5f3f42c1
https://github.com/llvm/llvm-project/commit/5cf20a6c9ed5693e5a075f458380eaea5f3f42c1
Author: Mitch Briles <mitchbriles at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/math-intrins.ll
Log Message:
-----------
Reapply "[NVPTX] Support lowering of `(l)lround`" (#202876)
Reverts llvm/llvm-project#202500
Original PR llvm/llvm-project#183901 was mistakenly reverted due to an
unrelated build failure.
Commit: 5d7406514e4e62b61e9405b937b30fcc6c36c58c
https://github.com/llvm/llvm-project/commit/5d7406514e4e62b61e9405b937b30fcc6c36c58c
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M .github/workflows/subscriber.yml
Log Message:
-----------
workflows/subscriber: Use github-automation container (#202777)
This simplifies the workflow and might help it run faster too.
Commit: 433a41eeb99fc294d20653e5518c388d68c2fcf0
https://github.com/llvm/llvm-project/commit/433a41eeb99fc294d20653e5518c388d68c2fcf0
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] React to /test-suite comment (#203151)
So the user knows the workflow has kicked off. I've put it in a separate
job with write permissions so the main job should still only have a read
only token.
Commit: 08f554f4d6e4b938637f86a4566dfe71297211b7
https://github.com/llvm/llvm-project/commit/08f554f4d6e4b938637f86a4566dfe71297211b7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[cross-project-tests] Use lit internal shell (#203138)
Commit: 4bff2386471a1036ef7096ba5030980df469b8ea
https://github.com/llvm/llvm-project/commit/4bff2386471a1036ef7096ba5030980df469b8ea
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[cross-project-tests] Fix some tests with the internal shell (#203169)
We need to prepend any environment variables that get set with env.
Commit: 7ad99619116468240ccc152c4bac05895a5ca4b6
https://github.com/llvm/llvm-project/commit/7ad99619116468240ccc152c4bac05895a5ca4b6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
M llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
Log Message:
-----------
[X86] Generate assertions with update_llc_test_checks
A follow-up PR will modify some lines in 2011-09-14-valcoalesce.ll and
adding assertions to 2009-11-17-UpdateTerminator.ll essentially serves
as precommitting tests for #202763.
Reviewers: RKSimon, arsenm, phoebewang
Pull Request: https://github.com/llvm/llvm-project/pull/203109
Commit: 943dafde41530834611b6f76256184f15a70a174
https://github.com/llvm/llvm-project/commit/943dafde41530834611b6f76256184f15a70a174
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
Log Message:
-----------
[lldb][NFC] Return unique_ptr in AppleObjCRuntimeV2::TaggedPointerVendorLegacy::GetClassDescriptor (#202921)
There is no reason to use a shared_pointer here.
Commit: e8fdbcf7a318e54aef118574e73385e37f7b1520
https://github.com/llvm/llvm-project/commit/e8fdbcf7a318e54aef118574e73385e37f7b1520
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
M orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
M orc-rt/unittests/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Strip leading '_' in NativeDylibAPIs on Darwin. (#203170)
NativeDylibAPIs::lookup takes linker-mangled names. On Darwin,
linker-mangling adds an '_' to the front of C symbol names. We need to
strip this off again before calling dlsym (which expects a C name).
Linker mangled names that don't start with an '_' are treated as
missing, since dlsym could never find an address for such a symbol.
Commit: f15666db52ffafe798d9247442cb941c9dffd5b5
https://github.com/llvm/llvm-project/commit/f15666db52ffafe798d9247442cb941c9dffd5b5
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/SystemZ/revec-fix-128169.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP] Inefficient cost-modelling and codegen for reductions with slp-… (#197875)
…revec
When revectorizing, starting with reduction, SLP generates slightly
inefficient code for reduction. e.g. In the godbolt link
[here](https://godbolt.org/z/ez7KPnxM5),
`hor_reduction --> original code`
`hor_reduction_revec_as_imagined_in_SLP --> revectorized code would look
like`
Rather than extracting per lane, we can extract original leaf nodes of
the reduction, which are sub-vectors, and then perform usual reduction
as in non-revectorized code. In the above link,
`hor_reduction_ideal_revec --> how the revec code should look like`
Extracting subvectors and achieving the reduction result would be better
than extracting per lane and achieving the same result.
Commit: b9d7710311cf31521c784609fc2648f980637059
https://github.com/llvm/llvm-project/commit/b9d7710311cf31521c784609fc2648f980637059
Author: owenca <owenpiano at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix a bug in aligning comments above finalized line (#202253)
Don't change the indent level of the comments if they are already
aligned with the finalized line below.
Fixes #200521
Commit: 1a4e43531e6a483ecc2404ae97faeac8a6b808de
https://github.com/llvm/llvm-project/commit/1a4e43531e6a483ecc2404ae97faeac8a6b808de
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
Log Message:
-----------
[NFC][clang][Serialization] Batch serialized LangOptions values (#202844)
Collect fixed language-option and sanitizer values in a `uint64_t` local
array and append the array to the control-block record once. Generated
values retain their serialized order.
Linked `clang` and `clangd` shrink by 91,584 and 91,520 bytes
respectively; `ASTWriter.cpp.o` shrinks by 25,128 bytes with 396 fewer
relocations, while linked fixups are unchanged.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 1b1e7c0a972fa1e285583e51508583fb20e176bd
https://github.com/llvm/llvm-project/commit/1b1e7c0a972fa1e285583e51508583fb20e176bd
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/test/Driver/cl-x86-flags.c
M clang/test/Driver/x86-target-features.c
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
Log Message:
-----------
[X86][APX] Enable PP2/PPX generation on Windows (#202984)
Revert restrictions from
https://github.com/llvm/llvm-project/pull/178122 which disabled
PUSH2/POP2/PPX on Windows due to missing unwinder opcodes. Now that
unwinder support has landed, this is no longer needed.
Commit: 8d8a19649168b9fd6e8ec4b6eaee47506c5ec38f
https://github.com/llvm/llvm-project/commit/8d8a19649168b9fd6e8ec4b6eaee47506c5ec38f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtins.c
Log Message:
-----------
[clang][bytecode] Check CarrayOutPtr in subcl more thorougly (#203172)
Use the local `isReadable` check.
Commit: d9b94497ce3dc9e10ab6e24aea9afcee655f3b25
https://github.com/llvm/llvm-project/commit/d9b94497ce3dc9e10ab6e24aea9afcee655f3b25
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFusion] Emit optimization remarks regardless of statistics (#202012)
The fusion remark helpers built their messages from a Statistic's name
and description and guarded the ORE.emit calls with #if LLVM_ENABLE_STATS,
so a Release build with statistics disabled emitted no -Rpass /
-Rpass-missed remarks at all.
Make the remark helpers take the remark name and message as explicit
strings so they are implemented independently of the statistics, and
emit the remarks unconditionally. The statistics keep using the plain
STATISTIC macro and are incremented at the call sites.
Commit: c120b3a364519ab424838371ad7369a163d3ee8c
https://github.com/llvm/llvm-project/commit/c120b3a364519ab424838371ad7369a163d3ee8c
Author: Rohit Garg <rohgarg at qti.qualcomm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
Log Message:
-----------
[LoopInterchange] Add test for partially-perfect loop nests (NFC) (#201507)
This PR adds test case for the imperfect loop nest case in
LoopInterchange. The corresponding support is being added in
https://github.com/llvm/llvm-project/pull/199511.
Commit: 907b5e92e1ddbbcc93e7bac84fcfa5810f442997
https://github.com/llvm/llvm-project/commit/907b5e92e1ddbbcc93e7bac84fcfa5810f442997
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
Log Message:
-----------
[clang][bytecode] Diagnose more pointer comparisons (#201588)
Diagnose comparisons between base classes as well as base classes and
fields. Also add some test cases for things that currently fail because
we compute the wrong offset.
Commit: 725fb3845d2df3267983590e2228569126468c96
https://github.com/llvm/llvm-project/commit/725fb3845d2df3267983590e2228569126468c96
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/unittests/Support/SpecialCaseListTest.cpp
Log Message:
-----------
[SpecialCaseList] Add backward compatible dot-slash handling (#162511)
This PR is preparation for:
* https://github.com/llvm/llvm-project/pull/167283
The new behavior is controlled by the `Version` field in the special
case list file.
- Version 1 and 2: Path is matched as-is, regardless of presence of
"./".
- Version 3, 5 and higher: Paths with leading dot-slash are
canonicalized
to paths without dot-slash before matching. This means that a rule
like `src=./foo` will never match, and `src=foo` will match both
`foo` and `./foo`. (Version 3 never became default but has this
behavior).
- Version 4: Transitionary version. Paths are matched both ways
(canonicalized and non-canonicalized) to maintain backward
compatibility.
If a match only works with the old behavior (non-canonicalized), a
warning
is emitted.
This change allows for a gradual transition to the new behavior, while
maintaining backward compatibility with existing special case list
files.
Commit: 685a4702e8f0f7a0d8db0643227c6569ad391c09
https://github.com/llvm/llvm-project/commit/685a4702e8f0f7a0d8db0643227c6569ad391c09
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
A llvm/test/CodeGen/RISCV/zero-call-used-regs.ll
Log Message:
-----------
[RISCV] Add partial support for -fzero-call-used-regs (#194883)
This implements the "-fzero-call-used-regs" option on RISCV for the
"skip" and "*gpr*" arguments. Zeroing floating points and vector
registers will be implemented later.
Commit: 2f8c8cb90e0a0e257689313d38bf78a0f95324b6
https://github.com/llvm/llvm-project/commit/2f8c8cb90e0a0e257689313d38bf78a0f95324b6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
M llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
Log Message:
-----------
[IR] Allocas cannot be freed (#202875)
Make canBeFreed() return false for alloca instructions. This matches the
modelling in getPointerDereferenceableBytes(), and as such only affects
the single other caller, which is loop load PRE (resolving the TODO
there).
allocas remain dereferenceable after lifetime.end, in the sense that
it's safe to speculatively load from them. They only become
non-writable, and I don't think this API is responsible for tracking
that (that would be isWritableObject, where unconditionally returning
true for allocas is technically incorrect and it already has a TODO to
that effect). To the best of my knowledge, the only transform that is
affected by lifetime.end making allocas non-writable is scalar promotion
with store speculation in LICM, so a fix to this issue will either be
localized there, or be part of a full lifetime redesign. In any case, it
should not infect the canBeFreed() API.
Commit: 1c5edbb9ff728d2d5d7690888751ec943a4d560e
https://github.com/llvm/llvm-project/commit/1c5edbb9ff728d2d5d7690888751ec943a4d560e
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
Log Message:
-----------
[RISCV] Fix ensureDominates with successive defs (#203174)
In RISCVVectorPeephole when we want to sink a use so that it's below
multiple defs, if the defs are beside each other then we will end up
checking if !dominates(Dest, Dest). This should be
!strictlyDominates(Dest, Dest), otherwise we don't sink the use far
enough.
Fixes #202894
Co-authored-by: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Commit: 63e33c6aeed23e71763ea0dea89621d89866446e
https://github.com/llvm/llvm-project/commit/63e33c6aeed23e71763ea0dea89621d89866446e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/GlobPattern.h
M llvm/lib/Support/GlobPattern.cpp
M llvm/unittests/Support/GlobPatternTest.cpp
Log Message:
-----------
[NFC][Support] Implement slash-agnostic path matching in GlobPattern (#202854)
Add a SlashAgnostic option to GlobPattern to allow matching path
separators
(both forward slashes and backslashes) agnostically.
When enabled:
- We conservatively reduce the plain prefix and suffix by treating path
separators as metacharacters. This ensures that path separators are
matched via the slash-agnostic state machine rather than plain string
comparison.
- Brackets containing slashes are adjusted to match both separators.
- Character comparisons in the state machine (matchChar) treat '/' and
'\' as equivalent.
For #149886.
Co-authored-by: Devon Loehr <DKLoehr at users.noreply.github.com>
Assisted-by: Gemini
Commit: 86154e8fd0d45825a4753b973312b78944b3d38c
https://github.com/llvm/llvm-project/commit/86154e8fd0d45825a4753b973312b78944b3d38c
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
Log Message:
-----------
Reapply "[GlobalISel] Add a shared matcher for memcpy-family instructions (NFC)" (#202275) (#202298)
sanitizer-aarch64-linux-bootstrap-ubsan broke after #201766:
lab.llvm.org/buildbot/#/builders/85/builds/22356
failed tests:
LLVM :: CodeGen/AArch64/aarch64-mops.ll
LLVM :: CodeGen/AArch64/memsize-remarks.ll
The culprit is canLowerMemCpyFamily returning true for zero-length ops
before initializing IsVolatile. The memcpy-family lowering helpers don't
use IsVolatile, it's only needed while building the lowering plan with
findGISelOptimalMemOpLowering and shouldn't have been forwarded.
I've also check the other arguments and simplified alignment too.
This reverts commit 2de2edb943fe1b83d79bdffa03606eb8c5452e9b.
Commit: d6abc8f78de200e045ce3bdcb4cc57a7f1b7c5c6
https://github.com/llvm/llvm-project/commit/d6abc8f78de200e045ce3bdcb4cc57a7f1b7c5c6
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopInterchange/confused-dependence.ll
M llvm/test/Transforms/LoopInterchange/currentLimitation.ll
M llvm/test/Transforms/LoopInterchange/debuginfo.ll
M llvm/test/Transforms/LoopInterchange/force-interchange.ll
M llvm/test/Transforms/LoopInterchange/fp-reductions.ll
M llvm/test/Transforms/LoopInterchange/guarded-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll
M llvm/test/Transforms/LoopInterchange/interchange-insts-between-indvar.ll
M llvm/test/Transforms/LoopInterchange/legality-for-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/multilevel-partial-reduction.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/outer-only-reductions.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43326-ideal-access-pattern.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr48212.ll
M llvm/test/Transforms/LoopInterchange/profitability-redundant-interchange.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization-heuristic.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
M llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
M llvm/test/Transforms/LoopInterchange/reductions-non-wrapped-operations.ll
Log Message:
-----------
[LoopInterchange] Use UTC as much as possible (NFC) (#202096)
Historically, the loop-interchange tests have relied heavily on checks
via pass remarks. This is because pass remarks are more human-readable
than the CHECK directives generated by UTC. However, during recent
development, I found some downsides:
- Updating them manually is a bit tedious.
- We need to carefully keep the remarks and the code consistent with
each other. In other words, we don't have any way to verify whether the
remarks themselves are reasonable.
For these reasons, I now think it makes more sense to rely on UTC as
much as possible, and this patch does that. Some tests are left as-is,
e.g., the test for checking remarks.
Disclosure: This patch is assisted-by Claude Code.
Commit: b65e7e4918341fc9007bdf48e3098046ff13078f
https://github.com/llvm/llvm-project/commit/b65e7e4918341fc9007bdf48e3098046ff13078f
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaTargetStreamer.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
A llvm/test/CodeGen/Xtensa/tls.ll
A llvm/test/MC/Xtensa/tls.s
Log Message:
-----------
[Xtensa] Fix code generation for TLS variables. (#202822)
This MR fixes https://github.com/llvm/llvm-project/issues/190202
Commit: 9347582fd312afe51b2ac3eb436d6d5d6bb6d2a3
https://github.com/llvm/llvm-project/commit/9347582fd312afe51b2ac3eb436d6d5d6bb6d2a3
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/TableGen/GlobalISelEmitter/SkippedPatterns.td
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[GlobalISel] Remove `fp_to_[s/u]int_sat_gi` node (#202908)
Instead of having a separate node reuse `fp_to_[s/u]int_sat`
but drop the saturation width from it.
Assisted-by: Claude Code
Commit: 34a321a74fdf87c3e3f5e80d95d581629513441d
https://github.com/llvm/llvm-project/commit/34a321a74fdf87c3e3f5e80d95d581629513441d
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions-interleave.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
Log Message:
-----------
[LV][NFC] Remove instcombine pass from RUN lines in ARM tests (#202913)
Following on from PR #197448 I've now removed the instcombine pass from
RUN lines in the ARM test directory, which exposes some potential
missing optimisations in vplan:
1. We could be folding IR into saturating math intrinsic calls to better
reflect the cost.
2. Masked load + select -> masked load with different passthru.
3. icmp + select -> smin/smax.
Some of these were already observed in #197448
Commit: 9ebbc1e089d64e717b3285ec463b92f94e7f55dc
https://github.com/llvm/llvm-project/commit/9ebbc1e089d64e717b3285ec463b92f94e7f55dc
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[APInt] Provide sqrtFloor (floor of square root) instead of sqrt (rounded) (#197406)
This simplifies both the implementation and the only in-tree user.
I changed the name to avoid silently changing the behavour of an
existing function that might have out-of-tree users.
Commit: 7e6f2b798cb97d46f395dc79b9b27961dc546cca
https://github.com/llvm/llvm-project/commit/7e6f2b798cb97d46f395dc79b9b27961dc546cca
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for set_inactive intrinsics (#203047)
Commit: 123078c21cfbe4c6abe1052e53739f9e933e8c1d
https://github.com/llvm/llvm-project/commit/123078c21cfbe4c6abe1052e53739f9e933e8c1d
Author: Gil Rapaport <gil.rapaport at mobileye.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
M mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
M mlir/include/mlir/Conversion/FuncToEmitC/FuncToEmitC.h
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
M mlir/lib/Conversion/ConvertToEmitC/ConvertToEmitCPass.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
M mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
M mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
M mlir/test/Conversion/FuncToEmitC/func-to-emitc.mlir
M mlir/test/Target/Cpp/func.mlir
Log Message:
-----------
Reland emitc lower multi return functions (#203026)
Reland #200659 reverted by #202911.
Fixed GCC 7 func-to-emitc build: Use the adaptor operand types
when creating the multi-return struct type instead of relying on an
implicit conversion from ValueRange to TypeRange.
Failed buildbot:
https://lab.llvm.org/buildbot/#/builders/116/builds/29302
Assisted-by: Copilot
Commit: 67d211a220e79636cdef7667b1c429cb4fbd7660
https://github.com/llvm/llvm-project/commit/67d211a220e79636cdef7667b1c429cb4fbd7660
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/lib/Conversion/ComplexToSPIRV/ComplexToSPIRV.cpp
M mlir/test/Conversion/ComplexToSPIRV/complex-to-spirv.mlir
Log Message:
-----------
[mlir][SPIR-V] Convert complex.neg and complex.conj in ComplexToSPIRV (#202898)
Commit: 5e7ec28c5e3a70588bbe9368d3816b009cf3670f
https://github.com/llvm/llvm-project/commit/5e7ec28c5e3a70588bbe9368d3816b009cf3670f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon/conversion-fullfp16.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
Log Message:
-----------
[clang][CIR][AArch64] Add lowering for conversion intrinsics (#199990)
This PR adds lowering for intrinsic from the following groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions-2
It continues the work started in #190961 and #193273. This PR implements
conversions from FP to integer types where the bit-wdith does not
change:
* vcvt_s64_f64
* vcvt_u64_f64
* vcvt_s32_f32
* vcvtq_s32_f32
* vcvtq_s64_f64
* vcvt_u32_f32
* vcvtq_u32_f32
* vcvtq_u64_f64
* vcvt_s16_f16
* vcvtq_s16_f16
* vcvt_u16_f16
* vcvtq_u16_f16
The corresponding tests are moved from:
* clang/test/CodeGen/AArch64/
to:
* clang/test/CodeGen/AArch64/neon/
The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
Commit: 046bd54d17a057fdf344889f8e4b1b8e6d850dd7
https://github.com/llvm/llvm-project/commit/046bd54d17a057fdf344889f8e4b1b8e6d850dd7
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/machine-pipeliner.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
Log Message:
-----------
[RISCV] Set CostPerUse to 1 only when optimizing for size (#201501)
We saw some regressions because of bad RAs as the cost of registers
beyond x8-x15 are bigger. This is why `DisableCostPerUse` was added
in https://github.com/llvm/llvm-project/issues/83320.
In this PR, we change it to set `CostPerUse=1` only when optimizing
for size.
Code size increases less than 0.1% in llvm-test-suite.
Commit: 700ff25b03ec747784f1e6a92e076ee009db37aa
https://github.com/llvm/llvm-project/commit/700ff25b03ec747784f1e6a92e076ee009db37aa
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libcxx/include/thread
Log Message:
-----------
[libc++] Hoist <compare> outside the threads guard in <thread> (#202535)
The standard mandates [thread.syn] include <compare> as part of
<thread>'s synopsis. This is a standards-mandated dependency, not a
thread-feature dependency, so it should be visible regardless of
_LIBCPP_HAS_THREADS.
This matches how we handle standard-mandated includes elsewhere, see for
example #134877.
Commit: b836063bbf6f856c85801e40e31e8221f240653d
https://github.com/llvm/llvm-project/commit/b836063bbf6f856c85801e40e31e8221f240653d
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFusion] Drop duplicate write-write dependence check (NFC) (#203173)
`dependencesAllowFusion()` re-tested every FC0-write vs FC1-write pair
in the second loop nest, duplicating the checks already done in the
first. Iterate only the remaining FC0-read vs FC1-write pairs; the set
of checked dependences (W0xW1, W0xR1, R0xW1) is unchanged.
Commit: 8210a58044d1e6d86473fdf810396d285c86ff36
https://github.com/llvm/llvm-project/commit/8210a58044d1e6d86473fdf810396d285c86ff36
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libcxxabi/src/demangle/Utility.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/Demangle/Utility.h
Log Message:
-----------
[Demangle] Guard DEMANGLE_ABI and add missing annotation (#202920)
This updates the DEMANGLE_ABI annotation to only be defined if it is not
already defined. This is required to parse the Demangle headers with the
ids-check script.
In addition, this adds one missing DEMANGLE_ABI annotation.
This effort is tracked in #109483.
Commit: 0cce78251f4c534b0d0a5ad55dd470e101ea9b94
https://github.com/llvm/llvm-project/commit/0cce78251f4c534b0d0a5ad55dd470e101ea9b94
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/select-aggregate.ll
A llvm/test/CodeGen/SPIRV/select-composite-constant.ll
Log Message:
-----------
[SPIR-V] Lower `select` instructions with aggregate operands (#201417)
Context: `SPIRVEmitIntrinsics` represents aggregate (array/struct) SSA
values as i32 value-ids, keeping the real type on the side for SPIR-V
emission. `preprocessCompositeConstants()` rewrites composite constant
operands into those value-ids.
A `select` takes its result type from its operands, so rewriting one arm
leaves the select with an aggregate result type but an i32 operand,
which is invalid. The exact failure mode depends: a composite-constant
arm tripped the verifier ("Select values must have same type as select
instruction"), while a non-constant arm (say a load) only became a
value-id later, in the visitor pass, at which point
`replaceMemInstrUses()` found a `select` among its users and hit an
unreachable.
I pushed two commits fixing this, one limited to my use case, another
more general:
1. Constant arms only. The common case is a select between two composite
constants, such as two complex literals. Once both arms are value-ids,
mutate the select to i32 and record its real type in `AggrConstTypes`;
the existing visitor turns its `extractvalue` users into `spv_extractv`.
2. An arm can also be a load or `insertvalue` result, which only becomes
a value-id later, in the visitor pass. By then the select has already
been mutated to i32, so its operand has to be reconciled when the arm is
lowered. This commit makes `select` behave like `PHINode` (which already
handles this): mutate every aggregate select to i32 up front, and handle
`SelectInst` in `replaceMemInstrUses()` so the operand and its
`extractvalue` users get fixed up as each arm is lowered. Nested
aggregate selects fall out of the same up-front mutation.
Developed with the help of Claude 4.8.
Closes https://github.com/llvm/llvm-project/issues/151344
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 4b3deaeb0d85fda9f6eee73f65f0be16b0e00698
https://github.com/llvm/llvm-project/commit/4b3deaeb0d85fda9f6eee73f65f0be16b0e00698
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/unittests/DebugInfo/PDB/CMakeLists.txt
Log Message:
-----------
Fix DebugInfo unittests shared library build (#202943)
Fixes: `PublicsStreamTest.cpp.o: undefined reference to symbol
'_ZN4llvm6object18GenericBinaryErrorC1ERKNS_5TwineENS0_12object_errorE'`
under `BUILD_SHARED_LIBS=1`.
Commit: 9673aae1fc67abcab756ed3f6e36dff846e8228c
https://github.com/llvm/llvm-project/commit/9673aae1fc67abcab756ed3f6e36dff846e8228c
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/OpenACC/acc-declare-interface-body.f90
Log Message:
-----------
[flang][OpenACC] Don't hoist declare directive out of interface bodies (#202806)
Example:
```fortran
program main
real :: a(10, 60)
interface
subroutine compute(a)
real :: a(10, 60)
!$acc declare present(a)
end subroutine
end interface
call compute(a)
end program
```
In this code, the `!$acc declare` inside the interface body is hoisted
into the
host program unit and lowered there, where its operand (the interface
dummy)
has no IR value, so lowering aborts with "symbol is not mapped to any IR
value".
This happens because interface-body procedures are not function-like
units, so
the directive is appended to the enclosing unit's evaluation list.
Fix: track interface-body nesting in the PFT builder and do not add an
`OpenACCDeclarativeConstruct` to the enclosing unit's evaluation list
while
inside one. The directive is no longer hoisted out and is generated only
in its
proper scope (the procedure definition or a module-level declare).
Commit: 8acfc364e9f788367ff0beab5c76a3527a689a0b
https://github.com/llvm/llvm-project/commit/8acfc364e9f788367ff0beab5c76a3527a689a0b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/include/arpa/inet.yaml
A libc/include/htons-family.yaml
M libc/include/netinet/in.yaml
M libc/utils/docgen/netinet/in.yaml
Log Message:
-----------
[libc] Add the htons function family to netinet/in.h (#203028)
As required by POSIX.
I've used the merge_yaml_files functionality to avoid duplication.
Assisted by Gemini.
Commit: f5bf584afaaf0549fbf5d645298ff5a3bea31b96
https://github.com/llvm/llvm-project/commit/f5bf584afaaf0549fbf5d645298ff5a3bea31b96
Author: Konstantin Belochapka <konstantin.belochapka at sony.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[clang][PS5] Clang driver PS5 - pass the target CPU to lld. (#202924)
Forward the PS5 target CPU from the clang driver to lld as
`-plugin-opt=mcpu=znver2`, matching behavior of other platforms.
Most drivers call addLTOOptions to include LTO-related link options. That includes specifying mcpu. The PS5 driver doesn't yet call addLTOOptions. In time I hope we'll arrive at a point where we can refactor to use the same functionality. This is one step towards that.
---------
Co-authored-by: Edd Dawson <edd.dawson at sony.com>
Commit: b01d0342c129405c30947f459cf055bbe8846974
https://github.com/llvm/llvm-project/commit/b01d0342c129405c30947f459cf055bbe8846974
Author: jay0x <90309873+blazie2004 at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/expression.cpp
A flang/test/Semantics/call47.f90
Log Message:
-----------
[Flang] Reject keyword arguments in statement function calls (#198610)
**Problem**
Flang silently accepted keyword arguments in calls to statement
functions, violating F2018 C1535.
**Standard: F2018 §15.5.1 C1535**: In a reference to a procedure whose
interface is implicit at the point of the reference, the actual argument
shall not be a keyword argument.
Flang silently compiles the following code without giving error` Keyword
argument 'x' at (1) is invalid in a statement function
`
```
program test
integer :: f1, x, c
f1(x) = x / 2
c = f1(x=10) ! Should be an error
end program
```
**Summary**
Fixed an issue where statement functions were incorrectly treated as
having an explicit interface, causing argument checks to be skipped.
Now, statement functions are marked correctly so existing checks run and
proper errors are shown
**Fixes** : [198523](https://github.com/llvm/llvm-project/issues/198523)
---------
Co-authored-by: Jay Satish Kumar Patel <kumarpat at pe31.hpc.amslabs.hpecorp.net>
Commit: 076a0a3aacca9c01ca8b6602589752d28e5dbf38
https://github.com/llvm/llvm-project/commit/076a0a3aacca9c01ca8b6602589752d28e5dbf38
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] Move TargetOMPContext to shared FlangOMPContext (NFC) (#202677)
Moving the class to shared code makes it available for reuse by
forthcoming DECLARE VARIANT lowering without any functional change to
existing metadirective lowering.
Commit: ed29c68bbdf52f377120817b7a371f5ba641b0d0
https://github.com/llvm/llvm-project/commit/ed29c68bbdf52f377120817b7a371f5ba641b0d0
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/fuzzing/CMakeLists.txt
A libc/fuzzing/arpa/CMakeLists.txt
A libc/fuzzing/arpa/inet/CMakeLists.txt
A libc/fuzzing/arpa/inet/inet_aton_differential_fuzz.cpp
Log Message:
-----------
[libc] Add a differential fuzzer for inet_aton (#200341)
Commit: 8bb9b2ec2274f607151b18cecefd09252110fe37
https://github.com/llvm/llvm-project/commit/8bb9b2ec2274f607151b18cecefd09252110fe37
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vector-reduce-fp.ll
Log Message:
-----------
[LLVM][CostModel][SVE] Return InvalidCost for bfloat scalable vector ordered arithmetic reductions. (#202569)
Commit: e95871719c41a8de96b438b962ed3b8f869b9e0c
https://github.com/llvm/llvm-project/commit/e95871719c41a8de96b438b962ed3b8f869b9e0c
Author: Luke Lau <luke at igalia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Recalculate VPDT in handleUncountableExitsWithSideEffects (#203233)
In the loop before we're modifying the CFG, but this invalidates the
dominator tree. We need to recalculate since we query it later on. I
can't really think of a test case for this, if anything using the
stale dominator tree with the extra branch will make the dominance
queries more conservative. But it's probably something we should fix.
Commit: 0c304c8b69cbb51ec8d68d2ee67b896767c0484e
https://github.com/llvm/llvm-project/commit/0c304c8b69cbb51ec8d68d2ee67b896767c0484e
Author: Gaurav Dhingra <gauravdhingra.gxyd at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/InconsistentIfElseBracesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-ifelse-braces-attributes.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-ifelse-braces.cpp
Log Message:
-----------
[clang-tidy] Ignore label-like statements when checking if/else bodies (#202869)
Fixes #194694
Commit: 072c355ae4854a2eff7d7a860c3dababe33f58f9
https://github.com/llvm/llvm-project/commit/072c355ae4854a2eff7d7a860c3dababe33f58f9
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopInterchange/inner-induciton-step-is-not-invariant.ll
Log Message:
-----------
[LoopInterchange] Add tests for outer-variant inner IV step (NFC) (#202750)
Adds test cases for #202383 and #202401. Both have an induction variable
in the inner loop whose step value is not loop-invariant with respect to
the outer loop.
Commit: 625538f44601b906a3db03b2b110f50915ca3ecd
https://github.com/llvm/llvm-project/commit/625538f44601b906a3db03b2b110f50915ca3ecd
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Support/KnownBits.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] Fix add() SelfAdd assertion for bitwidths >= 512 (#202769)
`KnownBits::add()` with `SelfAdd=true` lowers `X+X` to `shl(X, 1)` using
a fixed 8-bit shift amount:
```cpp
KnownBits Amt = KnownBits::makeConstant(APInt(8, 1));
return KnownBits::shl(LHS, Amt, NUW, NSW, /*ShAmtNonZero=*/true);
```
The comment there claims the shift-amount bitwidth is independent of the
source bitwidth, but that is not true: `shl()`'s `getMaxShiftAmount()`
extracts `Log2_32(BitWidth)` bits from the shift amount's max value when
`BitWidth` is a power of two:
```cpp
static unsigned getMaxShiftAmount(const APInt &MaxValue, unsigned BitWidth) {
if (isPowerOf2_32(BitWidth))
return MaxValue.extractBitsAsZExtValue(Log2_32(BitWidth), 0);
...
}
```
For source widths `>= 512`, `Log2_32(BitWidth) >= 9`, so extracting that
many bits from the 8-bit shift amount trips the assertion in
`APInt::extractBitsAsZExtValue`:
```
Assertion `bitPosition < BitWidth && (numBits + bitPosition) <= BitWidth && "Illegal bit extraction"' failed.
#9 llvm::APInt::extractBitsAsZExtValue(unsigned int, unsigned int) const
#10 llvm::KnownBits::shl(...)
#11 llvm::KnownBits::add(...)
```
(256 is the boundary that still works: `Log2_32(256) == 8`, extracting
exactly 8 bits from the 8-bit amount.)
Fix: make the shift-amount bitwidth match the source bitwidth so the
extraction is always in bounds. The `SelfAdd` path was introduced in
#188078.
Found via fuzzing. Adds a `SelfAddWide` regression test covering widths
256/512/1024.
Commit: 831ed97b1215fdf506109029e4adf30de84c5019
https://github.com/llvm/llvm-project/commit/831ed97b1215fdf506109029e4adf30de84c5019
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/docs/LangRef.md
Log Message:
-----------
[mlir][LangRef] Clarify terminator continuations (#201111)
Document that terminators may have no normal control-flow continuation,
such as ub.unreachable. Also clarify that no-return calls do not remove
the structural terminator requirement.
Assisted-by: Codex
Commit: 9d98437fffe4cef9435d7202ecd4b3c88fdbb7ae
https://github.com/llvm/llvm-project/commit/9d98437fffe4cef9435d7202ecd4b3c88fdbb7ae
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Transforms/IPO/StripSymbols.cpp
M llvm/unittests/ADT/StringMapTest.cpp
Log Message:
-----------
[StringMap] Invalidate iterators in remove() (#203249)
erase() bumps the epoch to invalidate iterators (#202237), but the
lower-level remove() — which detaches an entry without destroying it,
used
by ValueSymbolTable via Value::setName() — did not. Move the
incrementEpoch() into remove() so remove-while-iterating fails fast
under
LLVM_ENABLE_ABI_BREAKING_CHECKS too.
Aided by Claude Opus 4.8
Reland after lldb fix #203035
Commit: f4a027364add48b3522ead105494187ded58047f
https://github.com/llvm/llvm-project/commit/f4a027364add48b3522ead105494187ded58047f
Author: Alexandre Perez <alexandreperez at meta.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Support loading core files through attachCommands (#202785)
The `attachCommands` attach option lets users bootstrap a session with
arbitrary LLDB commands, but a command that loaded a core (e.g. `target
create --core`) produced a broken session:
`ConfigurationDoneRequestHandler` would call `process.Continue()` on the
core and fail, because the non-live-session handling was keyed on the
`coreFile` attach argument rather than on the actual resulting process.
This teaches `AttachRequestHandler` to detect, after the attach commands
run, whether the selected process was loaded from a core via the
`SBProcess:: IsLiveDebugSession()` API added in #203111. When it is a
core, it sets `stop_at_entry` and clears `is_live_session`, mirroring
what the `coreFile` key does.
Commit: fee67eec6d7f9e40d366c548aa7c59f98ca3b163
https://github.com/llvm/llvm-project/commit/fee67eec6d7f9e40d366c548aa7c59f98ca3b163
Author: Paweł Bylica <pawel at hepcolgum.band>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
A llvm/test/CodeGen/X86/flags-copy-lowering-unreachable.mir
Log Message:
-----------
[X86] Don't assert on EFLAGS copies in unreachable blocks (#203208)
X86FlagsCopyLowering collects the EFLAGS copies to lower using a
ReversePostOrderTraversal, which only visits blocks reachable from the
entry. Its end-of-pass verification, however, iterated over every block
in the function, so an EFLAGS copy left in an unreachable block (e.g.
produced by ISel for an always-taken branch whose other edge is dead)
tripped the "Unlowered EFLAGS copy!" assertion.
Such copies are harmless: the unreachable block is removed by the
unreachable-block elimination pass that runs right after this one,
before register allocation, so the copy never reaches a pass that cannot
handle it. Restrict the verification to reachable blocks (depth_first
from the entry) to match the set of blocks actually processed.
Found via fuzzing (llvm-isel-fuzzer).
Commit: 32ecd3e7ff64cab044716e39d14f880cf5a7367d
https://github.com/llvm/llvm-project/commit/32ecd3e7ff64cab044716e39d14f880cf5a7367d
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/non-phi-uses-lcssa-phi.ll
Log Message:
-----------
[LoopInterchange] Bail out when outer loop latch PHI has non-PHI user (#201923)
When there are non-PHI instructions in the outer loop that use values
originating from the LCSSA PHIs of the inner loop, it becomes difficult
to adjust the wiring during the transformation. In fact, multiple issues
(#200819 and #201571) have been raised related to this pattern. #201059
tried to resolve the issue by modifying the transformation phase, but it
was insufficient.
Instead of spending effort in the transformation phase, this patch adds
an additional check in the legality check and rejects such cases. I
think the cases rejected by this additional check are not very
practical, so the impact on realistic cases should be low, and it is
simpler than adjusting the wiring in the transformation phase.
This patch also effectively reverts #201059, as it is no longer
necessary.
Fix #201571.
Commit: c8ad049db78ae52052722b6f42b54cd2a666072b
https://github.com/llvm/llvm-project/commit/c8ad049db78ae52052722b6f42b54cd2a666072b
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll
Log Message:
-----------
[LoopInterchange] Consolidate induction and reduction vars check (#203197)
Previously, the handling of PHI nodes in loop headers was scattered. In
particular, there were two separate functions, `findInductions` and
`findInductionAndReductions`, which made the code difficult to reason
about. This patch consolidates these two functions, along with their
related caller logic, into a single function,
`checkInductionsAndReductions`. Although some remarks and debug outputs
have changed as a result, I believe the functionality itself remains
unchanged.
Commit: 7daddf2b6f44960344157a0accb3963a7d87ca03
https://github.com/llvm/llvm-project/commit/7daddf2b6f44960344157a0accb3963a7d87ca03
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M bolt/docs/CMakeLists.txt
M clang-tools-extra/docs/CMakeLists.txt
M clang/docs/CMakeLists.txt
M cmake/Modules/HandleDoxygen.cmake
M flang/CMakeLists.txt
M flang/docs/CMakeLists.txt
M lldb/CMakeLists.txt
M lldb/docs/CMakeLists.txt
M llvm/CMakeLists.txt
M llvm/docs/CMakeLists.txt
M mlir/docs/CMakeLists.txt
M openmp/docs/CMakeLists.txt
M polly/docs/CMakeLists.txt
M runtimes/CMakeLists.txt
Log Message:
-----------
[docs] try again to handle doxygen everywhere (#203081)
The previous attempt at this (b7da9565017e32c18b927a7637714d1b660b558d)
still broke standalone builds. Now I have locally tested standalone
flang, runtimes (with openmp), lldb, combined builds, and the utils
script. Hopefully that covers everything this time, and gets everything
into a more consistent state (always using the HandleDoxygen script in
the same way, included exactly once as required by the cmake design).
Commit: 59e18f41b35de71799ad8f2f615e3c01bac86e1e
https://github.com/llvm/llvm-project/commit/59e18f41b35de71799ad8f2f615e3c01bac86e1e
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
Log Message:
-----------
[clang] `this` getter missed in ConstructAttributeList (#203010)
In https://reviews.llvm.org/D159247 (400d3261a0da56554aee8e5a2fbc27eade9d05db)
it looks intended to update all of these calls, but missed this. The
effect is that a reference `&this` in a non-zero addrspace would take
this branch and crash there (because it ends up asserting that `this`
is a pointer). DRY the code since this branch looks like it kept
getting copied more incorrectly over time. I don't have an actual use
or test for this, I just noticed it while I was trying to break other
things in fuzzing.
Commit: 97ed1342b095adc130467b98350a0dbd91dfad02
https://github.com/llvm/llvm-project/commit/97ed1342b095adc130467b98350a0dbd91dfad02
Author: Jameson Nash <vtjnash at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
Log Message:
-----------
[AMDGPU] remove DefIsPriv mapping (#202694)
Since various commits that now avoid immediately casting most
temporaries, and now follow Sema for variables, this looks like tests
pass now without needing a second map to correct those issues
afterwards. Hopefully this will help find any similar remaining issues
expeditiously, if any.
Commit: 653865dd8bb337b24a79a288afa30ee5206f8342
https://github.com/llvm/llvm-project/commit/653865dd8bb337b24a79a288afa30ee5206f8342
Author: Aditya Trivedi <120598696+adit4443ya at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/use-rename-array-dsa.f90
Log Message:
-----------
[Flang][OpenMP] Fix implicit symbol resolution for USE-renamed arrays (#189215)
[Flang][OpenMP] Fix USE-renamed array DSA in OpenMP regions
Problem: for a USE-renamed symbol (e.g. USE mod, ONLY: s_ary => ary),
the HostAssoc in the OMP scope was created under the original name
"ary" instead of the local alias "s_ary".
Fix: add a DeclareNewAccessEntity overload that takes an explicit
SourceName, and call it with symbol->name() (the alias) rather than
the ultimate symbol's name, so the HostAssoc is created under the
name the user wrote.
Fixes #185344
Assisted-by: Claude Sonnet 4.6
Commit: 6ff34e926827050dfca1874b4fdf16f186f533f0
https://github.com/llvm/llvm-project/commit/6ff34e926827050dfca1874b4fdf16f186f533f0
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/socket.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/recvmmsg.h
M libc/src/sys/socket/CMakeLists.txt
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/recvmmsg.cpp
A libc/src/sys/socket/recvmmsg.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
R libc/test/src/sys/socket/linux/sendmmsg_test.cpp
A libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/utils/docgen/sys/socket.yaml
Log Message:
-----------
[libc] Implement recvmmsg (on linux) (#202328)
The function (unlike sendmmsg) takes a timeout argument, so I make sure
to always call the version with a 64-bit time_t. I've also renamed the
sendmmsg_test.cpp unit test to sendrecvmmsg_test.cpp to test both
functions. I also updated the yaml config and docgen files to include
the new function and the struct_timespec type dependency.
Assisted by Gemini.
Commit: 4c672853cd2a8689474a539a06b2c423440f1d95
https://github.com/llvm/llvm-project/commit/4c672853cd2a8689474a539a06b2c423440f1d95
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp (#172017)
Commit: e1f9a860f628a649cf5c7d1386f3649c400e5c9d
https://github.com/llvm/llvm-project/commit/e1f9a860f628a649cf5c7d1386f3649c400e5c9d
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_sockaddr_in6.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
A libc/include/llvm-libc-types/struct_sockaddr_in6.h
M libc/include/netinet/in.yaml
M libc/test/src/netinet/CMakeLists.txt
M libc/test/src/netinet/in_test.cpp
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
M libc/utils/docgen/netinet/in.yaml
Log Message:
-----------
[libc] Add the sockaddr_in6 type and IN6ADDR_*_INIT macros (#201357)
This patch adds struct sockaddr_in6 and the
IN6ADDR_ANY_INIT/IN6ADDR_LOOPBACK_INIT initializer macros. These are
configured to be exported via <netinet/in.h>.
I also added tests for these new features:
- layout and initialization check in test/src/netinet/in_test.cpp
verifying sockaddr_in6 size/member alignment and the in6_addr
initializer macros.
- a smoke test in test/src/sys/socket/linux/bind_test.cpp to verify
binding AF_INET6 to a localhost address. This requires a configured ipv6
stack, and may need tweaking/skipping if our build infrastructure does
not support it.
Assisted by Gemini.
Commit: 1e283d480e348c0a63c0ad8f04b39286b052d518
https://github.com/llvm/llvm-project/commit/1e283d480e348c0a63c0ad8f04b39286b052d518
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/CAS/ActionCache.h
M llvm/include/llvm/CAS/BuiltinCASContext.h
M llvm/include/llvm/CAS/CASID.h
M llvm/include/llvm/CAS/ObjectStore.h
M llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/include/llvm/CAS/OnDiskGraphDB.h
M llvm/include/llvm/CAS/OnDiskTrieRawHashMap.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in CAS (#203243)
This updates most LLVM_ABI annotations in the CAS headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: c6f0d5d07e8d2a0861059d22b1bea59c708ecdfb
https://github.com/llvm/llvm-project/commit/c6f0d5d07e8d2a0861059d22b1bea59c708ecdfb
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/GVMaterializer.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/PrintPasses.h
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/SafepointIRVerifier.h
M llvm/include/llvm/IR/Statepoint.h
M llvm/include/llvm/IR/TypeFinder.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in IR (#203244)
This updates most LLVM_ABI annotations in the IR headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 4ebce6e9b66fddd694d2785fec2ac1ce99bd5a7c
https://github.com/llvm/llvm-project/commit/4ebce6e9b66fddd694d2785fec2ac1ce99bd5a7c
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/Frontend/HLSL/HLSLBinding.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in Frontend (#203245)
This updates most LLVM_ABI annotations in the Frontend headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 4c0e292f4cb729ecfb33a9ab356dd5b7fe1068e8
https://github.com/llvm/llvm-project/commit/4c0e292f4cb729ecfb33a9ab356dd5b7fe1068e8
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/TableGen/Error.h
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/Parser.h
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/include/llvm/TableGen/StringMatcher.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/TableGen/TGTimer.h
M llvm/include/llvm/TableGen/TableGenBackend.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in TableGen (#203246)
This updates most LLVM_ABI annotations in the TableGen headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: b0c658458d48496adac2b38981b7096adc0a27d1
https://github.com/llvm/llvm-project/commit/b0c658458d48496adac2b38981b7096adc0a27d1
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/include/sys/syscall.h.def
Log Message:
-----------
[libc] Add syscall number for recvmmsg_time64 (#203268)
I *think* this will fix the riscv32 bot.
Commit: 609d4215f1d760c84254b88600a3add7bdeb42d3
https://github.com/llvm/llvm-project/commit/609d4215f1d760c84254b88600a3add7bdeb42d3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/expanded-binop-copyable-operand-deps.ll
Log Message:
-----------
[SLP] Do not vectorize copyable operands of expanded binops
An operand modeled as a copyable element on one operand edge of an
expanded binop (shl X, 1 represented as add X, X) leaves the duplicated
operand edge as a plain gathered operand with no copyable. The scheduler
then decrements that operand's ScheduleData for a use calculateDependencies
never counted for it, so its unscheduled-deps counter goes negative and
trips the assertion. Reject such bundles instead.
Fixes #203193
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/203285
Commit: cb3b1279948d1065f80121528cd2cb34b774f44f
https://github.com/llvm/llvm-project/commit/cb3b1279948d1065f80121528cd2cb34b774f44f
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
Log Message:
-----------
[mlir][spirv] Account for undefined behaviour in GLSL ops (#203086)
Add only `NoMemoryEffect` to operations with an undefined behavior and
adjust the description to match the revision 17 of the spec w.r.t. undefined
behavior.
Assisted-by: Claude Code
Commit: 4915bb89e23ba0f2e228cc34cce4b6976eda5fd1
https://github.com/llvm/llvm-project/commit/4915bb89e23ba0f2e228cc34cce4b6976eda5fd1
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/inner-induciton-step-is-not-invariant.ll
Log Message:
-----------
[LoopInterchange] Reject if inner loop IV has outer-variant step (#202751)
In the legality check, there is a routine to detect and verify the
induction variables of the inner loop. However, the validation was
insufficient, specifically when the step values of the induction
variables are not loop-invariant with respect to the outer loop.
This patch adds an additional check to ensure that the step values of
those induction variables are also loop-invariant with respect to the
outer loop.
Fixes #202383 and #202401.
Commit: a21a57c483376359d16de7f7f0dce0d546800d9c
https://github.com/llvm/llvm-project/commit/a21a57c483376359d16de7f7f0dce0d546800d9c
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/nested-commonblock.f90
Log Message:
-----------
[flang][OpenMP] Fix the privatization of common blocks (#200446)
Common block objects were being replaced on every privatization,
which caused errors for distinct privatizations on nested constructs.
Modifying a common block clone, instead of the original one, fixes the
issue. Cloning is limited to DSA flags because target mapping lowering
expects to find the common block address, through its defining
operation.
Fixes #178790
Commit: c4f3a5fb2ded04251278de52d979aee52190cd4e
https://github.com/llvm/llvm-project/commit/c4f3a5fb2ded04251278de52d979aee52190cd4e
Author: Dmitry Mikushin <dmitry at kernelgen.org>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/for_reduction_class_identity_codegen.cpp
A clang/test/OpenMP/for_reduction_class_identity_messages.cpp
Log Message:
-----------
[Clang][OpenMP] Fix '*' reduction identity for class types (#202292)
Commit: 831dd770f78081c13f6d0340769007049e5962ed
https://github.com/llvm/llvm-project/commit/831dd770f78081c13f6d0340769007049e5962ed
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Region.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in SandboxIR (#203266)
This updates most LLVM_ABI annotations in the SandboxIR headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 85ed098a6d5dd30bbdbac2ba0697bc5104fcba8c
https://github.com/llvm/llvm-project/commit/85ed098a6d5dd30bbdbac2ba0697bc5104fcba8c
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/CodeGen/X86/conditional-tailcall.ll
A llvm/test/Transforms/LoopStrengthReduce/X86/lsr-icmpzero-no-inttoptr.ll
M llvm/test/Transforms/LoopStrengthReduce/funclet.ll
M llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
M llvm/test/Transforms/LoopStrengthReduce/pr25541.ll
M llvm/test/Transforms/LoopStrengthReduce/pr27056.ll
Log Message:
-----------
[LSR] Keep ICmpZero comparisons in integer domain to avoid inttoptr casts (#201970)
When LSR expands ICmpZero fixups with pointer-typed operands, override
OpTy to the integer type so both icmp sides stay in the integer domain,
eliminating redundant inttoptr casts.
Commit: 10ba4d787433a01793eaa14f2022e597bee3eaf9
https://github.com/llvm/llvm-project/commit/10ba4d787433a01793eaa14f2022e597bee3eaf9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M offload/unittests/CMakeLists.txt
Log Message:
-----------
[Offload] Pass `-nostdlibinc` to the device unit test files (#203275)
Summary:
We need this flag so we can include `stdint.h` without potentially going
through to the system interface. this flag removes all default include
paths excepts the resource directory, which is the intention here.
Commit: 18cec023e10f4067b0e0bfa48c9a4209de6fd699
https://github.com/llvm/llvm-project/commit/18cec023e10f4067b0e0bfa48c9a4209de6fd699
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/utils/lit/lit/formats/shtest.py
M llvm/utils/lit/tests/Inputs/per-test-coverage-by-lit-cfg/lit.cfg
M llvm/utils/lit/tests/Inputs/per-test-coverage/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-external-shell-kill/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-format/external_shell/lit.local.cfg
M llvm/utils/lit/tests/Inputs/shtest-readfile/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/lit.local.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
Log Message:
-----------
[lit] Deprecate execute_external=True in ShTest (#201732)
Implementing the deprecation part of
https://discourse.llvm.org/t/rfc-removal-of-the-lit-external-shell/90951.
I made this a hard error with an additional keyword argument to opt out
of the warning behavior given we don't have the facilities to trivially
log within ShTest like we do in the rest of lit, and I think forcing
people to explicitly acknowledge that things are deprecated is not a bad
thing.
Commit: da1ef2df21e0a9556dbf3d4b7443cc87df920666
https://github.com/llvm/llvm-project/commit/da1ef2df21e0a9556dbf3d4b7443cc87df920666
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopInterchange/reduction-extra-use-in-inner-loop.ll
Log Message:
-----------
[LoopInterchange] Add test for extra reduction use in inner loop (NFC) (#203240)
Add test cases that cover the uses of outer loop reductions. On of them,
`@extra_reduction_use_in_inner0` is taken from #203104, which is causing
miscompilation now. This will be fixed by the follow-up patch #203241.
Commit: 4bfc636e16b5ff5b39ac886d2c1beaab16bee933
https://github.com/llvm/llvm-project/commit/4bfc636e16b5ff5b39ac886d2c1beaab16bee933
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/source/Host/windows/ConnectionConPTYWindows.cpp
Log Message:
-----------
[lldb][Windows][NFC] Clean up ConnectionConPTYWindows (#203284)
Remove unused `<cstring>` include (no string/mem APIs used in the file).
Commit: dc4aa8452cc57f41995ed9ef14679f8f58ca15ee
https://github.com/llvm/llvm-project/commit/dc4aa8452cc57f41995ed9ef14679f8f58ca15ee
Author: Philipp Rados <philipp.rados at openchip.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Fir/target-rewrite-target-abi.fir
Log Message:
-----------
[Flang] Add target-abi to CodegenSpecifics (#201539)
This sets the target-abi, specified in TargetOptions on the MLIR-Module.
This allows it to be used by CodegenSpecifics in the TargetRewritePass.
Currently this is only needed by RISCV64, but can also be used by other
targets. This allows to reuse the logic from clang when determining the
ABI, needed for patch
https://github.com/llvm/llvm-project/pull/198335#discussion_r3272341234.
Commit: a57bfb71f7edee9d24a64473b81caf5555b85a3c
https://github.com/llvm/llvm-project/commit/a57bfb71f7edee9d24a64473b81caf5555b85a3c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Drop redundant dereferenceable assumptions (#202946)
Commit: 1ee93f9e1ab7578c94ebd5f7e6aecaba9a33537d
https://github.com/llvm/llvm-project/commit/1ee93f9e1ab7578c94ebd5f7e6aecaba9a33537d
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/include/flang/Support/Flags.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Flags.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
A flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map-2.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-simple.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
R flang/test/Lower/OpenMP/Todo/firstprivate-target.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/different_vars_lastprivate_barrier.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/OpenMP/target-scope.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Semantics/OpenMP/symbol08.f90
A offload/test/offloading/fortran/target-firstprivate.f90
Log Message:
-----------
[Flang][OpenMP] remove enable-delayed-privatization-staging to suppor… (#200952)
…t target first private by default
This commit follows the decision in
https://github.com/llvm/llvm-project/issues/182356 to remove the not yet
implemented for delayed privatization for firstprivate and private in
`omp target` regions in flang
Fixes https://github.com/llvm/llvm-project/issues/182356
Assisted with Opus
Commit: 6d4fd946e4486f13d6b4ea1cc54d2aae5ee2f03d
https://github.com/llvm/llvm-project/commit/6d4fd946e4486f13d6b4ea1cc54d2aae5ee2f03d
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A clang/include/clang/Basic/AtomicLineLogger.h
A clang/lib/Basic/AtomicLineLogger.cpp
M clang/lib/Basic/CMakeLists.txt
A clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
Log Message:
-----------
[clang] Reland Adding an Atomic Line Logger (#195885) (#202428)
This PR relands #195885. The original PR caused a Windows [build
failure](https://github.com/llvm/llvm-project/pull/195885#issuecomment-4636690409)
because of differences in const capture support in MSVC and `clang`. The
unit test is fixed by capturing everything.
***********
This PR adds an atomic line logger to `clang`.
Situations have arisen where `clang` performs multi-threaded tasks (such
as dependency scanning), and race conditions may happen. Such race
conditions are difficult to debug using either `lldb` or with
`llvm::errs()`.
This logger provides atomic logging per line to a file on disk with time
stamps at each line to facilitate such investigations. Specifically, the
logger is designed with the following properties:
1. Each line is atomically written to the backing file. This avoids
concurrent writes making the output text interleaving.
2. Each line is prefixed with a timestamp, a process ID and a thread ID.
3. `LogLine` implements a `<<` operator to allow arbitrary printable
types to be piped into it.
4. The `LogLine`'s user does not need to check if it is setup or valid.
A LogLine is always valid and can always accept input from `<<`. It
becomes a no-op if the `LogLine` object is returned from a default
constructed `AtomicLineLogger`.
5. The write happens when a `LogLine` object goes out of scope.
The logger is inspired by the
[OnDiskCASLogger](https://github.com/llvm/llvm-project/blob/09abee845d2136630fc3f50524148daa55a740a8/llvm/include/llvm/CAS/OnDiskCASLogger.h#L33).
A followup PR https://github.com/llvm/llvm-project/pull/195896 wires up
this logger to clang's dependency scanning stack.
Assisted-by: claude-opus-4.6
rdar://39907408
Commit: 9c5277e798e61a9d274e9effd3df82e4967afdba
https://github.com/llvm/llvm-project/commit/9c5277e798e61a9d274e9effd3df82e4967afdba
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix G_INTRINSIC_FPTRUNC_ROUND (#202734)
Fixes https://github.com/llvm/llvm-project/issues/182048
AI note: an LLM generated the code and the test, I've read them
Assisted by: Claude Opus 4.8
Commit: fb30d2d470533765b483960939cf856a81302bf6
https://github.com/llvm/llvm-project/commit/fb30d2d470533765b483960939cf856a81302bf6
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/CGData/StableFunctionMap.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
M llvm/include/llvm/DWARFLinker/Utils.h
M llvm/include/llvm/DWP/ELFWriter.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/IR/PrintPasses.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/legacy/UpdateCompilerUsed.h
M llvm/include/llvm/MC/DXContainerInfo.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/Object/Archive.h
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/include/llvm/Option/Option.h
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Remarks/BitstreamRemarkSerializer.h
M llvm/include/llvm/Remarks/RemarkStreamer.h
M llvm/include/llvm/Support/Win64EH.h
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/TextAPI/Target.h
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/include/llvm/Transforms/IPO/InstrumentorConfigFile.h
M llvm/include/llvm/Transforms/IPO/InstrumentorStubPrinter.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
M llvm/include/llvm/Transforms/Utils/TriggerCrashPass.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.h
M llvm/include/llvm/XRay/FDRTraceExpander.h
Log Message:
-----------
[llvm] Fix most remaining LLVM_ABI annotations (#203267)
This updates most LLVM_ABI annotations in the public LLVM headers to
match expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 2bccbf23edddf216ef060d34443f60f644d0fb06
https://github.com/llvm/llvm-project/commit/2bccbf23edddf216ef060d34443f60f644d0fb06
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
A llvm/test/CodeGen/DirectX/ContainerData/Inputs/SourceInfo.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Args.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Compressed.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Uncompressed.ll
M llvm/test/CodeGen/DirectX/embed-ildb.ll
Log Message:
-----------
[DirectX] Generate shader source info part in llc (#202761)
This change modifies DXContainerGlobals pass and DXILMetadataAnalysis to
generate source info (SRCI) part in DXContainer, using information from
`dx.source.contents` and `dx.source.args` metadata nodes.
This part is typically generated for debug shader builds.
---------
Co-authored-by: Vladislav Dzhidzhoev <vdzhidzhoev at accesssoftek.com>
Commit: efdd089088747136ebf134f4fc0b56ccf25bb118
https://github.com/llvm/llvm-project/commit/efdd089088747136ebf134f4fc0b56ccf25bb118
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/reduction-extra-use-in-inner-loop.ll
Log Message:
-----------
[LoopInterchange] Reject if outer loop reduction has extra user (#203241)
As demonstrated by the case reported in #203104, there are cases where
interchanging the loops is unsafe because the outer loop reduction is
used within the inner loop by something other than the PHI node that
receives the value. Such cases should be rejected during the legality
check phase.
This patch adds a check to ensure that the outer loop reduction is only
used by the inner loop reduction PHI node. This check might be too
conservative and could cause missed optimizations, but at the moment I
can't find such a case.
Fixes #203104.
Commit: 6713634507b21efe6c895dd40e85ba72fe0ce269
https://github.com/llvm/llvm-project/commit/6713634507b21efe6c895dd40e85ba72fe0ce269
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/utils/lit/lit/formats/shtest.py
M llvm/utils/lit/tests/Inputs/per-test-coverage-by-lit-cfg/lit.cfg
M llvm/utils/lit/tests/Inputs/per-test-coverage/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-external-shell-kill/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-format/external_shell/lit.local.cfg
M llvm/utils/lit/tests/Inputs/shtest-readfile/lit.cfg
M llvm/utils/lit/tests/Inputs/shtest-run-at-line/external-shell/lit.local.cfg
M llvm/utils/lit/tests/Inputs/shtest-timeout/lit.cfg
Log Message:
-----------
Revert "[lit] Deprecate execute_external=True in ShTest" (#203316)
Reverts llvm/llvm-project#201732
Breaks fuzzer tests which need more investigation.
Commit: 67340e0aa6cfefdcb573d5c76fbdc2c9efa037c4
https://github.com/llvm/llvm-project/commit/67340e0aa6cfefdcb573d5c76fbdc2c9efa037c4
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/include/llvm-libc-types/struct_sockaddr_in6.h
Log Message:
-----------
[libc] Use relative path in struct_sockaddr_in6.h (#203297)
This is the right way to include these after all.
Commit: ab4286095e8df5ec10739866625e2b94b88952c4
https://github.com/llvm/llvm-project/commit/ab4286095e8df5ec10739866625e2b94b88952c4
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/test/Semantics/OpenMP/declare-target-flags.f90
Log Message:
-----------
[flang][OpenMP] Temporarily disable flaky test (#203307)
Commit: 297cb7232735f5426015c57216dc7910f3055e86
https://github.com/llvm/llvm-project/commit/297cb7232735f5426015c57216dc7910f3055e86
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/Shell/Target/dependent-modules-nodupe-windows.test
Log Message:
-----------
[lldb][Windows] Relax dependent-modules-nodupe-windows OS-DLL ordering (#203305)
The post-run "target modules list" output orders the OS DLLs (ntdll,
kernel32, ...) by load address, which differs between the in-process
debugger and the lldb-server-on-Windows path. The exact order is not
what this test cares about. The goal is to verify that preloaded
dependent modules are not duplicated once the inferior actually loads
the DLL.
This patch replaces `CHECK-NEXT/CHECK` lines with `CHECK-DAG`, keeping
the trailing `CHECK-NOT` to enforce no duplicate `shlib.dll` entry.
rdar://179367320
Commit: 053c94e66386931494074db1db02818ab0f9bec9
https://github.com/llvm/llvm-project/commit/053c94e66386931494074db1db02818ab0f9bec9
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/llvm-libc-macros/linux/sched-macros.h
M libc/include/llvm-libc-types/cpu_set_t.h
M libc/include/sched.yaml
M libc/src/sched/CMakeLists.txt
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/sched_cpualloc.cpp
A libc/src/sched/linux/sched_cpufree.cpp
A libc/src/sched/sched_cpualloc.h
A libc/src/sched/sched_cpufree.h
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/cpu_alloc_test.cpp
Log Message:
-----------
[libc] Implement CPU_ALLOC and CPU_FREE (#202349)
Like the other macros, this commit uses an internal (__-prefixed)
entrypoint.
I added an internal typedef for the mask type to make bit set
calculations slightly safer. I also removed the comment about supporting
larger cpu counts, as increasing the struct size is not necessary to do
that -- that's what these macros are for. Increasing it would be
necessary to support operations on the fixed-size cpu sets, but that
cannot be done lightly due to ABI stability.
I added a test that checks allocations for both small and large cpu set
sizes.
Assisted by Gemini.
Commit: 57197a0c7b9bb9c362e83e755f653c29996458b7
https://github.com/llvm/llvm-project/commit/57197a0c7b9bb9c362e83e755f653c29996458b7
Author: dpalermo <dan.palermo at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
R flang/test/Semantics/OpenMP/target-enter-data-temp-descriptor-omp61.f90
R flang/test/Semantics/OpenMP/target-enter-data-temp-descriptor.f90
Log Message:
-----------
Revert "[Flang][OpenMP][Sema] Add OpenMP warning when mapping local descriptors to device on enter without a corresponding exit" (#203324)
Reverts llvm/llvm-project#201060
Warning is actually reporting an error causing compilation to fail:
error: Semantic errors in OpenMPTargetStream.F90
Above error from Babelstream. Can be seen with either of the following
reproducers:
aomp/test/smoke-fort/milestone-3-babel-copy
aomp/test/smoke-fort-dev/milestone-3-babel
Commit: 7ffcbc27ea719531e8bda54fa1b0aca5c8a7e095
https://github.com/llvm/llvm-project/commit/7ffcbc27ea719531e8bda54fa1b0aca5c8a7e095
Author: Lawson Darrow <103522304+Lawson-Darrow at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/analysis-malformed-yaml-error.test
A llvm/test/tools/llvm-exegesis/X86/analysis-skip-unknown-opcode.test
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkResult.h
Log Message:
-----------
[llvm-exegesis] Skip benchmark entries with unknown opcodes in analysis mode (#201162)
Fixes #144403
`llvm-exegesis -mode=analysis` currently aborts the whole run if any
entry references an unknown opcode (e.g. an old sample whose instruction
was since renamed). A single bitrotted entry discards the results for
every valid one:
```
uops-test.yaml:5:7: error: No opcode with name 'VADDPDYrrr'
llvm-exegesis: 'uops-test.yaml': invalid argument
```
This adds an opt-in `SkipInvalidEntries` parameter to
`Benchmark::readYamls`. When set, the `YamlContext` records recoverable
per-entry deserialization errors (e.g. an unknown opcode or register)
instead of returning them from `ScalarTraits::input` to the YAML parser,
which would otherwise poison the stream and stop parsing. `readYamls`
then inspects the recorded error after each document, warns about the
offending entry, drops it, and continues with the rest. The default
stays `false`, preserving the existing strict behavior for all other
callers; analysis mode passes `true`.
For example, a file with one bitrotted entry and one valid entry now
produces:
```
warning: skipping benchmark entry: No opcode with name 'NOT_A_REAL_OPCODE'
warning: skipped 1 benchmark entries that could not be parsed
Parsed 1 benchmark points
```
Tests:
- Unit test in `BenchmarkResultTest.cpp` covering both strict (errors)
and skip (drops the bad entry, keeps the valid one) behavior.
- A lit test exercising analysis mode end-to-end: a file with one
unknown-opcode entry plus one valid entry still produces clusters output
and emits the warning.
The "did you mean '<nearest>'?" opcode suggestion mentioned in the issue
(via `OptTable::findNearest`) is left as a follow-up.
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 050b4fc438c0b3b96e4285020eff75cf0ed11a6a
https://github.com/llvm/llvm-project/commit/050b4fc438c0b3b96e4285020eff75cf0ed11a6a
Author: Farid Zakaria <fmzakari at fb.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
A llvm/test/CodeGen/X86/code-model-elf-constpool-large.ll
Log Message:
-----------
[MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (#190903)
Under -mcmodel=large on x86-64, constant pool entries were placed into
`.rodata.cst{4,8,16,32}` without the `SHF_X86_64_LARGE` flag. Meanwhile,
named global constants correctly received .lrodata with the large flag
via getSectionPrefixForGlobal().
Fix initELFMCObjectFileInfo() to use .lrodata.cst* section names with
SHF_X86_64_LARGE when the Large parameter is true and the target is
x86-64.
Commit: 2af4354a578ad21b94d93bf81d59043bbec86f4b
https://github.com/llvm/llvm-project/commit/2af4354a578ad21b94d93bf81d59043bbec86f4b
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
Log Message:
-----------
[OFFLOAD][L0] Add control for Copy Offload Hint (#203203)
In some cases setting ZE_COMMAND_QUEUE_FLAG_COPY_OFFLOAD_HINT reduces
performance. Here we introduce
LIBOFFLOAD_LEVEL_ZERO_USE_COPY_OFFLOAD_HINT env var to allow users to
control the hint (which continues to be on by default).
Commit: 57e2393bcd48d81958d08abbd4a1a631cfd21a04
https://github.com/llvm/llvm-project/commit/57e2393bcd48d81958d08abbd4a1a631cfd21a04
Author: dpalermo <dan.palermo at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/test/OpenMP/amdgcn_weak_alias.c
M clang/test/OpenMP/declare_target_codegen.cpp
M clang/test/OpenMP/target_codegen.cpp
M clang/test/OpenMP/target_depend_codegen.cpp
M clang/test/OpenMP/target_indirect_codegen.cpp
M clang/test/OpenMP/target_parallel_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_simd_codegen.cpp
M clang/test/OpenMP/target_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_depend_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_depend_codegen.cpp
M llvm/include/llvm/Frontend/Offloading/Utility.h
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
M mlir/test/Target/LLVMIR/omptarget-declare-target-to-host.mlir
Log Message:
-----------
Revert "[OpenMP] Use ext linkage for kernels handles and globals handles keep…" (#203327)
Reverts llvm/llvm-project#202827
This change is breaking omp target template support:
https://github.com/ROCm/aomp/tree/aomp-dev/test/smoke/unique-kernel-name
```
[~/git/aomp/test/smoke/unique-kernel-name]$ AOMP=/COD/LATEST/trunk make run
/COD/LATEST/trunk/bin/clang++ -O2 -fopenmp --offload-arch=gfx90a -D__OFFLOAD_ARCH_gfx90a__ b.cpp a.cpp -o unique-kernel-name
ld.lld: error: duplicate symbol: .offloading.entry.__omp_offloading_811_5962ffa__ZN3fooIfEC1Ev_l7
>>> defined at b.cpp
>>> /tmp/b-1462b7.o:(.offloading.entry.__omp_offloading_811_5962ffa__ZN3fooIfEC1Ev_l7)
>>> defined at a.cpp
>>> /tmp/a-40aac4.o:(llvm_offload_entries+0x0)
/mnt/COD/2026-06-11/trunk_23.0-0/bin/clang-linker-wrapper: error: 'ld.lld' failed
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [../Makefile.rules:62: unique-kernel-name] Error 1
```
The following template is included in both a.cpp & b.cpp:
```
[~/git/aomp23.0/aomp/test/smoke/unique-kernel-name]$ cat t.h
template<typename T>
class foo
{
public:
foo()
{
#pragma omp target
{
T a;
}
}
};
```
Commit: 988778d2216deaca5405f23020374f8ca6c131ee
https://github.com/llvm/llvm-project/commit/988778d2216deaca5405f23020374f8ca6c131ee
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
A clang/test/CIR/CodeGen/static-local-nested-reference.cpp
Log Message:
-----------
[CIR] Force emission of static local enclosing functions (#201941)
When getOrCreateStaticVarDecl is called, we need to call
`getAddressOfGlobal` to trigger the emission of the enclosing function.
In most cases this has already happened, but there are cases where the
enclosing function would not otherwise have been emitted. See
https://bugs.llvm.org/show_bug.cgi?id=18020 for details.
It appears that this was mistakenly seen as OpenMP-specific behavior
because of an OpenMP RAII guard that surrounds it in classic codegen,
but that actually is there to skip the behavior when generating OpenMP
device code.
We also needed to insert the static local decl into CIRGenModule's map
by calling `setStaticLocalDeclAddress`. To avoid a duplicate emission.
Assisted-by: Cursor / claude-opus-4.8
Commit: ea1d7e394e5fae100f0b703c3d61e01c0b0994cd
https://github.com/llvm/llvm-project/commit/ea1d7e394e5fae100f0b703c3d61e01c0b0994cd
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/bind-temporary-lvalue.cpp
Log Message:
-----------
[CIR] Implement bind temporary lvalue (#202755)
This change implements the handling to emit a CXXBindTemporaryExpr
l-value. This is a very direct port from the classic codegen
implementation, leveraging existing functions in CIR.
Commit: f01cbe77581aab4079888d3356997ac0b7551c76
https://github.com/llvm/llvm-project/commit/f01cbe77581aab4079888d3356997ac0b7551c76
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-operand-deps-direct-use.ll
Log Message:
-----------
[SLP] Recompute deps of copyable-modeled operands used directly
An instruction modeled as a copyable element elsewhere can also be used
directly by a later-built node sharing an instruction with the copyable
nodes. The direct use was not counted, so the scheduler over-decremented
the operand and tripped the unscheduled-deps assertion. Defer
recomputation whenever the operand is modeled as a copyable element
anywhere.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/203342
Commit: 70beebdcf407f931cc8f9e28550b67ee3c60ecc7
https://github.com/llvm/llvm-project/commit/70beebdcf407f931cc8f9e28550b67ee3c60ecc7
Author: Luisa Cicolini <48860705+luisacicolini at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.mir
A llvm/test/CodeGen/AArch64/combine-max-min.ll
Log Message:
-----------
[GIsel] import min/max rewrites (#188267)
this PR imports the rewrites for min/max operations existing in the
SelectionDAG
[combine](https://github.com/llvm/llvm-project/blob/20aff2085c358d3e112b245494161ddb9ffe0410/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4272)
to GlobalISel
---------
Co-authored-by: Osman Yasar <osmanyas05 at gmail.com>
Commit: a114ffdf3617671d2dbb9d78963c7b06155336a3
https://github.com/llvm/llvm-project/commit/a114ffdf3617671d2dbb9d78963c7b06155336a3
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/include/lldb/Host/ProcessRunLock.h
M lldb/source/Host/common/ProcessRunLock.cpp
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/TestRunLockReentrantDeadlock.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/bkpt_resolver.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/main.c
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/ProcessRunLockTest.cpp
Log Message:
-----------
[lldb] Make ProcessRunLock recursive on the read side per-thread (#201685)
Commit: fa888b39e29c1851f55b26c3a760e95659e8d315
https://github.com/llvm/llvm-project/commit/fa888b39e29c1851f55b26c3a760e95659e8d315
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/API/commands/platform/process/launch/TestPlatformProcessLaunch.py
Log Message:
-----------
[lldb/test] Skip TestPlatformProcessLaunch on remote-darwin targets (#203070)
Commit: 31613bff99a4404dcf045b6d51e87b086f19f865
https://github.com/llvm/llvm-project/commit/31613bff99a4404dcf045b6d51e87b086f19f865
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Drop redundant noundef assume bundles (#203309)
Commit: 86aaf7b55ef5bfe4f96c8d58ce6addfe5e85967b
https://github.com/llvm/llvm-project/commit/86aaf7b55ef5bfe4f96c8d58ce6addfe5e85967b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/aarch64-vector-functions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/vectorizable-intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/call.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract_in_tree_user.ll
M llvm/test/Transforms/SLPVectorizer/X86/intrinsic.ll
M llvm/test/Transforms/SLPVectorizer/X86/intrinsic_with_scalar_param.ll
M llvm/test/Transforms/SLPVectorizer/X86/powi-regression.ll
M llvm/test/Transforms/SLPVectorizer/X86/powi.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/sincos.ll
Log Message:
-----------
[SLP] Cost struct-returning intrinsic calls with a vector library mapping
getVectorCallCosts queried the vector intrinsic cost with a type-based-only
IntrinsicCostAttributes. That path always scalarizes struct-returning
intrinsics (e.g. llvm.sincos), which have no VFDatabase name mapping.
Retry with an argument-aware query when the type-based cost looks scalarized.
Fixes #200644
Reviewers: hiraditya, bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/201389
Commit: 5c8e727562cec51033f4ea0f5aa354c07be66587
https://github.com/llvm/llvm-project/commit/5c8e727562cec51033f4ea0f5aa354c07be66587
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/include/flang/Support/Flags.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Support/Flags.cpp
M flang/test/Integration/OpenMP/map-types-and-sizes.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
R flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map-2.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-simple.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
A flang/test/Lower/OpenMP/Todo/firstprivate-target.f90
M flang/test/Lower/OpenMP/defaultmap.f90
M flang/test/Lower/OpenMP/different_vars_lastprivate_barrier.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/target-map-complex.f90
M flang/test/Lower/OpenMP/target-scope.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Semantics/OpenMP/symbol08.f90
R offload/test/offloading/fortran/target-firstprivate.f90
Log Message:
-----------
Revert "[Flang][OpenMP] remove enable-delayed-privatization-staging to suppor…" (#203348)
Reverts llvm/llvm-project#200952
test added in commit llvm/llvm-project#200952
`/offload/test/offloading/fortran/target-firstprivate.f90` on x86
offload, will fix test and open new PR with fixed changes
Commit: 3b67307500e9f8c1dfc994bc24ded8e114cfcc0a
https://github.com/llvm/llvm-project/commit/3b67307500e9f8c1dfc994bc24ded8e114cfcc0a
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
M offload/plugins-nextgen/level_zero/include/L0Event.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Event.cpp
Log Message:
-----------
[OFFLOAD][L0] Use counter-based events for inorder queues (#202301)
Inorder queues can use counter-based events which have better
performance and provide early-reused semantics.
Assisted by Claude.
Commit: 582643f1ec62d0c81d97afcf1b741babb3152728
https://github.com/llvm/llvm-project/commit/582643f1ec62d0c81d97afcf1b741babb3152728
Author: HoĂ ng Minh ThiĂŞn <hoangminhthien05022009 at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/config/config.json
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/except_value_utils.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/macros/optimization.h
M libc/src/__support/math/asinbf16.h
M libc/src/__support/math/asinf16.h
M libc/src/__support/math/asinhf16.h
M libc/src/__support/math/asinpi.h
M libc/src/__support/math/coshf.h
M libc/src/__support/math/coshf16.h
M libc/src/__support/math/erfcf16.h
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
M libc/src/__support/math/exp10f.h
M libc/src/__support/math/exp10f16.h
M libc/src/__support/math/exp10m1f.h
M libc/src/__support/math/exp10m1f16.h
M libc/src/__support/math/exp2.h
M libc/src/__support/math/exp2f.h
M libc/src/__support/math/exp2f16.h
M libc/src/__support/math/exp2m1f.h
M libc/src/__support/math/exp2m1f16.h
M libc/src/__support/math/expf.h
M libc/src/__support/math/expf16.h
M libc/src/__support/math/expm1.h
M libc/src/__support/math/expm1f.h
M libc/src/__support/math/expm1f16.h
M libc/src/__support/math/sin.h
M libc/src/__support/math/sincos.h
M libc/src/__support/math/sincosf.h
M libc/src/__support/math/sinf.h
M libc/src/__support/math/sinf16.h
M libc/src/__support/math/sinhf.h
M libc/src/__support/math/sinhf16.h
M libc/src/__support/math/tan.h
M libc/src/__support/math/tanf16.h
M libc/src/__support/math/tanhf16.h
M libc/src/__support/str_to_float.h
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/utils/MPFRWrapper/MPFRUtils.h
Log Message:
-----------
[libc][math] Adding LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY option (#201154)
This PR adds a new option ~~`LIBC_MATH_ALWAYS_ROUND_NEAREST`~~
`LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY` to LLVM libm.
There are some UBs that I kept as-is from the original code to keep the
changes non-disruptive (which I've marked with TODO comments)
Benchmarks (from `files.zip` in the comment
https://github.com/llvm/llvm-project/issues/198276#issue-4468816457):
- System libm:
```
overflow (>710) 1.55 ns/call (644M ops/sec)
underflow to 0 (<-746) 1.34 ns/call (747M ops/sec)
normal [-10,10] 4.41 ns/call (227M ops/sec)
denormals [-740,-735] 2.25 ns/call (444M ops/sec)
near-uflow [-700,-690] 2.25 ns/call (444M ops/sec)
```
- LLVM libm (without the option being set):
```
overflow (>710) 5.21 ns/call (192M ops/sec)
underflow to 0 (<-746) 7.20 ns/call (139M ops/sec)
normal [-10,10] 4.06 ns/call (246M ops/sec)
denormals [-740,-735] 5.85 ns/call (171M ops/sec)
near-uflow [-700,-690] 4.06 ns/call (246M ops/sec)
```
- LLVM libm (with the option being **set**, `bench-exp-paths-inc.cc`)
```
overflow (>710) 1.95 ns/call (514M ops/sec)
underflow to 0 (<-746) 2.23 ns/call (449M ops/sec)
normal [-10,10] 3.43 ns/call (292M ops/sec)
denormals [-740,-735] 5.19 ns/call (193M ops/sec)
near-uflow [-700,-690] 3.43 ns/call (292M ops/sec)
```
Notice that in the `bench-exp-paths-inc.cc` file, I've changed the
option name from `LIBC_MATH_ROUND_NEAREST` to
`LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY`
Benchmark system: macOS 26.5, Apple M3.
Commit: 74abe832e849c73798589a1eb1ed0f8ae576f07e
https://github.com/llvm/llvm-project/commit/74abe832e849c73798589a1eb1ed0f8ae576f07e
Author: Owen Anderson <resistor at mac.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/test/MC/RISCV/target-abi-valid.s
Log Message:
-----------
[RISCV][CHERIoT] Define ABI_CHERIOT. (#192929)
These correspond to the CHERIoT ABI, documented here:
https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
In particular, CHERIoT is an RV32E-based architecture extended with
CHERI support that is not binary compatible with the proposed RV Y base.
Amongst other changes, it has customized calling conventions, such as
passing f64 in capability registers.
Commit: 08fea044e9a6b3eadc9348ab78d876caf68d95bb
https://github.com/llvm/llvm-project/commit/08fea044e9a6b3eadc9348ab78d876caf68d95bb
Author: Alex Langford <alangford at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/locations/TestDAP_locations.py
Log Message:
-----------
[lldb] Skip TestDAP_locations.py on arm64e (#203130)
See: https://github.com/llvm/llvm-project/issues/203127
Commit: 96eb0cb1941f6cb91404b28a08b39705fc1daf84
https://github.com/llvm/llvm-project/commit/96eb0cb1941f6cb91404b28a08b39705fc1daf84
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A clang/test/AST/undocumented-attrs.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
Forcefully require new attributes to be documented (#203296)
Several years ago we began to require all new attributes be documented,
but we never had anything enforcing the requirement. However, despite
reviewers requesting this documentation, it's been missed often enough
that enforcement makes sense in order to reduce maintenance burden.
This adds a new tablegen option to spit out the list of undocumented
attributes, and a test which lists all of the existing undocumented
ones. If a new attribute is added, this test should catch the failure.
Commit: 5dcdab84c451836b4019a5fbfcd50282224f7d3a
https://github.com/llvm/llvm-project/commit/5dcdab84c451836b4019a5fbfcd50282224f7d3a
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
A llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
Log Message:
-----------
[AMDGPU] MC support for v_wmma_f64_16x16x4_f64 (#203141)
Commit: da88ce239d718d0f985fdd2268e0d111138ca506
https://github.com/llvm/llvm-project/commit/da88ce239d718d0f985fdd2268e0d111138ca506
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
A flang/test/Semantics/OpenMP/type-param-inquiry.f90
Log Message:
-----------
[flang][OpenMP] Add type-param-inquiry checks for non-list clauses (#203059)
Clauses that take lists of objects have these objects checked in a
single place. There are still several clauses that take variables, but
not via a list. Those clauses still need individual checks for
type-param inquiries.
Commit: 06bc3b75f3697e848662201ac9e7769ccc2467ed
https://github.com/llvm/llvm-project/commit/06bc3b75f3697e848662201ac9e7769ccc2467ed
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
A llvm/test/Transforms/LICM/vector-insert.ll
Log Message:
-----------
[LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts (#200532)
When building vectors from multiple scalars in a loop, allow the
insertions using invariant data to be hoisted, even if blocked by the
variant insertions.
In the SLP vectorizer, c1b37eacbf makes the assumption that these build
vectors will properly be hoisted, when they are not leads to regressions
such as #195497.
Assisted By: Codex
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: bcb5213308e875299a6f9ed993171b65f0bae3d0
https://github.com/llvm/llvm-project/commit/bcb5213308e875299a6f9ed993171b65f0bae3d0
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/SISchedule.td
Log Message:
-----------
[AMDGPU] Add gfx1251 speed model (#203142)
Adjust generic speed model to account for a slowest.
Commit: 78ae86408c30f4a0c2502db7bcd91f9e2adc13d7
https://github.com/llvm/llvm-project/commit/78ae86408c30f4a0c2502db7bcd91f9e2adc13d7
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
M cross-project-tests/debuginfo-tests/dexter/dex/dextIR/StepIR.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Nodes.py
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/nested_wheres.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/valid-parse.test
Log Message:
-----------
[Dexter] Add support for nested state nodes (#201395)
This patch adds support for nested state nodes, !where and a new !and
node. Nested state nodes are evaluated only at a frame relative to the
frame that their parent matched to:
- `!where` can only match the frame immediately called from/leafwards
from their parent frame.
- `!and` can only match the same frame as their parent frame.
Commit: ac488f14bce1441df9e53b4dd9b223ffa8753621
https://github.com/llvm/llvm-project/commit/ac488f14bce1441df9e53b4dd9b223ffa8753621
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
Log Message:
-----------
[NFC][lldb] Store StackFrame member as a reference in DIL (#201437)
This reduces unchecked pointer dereferencing.
Commit: 4ba46cda3471efefa7bc710b7157fee71a267140
https://github.com/llvm/llvm-project/commit/4ba46cda3471efefa7bc710b7157fee71a267140
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
Log Message:
-----------
[AMDGPU] Intrinsic and codegen for wmma_f64_16x16x4_f64 (#203143)
Commit: 066fe34dcceb2ebb91056d9173e1c9868815983c
https://github.com/llvm/llvm-project/commit/066fe34dcceb2ebb91056d9173e1c9868815983c
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/nested_wheres.cpp
Log Message:
-----------
[Dexter][NFC] Fixup test line numbers (#203360)
A previous commit (78ae864) added a test that contained off-by-1 errors
in the line numbers used in the Dexter script; this patch adjusts these
to the correct line number.
Commit: 6f3fd2accfd3e1cdbf537007415a5ec47ddd12a8
https://github.com/llvm/llvm-project/commit/6f3fd2accfd3e1cdbf537007415a5ec47ddd12a8
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU] Builtin support for wmma_f64_16x16x4_f64 (#203144)
Commit: a296bdef76b9e9c6effbb6d052e75b3ef3670f3e
https://github.com/llvm/llvm-project/commit/a296bdef76b9e9c6effbb6d052e75b3ef3670f3e
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/docs/ProgrammersManual.rst
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Support/StringMap.cpp
M llvm/unittests/ADT/StringMapTest.cpp
M llvm/utils/gdb-scripts/prettyprinters.py
Log Message:
-----------
[StringMap] Replace tombstone deletion with TAOCP 6.4 Algorithm R () (#203354)
Reland #202103 after relanding "[StringMap] Invalidate iterators in
remove()" (#203249)
StringMap uses quadratic probing with lazy deletion: an erased entry
becomes a tombstone, a third bucket state alongside empty and live that
every find/insert must inspect.
Switch to linear probing with Knuth TAOCP 6.4 Algorithm R deletion,
similar to DenseMap #200595.
erase now relocates the following entries to close the hole. StringMap
buckets are pointers to heap-allocated entries, so only the pointers
(and the parallel hash array) move. References and pointers to entries
remain valid, but iterators are invalidated.
Depends on #202237 and #202520
Aided by Claude Opus 4.8
Commit: 024f39cbef647cd8ec196fd4d999b81f37d39e2d
https://github.com/llvm/llvm-project/commit/024f39cbef647cd8ec196fd4d999b81f37d39e2d
Author: Daemon <daemonpilot at hotmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Avoid redundant stack push/pop in createSCEVIter (#199352)
This patch simplifies the iterative worklist handling in createSCEVIter.
In the previous implementation, a `Value` that could not be materialized
immediately would typically be pushed onto the stack twice and popped
twice: first in the initial unvisited state, and then again after being
re-queued in the visited state once its operands had to be processed
first.
This change avoids that redundant re-queue step by updating the existing
stack entry in place before pushing unresolved operands. Use
`setInt(true)` to update the existing `Stack` entry in place instead of
pushing a separate `(V, true)` entry. This saves one
`emplace_back`/`pop_back` pair for each `Value`, and reduces memory
consumption of the `Stack` worklist.
Commit: 08dfbc9c0704662cf36190a1f2275eab04d0b14a
https://github.com/llvm/llvm-project/commit/08dfbc9c0704662cf36190a1f2275eab04d0b14a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
Log Message:
-----------
[VPlan] Handle VPCurrentIterationPHI in both plain and HCFG plans. (#203082)
In plain CFG plans, VPCurrentIterationPHI must come second (first is phi
for canonical IV), and first in the region form. Adjust verifier
accordingly.
This allows using RUN_VPLAN_PASS for dissolveLoopRegions,
expandBranchOnTwoConds and convertToVariableLengthStep.
PR: https://github.com/llvm/llvm-project/pull/203082
Commit: 4d95db7d48bf2c782d0d8e563bb06e64349f7a5e
https://github.com/llvm/llvm-project/commit/4d95db7d48bf2c782d0d8e563bb06e64349f7a5e
Author: Guray Ozen <guray.ozen at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvm/barrier.mlir
Log Message:
-----------
[MLIR][NVVM] Revert barrier aligned behaviour (#202996)
Previously we changed behaviour of nvvm.barrier. This PR changes it to
original behaviour.
Commit: b6501be5448273989e28210b4befd3b862568aff
https://github.com/llvm/llvm-project/commit/b6501be5448273989e28210b4befd3b862568aff
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][deps] Strip `CodeGenOptions` command-line arguments (#203350)
This change speeds up dependency scanning for compilation caching with
explicit modules by 1.34x (wall-time) and 1.51x (instructions).
Performance of regular explicit module scans is not affected, because
that mode already makes good use of the copy-on-write nature of
`CowCompilerInvocation`.
Commit: 0ca0a369a6c51ef742c83a0a24109c2ee522f734
https://github.com/llvm/llvm-project/commit/0ca0a369a6c51ef742c83a0a24109c2ee522f734
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/DebugInfo/CodeView/TypeDumpVisitor.cpp
M llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp
Log Message:
-----------
[DebugInfo][CodeView] Reuse enum tables in type dumpers (#202757)
Reuse the process-lifetime enum tables in `EnumTables.cpp` from
`TypeDumpVisitor` and `TypeRecordMapping` instead of emitting duplicate
`EnumEntry` arrays.
On Darwin arm64 Release, `llvm-readobj` decreases from 12,046,992 to
12,030,048 bytes (-16,944 bytes), with 599 fewer fixups
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: a6351d882ca3086c62e052fbc4f7f585e157213b
https://github.com/llvm/llvm-project/commit/a6351d882ca3086c62e052fbc4f7f585e157213b
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/Object/DXContainer.cpp
Log Message:
-----------
Fix "not all control paths return" warnings; NFC (#203361)
In both cases, the switches are fully covered but MSVC still diagnoses.
Commit: f3105e22dc292dc1b2d91c80edbc169d77f91bdd
https://github.com/llvm/llvm-project/commit/f3105e22dc292dc1b2d91c80edbc169d77f91bdd
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/test/CodeGen/AArch64/arm64e-tail-call-autib.ll
Log Message:
-----------
[arm64e][cfi] .cfi_negate_ra_state is irrelevant for Mach-O platforms (#203076)
The arm64e unwinder on Mach-O platforms always assumes saved LR's have
been signed with a pacibsp, and does not support mixed signed and
un-signed frames. Since the unwinder behaves the same whether the
directive is present, it is better to avoid emitting it in the first
place. This aligns with the behavior of AppleClang.
rdar://178084701
Commit: 9bece3b7dc3bb184ae3e6f1bdc4a864a096a6d68
https://github.com/llvm/llvm-project/commit/9bece3b7dc3bb184ae3e6f1bdc4a864a096a6d68
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
M mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
M mlir/test/Target/SPIRV/gl-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Add GL atan2 op (#201927)
Commit: 9ce63d09cff0bf07da9623b753010112db87b1d7
https://github.com/llvm/llvm-project/commit/9ce63d09cff0bf07da9623b753010112db87b1d7
Author: carlobertolli <carlo.bertolli at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/shift-op.ll
Log Message:
-----------
[AMDGPU][SCEV] Tighten max backedge-taken count for shift recurrence loops. (#197292)
Application code on AMDGPUs often uses the following pattern:
for (int i = blockDim.x / 2; i >= 1; i >>= 1)
if (threadIdx.x < i) {
<STMT based on threadIdx.x>
}
__syncthreads();
}
but this is currently not unrolled by LLVM for two reasons:
1. We overestimate the loop count with the number of bits in the
iteration variable (32).
2. Runtime unrolling is not applicable because of convergent
instructions.
For the specific pattern above, we can compute a tighter bound by using
range information, which for blockDim.x is (0,1025) and already emitted
by clang, resulting in 10 as upper bound as opposed to 32.
The next step in unrolling the loop is to adjust the threshold used to
control full loop unrolling with convergent instructions.
Assisted-by: Cursor
Commit: dfa5d20f7a0c7eefaf3c0a267b0971d1ea692394
https://github.com/llvm/llvm-project/commit/dfa5d20f7a0c7eefaf3c0a267b0971d1ea692394
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1251-w32.mir
Log Message:
-----------
[AMDGPU] Handle gfx1251 wmma hazard (#203145)
Generic target affected too in a pessimistic way.
Commit: d109c2ed9d5b456c3cfca8f74a6d26e2a2ec36c4
https://github.com/llvm/llvm-project/commit/d109c2ed9d5b456c3cfca8f74a6d26e2a2ec36c4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
Log Message:
-----------
[VPlan] Remove type verification from VPlanVerifier (NFC) (#201209)
With https://github.com/llvm/llvm-project/pull/200692
and https://github.com/llvm/llvm-project/pull/200686, types are no
checked at construction, and each operation that changes operands
(setOperand, addOperand etc) verifies that the replacement happens with
suitable types.
This should remove the need for running type checking as part of the
verifier.
PR: https://github.com/llvm/llvm-project/pull/201209
Commit: 229383a74eed0bc4f610713b9bd6ac7b6a152ef5
https://github.com/llvm/llvm-project/commit/229383a74eed0bc4f610713b9bd6ac7b6a152ef5
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
R clang/include/clang/Basic/AtomicLineLogger.h
R clang/lib/Basic/AtomicLineLogger.cpp
M clang/lib/Basic/CMakeLists.txt
R clang/unittests/Basic/AtomicLineLoggerTest.cpp
M clang/unittests/Basic/CMakeLists.txt
Log Message:
-----------
Revert "[clang] Reland Adding an Atomic Line Logger (#195885)" (#203366)
Reverts llvm/llvm-project#202428 as it is causing sanitizer failures.
Details at
https://github.com/llvm/llvm-project/pull/202428#issuecomment-4683845844.
Commit: 7a1f3d768041742b1d7988ca7df65fade9bff713
https://github.com/llvm/llvm-project/commit/7a1f3d768041742b1d7988ca7df65fade9bff713
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M .github/workflows/ids-check.yml
Log Message:
-----------
[ids-check] Re-enable the workflow (#203325)
Following earlier changes, the workflow should now only affect modified
headers.
The effort to build LLVM as a shared library is tracked in #109483.
Commit: 5f4e81c81be73304ae2dd87da366aac11debd9df
https://github.com/llvm/llvm-project/commit/5f4e81c81be73304ae2dd87da366aac11debd9df
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/src/time/CMakeLists.txt
M libc/src/time/asctime.cpp
M libc/src/time/asctime_r.cpp
M libc/src/time/ctime.cpp
M libc/src/time/ctime_r.cpp
M libc/src/time/gmtime.cpp
M libc/src/time/gmtime_r.cpp
M libc/src/time/localtime.cpp
M libc/src/time/localtime_r.cpp
M libc/src/time/mktime.cpp
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_l.cpp
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
M libc/test/src/time/ctime_r_test.cpp
M libc/test/src/time/ctime_test.cpp
M libc/test/src/time/gmtime_r_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/localtime_r_test.cpp
M libc/test/src/time/localtime_test.cpp
M libc/test/src/time/mktime_test.cpp
Log Message:
-----------
[libc] Complete hardening of time functions and remove Y2038 limit (#203298)
Completed safety and hardening refactoring for time functions, and
removed Y2038 limitation:
* Hardening: Refactored update_from_seconds to return ErrorOr<int>
(instead of int64_t status, as it only returns status 0 or error)
and propagated it to entrypoints. Added LIBC_CRASH_ON_NULLPTR to public
boundaries and converted tests to death tests using SIGILL.
* Y2038: Removed the artificial int32_t max check from ctime and
ctime_r, allowing them to support timestamps beyond 2038 (up to Year
9999).
* Tests: Updated ctime/ctime_r tests to include Year 2039 test cases and
updated overflow test cases to Year 10000.
* Style: Fixed header blocks and added Doxygen comments in converter.h,
str_converter.h, and time_utils.h.
* Conventions: Fixed relative includes in converter.h and time_utils.h.
Assisted-by: Automated tooling, human reviewed.
Commit: 53c483660a7a85884b4d161efa3a86a337d2e3a2
https://github.com/llvm/llvm-project/commit/53c483660a7a85884b4d161efa3a86a337d2e3a2
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 123078c (#203205)
This fixes 123078c21cfbe4c6abe1052e53739f9e933e8c1d.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: b0c7a44b9b8dbfa1c2cb30c6f9c94fcc90a4f090
https://github.com/llvm/llvm-project/commit/b0c7a44b9b8dbfa1c2cb30c6f9c94fcc90a4f090
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/pre-aggregated-records.s
M bolt/unittests/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Make mispreds optional for preagg B/T/R records (#202856)
Extend pre-aggregated format with an optional mispredictions field.
Update parsing and pre-aggregated profile writer.
Test Plan:
added PreAggregatedX86TestHelper.OptionalMispredField
updated pre-aggregated-records.s
Commit: 3b267d20846c8dc861fc302c1ac9a6d45d67aa02
https://github.com/llvm/llvm-project/commit/3b267d20846c8dc861fc302c1ac9a6d45d67aa02
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Simplify code by using common functions, NFC (#203373)
Commit: c6a51bab81e5637201d54d680654562a6936a618
https://github.com/llvm/llvm-project/commit/c6a51bab81e5637201d54d680654562a6936a618
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/induction-cost.ll
Log Message:
-----------
[LV] Add cost tests for induction recipes (NFC). (#203376)
Commit: e08481e61f4bff102079aead3f442a572ceb1034
https://github.com/llvm/llvm-project/commit/e08481e61f4bff102079aead3f442a572ceb1034
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
Log Message:
-----------
[AMDGPU] Add FeatureFullRate64Ops to gfx1251 (#203368)
Commit: 08f2c2808b8115a29cf57d59d3673c1430a7dbf4
https://github.com/llvm/llvm-project/commit/08f2c2808b8115a29cf57d59d3673c1430a7dbf4
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/perf2bolt/perf_brstack.test
Log Message:
-----------
[BOLT] Parse branch type from perf script
Parse branch type and set `IsReturn` when using perf data input.
This makes profile attaching more accurate for external returns.
Test Plan: updated perf_brstack.test
Reviewers: maksfb, rafaelauler, yozhu, ayermolo, yavtuk, paschalis-mpeis
Reviewed By: yozhu
Pull Request: https://github.com/llvm/llvm-project/pull/202813
Commit: b0f7e00e723d2ebea7c80b246391599d55271aea
https://github.com/llvm/llvm-project/commit/b0f7e00e723d2ebea7c80b246391599d55271aea
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/fold-intrinsics.ll
Log Message:
-----------
[InstSimplify] Const-fold clmul (#203346)
Commit: cdf2804105b223b5729bc8a3dea5e6d06c5cc5c9
https://github.com/llvm/llvm-project/commit/cdf2804105b223b5729bc8a3dea5e6d06c5cc5c9
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Clean up code around getFMFOrNone (NFC) (#202954)
Commit: 790938d0204af8307d7d37b3e10caef27b3d527f
https://github.com/llvm/llvm-project/commit/790938d0204af8307d7d37b3e10caef27b3d527f
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayAssignable.logicalptr.hlsl
M clang/test/CodeGenHLSL/cbuffer-matrix-layout-keyword.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
A llvm/test/CodeGen/DirectX/cbuffer_global_elim.ll
A llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
Log Message:
-----------
[HLSL] Set visibility of cbuffer global variables to internal (2nd attempt) (#202745)
Global variables for all resources except `cbuffer` are already emitted
with internal linkage (since #166844).
This change adds internal linkage to the `cbuffer` handle globals as
well.
One problem is that the `cbuffer` handle globals appears unused between
Clang CodeGen and `{DXIL|SPIRV}CBufferAccess` pass, which replaces
individual `cbuffer` constant globals with accesses through the
`cbuffer` handle globals. Before this pass runs, the unused globals
could get optimized away in `GlobalOptPass` with `-O3`.
To solve this, the `cbuffer` handle globals are added to the
`@llvm.compiler.used` list to make sure they stay in the module until
the `{DXIL|SPRIV}CBufferAccess` pass, which then removes them from the
list.
This is a second attempt to land this change. The [first
one](https://github.com/llvm/llvm-project/pull/200312) had to be
reverted because the use of `llvm::removeFromUsedList` introduced a
cyclic dependency between `LLVMTransformUtils` and `LLVMFrontendHLSL`.
This change fixes this by calling `llvm::removeFromUsedList` directly
from the passes.
Commit: 27dc2ec9b323edbb76e56388dbc8064a5109f430
https://github.com/llvm/llvm-project/commit/27dc2ec9b323edbb76e56388dbc8064a5109f430
Author: Shubh Pachchigar <33875085+shubhe25p at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/src/__support/str_to_integer.h
M libc/test/src/__support/str_to_integer_test.cpp
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/wchar/WcstolTest.h
Log Message:
-----------
[libc] Add C23 binary prefix support to strtointeger (#202243)
The C23 standard (N3220 §7.24.1.7) requires strtol and related functions
to recognize the 0b/0B prefix when base is 2 or 0. This change
implements that support and adds relevant tests.
Assisted by: Claude Sonnet 4.6 for generating and understanding Tests.
Co-authored-by: shubhe25p <shubhp at Mac.lan>
Commit: 84e6eb8ae98ddd3fdabbad5ab2ae0bc1cdcba706
https://github.com/llvm/llvm-project/commit/84e6eb8ae98ddd3fdabbad5ab2ae0bc1cdcba706
Author: Daniel Thornburgh <dthorn at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/modular-format.ll
M llvm/test/Verifier/modular-format.ll
Log Message:
-----------
[LLVM][InstCombine] Add fixed-point aspect to modular printf attribute (#202425)
This commit adds support for the "fixed" aspect inside LLVM's modular
printf optimizer pass (InstCombineCalls.cpp). It implements a targeted
format string parser that scans constant format strings for "%r, %R, %k,
%K" specifiers to resolve if the "fixed" aspect is needed, falling back
to conservatively assumed needed if the format string is dynamic.
This commit also adds missing Verifier checks for modular-format,
including those that guard the parts of its syntax that are newly used
by this change.
Generated by Gemini; reviewed and edited manually.
Commit: b57c32db810bb8619220591224b4a71bc2d4b40d
https://github.com/llvm/llvm-project/commit/b57c32db810bb8619220591224b4a71bc2d4b40d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/CMakeLists.txt
A lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.cpp
M lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Append access-violation detail to lldb-server stop description (#203301)
`lldb-server.exe` reports access violations with only the bare exception
code (e.g. `Exception 0xc0000005 encountered at address 0x...`), while
the in-process Windows debugger produces the much more useful `Access
violation
reading location 0x...` / `writing` / `DEP at` form.
This patch lifts the in process helper into a method of the
`ExceptionRecord` class to allow both Windows plugins to use it.
This fixes `exception_access_violation.cpp` with
`LLDB_USE_LLDB_SERVER=1`.
rdar://179366768
Commit: 8c64020b2397fc5dddd577276020cbb30cdbc6cc
https://github.com/llvm/llvm-project/commit/8c64020b2397fc5dddd577276020cbb30cdbc6cc
Author: Zhaoxuan Jiang <jiangzhaoxuan94 at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.h
M lld/MachO/SectionPriorities.cpp
M lld/MachO/SymbolTable.cpp
M lld/MachO/SymbolTable.h
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/Writer.cpp
A lld/test/MachO/bp-section-orderer-cold.s
A lld/test/MachO/cold-func-weak-merge.s
A lld/test/MachO/cold-func.s
Log Message:
-----------
[lld][MachO] Add N_COLD_FUNC support (#183909)
Parse `N_COLD_FUNC` from input object files and use it to move cold
functions to the end of __text, after all non-cold and ordered symbols.
Key behaviors:
- Cold functions are placed after all non-cold unordered symbols.
- Order file entries take precedence over the cold attribute: a cold
function listed in the order file retains its specified position.
- BP interaction: utilize the subgrouping introduced in #185661 to split
`N_COLD_FUNC` sections into a distinct subgroup.
- ICF interaction: when a non-cold section is folded into a cold master,
the master's coldness is unset. With safe_thunks, cold
address-significant functions get cold thunks placed in the cold region.
- The `N_COLD_FUNC` flag is stripped from the output symbol table.
Commit: 1d8dc059d8e183e95ab71e162f1b47aca659971b
https://github.com/llvm/llvm-project/commit/1d8dc059d8e183e95ab71e162f1b47aca659971b
Author: Aayush Shrivastava <iamaayushrivastava at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix crash on assert !Scopes.empty() in parseBrace() (#199100)
Fixes #199017
When angle-bracket parsing fails and resets the token stream, a closing
brace can be consumed twice through `parseConditional()`, each time
popping one entry from Scopes. This leaves Scopes empty when
`parseBrace()` encounters the legitimate closing brace, triggering the
assertion.
Replace the assert with a graceful return false, consistent with the
existing unbalanced-brace handling in `consumeToken()`.
Commit: 99ecce0d4adacbe71cce8e27e427011c76ead17f
https://github.com/llvm/llvm-project/commit/99ecce0d4adacbe71cce8e27e427011c76ead17f
Author: Christopher Di Bella <cjdb at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/TestDataFormatterLibcxxVectorSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/main.cpp
Log Message:
-----------
Teach LLDB's pretty-printer about libc++'s various `std::vector` layouts (#202438)
PR #155330 changes `std::vector` from unconditionally using three
pointers to represent its layout to potentially using three pointers or
a begin pointer and two integers. This commit changes LLDB so that it
can robustly work with the legacy vector layout, the new pointer layout,
and the new size-based layout.
Commit: 57d06749766b6e99ee52fdfd874ead83595ad505
https://github.com/llvm/llvm-project/commit/57d06749766b6e99ee52fdfd874ead83595ad505
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/test/CIR/CodeGen/bind-temporary-lvalue.cpp
Log Message:
-----------
[CIR] Fix bind-temporary-lvalue test (#203391)
This test was merged with checks for the old alloca format
Commit: fafc55b27f8b68279f9b32968ef903ddfccd3a62
https://github.com/llvm/llvm-project/commit/fafc55b27f8b68279f9b32968ef903ddfccd3a62
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/packed-fp64.ll
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add gfx1251 V_PK_ADD_F64 (#203382)
Commit: 8449a84b770b0ae15eb6b7595ea93c93323e6ac2
https://github.com/llvm/llvm-project/commit/8449a84b770b0ae15eb6b7595ea93c93323e6ac2
Author: Alexey Bader <alexey.bader at intel.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/docs/ClangSYCLLinker.rst
A clang/test/OffloadTools/clang-sycl-linker/archive-extras.ll
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/link.ll
M clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
M clang/test/OffloadTools/clang-sycl-linker/triple.ll
A clang/test/OffloadTools/clang-sycl-linker/weak-symbols.ll
M clang/tools/clang-sycl-linker/CMakeLists.txt
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/clang-sycl-linker/SYCLLinkOpts.td
Log Message:
-----------
[clang-sycl-linker] Add static archive (.a) support (#202829)
Add support for static archives of LLVM bitcode files to
clang-sycl-linker. The archive member-selection engine (a symbol-driven
fixed-point lazy extraction loop) is simplified to bitcode-only
handling.
clang-sycl-linker gains -l/--library,
--whole-archive/--no-whole-archive, and -u/--undefined options. The
previous --bc-library option is removed in favor of the standard -l
mechanism. Inputs (positional files and -l libraries) are now resolved
to in-memory buffers; archive members are pulled in lazily only when
they resolve undefined symbols, and bitcode is loaded with
parseBitcodeFile.
Co-Authored-By: Claude
---------
Co-authored-by: Yury Plyakhin <yury.plyakhin at intel.com>
Commit: 0d490215a541cf91b8e24e697570bb1cc938078d
https://github.com/llvm/llvm-project/commit/0d490215a541cf91b8e24e697570bb1cc938078d
Author: adams381 <adams at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
A clang/test/CIR/CodeGen/string-literal-high-bytes.c
Log Message:
-----------
[CIR] Lower string literals with high-bit bytes (#203384)
A string literal containing a byte >= 0x80 crashes CIR-to-LLVM lowering.
`convertStringAttrToDenseElementsAttr` builds each element's `APInt`
from a signed `char`, so a high-bit byte sign-extends to a 64-bit value
that no longer fits the 8-bit element width and trips the `APInt`
constructor assertion (`isUIntN(BitWidth, val) && "Value is not an N-bit
unsigned value"`).
Interpreting each string byte as `unsigned char` fixes it, mirroring
what #197269 did for scalar character literals. The string-literal array
path was the remaining site with the same defect, and the lowered LLVM
is byte-identical to classic CodeGen.
Repro: `char s[] = "\x80";` compiled with `-fclangir -emit-llvm`. This
also clears a cluster of SingleSource gcc-torture globals that embed
high-byte string data.
These globals compiled until #198427 removed the trailing-zeros
fast-path in the same lowering. String literals always carry a null
terminator (trailing zeros), so they previously took the insertvalue
path and never reached `convertStringAttrToDenseElementsAttr`; #198427
routes them through it and exposed this latent sign-extension bug.
Commit: 240539f1c1ba5f72ce5879807ed1a6dd5b694ef5
https://github.com/llvm/llvm-project/commit/240539f1c1ba5f72ce5879807ed1a6dd5b694ef5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
Log Message:
-----------
[VPlan] Account for canonical IV being simplified in verifier. (#203403)
In plain CFG plans, VPCurrentIterationPHIRecipe may be the first recipe,
if the canonical IV phi has been removed because it became unused (e.g.
the vector loop is known to only execute a single iteration).
Fixes https://lab.llvm.org/buildbot/#/builders/187/builds/20801.
Commit: 44c543639726d6c40017a20d73b572d26fceb698
https://github.com/llvm/llvm-project/commit/44c543639726d6c40017a20d73b572d26fceb698
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/struct_tm.h
A libc/include/llvm-libc-types/tm_gmtoff_t.h
M libc/include/time.yaml
M libc/src/time/strftime_core/converter.h
M libc/src/time/time_utils.h
M libc/test/src/time/strftime_test.cpp
Log Message:
-----------
[libc] Add timezone extensions to struct tm and time.h (#203381)
Added timezone extensions to struct tm and time.h:
* struct tm: Added tm_gmtoff and tm_zone, with __tm_gmtoff and __tm_zone
aliases defined as macros.
* time.h: Added tm_gmtoff_t type.
Updated gmtime and localtime to initialize these fields, and enabled %z
and %Z support in strftime.
These changes are implemented unconditionally. While the timezone
database loading is not yet implemented (so local time offsets default
to UTC/0), the timezone formatting and struct field support is fully
complete. Implementing this conditionally would require complex
build-time configuration and conditional inclusion of code, which is
avoided as this implementation is already a complete improvement over
the previous state.
Assisted-by: Automated tooling, human reviewed.
Commit: 112fb2f79d7983be203957cad6b148865182ed47
https://github.com/llvm/llvm-project/commit/112fb2f79d7983be203957cad6b148865182ed47
Author: mleair <leairmark at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M flang/lib/Parser/Fortran-parsers.cpp
A flang/test/Parser/recovery09.f90
Log Message:
-----------
[flang] Improve error for data component definition after CONTAINS in derived type (#203379)
When a data component declaration appears after CONTAINS in a derived
type definition, flang previously emitted confusing "expected 'FINAL'",
"expected 'GENERIC'", and "expected 'PROCEDURE'" errors for each
misplaced component.
This patch adds a misplaced-component detector following the same
pattern as `misplacedSpecificationStmt` in program-parsers.cpp.
DataComponentDefStmt is tried as a last alternative in
TypeBoundProcBinding's first(). When it matches, fail<>() fires
with the message:
error: component definition must precede CONTAINS in a derived type
CombineFailedParses then replaces the three keyword-mismatch messages
with this single targeted one, since the component parse advances
further than the PROCEDURE/GENERIC/FINAL failures.
Assisted-By: AI
Commit: 421d296893ed173846c0aceaee67cdafa67da07b
https://github.com/llvm/llvm-project/commit/421d296893ed173846c0aceaee67cdafa67da07b
Author: adams381 <adams at nvidia.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
A clang/test/CIR/Transforms/abi-lowering/indirect-return-sret.cir
Log Message:
-----------
[CIR] Lower sret returns in CallConvLowering (#201716)
Functions that return an aggregate by value classify their return as
ArgKind::Indirect, but CallConvLowering reached an errorNYI for that
case, so the whole CallConv pass refused to lower any struct-returning
function.
rewriteFunctionDefinition now recognizes an Indirect return: the wire
return type becomes void, a hidden sret pointer is prepended as block
argument 0, and every cir.return is routed through that pointer. Rather
than storing the loaded return value through the sret pointer (a
byte-copy that breaks non-trivially-copyable types -- libstdc++'s SSO
std::string keeps a _M_p pointer into its own _M_local_buf, so a
byte-copy leaves the destination aliasing the source's dying stack
storage), insertSRetStores rewires the __retval alloca to the sret
pointer so construction flows directly into the caller's slot, matching
classic CodeGen's "construct into %agg.result" pattern. CIRGen emits one
cir.load __retval / cir.return pair per return statement, all reading
the
single __retval alloca, so the alloca is rewired once and every return
is
collapsed to a bare return. That cir.return (cir.load <alloca>) shape is
treated as an invariant and asserted with cast<> rather than guarded by
a
fallback. The sret parameter carries sret(T) align A writable
dead_on_unwind, plus noalias on definitions.
rewriteCallSite prepends the return slot, makes the call return void,
and reads the result back. When the result has a single store-into-dest
use whose destination dominates the call, it reuses that destination as
the sret slot and drops the redundant store, so the callee writes
straight into the local with no copy; otherwise it allocates a fresh
slot
and loads the value out. The slot's
per-argument attributes go through the same updateArgAttrs path as the
non-sret case, so sret composes with Extend (signext/zeroext) and Ignore
arguments.
byval indirect arguments and Expand are still errorNYI.
Co-authored-by: Cursor <cursoragent at cursor.com>
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 3397635cb50abdc9413246a3810f7d1701211f0b
https://github.com/llvm/llvm-project/commit/3397635cb50abdc9413246a3810f7d1701211f0b
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add gfx1251 V_PK_MUL_F64 (#203410)
Commit: 673ec226f6fae99ab58cb1cff90a795b03a17f80
https://github.com/llvm/llvm-project/commit/673ec226f6fae99ab58cb1cff90a795b03a17f80
Author: Jason Molenda <jmolenda at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
Log Message:
-----------
[lldb][macosx] Pare down the SimulatPlatform tests, don't run on intel (#203417)
TestSimulatorPlatform.py is flakey on the Intel Mac CI, doing a
'platform process list' and not getting a reply back. The issue is only
happening on the old Intel mac CI and not the newer arm64 CI's; it is
not important. I am skipping this test on the Intel mac CI.
I'm also removing test runs that try to build 32-bit binaries (i386,
armv7k) and the tests that would explicitly test for a legacy build load
command (e.g. `LC_VERSION_MIN_IPHONEOS`); we don't support building back
to when OSes were using those, any more.
Commit: bd1de35f75bf1b08c02939fc9c4b67c45630d902
https://github.com/llvm/llvm-project/commit/bd1de35f75bf1b08c02939fc9c4b67c45630d902
Author: Xyloflake <xyloflake at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Add Apple M5 host detection (#200616)
The values have been taken from `mach/machine.h` in the Xcode 26.5 SDK.
Commit: bfca0db5bd17ab116cd70464d7e1099b07a5872b
https://github.com/llvm/llvm-project/commit/bfca0db5bd17ab116cd70464d7e1099b07a5872b
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
Log Message:
-----------
[NFC][DirectX][SPIRV] Remove helper from HLSLFrontend (#203401)
Remove helper function `removeCBufferGlobalsFromUseList` which basically
implements existing `llvm::removeFromUsedLists`. Modify the passes that
use it to call `llvm::removeFromUsedLists`.
Follow-up on
https://github.com/llvm/llvm-project/pull/202745#discussion_r3398119720
Commit: 10836c2234c480ac943850fec9359c83dba2d45d
https://github.com/llvm/llvm-project/commit/10836c2234c480ac943850fec9359c83dba2d45d
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add gfx1251 V_PK_FMA_F64 (#203418)
Commit: 2e708e7c90e611a57f7e748347acc4dbd540e43a
https://github.com/llvm/llvm-project/commit/2e708e7c90e611a57f7e748347acc4dbd540e43a
Author: William Tran-Viet <wtranviet at proton.me>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M libcxx/include/optional
M libcxx/test/std/utilities/optional/optional.syn/optional_in_place_t.verify.cpp
M libcxx/test/std/utilities/optional/optional.syn/optional_nullopt_t.verify.cpp
Log Message:
-----------
[libc++] Reimplement `optional<T&>` as a partial specialization (#201983)
- Break out the `optional<T&>` implementation that was interwoven with
the regular interface
- This should simplify the implementation
- And fix a missed added constraint for the `std::swap` specialization.
Commit: 9f1e08fa8ed7bcf4b7cfaf9eaaa7c23a2d3ed347
https://github.com/llvm/llvm-project/commit/9f1e08fa8ed7bcf4b7cfaf9eaaa7c23a2d3ed347
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)
Hard errors were used in extractors during development to quickly
identify unsupported language constructs. This commit converts them to
DEBUG_WITH_TYPE so that these errors are silenced in release builds.
In addition, translating unsupported language constructs now silently
results in an empty EntityPointerLevelSet. The PointerFlowExtractor will
skip empty sets for either the source or the destination when building
edges to avoid an ill-formed edge set data structure.
rdar://178747892
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: 48813264376be9868bec78fa1653bc9003db512f
https://github.com/llvm/llvm-project/commit/48813264376be9868bec78fa1653bc9003db512f
Author: SeongJaePark <111725324+SeongjaeP at users.noreply.github.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/test/Dialect/Vector/vector-contract-to-parallel-arith-transforms.mlir
Log Message:
-----------
[mlir][vector][NFC] Document and simplify vector contract reshape helpers (#200544)
Replace the bare `// TODO` placeholders above `reshapeLoad` and
`reshapeStore`
in `LowerVectorContract.cpp` with doc comments describing each helper's
semantics (the `index == -1` / `index == 0` / `index > 0` cases) and
short
before/after IR examples.
Also drop the redundant `VectorType` parameter from both helpers; the
type is
now inferred from the value operand (`val` for `reshapeLoad`, `result`
for
`reshapeStore`).
Add a LIT test that exercises the recursive `reshapeLoad` unroll path by
mapping a parallel iterator to a non-leading dimension, which falls
through
to the generic `lowerParallel` / `reshapeLoad` path.
No functional change.
---------
Co-authored-by: sjae.park <dev at opt-ai.kr>
Commit: 7597c0c938b364306cbee21dd03835ff5b699c74
https://github.com/llvm/llvm-project/commit/7597c0c938b364306cbee21dd03835ff5b699c74
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.fmt-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
Log Message:
-----------
[AMDGPU] Validate WMMA scale/format combination (#203074)
Only some combinations are listed as supported.
Fixes: https://github.com/ROCm/llvm-project/issues/2634
Commit: 3ef102be08a0b9c3bd948e651d70f36dc73cc5ae
https://github.com/llvm/llvm-project/commit/3ef102be08a0b9c3bd948e651d70f36dc73cc5ae
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
Log Message:
-----------
[SSAF][PointerFlowExtractor] Handle empty initializer lists for scalars and unions (#201968)
Empty initializer lists for scalars and unions are corner cases that
were previously missed by the PointerFlowExtractor. This commit adds
support for these cases. Because the initializing values are implicitly
constant 0 (or nullptr), they do not bridge entity pointer levels.
rdar://178856689
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Commit: d583701b350c8b8767cc8e6c17f03aa6336cfc1d
https://github.com/llvm/llvm-project/commit/d583701b350c8b8767cc8e6c17f03aa6336cfc1d
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M libc/config/baremetal/config.json
Log Message:
-----------
[libc] Enable baremetal printf float320 (#203421)
For memory constrained baremetal devices using float320 seems a
reasonable option by default.
Commit: d543c49ad6bf02434abc5db85332d5ab45e6e3ca
https://github.com/llvm/llvm-project/commit/d543c49ad6bf02434abc5db85332d5ab45e6e3ca
Author: yueshe <yueshe1996 at gmail.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/darwin-objc-selector-stubs.m
Log Message:
-----------
[clang][Darwin] Disable ObjC class selector stubs when using LLD (#203388)
LLD does not support ObjC class selector stubs yet (which requires
synthesizing `objc_msgSendClass$...` stubs). This change disables
`-fobjc-msgsend-class-selector-stubs` by default when the linker is LLD.
Ref: https://github.com/llvm/llvm-project/issues/203385
Commit: 95746377678925adfe39c83081b4144d92c5d3b8
https://github.com/llvm/llvm-project/commit/95746377678925adfe39c83081b4144d92c5d3b8
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[Clang][RISCV] packed comparison intrinsics (#203191)
Add header wrappers for pmseq/pmsne/pmslt[u]/pmsgt[u]/pmsge[u]/pmsle[u]
as element-wise vector comparisons cast to the unsigned result type.
Commit: 7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc
https://github.com/llvm/llvm-project/commit/7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
Revert "[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)" (#203432)
This reverts commit 9f1e08fa8ed7bcf4b7cfaf9eaaa7c23a2d3ed347.
It causes build error:
https://lab.llvm.org/buildbot/#/builders/2/builds/53597.
The use of 'setCurrentDebugType' should be guarded by '#ifndef NDEBUG'
Commit: 8433cf6d6ccc49a0fd99ed86c7d94a1fbb2fd1be
https://github.com/llvm/llvm-project/commit/8433cf6d6ccc49a0fd99ed86c7d94a1fbb2fd1be
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
Log Message:
-----------
[AMDGPU] Make v2f64 fneg legal on gfx1251 (#203427)
Commit: b9704de13ca5ce3158c6681839162a791042c6f9
https://github.com/llvm/llvm-project/commit/b9704de13ca5ce3158c6681839162a791042c6f9
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Passes/PassBuilder.cpp
Log Message:
-----------
[PassBuilder] Table-drive pass name printing (#202656)
Replace the macro-expanded raw_ostream operations in
PassBuilder::printPassNames with static pass-name arrays and two shared
noinline printing loops. Preserve the generated category order and the
exact spelling of parameterized pass names.
The change only executes when a client requests the pass-name listing;
normal pipeline parsing and optimization do not access the new tables or
helpers.
A stripped opt binary shrinks from 115,493,720 to 115,394,640 bytes,
saving 99,080 bytes. The linked __TEXT section shrinks by 98,304 bytes.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Commit: 15fdc79231b9d32a6bef89f5fc89105b8d3f9363
https://github.com/llvm/llvm-project/commit/15fdc79231b9d32a6bef89f5fc89105b8d3f9363
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel][DirectX] Fix 2bccbf23edddf216ef060d34443f60f644d0fb06 (#203442)
Add new dep on MC
Commit: 56f8fbb0149146f50aa8c905467b9384e8cb7bad
https://github.com/llvm/llvm-project/commit/56f8fbb0149146f50aa8c905467b9384e8cb7bad
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Averaging Addition and Subtraction intrinsics(#203147)
Commit: 69371e6c313063fac7fb580c126cb17996d71a01
https://github.com/llvm/llvm-project/commit/69371e6c313063fac7fb580c126cb17996d71a01
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fix 8acfc364e9f788367ff0beab5c76a3527a689a0b (#203443)
Add extra htons yaml deps
Commit: 0591eef767078a0a079469656658c4a2fc017bbe
https://github.com/llvm/llvm-project/commit/0591eef767078a0a079469656658c4a2fc017bbe
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Move noundef assume bundles on loads into metadata (#203395)
Commit: beb2614e3ec915069380107409e88d002404aee9
https://github.com/llvm/llvm-project/commit/beb2614e3ec915069380107409e88d002404aee9
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fix 582643f1ec62d0c81d97afcf1b741babb3152728 (#203449)
Add dep for dyadic float -> attributes
Commit: 2a6cfc5643053117b3baa301b91afaf9fc5edede
https://github.com/llvm/llvm-project/commit/2a6cfc5643053117b3baa301b91afaf9fc5edede
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M compiler-rt/test/fuzzer/features_dir.test
M compiler-rt/test/fuzzer/merge-posix.test
Log Message:
-----------
[Fuzzer] Make two tests compatible with the internal shell. (#203448)
1. Remove redundant parntheses that broke the internal shell's parsing
logic.
2. Use env when specifying environment variables.
3. Rewrite a bash one-line loop in python.
Commit: 62847ab7593df144a5708406e6240ec5e8a3a101
https://github.com/llvm/llvm-project/commit/62847ab7593df144a5708406e6240ec5e8a3a101
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
Log Message:
-----------
[CIR] Support zero/one result trivial operation lower via tablegen (#203183)
### summary
Lower zero result operation have been supported in this PR:
https://github.com/llvm/llvm-project/pull/202273
In this PR, the lowering of operations with zero-result and one-result
is changed to be automatically lowered via TableGen. This helps reduce
the size of the file
`clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp`
#### test
I thought existing lower tests can cover this PR, so I didn't add more
tests.
Assisted-by: Claude Opus 4.8
Commit: c1991da69a5f6bd7117224c68f2f66546264a743
https://github.com/llvm/llvm-project/commit/c1991da69a5f6bd7117224c68f2f66546264a743
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvm/barrier.mlir
Log Message:
-----------
[MLIR][NVVM] Update nvvm.barrier.arrive Op (#202608)
This change updates the `nvvm.barrier.arrive` Op to lower using
intrinsics instead of inline PTX. It also adds a new `aligned` attribute
to the Op to lower to both aligned and unaligned forms.
PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#parallel-synchronization-and-communication-instructions-bar
Commit: f3f7317aaf39928329dd453a6a340e6ddd027b81
https://github.com/llvm/llvm-project/commit/f3f7317aaf39928329dd453a6a340e6ddd027b81
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
Log Message:
-----------
[AMDGPU] Add MC clamp support for bf16 trans instructions (#203433)
Based on recent gfx1250 sp3 update. Refer to DEGFXSP3-664
Commit: 8679ab6267aeae9971cae4ed7eff9966e813e28d
https://github.com/llvm/llvm-project/commit/8679ab6267aeae9971cae4ed7eff9966e813e28d
Author: HoĂ ng Minh ThiĂŞn <hoangminhthien05022009 at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M libc/test/src/math/RoundToIntegerTest.h
Log Message:
-----------
[libc] [math] Fix build bot failure introduced by unit test in PR #201154 (#203457)
The root cause is that the unit test
`libc/test/src/math/RoundToIntegerTest.h` `#include <cfenv>` which
requires the macro `__GLIBC_PREREQ` to be defined. But in that riscv32
runtime, seems like it's not defined.
Removing the include works fine, and at the same time, would resolve the
failure.
Commit: 89a5c690e51a0ea33c962842f90a8ec89965afa3
https://github.com/llvm/llvm-project/commit/89a5c690e51a0ea33c962842f90a8ec89965afa3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M clang/lib/CodeGen/Targets/RISCV.cpp
Log Message:
-----------
[RISCV] Return the type from detectVLSCCEligibleStruct instead of using an output argument. NFC (#203423)
We can replace the previous bool return with the type and use nullptr for
false.
Commit: 452f59c8dc30a3bc16c691f5862bc5b39d97319a
https://github.com/llvm/llvm-project/commit/452f59c8dc30a3bc16c691f5862bc5b39d97319a
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
A llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
Log Message:
-----------
Reapply "[LoopUnroll] Support parallel reductions for minmax" (#201010)
Reapplies 1e79ea1f5b3e (#182473) reverted by 56ccbc253150 (#200892). The
revert was due to a profcheck failure: prof-verify reported "select
annotation missing" on the combine select createMinMaxOp emits for FP
fcmp+select min/max.
This patch fixes it by marking the branch weights of newly inserted
selects as explicitly unknown.
Commit: efb038f38f23ee201ac872ae98668c2ef922f0fa
https://github.com/llvm/llvm-project/commit/efb038f38f23ee201ac872ae98668c2ef922f0fa
Author: ShashwathiNavada <shashwathinavada at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/Todo/error.f90
A flang/test/Lower/OpenMP/nothing.f90
Log Message:
-----------
[Flang][Openmp]Prevent TODO abort on nothing directive (#202679)
Since nothing is a no-op directive (OpenMP 5.2, 8.4), handle it during
lowering instead of falling through to the generic unimplemented
utility-directive path and triggering a TODO abort.
Commit: 06c7de45221621a0773d125ff7d016df87eb3d62
https://github.com/llvm/llvm-project/commit/06c7de45221621a0773d125ff7d016df87eb3d62
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
Log Message:
-----------
[LoopFusion][NFC] Avoid copying fusion candidates per pair (#203461)
`fuseCandidates()` copied both candidates (each holding two
`SmallVector<Instruction *, 16>`) for every adjacent pair examined, even
pairs rejected by an early continue. Bind them by const reference; they
are only read before being erased from the list, and performFusion runs
before the erases.
Commit: 15e7f2e8f2a14e5d574eb8894a4cbba8546291ca
https://github.com/llvm/llvm-project/commit/15e7f2e8f2a14e5d574eb8894a4cbba8546291ca
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/pre-aggregated-perf.test
Log Message:
-----------
[BOLT] Propagate DataAggregator parse errors
Propagate perf/preaggregated input parsing errors through DataAggregator
instead of terminating from per-input aggregation jobs.
This lets multi-input aggregation report failed inputs as warnings when
at least one input succeeds while returning errors when all inputs fail.
It also converts pre-aggregated parsing diagnostics to returned Error
values and removes worker-path exits from perf setup and parsing.
Test Plan: updated pre-aggregated-perf.test
Reviewers: maksfb, rafaelauler, ayermolo, yozhu, yavtuk
Reviewed By: rafaelauler
Pull Request: https://github.com/llvm/llvm-project/pull/200476
Commit: 2b04d746524f6970523ceda9a6a9489caa4f2337
https://github.com/llvm/llvm-project/commit/2b04d746524f6970523ceda9a6a9489caa4f2337
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-11 (Thu, 11 Jun 2026)
Changed paths:
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/test/X86/pre-aggregated-perf.test
Log Message:
-----------
[BOLT] Buffer DataAggregator diagnostics
To avoid mixed up error messages in multi-perf case, provide diagnostics
buffer and stream for each aggregator job.
Test Plan: updated pre-aggregated-perf.test
Reviewers: yavtuk, maksfb, rafaelauler, ayermolo, paschalis-mpeis, yozhu
Reviewed By: yavtuk
Pull Request: https://github.com/llvm/llvm-project/pull/203464
Commit: 62a2af17a33394ac6f286dc110633013cb01ed7d
https://github.com/llvm/llvm-project/commit/62a2af17a33394ac6f286dc110633013cb01ed7d
Author: Bastian Hagedorn <bhagedorn at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
Log Message:
-----------
[MLIR][NVVM] Preserve PTX special registers in inline_ptx lowering (#203251)
`PtxBuilder::build()` converted operand placeholders (written as %0, %1,
and the predicate as @%N, since TableGen string attributes cannot
contain '$') to the inline-asm operand form with a blanket `replace(ptx,
'%', '$')`. That also rewrote literal PTX special-register names such as
%tid.x, %laneid and %dynamic_smem_size into $tid.x etc., producing
invalid PTX for any `nvvm.inline_ptx` whose body reads a special
register.
Convert only a '%' that is immediately followed by a digit (operand
placeholders and the @%N predicate); leave %<name> special registers
intact. PTX special registers always begin with a letter after '%', so
the digit test unambiguously distinguishes them from operand
placeholders.
Add an NVVMToLLVM regression test that reads %laneid through
nvvm.inline_ptx.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
Commit: 7adb63de37b95dfbbb67ff775ba5e2bc93f15458
https://github.com/llvm/llvm-project/commit/7adb63de37b95dfbbb67ff775ba5e2bc93f15458
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosa.h
M mlir/lib/Conversion/TosaToSPIRVTosa/CMakeLists.txt
A mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaCustom.cpp
M mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
A mlir/test/Conversion/TosaToSPIRVTosa/custom-op-domain-to-opcode-invalid.mlir
A mlir/test/Conversion/TosaToSPIRVTosa/custom-op-domain-to-opcode.mlir
Log Message:
-----------
[mlir][spirv] Lower mapped TOSA custom ops to ExperimentalML.Call (#202581)
Extend the TOSA to SPIR-V Graph conversion with an optional
custom-op-domain-to-opcode mapping. TOSA custom ops whose domain appears
in this mapping are lowered to spirv.ExperimentalML.Call using the
mapped CALL opcode. Later mappings for the same domain override earlier
ones, matching command-line option precedence.
For this TOSA lowering, CALL operands start with a spirv.array<N x i8>
carrying the operator_name byte blob. This is followed by another i8
array for implementation_attrs, then the original tensor inputs. Empty
strings are encoded as a single NUL byte because SPIR-V array types
require at least one element.
Use existing SPIR-V array constants for the metadata operands so the
target test stays on the SPIR-V binary round-trip path.
Signed-off-by: Niklas Lithammer <niklas.lithammer at arm.com>
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Co-authored-by: Niklas Lithammer <niklas.lithammer at arm.com>
Commit: fc8d61811e16874575a73df5e919201c903513c9
https://github.com/llvm/llvm-project/commit/fc8d61811e16874575a73df5e919201c903513c9
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR] Fix deprecated-enum-enum-conversion C++20 warnings; NFC (#203277)
This addition of enum values resulted in many warnings of the form
warning: arithmetic between different enumeration types
'llvm::Value::ValueTy' and 'llvm::Instruction::TermOps' is
deprecated
Commit: 5ea65dfac0023ca82b8961f188d574c228657d22
https://github.com/llvm/llvm-project/commit/5ea65dfac0023ca82b8961f188d574c228657d22
Author: yueshe <yueshe1996 at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/test/Driver/darwin-objc-selector-stubs.m
Log Message:
-----------
Revert "[clang][Darwin] Disable ObjC class selector stubs when using LLD" (#203456)
Reverts llvm/llvm-project#203388
Unfortunately this breaks a bunch of tests on CI bots because they seem
to have LLD configured as the default linker. The tests were originally
written to expect `-fobjc-msgsend-class-selector-stubs`. Will have to
modify the tests as well
Commit: b086e198e241fdcde57a3f9961e7d8d3c3ca4a99
https://github.com/llvm/llvm-project/commit/b086e198e241fdcde57a3f9961e7d8d3c3ca4a99
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/Attr.td
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/ParserHLSL/hlsl_is_array_attr.hlsl
A clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
Log Message:
-----------
[HLSL] Add IsArray resource attribute (#201163)
First part of changes to add support for the IsArray resource attribute,
which will be used by the resource array types (Texture2DArray etc.).
These types will be implemented in subsequent changes.
This implements the attribute parsing and associated tests, and
implements the first part of #194910.
The Sema builtin argument checking and CodeGen will be included in a
subsequent PR which will implement a resource array type which will
allow those changes to be tested.
---------
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: 630f30ca579575632937ff226c0feebb15d03623
https://github.com/llvm/llvm-project/commit/630f30ca579575632937ff226c0feebb15d03623
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
A clang/test/Analysis/pthreadlock-notes.c
Log Message:
-----------
[analyzer] Add path notes to PthreadLockChecker (#202473)
Bug reports from this checker lack context about where mutexes were
locked or unlocked, making it hard to understand the diagnostic without
reading surrounding code.
Add NoteTag on lock, unlock, destroy, and init events. Notes name the
mutex when possible and are filtered to only appear when the mutex is
relevant to the reported bug.
Commit: dbaa5e601ca06a88e66b95b94dc9d2974b1abded
https://github.com/llvm/llvm-project/commit/dbaa5e601ca06a88e66b95b94dc9d2974b1abded
Author: Fan Mo <w007878 at hotmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/examples/Kaleidoscope/Chapter7/toy.cpp
Log Message:
-----------
[docs] Kaleidoscope Tutorial Chapter 7 - base class Value* used for AllocaInst for assignment expression (#202101)
Eariler in this chapther, the value type of `NamedValues` was changed to
`AllocaInst*`, and so did all other occurs for example in
`VariableExprAST` and `ForExprAST`.
https://github.com/llvm/llvm-project/blob/6f8a363a483489687597e29b8bda0975e821f188/llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst?plain=1#L321-L324
However, the newly added assignment expression is still using `Value*`
as the type for LHS. Although `Value` is the base class of `AllocaInst`
therefore the code compiles and works well, it's better to keep it
consistent
Commit: cb098aa073bbb6ce5d5854d402fbb3e9ecbaaca8
https://github.com/llvm/llvm-project/commit/cb098aa073bbb6ce5d5854d402fbb3e9ecbaaca8
Author: David Green <david.green at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
Log Message:
-----------
[AArch64] Change f128 costs to 10 * legalization factor. (#202555)
Lowering fadd, fsub, fmul, fdiv and frem will produce a libcall,
something that is always difficult to costmodel. This changes the cost
model to 10 to line up with the value we use for other libcalls.
Non-rthru costs will start to be used when we start producing accurate
non-rthru costs in getArithmeticInstrCost.
Commit: ce7dae3727322304712f6a1bcdebb254cad9ee60
https://github.com/llvm/llvm-project/commit/ce7dae3727322304712f6a1bcdebb254cad9ee60
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
Log Message:
-----------
[LV][NFC] Regenerate some CHECK lines (#203343)
Commit: 6a8ad9d1b5c2efc07899796d41956761bd4247b8
https://github.com/llvm/llvm-project/commit/6a8ad9d1b5c2efc07899796d41956761bd4247b8
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU][NFC] Simplify assertions (#203472)
Replace assertions that listed concrete types with generic ones that
check that the type is a vector with an even number of elements.
This keeps the spirit of the assertions and matches the code.
Commit: 15a37869a788864e6d12e805dd0de2dc07a0d764
https://github.com/llvm/llvm-project/commit/15a37869a788864e6d12e805dd0de2dc07a0d764
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
Log Message:
-----------
[SPIR-V] Merge duplicate case bodies in addInstrRequirements (NFC) (#203177)
Commit: 90ca88b509d5c70e98002bde45453877a404ffc8
https://github.com/llvm/llvm-project/commit/90ca88b509d5c70e98002bde45453877a404ffc8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
Log Message:
-----------
[SPIR-V] Replace custom bitcast in FPMaxError decoration handling (NFC) (#203179)
Commit: 7acd9402f2dbf57e56703ccc2e2b97f51cc7e9dc
https://github.com/llvm/llvm-project/commit/7acd9402f2dbf57e56703ccc2e2b97f51cc7e9dc
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for init_whole_wave intrinsic (#203286)
Commit: 2e7e9c112d320d1ad032a14621c68b6b5c69a519
https://github.com/llvm/llvm-project/commit/2e7e9c112d320d1ad032a14621c68b6b5c69a519
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for load_to_lds intrinsic (#203282)
Commit: 81e9fa8d82fd2b6277362c9f27f25ffd24723cb0
https://github.com/llvm/llvm-project/commit/81e9fa8d82fd2b6277362c9f27f25ffd24723cb0
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for global_load_async_lds (#203280)
Commit: 03afb2a0d6becb394901328f051ee9452fb66057
https://github.com/llvm/llvm-project/commit/03afb2a0d6becb394901328f051ee9452fb66057
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for G_PREFETCH (#203265)
Commit: 1a4f405c318131c79df259008f76b0d0730d6130
https://github.com/llvm/llvm-project/commit/1a4f405c318131c79df259008f76b0d0730d6130
Author: Dan Bonachea <dobonachea at lbl.gov>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang-rt/lib/runtime/__fortran_builtins.f90
M flang/CMakeLists.txt
Log Message:
-----------
[flang] __fortran_builtins: Update __builtin_team_type to meet PRIF specification (#202450)
The representation of `TEAM_TYPE` in the `ISO_FORTRAN_ENV` module is
opaque to the compiler, but the size (and alignment) needs to match the
PRIF specification for `prif_team_type` to ensure ABI compatibility with
the multi-image runtime library.
Flang's old definition as a derived type containing only an
`integer(int64)` component was leading to an 8-byte `TEAM_TYPE`. However
PRIF specifies the `prif_team_type` component as a `pointer` to an
opaque scalar type, which flang compiles to a 40-byte representation.
This mismatch was leading to incorrect behavior at runtime for programs
compiled with `-fcoarray` and using `TEAM_TYPE`, where `TEAM_TYPE`
values returned by PRIF were being silently truncated by the compiler.
Change the declaration of `__builtin_team_type` to match the PRIF
specification, thus ensuring the representation of `TEAM_TYPE` has the
required size.
Commit: b9339f0c9416b327f5130a78f33d4cbca5962fec
https://github.com/llvm/llvm-project/commit/b9339f0c9416b327f5130a78f33d4cbca5962fec
Author: Lang Hames <lhames at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M orc-rt/include/orc-rt-c/ExternC.h
Log Message:
-----------
[orc-rt] Fix an incorrect comment. (#203482)
Commit: a80153ea4f7dfcd6e0dcf2b415f9ace3cd54015a
https://github.com/llvm/llvm-project/commit/a80153ea4f7dfcd6e0dcf2b415f9ace3cd54015a
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for gfx950 smfmac intrinsics (#203287)
Commit: 951c67d4dbed4f87f366f1f911bc061bc6da1912
https://github.com/llvm/llvm-project/commit/951c67d4dbed4f87f366f1f911bc061bc6da1912
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
A clang/test/Driver/offload-darwin-host.hip
A clang/test/Driver/openmp-Xopenmp-target-forward-args.c
Log Message:
-----------
clang/AMDGPU: Use TranslateArgs from the base toolchain instead of the host (#198627)
This fixes -Xopenmp-target / -Xarch for arbitrary arguments. HIP and
OpenMP had cargo-cult broken implementations of TranslateArgs, which called the
host toolchain's implementation, and then special case transferred either
-march or -mcpu to the device argument list. The respective device forwarding
flags should work for any argument, not just this one. The main feature that
needs to be preserved is the shared filtering of unsupported sanitizers to
degrade them into warnings.
Most of the changes here are dealing with fallout observed when
the host target is darwin. The darwin toolchain happens to have
some hacky statefulness tracking the compile target version, which
gets written and rewritten on argument parsing. To maintain this hack,
there are a few unused calls to getArgsForToolChain; start passing
OFK_Host to these so the offload toolchains don't get confused and think
they're in a non-offload context.
Commit: ec60d62118bf17328b4d63c67eb981f9c8347d56
https://github.com/llvm/llvm-project/commit/ec60d62118bf17328b4d63c67eb981f9c8347d56
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/stepvector-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/vscale-cost.ll
Log Message:
-----------
[LV] Reland "Add costs for VPInstructionWithType::computeCost" (#202952)
The original change PR #198291 caused a crash due to an unreachable
opcode. I've added support for the missing opcode.
Commit: a0bad855ccb86c0ace7be1eb05e51895d61afecc
https://github.com/llvm/llvm-project/commit/a0bad855ccb86c0ace7be1eb05e51895d61afecc
Author: Abhinav Garg <abhinav.garg at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.subdword.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
Log Message:
-----------
[AMDGPU][GlobalIsel] Add RegBankLegalize rules and lowering for G_AMDGPU_S_BUFFER_LOAD (#192480)
Add RegBankLegalize rules and lowering for G_AMDGPU_S_BUFFER_LOAD and
sub-dword variants (UBYTE, SBYTE, USHORT, SSHORT). The lowering covers
all four rsrc/offset divergence combinations:
- Uniform rsrc + uniform offset → scalar SMEM (stays as-is)
- Uniform rsrc + divergent offset → MUBUF (S_BUF_to_BUF, no waterfall)
- Divergent rsrc + uniform offset → SMEM in waterfall loop over rsrc
- Divergent rsrc + divergent offset → MUBUF + waterfall over rsrc
TODO:
1. Fix legalize rule for intrinsic amdgcn_cvt_pkrtz to emit scalar cvt
operation in _/AMDGPU/scalar-float-sop2.ll_
2. Fix offset for GFX1250 in
_/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll_ as done by
PR#178389
Commit: 3922f3c505a4a9dffca840508d2ea3e5f0549412
https://github.com/llvm/llvm-project/commit/3922f3c505a4a9dffca840508d2ea3e5f0549412
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.cpp
M lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Use uint64 for GetExceptionArguments (#203485)
Intended to fix the build failure mentioned in
https://github.com/llvm/llvm-project/pull/203301#issuecomment-4688315446.
Makes sure we always use a 64 bit int, as the minidump exception record
specifies the arguments to be 64 bit. `unsigned long long` is also 64
bit on Windows, but I think `uint64_t` conveys that we actually want a
64bit int.
Then updates uses of the return value to use `uint64_t` over
`ULONG_PTR`.
Commit: 1727b22f5ab476db6b67ff93d5eaf1187e0ecc29
https://github.com/llvm/llvm-project/commit/1727b22f5ab476db6b67ff93d5eaf1187e0ecc29
Author: Konstantin Belochapka <konstantin.belochapka at sony.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/test/ThinLTO/X86/dtlto/timetrace.ll
Log Message:
-----------
[DTLTO] Added missing timetrace "Check cache for DTLTO" message. (#203215)
After the DTLTO refactor commit, the time trace "Chack cache for DTLTO"
message was unintentionally omitted. This patch corrects this omission.
Commit: 29e27fd572050cc0dca003704309c1bf0eded89a
https://github.com/llvm/llvm-project/commit/29e27fd572050cc0dca003704309c1bf0eded89a
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M .github/new-prs-labeler.yml
R clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/LifetimeSafety/Inputs/lifetime-analysis.h
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
A clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
A clang/test/Sema/LifetimeSafety/attr-lifetimebound-no-crash.cpp
A clang/test/Sema/LifetimeSafety/attr-lifetimebound.c
A clang/test/Sema/LifetimeSafety/capture-by.cpp
A clang/test/Sema/LifetimeSafety/cfg-bailout.cpp
A clang/test/Sema/LifetimeSafety/dangling-field.cpp
A clang/test/Sema/LifetimeSafety/dangling-global.cpp
A clang/test/Sema/LifetimeSafety/invalidations.cpp
A clang/test/Sema/LifetimeSafety/lifetime-facts.cpp
A clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-cross-tu.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-macro.cpp
A clang/test/Sema/LifetimeSafety/missing-origin-stats.cpp
A clang/test/Sema/LifetimeSafety/nocfg-disabled.cpp
A clang/test/Sema/LifetimeSafety/nocfg.cpp
A clang/test/Sema/LifetimeSafety/noescape-violation.cpp
A clang/test/Sema/LifetimeSafety/safety.cpp
R clang/test/Sema/attr-lifetimebound-no-crash.cpp
R clang/test/Sema/attr-lifetimebound.c
R clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
R clang/test/Sema/warn-lifetime-analysis-nocfg-disabled.cpp
R clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
R clang/test/Sema/warn-lifetime-safety-cfg-bailout.cpp
R clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
R clang/test/Sema/warn-lifetime-safety-dangling-global.cpp
R clang/test/Sema/warn-lifetime-safety-dataflow.cpp
R clang/test/Sema/warn-lifetime-safety-fixits.cpp
R clang/test/Sema/warn-lifetime-safety-invalidations.cpp
R clang/test/Sema/warn-lifetime-safety-lifetimebound.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-cross-tu.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-intra-tu.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-macro.cpp
R clang/test/Sema/warn-lifetime-safety-missing-origin-stats.cpp
R clang/test/Sema/warn-lifetime-safety-noescape.cpp
R clang/test/Sema/warn-lifetime-safety-suggestions.cpp
R clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Reorganize tests into `LifetimeSafety/` subdirectory (#203363)
Commit: 125242eb15b6b74e8ad6ab81a760ef4c1b2deea7
https://github.com/llvm/llvm-project/commit/125242eb15b6b74e8ad6ab81a760ef4c1b2deea7
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/FCmpFalse_Vec.ll
A llvm/test/CodeGen/SPIRV/constant/local-zero-constants.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/is_fpclass.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
Log Message:
-----------
[LLVM][CodeGen][SPIRV] Match NULL splat to OpConstantNull. (#201313)
Commit: ab5da4b999f862e5b165ac87dd9b90ff162e048b
https://github.com/llvm/llvm-project/commit/ab5da4b999f862e5b165ac87dd9b90ff162e048b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Add test showing failure to concat X86ISD::PERMI nodes with different immediates (#203487)
Commit: 4a3946fc690c461417d38b6264a1f7a70f5dd364
https://github.com/llvm/llvm-project/commit/4a3946fc690c461417d38b6264a1f7a70f5dd364
Author: ambergorzynski <120007557+ambergorzynski at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
R llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
Log Message:
-----------
[AMDGPU][NFC] New tests for uncovered cases in SIInstrInfo.cpp (#200414)
Several cases in [the AMDGPU
backend](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp)
are not covered by the existing tests. We are proposing a new set of
tests to cover these lines.
We demonstrate that these cases are not covered by showing that no test
fails when `abort` statements are included. These are removed for the
final PR. You can check the lines of interest in [this
commit](https://github.com/llvm/llvm-project/pull/200414/commits/84d4587b784014ace546d23beaf6ed8d703452d3).
Commit: da65d6afe74463745dae9af0ce47f31e4186778e
https://github.com/llvm/llvm-project/commit/da65d6afe74463745dae9af0ce47f31e4186778e
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-canonicalize.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-canonicalize.ll
Log Message:
-----------
[KnownFPClass] Fix canonicalize incorrectly dropping fcNegZero under positive-zero denormal mode (#202268)
The denormal mode only flushes *denormal* (subnormal) values; -0.0 is
not a denormal, and per LangRef canonicalize must conserve the sign of
zero (canonicalize(-0.0) == -0.0).
Alive2 (InstCombine fold of canonicalize on a {+/-0, nan} value):
before (miscompiles -0.0 -> +0.0): https://alive2.llvm.org/ce/z/ZRK-sr
after (verifies): https://alive2.llvm.org/ce/z/L3tPu3
Commit: dbc255bedbf5099f32409d41a77bdf0730f4963a
https://github.com/llvm/llvm-project/commit/dbc255bedbf5099f32409d41a77bdf0730f4963a
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
Log Message:
-----------
[AArch64](NFC) Introduce unified `isLegalArithImmed()` and `isLegalCmpImmed()` (#203020)
Quick tidy up to factor out some common helpers into
`AArch64AddressingModes.h`.
Commit: 274331053cd6b567a02d7ef8a85adcb403dffcb0
https://github.com/llvm/llvm-project/commit/274331053cd6b567a02d7ef8a85adcb403dffcb0
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
Log Message:
-----------
[AMDGPU] Regenerate cluster ID checks (#203494)
Commit: 056b4a71c07ff19e38c5cf475fa31fd1271b460d
https://github.com/llvm/llvm-project/commit/056b4a71c07ff19e38c5cf475fa31fd1271b460d
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector-skipped.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector.ll
Log Message:
-----------
Emit debug type vector (#200056)
This emits `DebugTypeVector` for HLSL `float4`-style vectors.
`partitionTypes()` separates vector `DICompositeType` nodes from basic
types so both can be visited in a single pass over the debug metadata. A
new `emitDebugTypeVector()` helper builds the `DebugTypeVector`
instruction and looks up the base-type register in `DebugTypeRegs`.
The helper skips four cases silently:
1. Absent or non-`DIBasicType` base type: only scalar element types are
supported for now.
2. Base type not yet emitted: the type was not reached during the
`DebugTypeBasic` pass.
3. Multiple subranges: `DebugTypeVector` models one-dimensional vectors
only (NSDI cannot encode multi-subrange types).
4. Non-constant subrange count: NSDI cannot represent variable-length
counts.
Added a new test in
`test/CodeGen/SPIRV/debug-info/debug-type-vector.ll`.
Commit: 663bcb3574d72552b41de6a740e454f2f53e2f4a
https://github.com/llvm/llvm-project/commit/663bcb3574d72552b41de6a740e454f2f53e2f4a
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
Log Message:
-----------
[SVE] Replace unnecessary Intrinsic::aarch64_sve_ptrue construction. (#203349)
Prefer ConstantInt::getTrue() over sve.ptrue(31) when creating
all-active boolean vectors.
Commit: 66842786198f6fe58dc20813e45d216f838db2f4
https://github.com/llvm/llvm-project/commit/66842786198f6fe58dc20813e45d216f838db2f4
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M .git-blame-ignore-revs
Log Message:
-----------
Add "Split clang/lib/CodeGen/CGBuiltin.cpp" to .git-blame-ignore-revs (#203419)
Commit: 23d906e24b06f27749c84229e4a3043b7e63a2d5
https://github.com/llvm/llvm-project/commit/23d906e24b06f27749c84229e4a3043b7e63a2d5
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M openmp/runtime/cmake/LibompExports.cmake
Log Message:
-----------
[openmp] Fix export file paths (#202692)
The files omp_lib.h and omp-tools.h are the outputs of two
configure_file invocations which specify the full path of the outputs.
Use these full paths in LibompExports.cmake so they can actually be
found.
Commit: 9623ae8878b1d2d7ff39f9ce5c30e8bf82dd1896
https://github.com/llvm/llvm-project/commit/9623ae8878b1d2d7ff39f9ce5c30e8bf82dd1896
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Add `PtrView` for non-tracking pointers (#184129)
Currently, when creating a `Pointer` (of block type, which I will assume
here), the pointer will add itself (via its address) to its block's
pointer list. This way, a block always knows what pointers point to it.
That's important so we can handle the case when a block (which was e.g.
created for a local variable) is destroyed and we now need to update its
pointers.
However, since always do this for all `Pointer` instances, it creates a
weird performance problem where we do this dance all the time for no
reason, e.g. consider `Pointer::stripBaseCasts()`:
https://github.com/llvm/llvm-project/blob/88693c49d9ac58a33af5978d31f6c70fe1d5b45b/clang/lib/AST/ByteCode/Pointer.h#L778-L783
This will add and remove the newly created pointer from the block's
pointer list every iteration. Other offenders are `Pointer::toRValue()`,
`EvaluationResult::checkFullyInitialized()` or
`Pointer::computeOffsetForComparison()`.
This commit introduces a `PtrView` struct, which is like a
`BlockPointer`, but without the prev/next next links to other `Pointer`s
in the block's pointer list. It also moves a lot of the accessors from
`Pointer` to `PtrView` (e.g. `isRoot()` or `getFieldDesc()`, etc.).
compile-time-tracker:
https://llvm-compile-time-tracker.com/compare.php?from=4716dc8c51719cbcc82928cd00e41a29e5b9adff&to=28d69d4ec16e77370938675826b07752e108eede&stat=instructions:u
Commit: 2b4e89bc254dab3f18b59cd275519d256267b88e
https://github.com/llvm/llvm-project/commit/2b4e89bc254dab3f18b59cd275519d256267b88e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] combineConcatVectorOps - concat(permi(x,imm0),permi(y,imm1)) -> vpermv3(widen(x),m,widen(y)) (#203508)
Add handling for X86ISD::VPERMI nodes with different immediates -
folding to a X86ISD::VPERMV3 instead, replacing a
INSERT_SUBVECTOR+2xPERMI nodes with a mask load
We don't need to concat the source operands - we have other folds that
will do this if beneficial - we just rely on (free) implicit widening.
Commit: 8f069e7aea7dbf35d87c8a7a700ae6871b831298
https://github.com/llvm/llvm-project/commit/8f069e7aea7dbf35d87c8a7a700ae6871b831298
Author: Joachim Meyer <5982050+fodinabor at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
M llvm/utils/lit/lit/TestRunner.py
M llvm/utils/lit/tests/substitutions.py
Log Message:
-----------
[lit] Add support for %{s:stem} substitution. (#202885)
It provides the source file name with the (last) extension removed.
This is to align with what is available for %t and actually needed
downstream.
Commit: 1f21f15e6503053b3f5cfed3689829ba16a60ce0
https://github.com/llvm/llvm-project/commit/1f21f15e6503053b3f5cfed3689829ba16a60ce0
Author: Rohit Aggarwal <Rohit.Aggarwal at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/test/CodeGen/X86/avx512f-builtins-constrained-cmp.c
Log Message:
-----------
[X86] - Prevent the wrong fold of x86_avx512_mask_cmp_ss/sd to fcmp (#202321)
The issue is based upon the SemiAnalysisAI by @jlebar.
[058-mask-cmp-ss-imm-immediate-not-validated](https://github.com/SemiAnalysisAI/FuzzX/blob/master/x86/bugs/058-mask-cmp-ss-imm-immediate-not-validated/NOTES.md)
It is not a real bug, just a warning for the future fold implementation
of mask_cmp → fcmp.
There is non to fix as of now in the source code. Added a few comments
and test cases for the future implementation of the folds.
@topperc @phoebewang
Commit: fb009c38d86c4a3c5b13b0ea90bbdb7665670096
https://github.com/llvm/llvm-project/commit/fb009c38d86c4a3c5b13b0ea90bbdb7665670096
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
A llvm/test/CodeGen/DirectX/DebugInfo/di-commonblock.ll
A llvm/test/tools/dxil-dis/di-commonblock.ll
Log Message:
-----------
[DirectX] Drop DICommonBlock metadata (#201948)
DICommonBlock cannot be represented in LLVM 3.7, but it is a scope
within a parent scope, so we can refer to the parent scope instead.
Commit: a4bdf9d6ccdfcd9300164d9d043d74c78b2624cc
https://github.com/llvm/llvm-project/commit/a4bdf9d6ccdfcd9300164d9d043d74c78b2624cc
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
A llvm/test/CodeGen/DirectX/DebugInfo/dbg-assign.ll
A llvm/test/CodeGen/DirectX/DebugInfo/dbg-value-arglist.ll
A llvm/test/tools/dxil-dis/dbg-assign.ll
A llvm/test/tools/dxil-dis/dbg-value-arglist.ll
Log Message:
-----------
[DirectX] Lower DbgAssign to DbgValue (#200267)
DbgAssign is not representable in LLVM 3.7.
Commit: f77a290a2ffeda2a9974e87fa9120044de0ed93f
https://github.com/llvm/llvm-project/commit/f77a290a2ffeda2a9974e87fa9120044de0ed93f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/test/Transforms/MergeICmps/X86/no-gep-other-work.ll
M llvm/test/Transforms/MergeICmps/X86/opaque-ptr.ll
Log Message:
-----------
[MergeICmps] Perform dereferenceability check with context (#202884)
To support deref-at-point semantics, we need to check dereferenceability
with a context instruction. Currently, MergeICmps does the check for
each individual load instruction. In this PR, I'm replacing this with a
check for all the loads that are part of a chain after they have been
collected, so we do the context-sensitive check only once.
The choice of context instruction is a bit tricky: Normally, this would
just be the first block in the chain (the "entry block"), but it's also
possible for the block to "do extra work", in which case it will get
split. If this happens, we should be checking at the splitting point, as
the extra work might be freeing the pointer.
Another question to consider here is whether we need to be concerned
about frees at all: After all, the original code will be accessing at
least one byte of the two objects, so doesn't that imply that it wasn't
freed already? This is indeed the case, as long as allocations cannot
shrink. This is something we currently don't allow, but I think it's
something we want to allow, so I'm going with the conservative treatment
here.
Commit: 3b63f045b9a994e275d8fd186f2de96939c38378
https://github.com/llvm/llvm-project/commit/3b63f045b9a994e275d8fd186f2de96939c38378
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Dialect/Vector/Utils/VectorUtils.h
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
Log Message:
-----------
[mlir][vector] extend `createReadOrMaskedRead`/`createWriteOrMaskedWrite` with permutation map support (#202766)
Follow-up to #201180.
Extends the existing `createReadOrMaskedRead` and
`createWriteOrMaskedWrite` utilities in `VectorUtils` with two optional
trailing parameters:
- `ArrayRef<Value> indices`
- `AffineMap permutationMap`
The affine super-vectorizer is updated to call these functions instead
of constructing `TransferReadOp`/`TransferWriteOp` directly.
@banach-space, please correct me if this wasn't what you meant in the
previous PR.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 055ef48e1a98545c7ebb9246bb134fecfcc23cae
https://github.com/llvm/llvm-project/commit/055ef48e1a98545c7ebb9246bb134fecfcc23cae
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] Add tests showing failure to concat 256-bit rotate nodes on non-vlx targets (#203517)
These are widened in tablegen, we don't need to limit these to VLX targets
Commit: fc15b715917aea09851c41a0c5406d820709d35b
https://github.com/llvm/llvm-project/commit/fc15b715917aea09851c41a0c5406d820709d35b
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CodeGen/Targets/SystemZ.cpp
Log Message:
-----------
[SystemZ] Rename GetSingleElementType to getSingleElementType (#203078)
# Refactor: Rename GetSingleElementType to getSingleElementType in
SystemZ ABI
## Summary
This PR refactors the SystemZ ABI code to follow LLVM coding standards
by renaming `GetSingleElementType` to `getSingleElementType` (camelCase
convention).
## Motivation
Rename to avoid having 'GetSingleElementType` in one class and
`getSingleElementType` in another one.
Commit: 7c0a3a52cf967da9c41d009fb92453b272d0d04a
https://github.com/llvm/llvm-project/commit/7c0a3a52cf967da9c41d009fb92453b272d0d04a
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/Driver/hip-profile-rocm-runtime.hip
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Log Message:
-----------
[PGO][HIP] Fix HIP device profile collection and sections emission (#202095)
Several related HIP device-PGO fixes:
Windows device collection. HIP rejects a hipMemcpy that reads past the
bounds
of a symbol registered with __hipRegisterVar, but device
data/counters/names
live in merged linker sections. Register a separate shadow for each
device
data, counters, and names symbol and copy each one by its exact
hipGetSymbolSize
size; this also lets static TUs with several kernels keep all their
profile
data. Open the device profile file in binary mode and pass the device
names to
the correct lprofWriteDataImpl arguments so llvm-profdata can read the
raw
profile. Open the versioned amdhip64_7.dll first, falling back to
amdhip64.dll.
Per-TU sections struct. Clang CodeGen emitted the
__llvm_profile_sections_<CUID>
struct (and its section start/stop references) for any profiling-enabled
device
TU. A TU with no instrumented device functions then referenced sections
nothing
populates, so the RDC device link failed under --no-undefined (and
duplicated
__llvm_prf_nm before per-CUID naming). Move the struct emission from
CGCUDANV
into the InstrProfiling pass, which emits it only when the TU has
profile data;
clang emits only the per-TU names-postfix marker, also making names
unique per
TU so RDC builds do not clash.
Dynamic-module interceptors. The hipModuleLoad* interceptors live in a
constructor-only object in clang_rt.profile_rocm that nothing
references, so the
linker drops it and dynamic-module programs collect no device profile.
When
linking clang_rt.profile_rocm, emit a force-link reference (-u on ELF,
-include: on COFF); the constructor self-skips when the program does not
use
hipModuleLoad.
Multi-device profile collection. On Linux, static profile collection
used to
try reading profile data from every visible HIP device. This could fault
when a
device was visible but had not launched the instrumented kernel. Track
HIP
devices that successfully launch kernels, and skip unused devices during
static
profile collection. If tracking is not available, keep the old
collect-all
behavior.
Depends on #201607 (reland HIP offload PGO compiler support and link the
device-profile runtime); that PR must land first.
Commit: 7d42028e806ab2b17af22ddb8417432e4781d4aa
https://github.com/llvm/llvm-project/commit/7d42028e806ab2b17af22ddb8417432e4781d4aa
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][Windows] Make RM_RF a no-op on an empty argument and swallow errors (#203040)
This patch makes the Windows `RM_RF` a no-op on an empty argument and
swallow errors, matching Unix `rm -rf`. This fixes issues in swiftlang
on fresh builds.
This is needed for https://github.com/swiftlang/llvm-project/pull/13180
Commit: 1badbb2a77f6937c9af84a694e1d949c7952b744
https://github.com/llvm/llvm-project/commit/1badbb2a77f6937c9af84a694e1d949c7952b744
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Fix copy-paste in hasNon16BitAccesses OpIs16Bit check (#203499)
OpIs16Bit tested TempOtherOp width instead of TempOp, mismatching
symmetric OtherOpIs16Bit clause
No observed miscompiles or direct issues to due to that so far
Commit: 5096057eb8254c7d56e1b70c4ba2fbf3ac215b73
https://github.com/llvm/llvm-project/commit/5096057eb8254c7d56e1b70c4ba2fbf3ac215b73
Author: Aditya Trivedi <120598696+adit4443ya at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/linear-clause01.f90
Log Message:
-----------
[Flang][OpenMP] Fix crash when common block name is used in LINEAR clause (#203250)
[Flang][OpenMP] Fix crash when common block name is used in LINEAR
clause
Using a common block name in a LINEAR clause (e.g. linear(/c/))
caused
a symbol-must-have-a-type crash during lowering. The semantic checker
was not emitting an error because GetSymbolsInObjectList expands /c/
to its member variables before the check runs, so the
symbol->has<CommonBlockDetails>() guard was never reached.
Fix by checking for common block names directly on the OmpObjectList
before the expansion, where the Name variant of OmpObject still holds
the common block symbol.
Fixes #202329
Commit: b0cc3225b2f618b5760552b1dc7ce0ea26225c8f
https://github.com/llvm/llvm-project/commit/b0cc3225b2f618b5760552b1dc7ce0ea26225c8f
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
A mlir/test/IR/test-func-erase-arg-error.mlir
M mlir/test/lib/IR/TestFunc.cpp
Log Message:
-----------
[mlir] Check for argument uses in test-func-erase-arg pass (#203367)
The -test-func-erase-arg pass crashed when erasing arguments that still
had uses. Diagnose every such argument and fail the pass without
erasing.
Fixes https://github.com/llvm/llvm-project/issues/203218
Assisted-by: Claude (Claude Code)
Commit: daa9ecff7ea3ed9a99fd5b486516495655259971
https://github.com/llvm/llvm-project/commit/daa9ecff7ea3ed9a99fd5b486516495655259971
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] combineConcatVectorOps - concat(roti(x,i),roti(y,i)) -> roti(concat(x,y),i) on non-vlx targets (#203528)
128/256-bit rotates are widened in tablegen, we don't need to limit
these to VLX targets - any AVX512 target can perform these
We already have test coverage to ensure 128-bit XOP rotates don't get
concatenated to 256-bit
Commit: 75383d62ecde9e4948c6146662707d53cb496e08
https://github.com/llvm/llvm-project/commit/75383d62ecde9e4948c6146662707d53cb496e08
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/test/Format/lit.local.cfg
Log Message:
-----------
clang-format/test: Anchor the empty .clang-format-ignore to test_exec_root (#203444)
The test suite's lit.local.cfg creates an empty .clang-format-ignore at
config discovery time to protect the multiple-inputs[-inplace].cpp tests
that work on files in temporary locations.
This file should be written to where the tests execute instead of the
CWD during config discovery. The CWD might not even be an ancestor of
where the tests execute, and it might be the repository root which does
have a .clang-format-ignore that is incorrectly clobbered without this
change.
An alternative would be to just fix the tests that need to be protected,
but having a blanket guard like this does seem like a reasonable thing
to do.
Fixes: 915de1a5889c ("Generate empty .clang-format-ignore before running
tests (#136154)")
Commit: 95ca0744abc76f10da86bdd6e74f674a10a869f2
https://github.com/llvm/llvm-project/commit/95ca0744abc76f10da86bdd6e74f674a10a869f2
Author: NeKon69 <nobodqwe at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/dangling-field.cpp
A clang/test/Sema/LifetimeSafety/inapplicable-lifetimebound.cpp
M clang/test/Sema/LifetimeSafety/lifetime-facts.cpp
M clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-cross-tu.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
M clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-macro.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/noescape-violation.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Warn on inapplicable [[clang::lifetimebound]] parameters (#201101)
Adds `-Wlifetime-safety-inapplicable-lifetimebound` to diagnose
`[[clang::lifetimebound]]` annotations that have no effect because the
parameter type cannot carry a lifetime.
This currently diagnoses scalar parameters and `gsl::Owner` parameters
and unannotated record values (because they currently do not have
origins), while still allowing references, pointers and `gsl::Pointer`
values.
Closes #177184
Commit: 0246e4c1322e833ab6eb92b73cb618a66e693282
https://github.com/llvm/llvm-project/commit/0246e4c1322e833ab6eb92b73cb618a66e693282
Author: Vicky Nguyen <vicky.trucviennguyen at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
A clang/test/CodeGen/AArch64/neon/add.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
R clang/test/CodeGen/AArch64/poly-add.c
Log Message:
-----------
[CIR][AArch64] Upstream addition and polynomial-addition NEON builtins (#202005)
Related to https://github.com/llvm/llvm-project/issues/185382
CIR lowering for
- addition intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#addition)
- polynomial-addition intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#polynomial-addition)
Port tests:
- `clang/test/CodeGen/AArch64/neon_intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`
- `clang/test/CodeGen/AArch64/poly-add.c` to
`clang/test/CodeGen/AArch64/neon/add.c`
Commit: 0e704a021a5b9c82ee59d855401ef427385e4af1
https://github.com/llvm/llvm-project/commit/0e704a021a5b9c82ee59d855401ef427385e4af1
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
Log Message:
-----------
[AMDGPU] Fix illegal AGPR reclassification in RewriteMFMAFormStage (#200972)
If src2 escapes rewrite group then bridge copy AGPR -> VGPR must be
inserted.
Fixes a regression after
https://github.com/llvm/llvm-project/pull/198555
Commit: d426cca8835e109069f60630f886574af273e803
https://github.com/llvm/llvm-project/commit/d426cca8835e109069f60630f886574af273e803
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/SPIRVCanonicalization.cpp
M mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir
Log Message:
-----------
[mlir][SPIR-V] Guard UMod canonicalization against zero divisor (#203513)
Chained `spirv.UMod` with a zero outer divisor reached `APInt::urem`
which causes UB
Commit: 7125490395b06f850f3ae02ae7ae69a6b2a647c2
https://github.com/llvm/llvm-project/commit/7125490395b06f850f3ae02ae7ae69a6b2a647c2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
Log Message:
-----------
[mlir][SPIR-V] Collapse duplicated i1-extension patterns in ArithToSPIRV (NFC) (#203247)
Commit: 43dc65d46b54415ea474b0bf0ad8b761444a7ba2
https://github.com/llvm/llvm-project/commit/43dc65d46b54415ea474b0bf0ad8b761444a7ba2
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
A llvm/test/Analysis/ValueTracking/known-non-zero-shr-add.ll
Log Message:
-----------
[ValueTracking] Infer non-zero from shr (add nuw A, B), C (#203039)
...if either A or B has a known-one bit at position >= C.
https://alive2.llvm.org/ce/z/ELYTjh
This eliminates null checks in some internal workloads.
Assisted-by: claude
Commit: ad6449fa73fd27b6d3493ab1999befd272e7fb31
https://github.com/llvm/llvm-project/commit/ad6449fa73fd27b6d3493ab1999befd272e7fb31
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Log Message:
-----------
[gn] "port" 93e03fc2666e (#203536)
Commit: d6ddc21af729fc145477e75ada8621e27e017b4e
https://github.com/llvm/llvm-project/commit/d6ddc21af729fc145477e75ada8621e27e017b4e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port b000f9032911 (#203537)
Commit: c8711e5db4fbe436a5aeede159e1a3c3eae08bf5
https://github.com/llvm/llvm-project/commit/c8711e5db4fbe436a5aeede159e1a3c3eae08bf5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Windows/Common/BUILD.gn
Log Message:
-----------
[gn build] Port b57c32db810b (#203538)
Commit: e302e85180ab0601ee564237a8cd75184bef5feb
https://github.com/llvm/llvm-project/commit/e302e85180ab0601ee564237a8cd75184bef5feb
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port caea95990515 (#203539)
Commit: 71ff21aa50f07b0cadb929fe14fafda8b1f8243f
https://github.com/llvm/llvm-project/commit/71ff21aa50f07b0cadb929fe14fafda8b1f8243f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/ObjectFile/Mach-O/BUILD.gn
Log Message:
-----------
[gn build] Port d0a1f86e7890 (#203540)
Commit: 422d559a3a3af94c9e74c098761b110d749e248a
https://github.com/llvm/llvm-project/commit/422d559a3a3af94c9e74c098761b110d749e248a
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/MC/BUILD.gn
Log Message:
-----------
[gn build] Port df75b5d458b9 (#203541)
Commit: 305faf498a4e0b52b40742c927af63ab2082e1a9
https://github.com/llvm/llvm-project/commit/305faf498a4e0b52b40742c927af63ab2082e1a9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/readability/BUILD.gn
Log Message:
-----------
[gn build] Port fc1f754c397b (#203542)
Commit: 3255d4d7628719c4b6254db5780ec50862584896
https://github.com/llvm/llvm-project/commit/3255d4d7628719c4b6254db5780ec50862584896
Author: Drew Kersnar <dkersnar at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
A llvm/test/Bitcode/byte-constants.ll
Log Message:
-----------
[Bitcode] Decode small byte constants as signed values (#203408)
Decode small byte constants the same way we encode them. The bitcode
writer stores ConstantByte values as signed integers, so the reader must
rebuild them using the signed ConstantByte::get path. This has high-bit
values like b8 255 round-trip as their canonical signed form, b8 -1,
instead of tripping the APInt width assertion. This matches current i8
behavior.
Before the fix, the new test crashes in llvm-dis with: "APInt.h:
Assertion `llvm::isUIntN(BitWidth, val) && "Value is not an N-bit
unsigned value"' failed."
Bug found while investigating this PR
(https://github.com/llvm/llvm-project/pull/177908), which transitions
the LSV to emitting the byte type. Fix assisted by AI.
Commit: 09e3e004c66bea58525385486ab04327a51af9de
https://github.com/llvm/llvm-project/commit/09e3e004c66bea58525385486ab04327a51af9de
Author: Nico Weber <thakis at chromium.org>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port 127a4c1a883d333 (LLVM_TARGETS_TO_BUILD for lldb shell tests) (#203547)
Commit: 6c3d7edcfa4a266681f19e6a002766c5a7066e34
https://github.com/llvm/llvm-project/commit/6c3d7edcfa4a266681f19e6a002766c5a7066e34
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
Log Message:
-----------
[AMDGPU][GISel] Add register bank legalization rules for amdgcn_cvt_sr_f16_f32. (#203253)
Commit: d46513abff5bfaf58de8169db033e54b9e24d7c2
https://github.com/llvm/llvm-project/commit/d46513abff5bfaf58de8169db033e54b9e24d7c2
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M bolt/lib/Profile/Heatmap.cpp
M bolt/test/X86/heatmap-preagg.test
Log Message:
-----------
[BOLT] Fix heatmap with external addresses (#203479)
External samples (X:0) were breaking heatmap printing, e.g.
```
0x00000000: O0x00000000: ........
```
Explicitly track `IsFirst` instead of relying on zero.
Test Plan:
updated heatmap-preagg.test
Commit: 52751a0fda17f0dac1c441aee6617ab1b1434f4d
https://github.com/llvm/llvm-project/commit/52751a0fda17f0dac1c441aee6617ab1b1434f4d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/hip-toolchain-no-rdc.hip
Log Message:
-----------
[AMDGPU][SPIR-V] Fix treating SPIR-V input as the wrong LLVM-IR (#202986)
Summary:
This hack is intended for non-RDC AMDGCN.
Commit: c3a146a4e8fab800c621acc401dbdf1d0c960be8
https://github.com/llvm/llvm-project/commit/c3a146a4e8fab800c621acc401dbdf1d0c960be8
Author: vangthao95 <vang.thao at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for sched barriers intrinsics (#203425)
Add rules for sched barrier intrinsics. Note, there are regressions due
to AGPR results being copied back to VGPR un-necessarily. That will be
addressed in a future follow-up patch.
Commit: 8d2661b2d54e9dec96cba72ff5089c6fa7482bf3
https://github.com/llvm/llvm-project/commit/8d2661b2d54e9dec96cba72ff5089c6fa7482bf3
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
Log Message:
-----------
[X86] combineConcatVectorOps - concat(rotate(x,a),rotate(y,b)) -> rotate(concat(x,y),concat(a,b)) (#203553)
128/256-bit rotates are widened in tablegen, we don't need to limit
these to VLX targets - any AVX512 target can perform these
We already have test coverage to ensure 128-bit XOP rotates don't get
concatenated to 256-bit
Commit: bdc06892cdd37c0a52717373ad7774136ca72b63
https://github.com/llvm/llvm-project/commit/bdc06892cdd37c0a52717373ad7774136ca72b63
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/mem2reg.mlir
Log Message:
-----------
[flang] Avoid invalid declare_value for promoted dummy-scope variables (#202498)
This fixes a verifier failure in mem2reg after inlining a CUDA device
procedure. When a promoted FIR alloca had an associated fir.declare with
a dummy_scope, mem2reg could create a fir.declare_value at a loop header
where the original dummy scope did not dominate.
Skip creating block-argument fir.declare_value ops for such
declarations, matching the existing replaced-value handling. Add a FIR
mem2reg regression test for the loop-header block argument case.
Commit: bbeb2d519171b57bbabb25ca07223c286cdecea2
https://github.com/llvm/llvm-project/commit/bbeb2d519171b57bbabb25ca07223c286cdecea2
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
A flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
A flang/test/Lower/OpenACC/Todo/acc-unstructured-loop-construct.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
Log Message:
-----------
[OpenACC][flang] Emit NYI when unstructured loops are associated with OpenACC directives (#202948)
Commit: 168666950ea9cd85471053319e216399e9750028
https://github.com/llvm/llvm-project/commit/168666950ea9cd85471053319e216399e9750028
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
Log Message:
-----------
[IR] Make CanBeFreed calculation optional (NFC) (#203490)
Make the CanBeFreed argument of getPointerDereferenceableBytes() a
pointer, so that nullptr can be passed if we're not interested in
whether frees are possible or not.
Nearly all places don't actually care about frees, including BasicAA,
which is the hottest caller of this API. This improves compile-time when
deref-at-point semantics are enabled.
I've kept the argument required so that callers still have to make an
explicit choice to ignore frees. (I'd be open to making it optional
though, given that only a single caller actually cares...)
Commit: c5654d53c008522d2da165f05b682aafa36d7189
https://github.com/llvm/llvm-project/commit/c5654d53c008522d2da165f05b682aafa36d7189
Author: Yuan Suo <suoyuan666 at s5n.xyz>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Introduce buildOriginFlowChain for use-after-scope (#199345)
After adding `buildOriginFlowChain`, we need to choose a diagnostic type
that is as simple as possible to verify its feasibility during `Sema`
diagnostics.
I did not choose the annotation suggestions described in
https://github.com/llvm/llvm-project/pull/188467/#issuecomment-4359071778
as the first target to implement, because it does not seem to occur
within a single CFG block. The `IssueFact` always resides in the block
preceding the `OriginEscapesFact`, which causes me to always get an
empty `OriginFlowChain`.
Since we use `buildOriginFlowChain`, we can directly trace distinct
assignment steps that occur within a single source-level expression. For
example:
```cpp
#include <vector>
#include <string>
template<class... T> void use(T... arg);
void operator_star_arrow_of_iterators_false_positive_no_cfg_analysis() {
std::vector<std::pair<int, std::string>> v;
const char* p = v.begin()->second.data();
const char* q = (*v.begin()).second.data();
const std::string& r = (*v.begin()).second;
auto temporary = []() { return std::vector<std::pair<int, std::string>>{{1, "1"}}; };
const char* x = temporary().begin()->second.data();
const char* y = (*temporary().begin()).second.data();
const std::string& z = (*temporary().begin()).second;
use(p, q, r, x, y, z);
}
```
The code above produces the following diagnostic output:
```txt
pr.cpp:13:19: warning: local temporary object does not live long enough [-Wlifetime-safety-use-after-scope]
13 | const char* x = temporary().begin()->second.data();
| ^~~~~~~~~~~
pr.cpp:13:52: note: destroyed here
13 | const char* x = temporary().begin()->second.data();
| ^
pr.cpp:13:19: note: expression aliases the storage of local temporary object
13 | const char* x = temporary().begin()->second.data();
| ^~~~~~~~~~~~~~~~~~~
pr.cpp:13:19: note: expression aliases the storage of local temporary object
13 | const char* x = temporary().begin()->second.data();
| ^~~~~~~~~~~~~~~~~~~~~
pr.cpp:13:19: note: expression aliases the storage of local temporary object
13 | const char* x = temporary().begin()->second.data();
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
pr.cpp:16:16: note: later used here
16 | use(p, q, r, x, y, z);
| ^
pr.cpp:15:28: warning: local temporary object does not live long enough [-Wlifetime-safety-use-after-scope]
15 | const std::string& z = (*temporary().begin()).second;
| ^~~~~~~~~~~
pr.cpp:15:49: note: destroyed here
15 | const std::string& z = (*temporary().begin()).second;
| ^
pr.cpp:15:28: note: expression aliases the storage of local temporary object
15 | const std::string& z = (*temporary().begin()).second;
| ^~~~~~~~~~~~~~~~~~~
pr.cpp:15:27: note: expression aliases the storage of local temporary object
15 | const std::string& z = (*temporary().begin()).second;
| ^~~~~~~~~~~~~~~~~~~~
pr.cpp:16:22: note: later used here
16 | use(p, q, r, x, y, z);
| ^
pr.cpp:14:21: warning: local temporary object does not live long enough [-Wlifetime-safety-use-after-scope]
14 | const char* y = (*temporary().begin()).second.data();
| ^~~~~~~~~~~
pr.cpp:14:54: note: destroyed here
14 | const char* y = (*temporary().begin()).second.data();
| ^
pr.cpp:14:21: note: expression aliases the storage of local temporary object
14 | const char* y = (*temporary().begin()).second.data();
| ^~~~~~~~~~~~~~~~~~~
pr.cpp:14:20: note: expression aliases the storage of local temporary object
14 | const char* y = (*temporary().begin()).second.data();
| ^~~~~~~~~~~~~~~~~~~~
pr.cpp:14:19: note: expression aliases the storage of local temporary object
14 | const char* y = (*temporary().begin()).second.data();
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
pr.cpp:16:19: note: later used here
16 | use(p, q, r, x, y, z);
| ^
3 warnings generated.
```
---------
Signed-off-by: Yuan Suo <suoyuan666 at s5n.xyz>
Commit: 422af7cca672a717bd9505a486e287fa2734bbc9
https://github.com/llvm/llvm-project/commit/422af7cca672a717bd9505a486e287fa2734bbc9
Author: Quentin Colombet <quentin.colombet at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MIRPrinter.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
Log Message:
-----------
[MIR] Save internal VirtRegMap state in MIR (#197361)
Adds two optional fields to the per-vreg YAML record so MIR tests can
express VirtRegMap state that previously had no representation:
registers:
- { id: 1, class: vgpr_32, split-from: '%0', assigned-phys: '$vgpr5' }
Testing passes that consume sibling-register information (e.g.
InlineSpiller) requires constructing a VirtRegMap with split
relationships from a MIR test, which implies triggering live-range
splitting at minimum and make reproducers unnecessarily complicated.
So this change introduces a mechanism to serialize/deserialize the state
of the VirtRegMap pass.
Mechanism:
- For serialization:
- MIRPrinter emits the new fields only when the VirtRegMap is available.
- For deserialization:
- MIRParser stashes parsed entries in the MachineRegisterInfo object
- VirtRegMap::init() drains the stash via assignVirt2Phys and
setIsSplitFromReg, then clears it.
Validation at parse time:
- 'assigned-phys' must be a physical register.
- 'split-from' must reference a different vreg than 'id'.
- 'split-from' physregs / named-vreg references already rejected
by parseStandaloneVirtualRegister.
I'm not super happy about stashing the VRM info in the MRI, but that's
a small price to pay.
Commit: 1b774ab021698428374815fb8d4d88855c3b2a48
https://github.com/llvm/llvm-project/commit/1b774ab021698428374815fb8d4d88855c3b2a48
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/CodeGen/X86/stack-coloring-setjmp.ll
Log Message:
-----------
[StackColoring] Cleanup stack-coloring test (NFC) (#203551)
This simply applies postcommit suggestions made here:
https://github.com/llvm/llvm-project/pull/199959
Commit: 7814cc9454cf454acdc7385fc41809a6bdf5d7f8
https://github.com/llvm/llvm-project/commit/7814cc9454cf454acdc7385fc41809a6bdf5d7f8
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6_lane_x2.c
A clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme2p3.c
A clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
A clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve2p3.c
A clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2p3.c
A clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_imm.c
M clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_imm.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
Log Message:
-----------
[AArch64][clang][llvm] Add ACLE Armv9.7 lookup table intrinsics (#187046)
Add support for the following Armv9.7-A Lookup Table (lut)
instruction intrinsics, as defined in the ACLE[1]:
SVE2.3:
```c
// Variants are also available for: _u8 _mf8
svint8_t svluti6[_s8](svint8x2_t table, svuint8_t indices);
```
SVE2.3 and SME2.3:
``` c
// Variants are also available for _u16_x2 and _f16_x2.
svint16_t svluti6_lane[_s16_x2](svint16x2_t table, svuint8_t indices, uint64_t imm_idx);
```
SME2.3:
```c
// Variants are also available for: _u16, _f16 and _bf16.
svint16x4_t svluti6_lane_s16_x4[_s16_x2](svint16x2_t table, svuint8x2_t indices, uint64_t imm_idx);
// Variants are also available for: _u8 and _mf8.
svint8x4_t svluti6_zt_s8_x4(uint64_t zt0, svuint8x3_t zn) __arm_streaming __arm_in("zt0");
// Variants are also available for: _u8 and _mf8.
svint8_t svluti6_zt_s8(uint64_t zt0, svuint8_t zn) __arm_streaming __arm_in("zt0");
```
[1] https://github.com/ARM-software/acle/pull/428/
Commit: 5906827e155cc5fca10cd505b88a4e21b861d65b
https://github.com/llvm/llvm-project/commit/5906827e155cc5fca10cd505b88a4e21b861d65b
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
Log Message:
-----------
[lldb][Windows] Forward OUTPUT_DEBUG_STRING_EVENT through lldb-server (#203546)
Hoist `ReadDebugString` into `ProcessDebugger` so both plugins share it,
then add
`NativeProcessWindows::OnDebugString` that reads the string, converts
UTF-16 to
UTF-8 when needed, and delivers via `NativeDelegate::NewProcessOutput`.
Fixes `Process/Windows/output_debug_string.cpp` on Windows under
`LLDB_USE_LLDB_SERVER=1`.
Commit: 9f3ac763bd8c4be2db1a97cec13bb59c87a9595f
https://github.com/llvm/llvm-project/commit/9f3ac763bd8c4be2db1a97cec13bb59c87a9595f
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Fix issue with expandDim (#203299)
In case, sgData is replicated or
bool sgDataReplicated = hasSgData && origSgDataDim ==
computeProduct(targetShape);
sgDataReplicate is evaluated to "true"
dimSizeCap and perSgShape shouldn't be divided by expSgLayout
Add a regression test (shape_cast_collapse_replicated) covering the
replicated sg_data collapse.
Commit: 9bbed741e260753de029fcf7b22844fe23362a39
https://github.com/llvm/llvm-project/commit/9bbed741e260753de029fcf7b22844fe23362a39
Author: dibrinsofor <64705019+dibrinsofor at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
M llvm/test/CodeGen/AArch64/fp-conversion-to-tbl.ll
A llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
Log Message:
-----------
[AArch64] Optimize vector slide shuffles with zeros to use shift instructions (#185170)
We currently emit `movi`+`ext` instructions when generating code for
shuffle slides of a 64-bit vector left/right and fill it with zeros.
This patch optimizes these patterns to use a single `ushr`/`shl`
instruction instead.
Example:
```llvm
define <8 x i8> @slide_left(<8 x i8> %v) {
%r = shufflevector <8 x i8> %v, <8 x i8> zeroinitializer,
<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
ret <8 x i8> %r
}
```
Before, we generate:
```
movi v1.2d, #0
ext v0.8b, v0.8b, v1.8b, #1
```
Now:
```
ushr d0, d0, #8
```
Fixes: #183398
Alive2 proof: https://alive2.llvm.org/ce/z/QaW5CQ
---------
Signed-off-by: Dibri Nsofor <dibrinsofor at gmail.com>
Commit: c9938eb76ca653abff8d0b7c99bd74aec57c4758
https://github.com/llvm/llvm-project/commit/c9938eb76ca653abff8d0b7c99bd74aec57c4758
Author: nirhersh <77844231+nirhersh at users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithDialect.cpp
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/Arith/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][arith] Implement ValueBoundsOpInterface for min/max ops (#203269)
Add ValueBoundsOpInterface external models for the arith integer min/max operations: arith.minsi and arith.maxsi.
---------
Co-authored-by: Nir Herscovici <nir.herscovici at mobileye.com>
Commit: c62768b10e5e16c494eef8289452a7d7d97798bf
https://github.com/llvm/llvm-project/commit/c62768b10e5e16c494eef8289452a7d7d97798bf
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Target/LLVMIR/nvvm/tensormap_replace_invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Fix valid range of ord in tensormap.replace op (#202853)
Fixes the valid range of the `ord` attribute in the NVVM dialect
`tensormap.replace` op to be `0-4` as indicated in the PTX ISA.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-tensormap-replace
Commit: 2d1fb738d6f9eb109a2f1e0405397565f25fece4
https://github.com/llvm/llvm-project/commit/2d1fb738d6f9eb109a2f1e0405397565f25fece4
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrs.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLAttrs.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLEnums.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/GPU/module-to-binary-rocdl.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/module-roundtrip.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
A mlir/test/Target/LLVMIR/rocdl-module-flags.mlir
Log Message:
-----------
[mlir][LLVM][ROCDL] Add buffer oob mode module flags, flag interfaces (#202729)
Now that the out-of-bounds mode for buffer accesses will be controlled
by a module flag and is no longer a function of the subtarget triple (as
of #160922) and since `ptr addrpace(7)` lowering will start respecting
this mode soon, add MLIR-level support for setting this flag.
After a few iterations, I think adding this module flag to
`llvm.module.flags` but adding interfaces for module flag attributes (so
that those wishing to set this flag don't need to know it has `max`
combining semantics or look up the enum values) is a
minimally-disruptive way to get a more ergonomic wrapper around this
functionality.
AI note: AI generated the code hehe, I reviewed it. The documentation
update to ModuleFlagsOp is mine.
(The LLVM PR that would want people to start explicitly setting
`relaxed` is #134329)
Co-authored-by: Codex <codex at openai.com>
Commit: 484b955581d976f97a47ef621c441e21c231aa23
https://github.com/llvm/llvm-project/commit/484b955581d976f97a47ef621c441e21c231aa23
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
Log Message:
-----------
[CIR] Implement throw within an aggregate expression (#203404)
This implements CIR support for throwing an exception from within a
branch of a ternary expression that represents an aggregate prvalue. We
previously had support for throwing an exception within a ternary
aggregate expression, but when the expression uses a prvalue, it goes
through a different code path. The new implementation is just calling an
existing function from a different place. The bulk of what's being added
here is the testing.
Commit: 99a37aedebd7c69680e74ac83769a11eaefef1e7
https://github.com/llvm/llvm-project/commit/99a37aedebd7c69680e74ac83769a11eaefef1e7
Author: Quentin <qcoelho at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/StringExtras.h
Log Message:
-----------
[ADT][NFC] Fix documentation for arrayRefFromStringRef (#203430)
The documentation was describing the opposite behavior of what it does.
Commit: 17207c8feb9fc6c576ce820ff4583e337dc0452e
https://github.com/llvm/llvm-project/commit/17207c8feb9fc6c576ce820ff4583e337dc0452e
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Change "local temporary object" to "temporary object" in diagnostics (#203573)
Commit: 878bbacfb0e6ced7c0313d5f7c097d7c94a1c4da
https://github.com/llvm/llvm-project/commit/878bbacfb0e6ced7c0313d5f7c097d7c94a1c4da
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/Support/Win64EH.cpp
M llvm/test/MC/COFF/seh-unwindv3-inheritance.s
M llvm/test/tools/llvm-objdump/COFF/win64-unwindv3-multi-epilog.yaml
M llvm/test/tools/llvm-readobj/COFF/unwind-x86_64-v3-multi-epilog.yaml
M llvm/tools/llvm-objdump/COFFDump.cpp
M llvm/tools/llvm-readobj/Win64EHDumper.cpp
Log Message:
-----------
[win][x64] Windows x64 unwind v3: Update epilog inheritance per spec clarification (#202778)
The Windows x64 unwind v3 spec was clarified
(MicrosoftDocs/cpp-docs#5936) to state that an EPILOG_INFO_V3 record
with `NumberOfOps == 0` inherits its effective fields from the first
*preceding* descriptor with `NumberOfOps != 0` (the "base"), not the
immediately preceding one. Additionally, Flags bits 0 and 1 are no
longer inherited; the producer must replicate them so they match the
base descriptor.
- Encoder (MCWin64EH.cpp): compare each epilog against the tracked base
descriptor, and emit EPILOG_INFO_LARGE in inherited descriptors' own
flags byte.
- Decoder (Win64EH.cpp): track the base index and inherit from it; keep
the record's own flags byte instead of copying the previous record's.
- Dumpers (llvm-readobj, llvm-objdump): reword "previous epilog" to
"base epilog".
- Tests: update multi-epilog expectations and add a LARGE
inherited-epilog case to seh-unwindv3-inheritance.s.
Commit: 528e6f9a030c4b3bf760807c22c98f17fb582f5f
https://github.com/llvm/llvm-project/commit/528e6f9a030c4b3bf760807c22c98f17fb582f5f
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-insert.ll
Log Message:
-----------
[AArch64] Avoid creating a new generic constant in SelectSMETileSlice (#203344)
This was creating a new ISD::Constant node during instruction selection,
which may also need lowering (e.g., to a `mov gpr, wzr`). The issue with
this is the new constant node will not end up on the instruction
selection worklist, as the complex pattern executes after the worklist
has been prepared. This means the constant will lower directly to an
immediate. This issue was hidden in some cases by `getConstant()`
returning a pre-existing `ISD::Constant` node already within the
instruction selection worklist.
This patch works around this by directly emitting a `CopyFromReg WZR`
within SelectSMETileSlice, which does not need further instruction
selection.
Fixes #203295
Commit: 9240c64f4528064cec31e8875fb891b473f8ca7c
https://github.com/llvm/llvm-project/commit/9240c64f4528064cec31e8875fb891b473f8ca7c
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/BundleAttributes.cpp
Log Message:
-----------
[LVI][ValueTracking] Merge checking whether assumes imply nonnull (#203523)
Commit: eaef650f57900b36751dea4e0383de1e73cdff29
https://github.com/llvm/llvm-project/commit/eaef650f57900b36751dea4e0383de1e73cdff29
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
A clang/test/CIR/CodeGen/cxx-construct-lvalue.cpp
Log Message:
-----------
[CIR] Implement handling for CXXConstructLValue expressions (#203402)
This implements the handling to emit an l-value for CXXConstructExpr and
CXXTemporaryObjectExpr expressions. This is a simple copy from the
equivalent code in classic codegen and uses existing CIR code for most
of the actual work.
A multi-argument constructor call written with explicit type syntax
produces a CXXTemporaryObjectExpr. Using it as the base of a member
access reaches emitLValue with that expression class. A single-argument
constructor call performs a constructor conversion, so the base of the
member access is a CXXFunctionalCastExpr whose subexpression is a
CXXConstructExpr. emitCastLValue forwards to the subexpression, reaching
emitLValue with the CXXConstructExpr class.
Commit: e476b23c5facd1705f06ee60f1e62869c638f395
https://github.com/llvm/llvm-project/commit/e476b23c5facd1705f06ee60f1e62869c638f395
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M compiler-rt/test/fuzzer/fork-sigusr.test
M compiler-rt/test/fuzzer/merge-sigusr.test
M compiler-rt/test/fuzzer/sigint.test
M compiler-rt/test/fuzzer/sigusr.test
Log Message:
-----------
[Fuzzer] Make signal tests work with internal shell (#203445)
Wrap some commands in bash as it seemed like the least bad option. The
alternative is to use setsid and run the other commands in the internal
shell, but them it's impossible to use wait and we run into reliability
issues because of that.
Commit: 473ca91cdb03d01394eea440ea4f3a14cdc04b6e
https://github.com/llvm/llvm-project/commit/473ca91cdb03d01394eea440ea4f3a14cdc04b6e
Author: Jan Korous <jkorous at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/test/Analysis/Scalable/PointerFlow/external-inline-function-in-multi-tu.test
M clang/test/Analysis/Scalable/call-graph.cpp
A clang/test/Analysis/Scalable/cli-errors-compilation-unit-id.cpp
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/downgradable-errors.cpp
M clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
M clang/test/Analysis/Scalable/help.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
Log Message:
-----------
[clang][ssaf] Add --ssaf-compilation-unit-id= flag (#203345)
The TU summary extractor previously sourced the CompilationUnit
namespace name from clang's `InFile` argument, which made the identity
of a TU summary depend on the file path the build system passed to
clang. Have the build system pass the identifier directly:
- New driver/cc1 option `--ssaf-compilation-unit-id=<id>`, marshalled
into `FrontendOptions::SSAFCompilationUnitId`.
- `TUSummaryRunner` builds its `BuildNamespace(CompilationUnit, ...)`
from the new option's value; `InFile` is no longer threaded into the
runner.
- New diagnostic `warn_ssaf_tu_summary_requires_compilation_unit_id`
(under `-Wscalable-static-analysis-framework`, `DefaultError`) fires
when `--ssaf-tu-summary-file=` is set without a non-empty
`--ssaf-compilation-unit-id=`. The runner falls back to the wrapped
consumer alone in that case, matching the existing setup-time SSAF
diagnostics.
Assisted-By: Claude Opus 4.7
Commit: fdd939dce1eb145e386dc3242661c3a73b759e4f
https://github.com/llvm/llvm-project/commit/fdd939dce1eb145e386dc3242661c3a73b759e4f
Author: Nishant Patel <nishant.b.patel at intel.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/Transforms/Transforms.h
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
M mlir/lib/Dialect/XeGPU/Utils/CMakeLists.txt
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
M mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
Log Message:
-----------
[MLIR][XeGPU] Use context-aware type converter in WgToSgDistribute and Blocking pass (#194685)
This PR replaces the TypeConverter in xegpu-wg-to-sg-distribute and
xegpu-blocking with a context-aware converter that picks each value's
converted type from the layout attached to its defining op/use, removing
the need for the UnrealizedConversionCastOpPattern workaround for scf
ops.
Commit: 6dbe068edef96c13930471d602fd5fb876e9da04
https://github.com/llvm/llvm-project/commit/6dbe068edef96c13930471d602fd5fb876e9da04
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/MC/MCWin64EH.cpp
Log Message:
-----------
[Win][x64] Fix -Wunused-variable (#203591)
BaseEpiFlags is only used in assertions, so mark it maybe_unused to
avoid the warning in release builds.
Commit: 0a9cf8c6c3038f1a02fa2051d12c9e9d7ddb4aad
https://github.com/llvm/llvm-project/commit/0a9cf8c6c3038f1a02fa2051d12c9e9d7ddb4aad
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes fdd939d (#203593)
This fixes fdd939dce1eb145e386dc3242661c3a73b759e4f.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e4a63425ba266f6027e7d257c9a79141c26aa8d8
https://github.com/llvm/llvm-project/commit/e4a63425ba266f6027e7d257c9a79141c26aa8d8
Author: Jiaqi He <heturing at gmail.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/riscv/hwprobe.inc
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[RISC-V] Add newer Linux hwprobe extensions detection (#192761)
Commit: 660771d4359b14fe56a5eef19c33f93475aee39e
https://github.com/llvm/llvm-project/commit/660771d4359b14fe56a5eef19c33f93475aee39e
Author: Jiachen Yuan <jiacheny at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/Bitset.h
M llvm/unittests/ADT/BitsetTest.cpp
Log Message:
-----------
Reapply "[ADT] Bitset: add shift operators, word accessors, and etc" (#195874)
Reapplies #193400, which was reverted in #195848 because it broke
buildbots with:
```
Bitset.h:271: error: static assertion failed: Unsupported word size
```
Root cause: a `static_assert(BitwordBits == 32, ...)` inside the
discarded `else` branch of `if constexpr (BitwordBits == 64)` in
`getWord64()`. The assert's condition is non-template-dependent
(`BitwordBits` derives from `sizeof(uintptr_t)`, not from `NumBits`), so
it is checked even though the branch is discarded, and fires on 64-bit
hosts. Related:
https://stackoverflow.com/questions/38304847/how-does-a-failed-static-assert-work-in-an-if-constexpr-false-block
Fix: drop the redundant inner `static_assert`. The class-level
`static_assert(BitwordBits == 64 || BitwordBits == 32, ...)` already
enforces the same invariant.
No functional change beyond the original PR.
---------
Co-authored-by: Rahul Joshi <rjoshi at nvidia.com>
Commit: 5a52d68d6b030b155580ff03f5f8ad0cc9dc2fd9
https://github.com/llvm/llvm-project/commit/5a52d68d6b030b155580ff03f5f8ad0cc9dc2fd9
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/test/MC/COFF/seh-unwindv3-error.s
A llvm/test/tools/llvm-ml/beginepilog_error.asm
M llvm/test/tools/llvm-ml/builtin_symbols.asm
A llvm/test/tools/llvm-ml/epilog_directive_errors.asm
A llvm/test/tools/llvm-ml/epilog_directives.asm
A llvm/test/tools/llvm-ml/proc_frame_v3.asm
A llvm/test/tools/llvm-ml/prolog_directive_errors.asm
A llvm/test/tools/llvm-ml/unwindv3_required_errors.asm
M llvm/tools/llvm-ml/Opts.td
M llvm/tools/llvm-ml/llvm-ml.cpp
Log Message:
-----------
[llvm-ml] Add MASM unwind v3 support for x64 exception handling and improve MSVC compat (#202809)
New command-line options:
- `/unwindv3`: Enable V3 unwind information format
New MASM directives:
- `.push2reg` / `.pop2reg`: Push/pop register pairs (PUSH2/POP2)
- `.beginepilog` / `.endepilog`: Delimit epilog unwind regions
- `.popreg`, `.freestack`, `.restorereg`, `.restorexmm128`,
`.unsetframe`: Epilog counterparts of existing prolog directives
- `.pushframe code`: MASM syntax for interrupt handlers with error codes
New built-in symbol:
- `@UnwindVersion`: Returns the current x64 unwind version being used.
Error diagnostics:
- Prolog directives after `.endprolog` are diagnosed
- Epilog directives outside `.beginepilog`/`.endepilog` are diagnosed
- Nested `.beginepilog` is diagnosed
- Unwind v3 directives or using extended registers in directives without
unwind v3 are diagnosed
Commit: f2957d7a56372cf8bd2b48aec81ae7c0fb38813f
https://github.com/llvm/llvm-project/commit/f2957d7a56372cf8bd2b48aec81ae7c0fb38813f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Add missing check for empty argument list (#203592)
Commit: 5036a80a20a6749f95b77a2c08786f42fdd056ac
https://github.com/llvm/llvm-project/commit/5036a80a20a6749f95b77a2c08786f42fdd056ac
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
Log Message:
-----------
[HLSL][NFC] Remove unused location argument (#203467)
The location argument was just passed around but never used.
Commit: 2a72cd87a5bb9db73708661e8760ff710460ae11
https://github.com/llvm/llvm-project/commit/2a72cd87a5bb9db73708661e8760ff710460ae11
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/unittests/Support/GlobPatternTest.cpp
Log Message:
-----------
[NFC][Support] Add test for inverted slash-agnostic matching (#203290)
Add a test case to GlobPatternTest to verify that inverted character
classes containing slashes (e.g. [^/] or [^\\]) behave correctly
under SlashAgnostic mode (i.e. they do not match either slash).
Assisted-by: Gemini
Commit: 64381998961b4b9324ab5a6f6015b285b59d6bb6
https://github.com/llvm/llvm-project/commit/64381998961b4b9324ab5a6f6015b285b59d6bb6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
Log Message:
-----------
[VPlan] Introduce m_SelectLike and use to support 2-operand blends. (#194729)
We should be able to treat 2-operand blends like select by most VPlan
code. Add a new m_SelectLike matcher and use in places that only use the
matcher to extract operands.
Overall this leads to a small number of improvements in RISCV (~10 files
changed in a large IR corpus) and 2 loops changed on AArch64 with
tail-folding forced.
PR: https://github.com/llvm/llvm-project/pull/194729
Commit: fda7a72af7a76ac6b51a8a1b1222f878d76405ed
https://github.com/llvm/llvm-project/commit/fda7a72af7a76ac6b51a8a1b1222f878d76405ed
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMGDPU] Add gfx1251 V_PK_MIN/MAX_NUM_F64 (#203596)
Also legalizes v2f64 fcanonicalize.
Commit: 2c1b71af78df9d7c22e225069971d3276d91d546
https://github.com/llvm/llvm-project/commit/2c1b71af78df9d7c22e225069971d3276d91d546
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/i128-trip-count-evl.ll
Log Message:
-----------
[VPlan] Compute URem via APInt in materializeVectorTripCount (#203604)
materializeVectorTripCount has a shortcut for scalable steps: if the
constant trip count is divisible by the maximum possible runtime step,
the vector trip count equals the trip count directly. This called
APInt::getZExtValue unconditionally, which asserts when the constant
value needs more than 64 bits.
Compute the URem in APInt to fix the crash.
Commit: 1060a6be0a471106fd65a3f16937ee1c588dabed
https://github.com/llvm/llvm-project/commit/1060a6be0a471106fd65a3f16937ee1c588dabed
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/CodeGen/DirectX/switch-to-lookup-table-i16-narrowing.ll
A llvm/test/CodeGen/DirectX/switch-to-lookup-table-no-i8-narrowing.ll
Log Message:
-----------
[SimplifyCFG][DirectX] Honor target minimum lookup table element width (#203103)
fixes #202481
This change adds a `TTI::getMinimumLookupTableEntryBitWidth()` (default
`8`) and fold it
into SimplifyCFG's `NeededBitWidth` computation so targets can prevent
unsupported
narrow lookup tables. DirectX returns 32 (or 16 with native 16-bit
types) so tables
never narrow to the unsupported i8 type.
> Assisted by Claude Opus 4.8
Commit: 10508afd0b14ffcf6819665e31d64d77ccd45d3f
https://github.com/llvm/llvm-project/commit/10508afd0b14ffcf6819665e31d64d77ccd45d3f
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
Reland "[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)" (#203602)
Reverted 7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc and added '#ifndef
NDEBUG' guards for tests using 'llvm::setCurrentDebugType'.
Original message:
Hard errors were used in extractors during development to quickly
identify unsupported language constructs. This commit converts them to
DEBUG_WITH_TYPE so that these errors are silenced in release builds.
In addition, translating unsupported language constructs now silently
results in an empty EntityPointerLevelSet. The PointerFlowExtractor will
skip empty sets for either the source or the destination when building
edges to avoid an ill-formed edge set data structure.
rdar://178747892
Commit: 0b128394b9c796ebe4efd9e0dde38976fb291798
https://github.com/llvm/llvm-project/commit/0b128394b9c796ebe4efd9e0dde38976fb291798
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
A llvm/test/tools/llvm-diff/callsite-assumption-passing.ll
M llvm/tools/llvm-diff/lib/DifferenceEngine.cpp
Log Message:
-----------
[llvm-diff] Respect AllowAssumptions in diffCallSites (#203597)
diffCallSites always built an AssumptionContext, so call sites made
optimistic equivalence assumptions even when the caller disabled them.
This made matchForBlockDiff over-match, and the re-check in unify() then
hit the "structural differences second time around?" assertion.
Thread the caller's AssumptionContext into diffCallSites so call sites
honor the no-assumptions request like every other instruction kind.
Fixes #184133
Commit: 12d95c65fc99a3d5686f1d409572d1965fd653b1
https://github.com/llvm/llvm-project/commit/12d95c65fc99a3d5686f1d409572d1965fd653b1
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
R llvm/test/Transforms/LICM/vector-insert.ll
Log Message:
-----------
Revert "[LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts" (#203611)
Reverts llvm/llvm-project#200532
Commit: 0526807f89803b394fcebc87dfc234e57513986e
https://github.com/llvm/llvm-project/commit/0526807f89803b394fcebc87dfc234e57513986e
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
A clang/test/AST/tyloctype_alignment.cpp
Log Message:
-----------
[clang][z/OS] Add test for TypeLoc tail padding alignment (#202710)
This adds a test for the TypeLoc tail padding fix that was merged in
commit 89305c3.
Commit: 5f51294647b3c4c08dfd0e455b1a997074864d26
https://github.com/llvm/llvm-project/commit/5f51294647b3c4c08dfd0e455b1a997074864d26
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaOverload.cpp
A clang/test/Sema/atomic-conversions-to-int.cpp
Log Message:
-----------
Fix contextual implicit conversions to int: with _Atomic (#203522)
PerformContextualImplicitConversion was performing
default-lvalue-conversions, then basing decisions on viable conversion
functions on this type However, when we then went to add the candidates
we were using the 'old' value (pre-conversion) of the type, resulting in
us regaining the lost 'atomic' from the default Lvalue conversion.
This patch updates the 'from' variable to be the converted value so all
conversions are done post-conversion.
Fixes: #201770
Commit: ce09519f40a6d76ec231ef8e4630c0d85c8cdaa5
https://github.com/llvm/llvm-project/commit/ce09519f40a6d76ec231ef8e4630c0d85c8cdaa5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/test/Transforms/ConstraintElimination/geps-unsigned-predicates.ll
Log Message:
-----------
[ConstraintElim] Add test with negative offset and NUW only GEP (NFC) (#203614)
Add test currently mis-compiled with NUW only GEP.
https://alive2.llvm.org/ce/z/7G8uE3
Commit: 327ce1bb0cd56e74bfd79f51463e6c0a81905a25
https://github.com/llvm/llvm-project/commit/327ce1bb0cd56e74bfd79f51463e6c0a81905a25
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M compiler-rt/test/fuzzer/lit.cfg.py
Log Message:
-----------
[Fuzzer] Use the internal shell by default (#203450)
The external shell is going away soon and the internal shell is superior
in most ways (platform compatibility, performance, debugging). This now
causes no test failures and is blocking deprecation of the external
shell, so switch over.
Commit: b312ae01043b75637f4fd4dbaf66a09907f63c22
https://github.com/llvm/llvm-project/commit/b312ae01043b75637f4fd4dbaf66a09907f63c22
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add gfx1251 V_PK_ADD/SUB_NC_U64 (#203607)
Commit: 87d29e3f438c9c02390a4260e9a1bc7712f882c2
https://github.com/llvm/llvm-project/commit/87d29e3f438c9c02390a4260e9a1bc7712f882c2
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
Log Message:
-----------
[AMDGPU] NFC: Drop constexpr from getFlavor*Name functions (#203603)
It seems specifying these as constexpr was causing some buildbot
failures due to llvm_unreachable --
```
[1/123] Building CXX object lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUCoExecSchedStrategy.cpp.o
FAILED: lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUCoExecSchedStrategy.cpp.o
/usr/bin/c++ -DLLVM_EXPORTS -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/path/to/build.AArch64.Release.main/lib/Target/AMDGPU -I/path/to/llvm-project/llvm/lib/Target/AMDGPU -I/path/to/build.AArch64.Release.main/include -I/path/to/llvm-project/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-array-bounds -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -std=c++17 -fvisibility=hidden -UNDEBUG -fno-exceptions -funwind-tables -fno-rtti -MD -MT lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUCoExecSchedStrategy.cpp.o -MF lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUCoExecSchedStrategy.cpp.o.d -o lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUCoExecSchedStrategy.cpp.o -c /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
In file included from /path/to/llvm-project/llvm/include/llvm/ADT/Hashing.h:49,
from /path/to/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:12,
from /path/to/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/GCNSubtarget.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/GCNRegPressure.h:20,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h:16,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp:14:
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getFlavorName(llvm::AMDGPU::InstructionFlavor)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:67: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown InstructionFlavor");
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getFlavorShortName(llvm::AMDGPU::InstructionFlavor)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:95: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown InstructionFlavor");
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getReasonName(llvm::AMDGPU::AMDGPUSchedReason)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:142: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown AMDGPUSchedReason");
[2/123] Building CXX object lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUTargetMachine.cpp.o
FAILED: lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUTargetMachine.cpp.o
/usr/bin/c++ -DLLVM_EXPORTS -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/path/to/build.AArch64.Release.main/lib/Target/AMDGPU -I/path/to/llvm-project/llvm/lib/Target/AMDGPU -I/path/to/build.AArch64.Release.main/include -I/path/to/llvm-project/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-array-bounds -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wno-comment -Wno-misleading-indentation -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -std=c++17 -fvisibility=hidden -UNDEBUG -fno-exceptions -funwind-tables -fno-rtti -MD -MT lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUTargetMachine.cpp.o -MF lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUTargetMachine.cpp.o.d -o lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/AMDGPUTargetMachine.cpp.o -c /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
In file included from /path/to/llvm-project/llvm/include/llvm/ADT/Hashing.h:49,
from /path/to/llvm-project/llvm/include/llvm/ADT/ArrayRef.h:12,
from /path/to/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/GCNSubtarget.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h:17,
from /path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:17:
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getFlavorName(llvm::AMDGPU::InstructionFlavor)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:67: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown InstructionFlavor");
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getFlavorShortName(llvm::AMDGPU::InstructionFlavor)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:95: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown InstructionFlavor");
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h: In function 'constexpr llvm::StringRef llvm::AMDGPU::getReasonName(llvm::AMDGPU::AMDGPUSchedReason)':
/path/to/llvm-project/llvm/include/llvm/Support/ErrorHandling.h:165:36: error: call to non-'constexpr' function 'void llvm::llvm_unreachable_internal(const char*, const char*, unsigned int)'
::llvm::llvm_unreachable_internal(msg, __FILE__, __LINE__)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~
/path/to/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h:142: note: in expansion of macro 'llvm_unreachable'
llvm_unreachable("Unknown AMDGPUSchedReason");
ninja: build stopped: subcommand failed.
```
See alo
(https://github.com/llvm/llvm-project/pull/192322#issuecomment-4672427400)
Commit: 3abb8d8a05a215f719cd5ebc962e5f07ffbaeaa1
https://github.com/llvm/llvm-project/commit/3abb8d8a05a215f719cd5ebc962e5f07ffbaeaa1
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
A mlir/test/Conversion/XeGPUToXeVM/extf_truncf.mlir
M mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/xevm.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_truncf_extf_raw.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_truncf_extf_roundtrip.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_truncf_extf_roundtrip_bf16.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_truncf_extf_roundtrip_fp4.mlir
A mlir/test/Integration/Dialect/XeVM/GPU/xevm_truncf_extf_roundtrip_fp4_bf16.mlir
Log Message:
-----------
[MLIR][XeVM] Add xevm.extf op as the inverse of xevm.truncf (#203124)
Add a new xevm.extf operation that extends f8/bf8/f4 values to f16/bf16,
mirroring the existing xevm.truncf op, together with its lowering in
XeVMToLLVM.
Lowering details (XeVMToLLVM):
- bf8/f8 -> f16 via __builtin_IB_bf8tohf_16 / __builtin_IB_hf8tohf_16.
- bf8/f8 -> bf16 via f16 -> f32 (convert_float16) -> bf16
(__builtin_IB_ftobf_16).
- e2m1 (fp4) -> f16/bf16 via __builtin_IB_shfl_idx4_lut and
__builtin_IB_shfl_idx4_to_fp16_8_packed (LUT 7 for f16, 5 for bf16).
Adds the op definition and verifier, conversion/roundtrip/invalid unit
tests, and f8 and fp4 GPU round-trip integration tests.
Adds arith.extf to xevm.extf lowering and arith.truncf to xevm.truncf
lowering in XeGPU to XeVM conversion and unit tests.
Commit: c4c30cebec281eb52e9742cfb1f892fa3c1d9624
https://github.com/llvm/llvm-project/commit/c4c30cebec281eb52e9742cfb1f892fa3c1d9624
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/insertvalue.ll
Log Message:
-----------
[SLP] Vectorize full insertvalue buildvector sequences
Treat a complete chain of insertvalue instructions building a homogeneous
literal struct from scalars as a buildvector, like insertelement sequences.
The scalars are vectorized into one vector; the aggregate is rebuilt from it
via a stack store + load, or stored directly when its only user is a store.
insertvalue is routed through the existing insertelement buildvector paths
(type/index helpers, reordering, tree build, cost model, min-bitwidth, and
codegen). Only single-index, non-vector inserts building from an undef
aggregate are handled.
Fixes #43353
Reviewers: hiraditya, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/200274
Commit: ae026a59dad1a0a59209418f7a39e16a889c8ac1
https://github.com/llvm/llvm-project/commit/ae026a59dad1a0a59209418f7a39e16a889c8ac1
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
Log Message:
-----------
[AMDGPU] Enable S_ADD_PC_I64 on gfx1251 (#203613)
Commit: 2f8a39d73394b9a50a32fed5430896afa32a06f5
https://github.com/llvm/llvm-project/commit/2f8a39d73394b9a50a32fed5430896afa32a06f5
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/lcssa-incoming-value-is-not-instr.ll
Log Message:
-----------
[LoopInterchange] Fix crash when followLCSSA returns constant (#203515)
Similar as the case in ##201069, `followLCSSA` may return a constant
value, but it was cast to Instruction unconditionally. We need to
explicitly check whether the returned value is an Instruction or not.
Fix #203375.
Commit: d0cd530bf4e28732368244476c4f504a4920e6c4
https://github.com/llvm/llvm-project/commit/d0cd530bf4e28732368244476c4f504a4920e6c4
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
Log Message:
-----------
[LoopInterchange] Mark getAddRecCoefficient with static (#203624)
As this function is a file-scope non-member function, it's better to
mark it with static.
Commit: e882286f4bb9095558e9783aa79cc6ca90487bcf
https://github.com/llvm/llvm-project/commit/e882286f4bb9095558e9783aa79cc6ca90487bcf
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Fix perf data return identification (#203628)
If perf data doesn't have branch type recorded, missing value would
incorrectly be interpreted as not-a-return. Only populate Returns map if
the branch type is available.
Fixes bug introduced in #202813.
Commit: 8fb9963fd4da8bc5b3b7e186cd369102f42d3640
https://github.com/llvm/llvm-project/commit/8fb9963fd4da8bc5b3b7e186cd369102f42d3640
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
A llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
A llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
Log Message:
-----------
[AMDGPU] Add gfx1251 V_PK_LSHL_ADD_U64 (#203612)
Commit: 0618f10ad95b3a6bb09142a18f524c323c76f362
https://github.com/llvm/llvm-project/commit/0618f10ad95b3a6bb09142a18f524c323c76f362
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-12 (Fri, 12 Jun 2026)
Changed paths:
M .git-blame-ignore-revs
M .github/new-prs-labeler.yml
M .github/workflows/ids-check.yml
M .github/workflows/issue-write.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/subscriber.yml
A .github/workflows/test-suite.yml
A .github/workflows/test-suite/aarch64.cmake
A .github/workflows/test-suite/configure-and-build.sh
A .github/workflows/test-suite/llvm.cmake
A .github/workflows/test-suite/riscv64.cmake
A .github/workflows/test-suite/x86_64.cmake
M bolt/docs/CMakeLists.txt
M bolt/docs/doxygen.cfg.in
M bolt/docs/profiles.md
M bolt/include/bolt/Profile/DataAggregator.h
M bolt/include/bolt/Profile/DataReader.h
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Profile/Heatmap.cpp
M bolt/test/X86/heatmap-preagg.test
M bolt/test/X86/pre-aggregated-perf.test
M bolt/test/X86/pre-aggregated-records.s
M bolt/test/perf2bolt/perf_brstack.test
M bolt/unittests/Profile/DataAggregator.cpp
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
M clang-tools-extra/clang-tidy/readability/DeleteNullPointerCheck.cpp
M clang-tools-extra/clang-tidy/readability/InconsistentIfElseBracesCheck.cpp
M clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
M clang-tools-extra/clang-tidy/utils/IncludeSorter.cpp
M clang-tools-extra/clangd/SemanticHighlighting.cpp
M clang-tools-extra/clangd/index/SymbolID.h
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/docs/CMakeLists.txt
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/Contributing.rst
M clang-tools-extra/docs/doxygen.cfg.in
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/loop-convert/structures.h
M clang-tools-extra/test/clang-tidy/checkers/modernize/loop-convert-basic.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/delete-null-pointer.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-ifelse-braces-attributes.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-ifelse-braces.cpp
M clang/docs/CMakeLists.txt
M clang/docs/ClangSYCLLinker.rst
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SanitizerSpecialCaseList.rst
M clang/docs/doxygen.cfg.in
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/JSONNodeDumper.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/ASTMatchers/ASTMatchers.h
M clang/include/clang/ASTMatchers/ASTMatchersInternal.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
M clang/include/clang/Analysis/CallGraph.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/arm_sme.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/DependencyScanning/DependencyScanningFilesystem.h
M clang/include/clang/Driver/OffloadBundler.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Frontend/FrontendOptions.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysisFramework/Core/Model/EntityLinkage.h
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTDumper.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/MemberPointer.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/Comment.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclPrinter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/JSONNodeDumper.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/ASTMatchers/Dynamic/Registry.cpp
M clang/lib/Analysis/ExprMutationAnalyzer.cpp
M clang/lib/Analysis/FlowSensitive/DataflowAnalysisContext.cpp
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AMDGPU.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenOpenACCRecipe.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/CGCUDANV.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTables.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/DependencyScanning/ModuleDepCollector.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AIX.cpp
M clang/lib/Driver/ToolChains/AIX.h
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/AVR.cpp
M clang/lib/Driver/ToolChains/AVR.h
M clang/lib/Driver/ToolChains/Arch/X86.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/BareMetal.h
M clang/lib/Driver/ToolChains/CSKYToolChain.cpp
M clang/lib/Driver/ToolChains/CSKYToolChain.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Cuda.h
M clang/lib/Driver/ToolChains/Darwin.cpp
M clang/lib/Driver/ToolChains/Darwin.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Fuchsia.h
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Gnu.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/ToolChains/Hexagon.h
M clang/lib/Driver/ToolChains/Linux.cpp
M clang/lib/Driver/ToolChains/Linux.h
M clang/lib/Driver/ToolChains/MSP430.cpp
M clang/lib/Driver/ToolChains/MSP430.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/MSVC.h
M clang/lib/Driver/ToolChains/MinGW.cpp
M clang/lib/Driver/ToolChains/MinGW.h
M clang/lib/Driver/ToolChains/NetBSD.cpp
M clang/lib/Driver/ToolChains/NetBSD.h
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Driver/ToolChains/SPIRVOpenMP.cpp
M clang/lib/Driver/ToolChains/SPIRVOpenMP.h
M clang/lib/Driver/ToolChains/SYCL.cpp
M clang/lib/Driver/ToolChains/SYCL.h
M clang/lib/Driver/ToolChains/VEToolchain.cpp
M clang/lib/Driver/ToolChains/VEToolchain.h
M clang/lib/Driver/ToolChains/WebAssembly.cpp
M clang/lib/Driver/ToolChains/WebAssembly.h
M clang/lib/Driver/ToolChains/XCore.cpp
M clang/lib/Driver/ToolChains/XCore.h
M clang/lib/Driver/ToolChains/ZOS.cpp
M clang/lib/Driver/ToolChains/ZOS.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Index/IndexingContext.cpp
M clang/lib/InstallAPI/Visitor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
M clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
M clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLifetimeSafety.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/lib/StaticAnalyzer/Core/BugSuppression.cpp
M clang/lib/Tooling/Syntax/BuildTree.cpp
M clang/test/AST/ByteCode/builtins.c
M clang/test/AST/ByteCode/codegen.c
M clang/test/AST/ByteCode/cxx11.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ast-dump-templates-pattern.cpp
A clang/test/AST/tyloctype_alignment.cpp
A clang/test/AST/undocumented-attrs.cpp
A clang/test/Analysis/Scalable/PointerFlow/external-inline-function-in-multi-tu.test
M clang/test/Analysis/Scalable/call-graph.cpp
A clang/test/Analysis/Scalable/cli-errors-compilation-unit-id.cpp
M clang/test/Analysis/Scalable/command-line-interface.cpp
M clang/test/Analysis/Scalable/downgradable-errors.cpp
M clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
M clang/test/Analysis/Scalable/help.cpp
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-entry-missing-data.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-entry-missing-summary-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/data-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-entity-id-in-data-map.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-entity.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/duplicate-summary-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-missing-entity-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-data-missing-entity-summary.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-suffix.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/entity-name-missing-usr.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-entry-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/id-table-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/invalid-syntax.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-duplicate-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-id-not-uint64.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-linkage-invalid-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-linkage-missing-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-entry-missing-linkage.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-extra-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-missing-id.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/linkage-table-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-invalid-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-missing-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/lu-namespace-not-array.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-data.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-id-table.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-linkage-table.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/missing-lu-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-invalid-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-missing-kind.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-missing-name.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/namespace-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/not-json-extension.txt
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-element-not-object.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-first-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-pairs-field-type.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-invalid-second-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-first-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-pairs-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/pairs-missing-second-field.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/read-entity-summary-no-format-info.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-empty-data-entry.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-empty-namespace.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-external.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-internal.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-multiple.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-linkage-none.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-multiple-namespace-elements.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-single-namespace-element.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/Inputs/rt-two-summary-types.json
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/id-table.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/io.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/linkage.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/permissions.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/round-trip.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/summary-data.test
A clang/test/Analysis/Scalable/ssaf-format/LUSummary/top-level.test
A clang/test/Analysis/pthreadlock-notes.c
M clang/test/CIR/CodeGen/abi-lower-after-unreachable.cpp
M clang/test/CIR/CodeGen/abstract-cond.c
M clang/test/CIR/CodeGen/agg-expr-lvalue.c
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/amdgpu-call-addrspace-cast.cpp
M clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
M clang/test/CIR/CodeGen/array-ctor.cpp
M clang/test/CIR/CodeGen/array-dtor.cpp
M clang/test/CIR/CodeGen/array-init-loop-exprs.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/assume-attr.cpp
M clang/test/CIR/CodeGen/atomic-thread-fence.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/base-to-derived.cpp
M clang/test/CIR/CodeGen/basic.c
M clang/test/CIR/CodeGen/basic.cpp
M clang/test/CIR/CodeGen/binassign.c
A clang/test/CIR/CodeGen/bind-temporary-lvalue.cpp
M clang/test/CIR/CodeGen/binop.cpp
M clang/test/CIR/CodeGen/bitfield-union.c
M clang/test/CIR/CodeGen/bitfields.c
M clang/test/CIR/CodeGen/bitfields.cpp
M clang/test/CIR/CodeGen/bitfields_be.c
M clang/test/CIR/CodeGen/builtins-x86.c
M clang/test/CIR/CodeGen/call-via-class-member-funcptr.cpp
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/call.cpp
M clang/test/CIR/CodeGen/cast-cxx20.cpp
M clang/test/CIR/CodeGen/cast.c
M clang/test/CIR/CodeGen/cast.cpp
M clang/test/CIR/CodeGen/choose-expr.cpp
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/cleanup-automatic-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/cleanup-derived-to-base-ref.cpp
M clang/test/CIR/CodeGen/cleanup-scope-goto-out.cpp
M clang/test/CIR/CodeGen/cleanup-scope-goto-within.cpp
M clang/test/CIR/CodeGen/cleanup-scope-tmp-with-exception.cpp
M clang/test/CIR/CodeGen/cleanup-scope-tmp.cpp
M clang/test/CIR/CodeGen/cleanup-throw-from-cleanup.cpp
M clang/test/CIR/CodeGen/cleanup-throwing-dtor.cpp
M clang/test/CIR/CodeGen/cleanup.cpp
M clang/test/CIR/CodeGen/cmp.cpp
M clang/test/CIR/CodeGen/comma.c
M clang/test/CIR/CodeGen/complex-atomic-cast.c
M clang/test/CIR/CodeGen/complex-builtins.cpp
M clang/test/CIR/CodeGen/complex-cast.cpp
M clang/test/CIR/CodeGen/complex-compound-assignment.cpp
M clang/test/CIR/CodeGen/complex-mul-div.cpp
M clang/test/CIR/CodeGen/complex-plus-minus.cpp
M clang/test/CIR/CodeGen/complex-unary.cpp
M clang/test/CIR/CodeGen/complex.cpp
M clang/test/CIR/CodeGen/compound_literal.cpp
M clang/test/CIR/CodeGen/concept-specialization.cpp
M clang/test/CIR/CodeGen/constant-expr.cpp
M clang/test/CIR/CodeGen/copy-constructor.cpp
M clang/test/CIR/CodeGen/coro-exceptions.cpp
M clang/test/CIR/CodeGen/coro-task.cpp
M clang/test/CIR/CodeGen/count-of.c
M clang/test/CIR/CodeGen/ctor-alias-prev-decl.cpp
M clang/test/CIR/CodeGen/ctor-alias.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/ctor.cpp
A clang/test/CIR/CodeGen/cxx-construct-lvalue.cpp
M clang/test/CIR/CodeGen/cxx-conversion-operators.cpp
M clang/test/CIR/CodeGen/cxx-default-init.cpp
M clang/test/CIR/CodeGen/cxx-rewritten-binary-operator.cpp
M clang/test/CIR/CodeGen/cxx-traits.cpp
M clang/test/CIR/CodeGen/cxx23-explicit-object-member.cpp
M clang/test/CIR/CodeGen/defaultarg.cpp
M clang/test/CIR/CodeGen/deferred-fn-defs.cpp
M clang/test/CIR/CodeGen/delegating-ctor-exceptions.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
M clang/test/CIR/CodeGen/delete-array.cpp
M clang/test/CIR/CodeGen/delete-destroying.cpp
M clang/test/CIR/CodeGen/delete.cpp
M clang/test/CIR/CodeGen/derived-to-base.cpp
M clang/test/CIR/CodeGen/destructors.cpp
M clang/test/CIR/CodeGen/dtor-alias-prev-decl.cpp
M clang/test/CIR/CodeGen/dtor-alias.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/embed-expr.c
M clang/test/CIR/CodeGen/empty-union.c
M clang/test/CIR/CodeGen/empty-union.cpp
M clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/forrange.cpp
M clang/test/CIR/CodeGen/generic-selection.c
M clang/test/CIR/CodeGen/global-array-dtor.cpp
M clang/test/CIR/CodeGen/global-init.cpp
A clang/test/CIR/CodeGen/global-pointer-array-fast-lowering.cpp
M clang/test/CIR/CodeGen/gnu-null.cpp
M clang/test/CIR/CodeGen/gnu-ptr-math.c
M clang/test/CIR/CodeGen/if.cpp
M clang/test/CIR/CodeGen/implicit-return-zero.c
M clang/test/CIR/CodeGen/implicit-value-init-expr.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/init-list-lvalue.cpp
M clang/test/CIR/CodeGen/initializer-list-two-pointers.cpp
M clang/test/CIR/CodeGen/inline-asm.c
M clang/test/CIR/CodeGen/inline-cxx-func.cpp
M clang/test/CIR/CodeGen/instantiate-init.cpp
M clang/test/CIR/CodeGen/kr-func-promote.c
M clang/test/CIR/CodeGen/label-values.c
M clang/test/CIR/CodeGen/label.c
M clang/test/CIR/CodeGen/lambda-decomp-decl-captures.cpp
M clang/test/CIR/CodeGen/lambda-dtor-field.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker-agg-return.cpp
M clang/test/CIR/CodeGen/lambda-static-invoker.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/launder.cpp
M clang/test/CIR/CodeGen/local-vars.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGen/mem-expr-fn.cpp
M clang/test/CIR/CodeGen/member-functions.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/CIR/CodeGen/new-array-in-ternary.cpp
M clang/test/CIR/CodeGen/new-delete-deactivation.cpp
M clang/test/CIR/CodeGen/new-delete.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/noexcept.cpp
M clang/test/CIR/CodeGen/non-scalar-lval-return.cpp
M clang/test/CIR/CodeGen/non-type-template-param.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/nullptr-init.cpp
M clang/test/CIR/CodeGen/opaque.c
M clang/test/CIR/CodeGen/opaque.cpp
M clang/test/CIR/CodeGen/openmp_default_simd_align.c
M clang/test/CIR/CodeGen/pack-indexing.cpp
M clang/test/CIR/CodeGen/paren-init-list-eh.cpp
M clang/test/CIR/CodeGen/paren-init-list.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/pass-object-size.c
M clang/test/CIR/CodeGen/placement-new.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func-cast.cpp
M clang/test/CIR/CodeGen/pointer-to-member-func.cpp
M clang/test/CIR/CodeGen/replace-global.cpp
M clang/test/CIR/CodeGen/requires-expr.cpp
M clang/test/CIR/CodeGen/self-assign.c
M clang/test/CIR/CodeGen/size-of-vla.cpp
M clang/test/CIR/CodeGen/source-loc.cpp
M clang/test/CIR/CodeGen/statement-exprs.c
M clang/test/CIR/CodeGen/static-local-arm-guard.cpp
A clang/test/CIR/CodeGen/static-local-nested-reference.cpp
M clang/test/CIR/CodeGen/static-local.cpp
M clang/test/CIR/CodeGen/stmt-expr.cpp
A clang/test/CIR/CodeGen/string-literal-high-bytes.c
M clang/test/CIR/CodeGen/string-literals.cpp
M clang/test/CIR/CodeGen/struct-init.cpp
M clang/test/CIR/CodeGen/struct.c
M clang/test/CIR/CodeGen/struct.cpp
M clang/test/CIR/CodeGen/switch-cleanup.cpp
M clang/test/CIR/CodeGen/switch.cpp
M clang/test/CIR/CodeGen/switch_flat_op.cpp
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
M clang/test/CIR/CodeGen/temporary-materialization-adjust.cpp
M clang/test/CIR/CodeGen/temporary-materialization.cpp
M clang/test/CIR/CodeGen/ternary-throw.cpp
M clang/test/CIR/CodeGen/ternary.cpp
M clang/test/CIR/CodeGen/thread-local-in-func.cpp
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/throws.cpp
M clang/test/CIR/CodeGen/thunks.cpp
M clang/test/CIR/CodeGen/trivial-ctor-const-init.cpp
M clang/test/CIR/CodeGen/try-catch-all-with-cleanup.cpp
M clang/test/CIR/CodeGen/try-catch-non-trivial-copy.cpp
M clang/test/CIR/CodeGen/try-catch.cpp
M clang/test/CIR/CodeGen/try-no-throwing-calls.cpp
M clang/test/CIR/CodeGen/typedef.c
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/union-agg-init.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/var_arg.c
M clang/test/CIR/CodeGen/variable-decomposition.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-ext-element.cpp
M clang/test/CIR/CodeGen/vector-ext.cpp
M clang/test/CIR/CodeGen/vector.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
M clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
M clang/test/CIR/CodeGen/virtual-function-calls.cpp
M clang/test/CIR/CodeGen/vla-pointer-arith.c
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-address-of.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bcopy.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-call.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenBuiltins/builtin-fcmp-sse.c
M clang/test/CIR/CodeGenBuiltins/builtin-offset-of.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-prefetch.c
M clang/test/CIR/CodeGenBuiltins/builtin-printf.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-setjmp-longjmp.c
M clang/test/CIR/CodeGenBuiltins/builtin-signbit.c
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCUDA/device-printf.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/lvalue-nttp.cpp
M clang/test/CIR/CodeGenCXX/new-array-init-list-non-trivial-dtor.cpp
M clang/test/CIR/CodeGenCXX/new-array-init.cpp
M clang/test/CIR/CodeGenCXX/simple-reinterpret-const-cast.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
M clang/test/CIR/CodeGenCXX/typeid.cpp
M clang/test/CIR/CodeGenCXX/vtable-virt-thunk-adj.cpp
M clang/test/CIR/CodeGenCXX/x86_64-arguments.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-read.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-write.cpp
M clang/test/CIR/CodeGenOpenACC/cache.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/combined-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/combined-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/combined.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copy.c
M clang/test/CIR/CodeGenOpenACC/compute-copy.cpp
M clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-firstprivate-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause-templates.cpp
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.c
M clang/test/CIR/CodeGenOpenACC/compute-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.c
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-unsigned-int.c
M clang/test/CIR/CodeGenOpenACC/data-copy-copyin-copyout-create.c
M clang/test/CIR/CodeGenOpenACC/data.c
M clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
M clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
M clang/test/CIR/CodeGenOpenACC/declare-create.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceptr.cpp
M clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
M clang/test/CIR/CodeGenOpenACC/declare-link.cpp
M clang/test/CIR/CodeGenOpenACC/declare-present.cpp
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M clang/test/CIR/CodeGenOpenACC/firstprivate-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/host_data.c
M clang/test/CIR/CodeGenOpenACC/init.c
M clang/test/CIR/CodeGenOpenACC/kernels.c
M clang/test/CIR/CodeGenOpenACC/loop-private-clause.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-default-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-float.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-inline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-int.cpp
M clang/test/CIR/CodeGenOpenACC/loop-reduction-clause-outline-ops.cpp
M clang/test/CIR/CodeGenOpenACC/loop.cpp
M clang/test/CIR/CodeGenOpenACC/parallel.c
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-CtorDtor.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-NoOps.cpp
M clang/test/CIR/CodeGenOpenACC/private-clause-pointer-recipes-int.cpp
M clang/test/CIR/CodeGenOpenACC/reduction-clause-recipes.cpp
M clang/test/CIR/CodeGenOpenACC/serial.c
M clang/test/CIR/CodeGenOpenACC/set.c
M clang/test/CIR/CodeGenOpenACC/shutdown.c
M clang/test/CIR/CodeGenOpenACC/update.c
M clang/test/CIR/CodeGenOpenACC/wait.c
M clang/test/CIR/CodeGenOpenCL/address-space-local-var.clcpp
M clang/test/CIR/CodeGenOpenCL/as_type.cl
M clang/test/CIR/CodeGenOpenCL/vector.cl
M clang/test/CIR/CodeGenOpenMP/omp-llvmir.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
M clang/test/CIR/IR/alloca.cir
M clang/test/CIR/IR/array-ctor.cir
M clang/test/CIR/IR/array-dtor.cir
M clang/test/CIR/IR/array.cir
M clang/test/CIR/IR/binassign.cir
M clang/test/CIR/IR/bitfield_info.cir
M clang/test/CIR/IR/cmp.cir
M clang/test/CIR/IR/construct-catch-param.cir
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/indirect-br.cir
M clang/test/CIR/IR/inline-asm.cir
M clang/test/CIR/IR/invalid-complex.cir
M clang/test/CIR/IR/invalid-construct-catch-param.cir
M clang/test/CIR/IR/invalid-data-member.cir
M clang/test/CIR/IR/invalid-throw.cir
M clang/test/CIR/IR/invalid-try-catch.cir
M clang/test/CIR/IR/lifetime.cir
M clang/test/CIR/IR/method-attr.cir
M clang/test/CIR/IR/resume-flat.cir
M clang/test/CIR/IR/struct.cir
M clang/test/CIR/IR/throw.cir
M clang/test/CIR/IR/unary.cir
M clang/test/CIR/IR/vector.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/address-space.cir
M clang/test/CIR/Lowering/alloca.cir
M clang/test/CIR/Lowering/binop-bool.cir
M clang/test/CIR/Lowering/binop-fp.cir
M clang/test/CIR/Lowering/binop-signed-int.cir
M clang/test/CIR/Lowering/binop-unsigned-int.cir
M clang/test/CIR/Lowering/cast.cir
A clang/test/CIR/Lowering/const-array-bulk-lowering-fallbacks.cir
A clang/test/CIR/Lowering/const-array-of-pointers.cir
M clang/test/CIR/Lowering/goto.cir
M clang/test/CIR/Lowering/inline-asm.cir
M clang/test/CIR/Lowering/lifetime.cir
M clang/test/CIR/Lowering/omp-target-map.cir
M clang/test/CIR/Lowering/resume-flat.cir
M clang/test/CIR/Lowering/switch.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-int-to-record.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-return-larger.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-to-int.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-record-to-record-via-memory.cir
M clang/test/CIR/Transforms/abi-lowering/coerce-vector-to-complex.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-return-sret.cir
M clang/test/CIR/Transforms/canonicalize.cir
M clang/test/CIR/Transforms/complex-create-fold.cir
M clang/test/CIR/Transforms/complex-imag-fold.cir
M clang/test/CIR/Transforms/complex-real-fold.cir
M clang/test/CIR/Transforms/eh-abi-lowering-construct-catch-invalid.cir
M clang/test/CIR/Transforms/eh-abi-lowering-construct-catch.cir
M clang/test/CIR/Transforms/eh-abi-lowering-itanium.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-eh.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-multi-exit.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-simple.cir
M clang/test/CIR/Transforms/flatten-throwing-in-cleanup.cir
M clang/test/CIR/Transforms/flatten-try-op.cir
M clang/test/CIR/Transforms/goto_solver.cir
M clang/test/CIR/Transforms/hoist-allocas.cir
M clang/test/CIR/Transforms/mem2reg.cir
M clang/test/CIR/Transforms/scope.cir
M clang/test/CIR/Transforms/switch-fold.cir
M clang/test/CIR/Transforms/switch.cir
M clang/test/CIR/Transforms/ternary-fold.cir
M clang/test/CIR/Transforms/ternary.cir
M clang/test/CIR/Transforms/vector-extract-fold.cir
M clang/test/CIR/func-simple.cpp
M clang/test/CXX/basic/basic.link/p11.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p3-generic-lambda-1y.cpp
M clang/test/CXX/dcl.dcl/dcl.spec/dcl.type/dcl.spec.auto/p5.cpp
M clang/test/CXX/dcl/dcl.fct/p17.cpp
M clang/test/CXX/drs/cwg6xx.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-2a.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.decls/temp.spec.partial/temp.spec.partial.member/p2.cpp
M clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon-misc.c
A clang/test/CodeGen/AArch64/neon/add.c
A clang/test/CodeGen/AArch64/neon/conversion-fullfp16.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
R clang/test/CodeGen/AArch64/poly-add.c
A clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
M clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dupq.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
A clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6_lane_x2.c
M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.c
M clang/test/CodeGen/RISCV/riscv-vector-callingconv-llvm-ir.cpp
A clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/SystemZ/zos-abi.c
M clang/test/CodeGen/X86/avx512f-builtins-constrained-cmp.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
A clang/test/CodeGenCXX/cl-pathmap.cpp
M clang/test/CodeGenCXX/default-arguments.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/explicit-instantiation.cpp
M clang/test/CodeGenHIP/offload-pgo-sections.hip
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayAssignable.logicalptr.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/cbuffer-matrix-layout-keyword.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1251-wmma-w32.cl
M clang/test/Driver/aarch64-cortex-a35.c
M clang/test/Driver/aarch64-cortex-a53.c
M clang/test/Driver/aarch64-cortex-a55.c
M clang/test/Driver/aarch64-cortex-a57.c
M clang/test/Driver/aarch64-cortex-a72.c
M clang/test/Driver/aarch64-cortex-a73.c
M clang/test/Driver/aarch64-cortex-a75.c
M clang/test/Driver/aarch64-cortex-a76.c
M clang/test/Driver/aarch64-fp16.c
M clang/test/Driver/aarch64-march.c
M clang/test/Driver/aarch64-mcpu.c
M clang/test/Driver/aarch64-oryon-1.c
M clang/test/Driver/aarch64-thunderx2t99.c
M clang/test/Driver/aarch64-thunderx3t110.c
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
M clang/test/Driver/aarch64-v8a.c
A clang/test/Driver/cl-pathmap.c
M clang/test/Driver/cl-x86-flags.c
M clang/test/Driver/hip-profile-rocm-runtime.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
A clang/test/Driver/offload-darwin-host.hip
A clang/test/Driver/openmp-Xopenmp-target-forward-args.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/x86-target-features.c
M clang/test/Format/lit.local.cfg
A clang/test/OffloadTools/clang-sycl-linker/archive-extras.ll
M clang/test/OffloadTools/clang-sycl-linker/basic.ll
M clang/test/OffloadTools/clang-sycl-linker/link.ll
M clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
M clang/test/OffloadTools/clang-sycl-linker/triple.ll
A clang/test/OffloadTools/clang-sycl-linker/weak-symbols.ll
A clang/test/OpenMP/for_reduction_class_identity_codegen.cpp
A clang/test/OpenMP/for_reduction_class_identity_messages.cpp
M clang/test/OpenMP/target_teams_generic_loop_codegen.cpp
M clang/test/Parser/cxx1z-decomposition.cpp
A clang/test/ParserHLSL/hlsl_is_array_attr.hlsl
A clang/test/ParserHLSL/hlsl_is_array_attr_error.hlsl
A clang/test/Preprocessor/cl-pathmap.c
A clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme2p3.c
A clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
A clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve2p3.c
A clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2p3.c
R clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/LifetimeSafety/Inputs/lifetime-analysis.h
A clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.cpp
A clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
A clang/test/Sema/LifetimeSafety/attr-lifetimebound-no-crash.cpp
A clang/test/Sema/LifetimeSafety/attr-lifetimebound.c
A clang/test/Sema/LifetimeSafety/capture-by.cpp
A clang/test/Sema/LifetimeSafety/cfg-bailout.cpp
A clang/test/Sema/LifetimeSafety/dangling-field.cpp
A clang/test/Sema/LifetimeSafety/dangling-global.cpp
A clang/test/Sema/LifetimeSafety/inapplicable-lifetimebound.cpp
A clang/test/Sema/LifetimeSafety/invalidations.cpp
A clang/test/Sema/LifetimeSafety/lifetime-facts.cpp
A clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-cross-tu.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-intra-tu.cpp
A clang/test/Sema/LifetimeSafety/misplaced-lifetimebound-macro.cpp
A clang/test/Sema/LifetimeSafety/missing-origin-stats.cpp
A clang/test/Sema/LifetimeSafety/nocfg-disabled.cpp
A clang/test/Sema/LifetimeSafety/nocfg.cpp
A clang/test/Sema/LifetimeSafety/noescape-violation.cpp
A clang/test/Sema/LifetimeSafety/safety.cpp
A clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_imm.c
M clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_imm.cpp
A clang/test/Sema/atomic-conversions-to-int.cpp
R clang/test/Sema/attr-lifetimebound-no-crash.cpp
R clang/test/Sema/attr-lifetimebound.c
R clang/test/Sema/warn-lifetime-analysis-capture-by.cpp
R clang/test/Sema/warn-lifetime-analysis-nocfg-disabled.cpp
R clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
R clang/test/Sema/warn-lifetime-safety-cfg-bailout.cpp
R clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
R clang/test/Sema/warn-lifetime-safety-dangling-global.cpp
R clang/test/Sema/warn-lifetime-safety-dataflow.cpp
R clang/test/Sema/warn-lifetime-safety-fixits.cpp
R clang/test/Sema/warn-lifetime-safety-invalidations.cpp
R clang/test/Sema/warn-lifetime-safety-lifetimebound.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-cross-tu.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-intra-tu.cpp
R clang/test/Sema/warn-lifetime-safety-misplaced-lifetimebound-macro.cpp
R clang/test/Sema/warn-lifetime-safety-missing-origin-stats.cpp
R clang/test/Sema/warn-lifetime-safety-noescape.cpp
R clang/test/Sema/warn-lifetime-safety-suggestions.cpp
R clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/constant-expression-p2280r4.cpp
M clang/test/SemaCXX/crash-GH173943.cpp
M clang/test/SemaCXX/deduced-return-type-cxx14.cpp
A clang/test/SemaHLSL/BuiltIns/InterlockedAdd-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M clang/test/SemaHLSL/parameter_modifiers.hlsl
A clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1251-wmma-w32-param.cl
M clang/test/SemaTemplate/concepts-out-of-line-def.cpp
M clang/test/SemaTemplate/friend-template.cpp
M clang/test/SemaTemplate/instantiate-scope.cpp
M clang/test/Templight/templight-default-func-arg.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/lit.cfg.py
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M clang/tools/clang-sycl-linker/CMakeLists.txt
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
M clang/tools/clang-sycl-linker/SYCLLinkOpts.td
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M clang/unittests/CIR/PointerLikeTest.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
M clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Serialization/JSONFormatTest/LUSummaryTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
M clang/utils/TableGen/CIRLoweringEmitter.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M cmake/Modules/HandleDoxygen.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/builtins/CMakeLists.txt
A compiler-rt/lib/builtins/arm/floatdidf.S
A compiler-rt/lib/builtins/arm/floatdisf.S
A compiler-rt/lib/builtins/arm/floatsidf.S
A compiler-rt/lib/builtins/arm/floatsisf.S
A compiler-rt/lib/builtins/arm/floatundidf.S
A compiler-rt/lib/builtins/arm/floatunsidf.S
A compiler-rt/lib/builtins/arm/floatunsisf.S
M compiler-rt/lib/builtins/cpu_model/riscv/hwprobe.inc
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
A compiler-rt/test/builtins/Unit/floatdidfnew_test.c
A compiler-rt/test/builtins/Unit/floatdisfnew_test.c
A compiler-rt/test/builtins/Unit/floatsidfnew_test.c
A compiler-rt/test/builtins/Unit/floatsisfnew_test.c
A compiler-rt/test/builtins/Unit/floatundidfnew_test.c
A compiler-rt/test/builtins/Unit/floatundisfnew_test.c
A compiler-rt/test/builtins/Unit/floatunsidfnew_test.c
A compiler-rt/test/builtins/Unit/floatunsisfnew_test.c
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/fuzzer/features_dir.test
M compiler-rt/test/fuzzer/fork-sigusr.test
M compiler-rt/test/fuzzer/lit.cfg.py
M compiler-rt/test/fuzzer/merge-posix.test
M compiler-rt/test/fuzzer/merge-sigusr.test
M compiler-rt/test/fuzzer/sigint.test
M compiler-rt/test/fuzzer/sigusr.test
M cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
M cross-project-tests/debuginfo-tests/dexter/dex/dextIR/StepIR.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
M cross-project-tests/debuginfo-tests/dexter/dex/test_script/Nodes.py
A cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/nested_wheres.cpp
M cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/valid-parse.test
A cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M cross-project-tests/lit.cfg.py
M flang-rt/lib/runtime/__fortran_builtins.f90
M flang/CMakeLists.txt
M flang/docs/CMakeLists.txt
M flang/docs/Extensions.md
M flang/docs/doxygen.cfg.in
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/Target.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/CodeGen/Target.cpp
M flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
M flang/lib/Parser/Fortran-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-call.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names-utils.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Fir/mem2reg.mlir
A flang/test/Fir/target-rewrite-target-abi.fir
A flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
A flang/test/Lower/OpenACC/Todo/acc-unstructured-loop-construct.f90
A flang/test/Lower/OpenACC/acc-declare-interface-body.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
M flang/test/Lower/OpenMP/Todo/error.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
A flang/test/Lower/OpenMP/nested-commonblock.f90
A flang/test/Lower/OpenMP/nothing.f90
A flang/test/Parser/recovery09.f90
M flang/test/Semantics/OpenMP/declare-target-flags.f90
A flang/test/Semantics/OpenMP/declare-target-resolve.f90
A flang/test/Semantics/OpenMP/declare-target-symbols.f90
M flang/test/Semantics/OpenMP/declare-target08.f90
M flang/test/Semantics/OpenMP/linear-clause01.f90
A flang/test/Semantics/OpenMP/type-param-inquiry.f90
A flang/test/Semantics/OpenMP/use-rename-array-dsa.f90
M flang/test/Semantics/c_loc01-relaxed.f90
A flang/test/Semantics/call47.f90
A flang/test/Semantics/declaration-explicit-array-bounds.f90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-alloca.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-embox.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-rebox.F90
A flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-type_desc.F90
M libc/config/baremetal/aarch64/entrypoints.txt
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/config.json
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/config.json
M libc/config/darwin/aarch64/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/fuzzing/CMakeLists.txt
A libc/fuzzing/arpa/CMakeLists.txt
A libc/fuzzing/arpa/inet/CMakeLists.txt
A libc/fuzzing/arpa/inet/inet_aton_differential_fuzz.cpp
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/struct_sockaddr_in6.h
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
A libc/include/htons-family.yaml
M libc/include/llvm-libc-macros/linux/sched-macros.h
M libc/include/llvm-libc-macros/netinet-in-macros.h
M libc/include/llvm-libc-types/CMakeLists.txt
M libc/include/llvm-libc-types/cpu_set_t.h
A libc/include/llvm-libc-types/struct_sockaddr_in6.h
M libc/include/llvm-libc-types/struct_tm.h
A libc/include/llvm-libc-types/tm_gmtoff_t.h
M libc/include/math.yaml
M libc/include/netinet/in.yaml
M libc/include/sched.yaml
M libc/include/sys/socket.yaml
M libc/include/sys/syscall.h.def
M libc/include/time.yaml
M libc/shared/math.h
A libc/shared/math/check/exp.h
A libc/shared/math/isnanf128.h
A libc/shared/math_check_exceptions.h
M libc/src/__support/FPUtil/Hypot.h
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/except_value_utils.h
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/sqrt_80_bit_long_double.h
M libc/src/__support/FPUtil/rounding_mode.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/recvmmsg.h
M libc/src/__support/macros/optimization.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/asinbf16.h
M libc/src/__support/math/asinf16.h
M libc/src/__support/math/asinhf16.h
M libc/src/__support/math/asinpi.h
A libc/src/__support/math/check/exp_exceptions.h
M libc/src/__support/math/coshf.h
M libc/src/__support/math/coshf16.h
M libc/src/__support/math/erfcf16.h
M libc/src/__support/math/exp.h
M libc/src/__support/math/exp10.h
M libc/src/__support/math/exp10f.h
M libc/src/__support/math/exp10f16.h
M libc/src/__support/math/exp10m1f.h
M libc/src/__support/math/exp10m1f16.h
M libc/src/__support/math/exp2.h
M libc/src/__support/math/exp2f.h
M libc/src/__support/math/exp2f16.h
M libc/src/__support/math/exp2m1f.h
M libc/src/__support/math/exp2m1f16.h
M libc/src/__support/math/expf.h
M libc/src/__support/math/expf16.h
M libc/src/__support/math/expm1.h
M libc/src/__support/math/expm1f.h
M libc/src/__support/math/expm1f16.h
A libc/src/__support/math/isnanf128.h
M libc/src/__support/math/sin.h
M libc/src/__support/math/sincos.h
M libc/src/__support/math/sincosf.h
M libc/src/__support/math/sinf.h
M libc/src/__support/math/sinf16.h
M libc/src/__support/math/sinhf.h
M libc/src/__support/math/sinhf16.h
M libc/src/__support/math/tan.h
M libc/src/__support/math/tanf16.h
M libc/src/__support/math/tanhf16.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/threads/raw_rwlock.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/isnanf128.cpp
A libc/src/math/isnanf128.h
M libc/src/sched/CMakeLists.txt
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/sched_cpualloc.cpp
A libc/src/sched/linux/sched_cpufree.cpp
A libc/src/sched/sched_cpualloc.h
A libc/src/sched/sched_cpufree.h
M libc/src/stdio/printf_core/float_dec_converter.h
M libc/src/stdio/printf_core/float_hex_converter.h
M libc/src/sys/socket/CMakeLists.txt
M libc/src/sys/socket/linux/CMakeLists.txt
A libc/src/sys/socket/linux/recvmmsg.cpp
A libc/src/sys/socket/recvmmsg.h
M libc/src/time/CMakeLists.txt
M libc/src/time/asctime.cpp
M libc/src/time/asctime_r.cpp
M libc/src/time/ctime.cpp
M libc/src/time/ctime_r.cpp
M libc/src/time/gmtime.cpp
M libc/src/time/gmtime_r.cpp
M libc/src/time/localtime.cpp
M libc/src/time/localtime_r.cpp
M libc/src/time/mktime.cpp
M libc/src/time/strftime.cpp
M libc/src/time/strftime_core/CMakeLists.txt
M libc/src/time/strftime_core/composite_converter.h
M libc/src/time/strftime_core/converter.h
M libc/src/time/strftime_core/num_converter.h
M libc/src/time/strftime_core/str_converter.h
M libc/src/time/strftime_l.cpp
M libc/src/time/time_utils.cpp
M libc/src/time/time_utils.h
M libc/test/UnitTest/FPMatcher.h
M libc/test/UnitTest/RoundingModeUtils.cpp
M libc/test/shared/CMakeLists.txt
A libc/test/shared/shared_math_check_exp_test.cpp
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/shared/shared_math_test.cpp
M libc/test/src/__support/str_to_integer_test.cpp
M libc/test/src/math/RIntTest.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/NearbyIntTest.h
M libc/test/src/math/smoke/RIntTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
A libc/test/src/math/smoke/isnanf128_test.cpp
M libc/test/src/netinet/CMakeLists.txt
M libc/test/src/netinet/in_test.cpp
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/cpu_alloc_test.cpp
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/sys/socket/linux/CMakeLists.txt
M libc/test/src/sys/socket/linux/bind_test.cpp
R libc/test/src/sys/socket/linux/sendmmsg_test.cpp
A libc/test/src/sys/socket/linux/sendrecvmmsg_test.cpp
M libc/test/src/time/asctime_r_test.cpp
M libc/test/src/time/asctime_test.cpp
M libc/test/src/time/ctime_r_test.cpp
M libc/test/src/time/ctime_test.cpp
M libc/test/src/time/gmtime_r_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/localtime_r_test.cpp
M libc/test/src/time/localtime_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/time/strftime_test.cpp
M libc/test/src/wchar/WcstolTest.h
M libc/utils/MPFRWrapper/MPFRUtils.h
M libc/utils/docgen/netinet/in.yaml
M libc/utils/docgen/sys/socket.yaml
M libcxx/include/CMakeLists.txt
M libcxx/include/__configuration/availability.h
M libcxx/include/__expected/expected.h
M libcxx/include/__hash_table
M libcxx/include/__type_traits/conjunction.h
M libcxx/include/__type_traits/disjunction.h
R libcxx/include/__type_traits/lazy.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__utility/is_pointer_in_range.h
M libcxx/include/module.modulemap.in
M libcxx/include/optional
M libcxx/include/thread
M libcxx/include/tuple
A libcxx/test/std/containers/unord/unord.map/unord.map.cnstr/exceptions.pass.cpp
M libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp
M libcxx/test/std/utilities/optional/optional.syn/optional_in_place_t.verify.cpp
M libcxx/test/std/utilities/optional/optional.syn/optional_nullopt_t.verify.cpp
M libcxx/utils/libcxx/test/features/availability.py
M libcxxabi/src/demangle/Utility.h
M libcxxabi/test/test_demangle.pass.cpp
M lld/ELF/Relocations.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.h
M lld/MachO/SectionPriorities.cpp
M lld/MachO/SymbolTable.cpp
M lld/MachO/SymbolTable.h
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/Writer.cpp
A lld/test/ELF/aarch64-thunk-bti-overlay-reuse.s
A lld/test/ELF/arm-thunk-overlay-reuse.s
A lld/test/MachO/bp-section-orderer-cold.s
A lld/test/MachO/cold-func-weak-merge.s
A lld/test/MachO/cold-func.s
A lld/test/MachO/compact-unwind-local-label.s
M lldb/CMakeLists.txt
M lldb/docs/CMakeLists.txt
M lldb/docs/doxygen.cfg.in
M lldb/docs/python_api_enums.md
M lldb/docs/resources/lldbplatformpackets.md
M lldb/docs/resources/overview.md
M lldb/include/lldb/API/SBProcess.h
M lldb/include/lldb/Host/ProcessRunLock.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
A lldb/scripts/gen-python-api-enums.py
M lldb/source/API/SBProcess.cpp
M lldb/source/Host/common/ProcessRunLock.cpp
M lldb/source/Host/windows/ConnectionConPTYWindows.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCClassDescriptorV2.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
M lldb/source/Plugins/LanguageRuntime/ObjC/ObjCLanguageRuntime.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
M lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.cpp
M lldb/source/Plugins/Process/Windows/Common/CMakeLists.txt
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
A lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.cpp
M lldb/source/Plugins/Process/Windows/Common/ExceptionRecord.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
M lldb/source/Plugins/Process/Windows/Common/NativeThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
M lldb/test/API/commands/platform/process/launch/TestPlatformProcessLaunch.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/TestDataFormatterLibcxxInvalidVectorSimulator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/invalid-vector/main.cpp
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/Makefile
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/TestDataFormatterLibcxxVectorSimulator.py
A lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx-simulators/vector/main.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/Makefile
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/TestRunLockReentrantDeadlock.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/bkpt_resolver.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/frame_provider.py
A lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/main.c
M lldb/test/API/macosx/branch-islands/TestBranchIslands.py
M lldb/test/API/macosx/simulator/TestSimulatorPlatform.py
M lldb/test/API/macosx/thread-names/TestInterruptThreadNames.py
M lldb/test/API/python_api/process/TestProcessAPI.py
M lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
M lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
M lldb/test/API/tools/lldb-dap/locations/TestDAP_locations.py
A lldb/test/Shell/Disassemble/TestDisassembleRISCVInstructions.test
M lldb/test/Shell/Target/dependent-modules-nodupe-windows.test
M lldb/test/Shell/lit.cfg.py
M lldb/test/Shell/lit.site.cfg.py.in
M lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
M lldb/unittests/Disassembler/RISCV/TestMCDisasmInstanceRISCV.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/ProcessRunLockTest.cpp
M lldb/unittests/ObjectFile/MachO/MachOTrieTest.cpp
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMakeLists.txt
M llvm/docs/CommandGuide/lit.rst
M llvm/docs/LFI.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/doxygen.cfg.in
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
M llvm/examples/Kaleidoscope/Chapter7/toy.cpp
M llvm/include/llvm/ABI/FunctionInfo.h
M llvm/include/llvm/ABI/IRTypeMapper.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/APFloat.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/Bitset.h
M llvm/include/llvm/ADT/Hashing.h
M llvm/include/llvm/ADT/ImmutableList.h
M llvm/include/llvm/ADT/StringExtras.h
M llvm/include/llvm/ADT/StringMap.h
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/AsmParser/LLLexer.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/BinaryFormat/DXContainer.h
M llvm/include/llvm/CAS/ActionCache.h
M llvm/include/llvm/CAS/BuiltinCASContext.h
M llvm/include/llvm/CAS/CASID.h
M llvm/include/llvm/CAS/ObjectStore.h
M llvm/include/llvm/CAS/OnDiskDataAllocator.h
M llvm/include/llvm/CAS/OnDiskGraphDB.h
M llvm/include/llvm/CAS/OnDiskTrieRawHashMap.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CGData/StableFunctionMap.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/MIRPrinter.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineFunction.h
M llvm/include/llvm/CodeGen/MachineFunctionPass.h
M llvm/include/llvm/CodeGen/MachineInstrBundle.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/RegAllocEvictionAdvisor.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/DTLTO/DTLTO.h
M llvm/include/llvm/DWARFLinker/Classic/DWARFLinkerDeclContext.h
M llvm/include/llvm/DWARFLinker/Utils.h
M llvm/include/llvm/DWP/ELFWriter.h
M llvm/include/llvm/DebugInfo/CodeView/DebugSubsectionVisitor.h
M llvm/include/llvm/DebugInfo/CodeView/DebugSymbolRVASubsection.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugAddr.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugAranges.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFDebugMacro.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFGdbIndex.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFTypeUnit.h
M llvm/include/llvm/DebugInfo/DWARF/LowLevel/DWARFDataExtractorSimple.h
M llvm/include/llvm/DebugInfo/GSYM/GsymContext.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV1.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreatorV2.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReader.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReaderV1.h
M llvm/include/llvm/DebugInfo/GSYM/GsymReaderV2.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewReader.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVDWARFReader.h
M llvm/include/llvm/DebugInfo/PDB/IPDBDataStream.h
M llvm/include/llvm/DebugInfo/PDB/IPDBSectionContrib.h
M llvm/include/llvm/DebugInfo/PDB/IPDBTable.h
M llvm/include/llvm/DebugInfo/PDB/Native/EnumTables.h
M llvm/include/llvm/DebugInfo/PDB/Native/InjectedSourceStream.h
M llvm/include/llvm/DebugInfo/PDB/Native/InputFile.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeCompilandSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumGlobals.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumInjectedSources.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumLineNumbers.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumModules.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumSymbols.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeEnumTypes.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeExeSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeFunctionSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeInlineSiteSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeLineNumber.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativePublicSymbol.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeSymbolEnumerator.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeArray.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeBuiltin.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeEnum.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeFunctionSig.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypePointer.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeTypedef.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeUDT.h
M llvm/include/llvm/DebugInfo/PDB/Native/NativeTypeVTShape.h
M llvm/include/llvm/DebugInfo/PDB/PDBContext.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolAnnotation.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolBlock.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCompilandDetails.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCompilandEnv.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolCustom.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeCustom.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeDimension.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeFriend.h
M llvm/include/llvm/DebugInfo/PDB/PDBSymbolTypeManaged.h
M llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
M llvm/include/llvm/Demangle/DemangleConfig.h
M llvm/include/llvm/Demangle/Utility.h
M llvm/include/llvm/ExecutionEngine/JITLink/COFF.h
M llvm/include/llvm/ExecutionEngine/JITLink/COFF_x86_64.h
M llvm/include/llvm/ExecutionEngine/JITLink/DWARFRecordSectionSplitter.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch32.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_hexagon.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_loongarch.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_ppc64.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_riscv.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_systemz.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_x86.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_x86_64.h
M llvm/include/llvm/ExecutionEngine/JITLink/XCOFF.h
M llvm/include/llvm/ExecutionEngine/JITLink/XCOFF_ppc64.h
M llvm/include/llvm/ExecutionEngine/JITLink/systemz.h
M llvm/include/llvm/ExecutionEngine/Orc/EPCGenericDylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorResolutionGenerator.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/OrcRTBridge.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryResolver.h
M llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/LibraryScanner.h
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/Frontend/HLSL/HLSLBinding.h
M llvm/include/llvm/Frontend/HLSL/RootSignatureMetadata.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/GVMaterializer.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/NVVMIntrinsicUtils.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/PrintPasses.h
M llvm/include/llvm/IR/ProfDataUtils.h
M llvm/include/llvm/IR/RuntimeLibcalls.h
M llvm/include/llvm/IR/SafepointIRVerifier.h
M llvm/include/llvm/IR/Statepoint.h
M llvm/include/llvm/IR/TypeFinder.h
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/LTO/LTO.h
M llvm/include/llvm/LTO/legacy/UpdateCompilerUsed.h
M llvm/include/llvm/MC/ConstantPools.h
M llvm/include/llvm/MC/DXContainerInfo.h
M llvm/include/llvm/MC/DXContainerPSVInfo.h
M llvm/include/llvm/MC/MCAsmInfoCOFF.h
M llvm/include/llvm/MC/MCAsmInfoDarwin.h
M llvm/include/llvm/MC/MCAsmInfoELF.h
M llvm/include/llvm/MC/MCAsmInfoGOFF.h
M llvm/include/llvm/MC/MCAsmInfoWasm.h
M llvm/include/llvm/MC/MCAsmInfoXCOFF.h
M llvm/include/llvm/MC/MCCodeView.h
M llvm/include/llvm/MC/MCDXContainerWriter.h
M llvm/include/llvm/MC/MCDisassembler/MCExternalSymbolizer.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCELFObjectWriter.h
M llvm/include/llvm/MC/MCELFStreamer.h
M llvm/include/llvm/MC/MCGOFFObjectWriter.h
M llvm/include/llvm/MC/MCLabel.h
M llvm/include/llvm/MC/MCParser/MCAsmParserUtils.h
M llvm/include/llvm/MC/MCSFrame.h
M llvm/include/llvm/MC/MCSPIRVObjectWriter.h
M llvm/include/llvm/MC/MCSchedule.h
M llvm/include/llvm/MC/MCSectionCOFF.h
M llvm/include/llvm/MC/MCSectionXCOFF.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCSymbol.h
M llvm/include/llvm/MC/MCSymbolELF.h
M llvm/include/llvm/MC/MCSymbolGOFF.h
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/include/llvm/MC/MCWasmObjectWriter.h
M llvm/include/llvm/MC/MCWasmStreamer.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinCOFFObjectWriter.h
M llvm/include/llvm/MC/MCWinCOFFStreamer.h
M llvm/include/llvm/MC/MCXCOFFObjectWriter.h
M llvm/include/llvm/MC/MCXCOFFStreamer.h
M llvm/include/llvm/MC/TargetRegistry.h
M llvm/include/llvm/MCA/CustomBehaviour.h
M llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h
M llvm/include/llvm/MCA/HardwareUnits/RetireControlUnit.h
M llvm/include/llvm/MCA/Stages/DispatchStage.h
M llvm/include/llvm/MCA/Stages/ExecuteStage.h
M llvm/include/llvm/MCA/Stages/InOrderIssueStage.h
M llvm/include/llvm/MCA/Stages/MicroOpQueueStage.h
M llvm/include/llvm/MCA/Stages/RetireStage.h
M llvm/include/llvm/ObjCopy/DXContainer/DXContainerObjcopy.h
M llvm/include/llvm/ObjCopy/XCOFF/XCOFFObjcopy.h
M llvm/include/llvm/Object/Archive.h
M llvm/include/llvm/Object/BBAddrMap.h
M llvm/include/llvm/Object/GOFF.h
M llvm/include/llvm/Object/OffloadBundle.h
M llvm/include/llvm/ObjectYAML/ArchiveYAML.h
M llvm/include/llvm/ObjectYAML/BBAddrMapYAML.h
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/include/llvm/ObjectYAML/CodeViewYAMLTypeHashing.h
M llvm/include/llvm/ObjectYAML/DXContainerYAML.h
M llvm/include/llvm/ObjectYAML/ELFYAML.h
M llvm/include/llvm/ObjectYAML/GOFFYAML.h
M llvm/include/llvm/ObjectYAML/MachOYAML.h
M llvm/include/llvm/ObjectYAML/MinidumpYAML.h
M llvm/include/llvm/ObjectYAML/ObjectYAML.h
M llvm/include/llvm/ObjectYAML/OffloadYAML.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/ObjectYAML/XCOFFYAML.h
M llvm/include/llvm/Option/Option.h
M llvm/include/llvm/Pass.h
M llvm/include/llvm/Passes/PassBuilder.h
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/include/llvm/ProfileData/ETMTraceDecoder.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/ProfileData/InstrProfReader.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/Remarks/BitstreamRemarkSerializer.h
M llvm/include/llvm/Remarks/RemarkStreamer.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Region.h
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/CodeGenCoverage.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/GlobPattern.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/OptionStrCmp.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/Support/VirtualOutputBackend.h
M llvm/include/llvm/Support/VirtualOutputBackends.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/include/llvm/Support/VirtualOutputFile.h
M llvm/include/llvm/Support/Watchdog.h
M llvm/include/llvm/Support/Win64EH.h
M llvm/include/llvm/Support/circular_raw_ostream.h
M llvm/include/llvm/Support/raw_ostream_proxy.h
M llvm/include/llvm/TableGen/Error.h
M llvm/include/llvm/TableGen/Main.h
M llvm/include/llvm/TableGen/Parser.h
M llvm/include/llvm/TableGen/SetTheory.h
M llvm/include/llvm/TableGen/StringMatcher.h
M llvm/include/llvm/TableGen/StringToOffsetTable.h
M llvm/include/llvm/TableGen/TGTimer.h
M llvm/include/llvm/TableGen/TableGenBackend.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/RISCVTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/XtensaTargetParser.h
M llvm/include/llvm/TextAPI/Target.h
M llvm/include/llvm/Transforms/IPO/Instrumentor.h
M llvm/include/llvm/Transforms/IPO/InstrumentorConfigFile.h
M llvm/include/llvm/Transforms/IPO/InstrumentorStubPrinter.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/AssumeBundleBuilder.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
M llvm/include/llvm/Transforms/Utils/TriggerCrashPass.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.h
M llvm/include/llvm/XRay/FDRTraceExpander.h
M llvm/include/module.modulemap
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CAS/OnDiskGraphDB.cpp
M llvm/lib/CodeGen/BreakFalseDeps.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MIRPrintingPass.cpp
M llvm/lib/CodeGen/MachineFunction.cpp
M llvm/lib/CodeGen/MachineFunctionPass.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/DTLTO/DTLTO.cpp
M llvm/lib/DebugInfo/CodeView/TypeDumpVisitor.cpp
M llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp
M llvm/lib/Demangle/DLangDemangle.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderGDB.cpp
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/LegacyPassManager.cpp
M llvm/lib/IR/Pass.cpp
M llvm/lib/IR/PrintPasses.cpp
M llvm/lib/IR/SafepointIRVerifier.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCParser/COFFMasmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/GlobPattern.cpp
M llvm/lib/Support/KnownBits.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Support/StringMap.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/Win64EH.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/lib/Target/AArch64/AArch64LFI.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64GlobalISelUtils.h
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/EvergreenInstructions.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNProcessors.td
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXSetByValParamAlign.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/NVPTX/NVVMProperties.cpp
M llvm/lib/Target/NVPTX/NVVMProperties.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.td
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FixupSetCC.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86Subtarget.cpp
M llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCAsmInfo.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaTargetStreamer.cpp
M llvm/lib/Target/Xtensa/XtensaAsmPrinter.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/MemoryOpRemark.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/test/Analysis/CostModel/AArch64/arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith-fp.ll
M llvm/test/Analysis/CostModel/AArch64/sve-fixed-length.ll
M llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
A llvm/test/Analysis/CostModel/AArch64/sve-vector-reduce-fp.ll
M llvm/test/Analysis/ScalarEvolution/shift-op.ll
A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/Analysis/ValueTracking/known-non-zero-shr-add.ll
A llvm/test/Bitcode/byte-constants.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.mir
M llvm/test/CodeGen/AArch64/arm64e-tail-call-autib.ll
M llvm/test/CodeGen/AArch64/clmul.ll
A llvm/test/CodeGen/AArch64/combine-max-min.ll
M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fp-conversion-to-tbl.ll
A llvm/test/CodeGen/AArch64/predicate-as-counter-phi.ll
A llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll
M llvm/test/CodeGen/AArch64/sme-intrinsics-mova-insert.ll
A llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
M llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
M llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
A llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/fceil.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/ffloor.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/intrinsic-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/regbanklegalize-amdgcn.s.buffer.load.subdword.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx90a.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.mfma.gfx942.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
M llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn-fast.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
A llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/bf16-math.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
A llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
A llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling-no-outstanding.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
A llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cluster.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.to.lds.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.i8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.xf32.gfx942.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.fmt-error.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1251.w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1251.w32.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1251.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.prefetch.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-memops.ll
M llvm/test/CodeGen/AMDGPU/maximumnum.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-lds-dma-volatile-and-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/mfma-bf16-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select-gfx942.ll
M llvm/test/CodeGen/AMDGPU/mfma-vgpr-cd-select.ll
M llvm/test/CodeGen/AMDGPU/minimumnum.ll
A llvm/test/CodeGen/AMDGPU/packed-fp64.ll
A llvm/test/CodeGen/AMDGPU/packed-u64.ll
A llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll
R llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
A llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1251-w32.mir
A llvm/test/CodeGen/DirectX/ContainerData/Inputs/SourceInfo.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Args.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Compressed.ll
A llvm/test/CodeGen/DirectX/ContainerData/SourceInfo-Uncompressed.ll
A llvm/test/CodeGen/DirectX/DebugInfo/dbg-assign.ll
A llvm/test/CodeGen/DirectX/DebugInfo/dbg-value-arglist.ll
A llvm/test/CodeGen/DirectX/DebugInfo/di-commonblock.ll
A llvm/test/CodeGen/DirectX/InterlockedAdd.ll
A llvm/test/CodeGen/DirectX/cbuffer_global_elim.ll
M llvm/test/CodeGen/DirectX/embed-ildb.ll
A llvm/test/CodeGen/DirectX/switch-to-lookup-table-i16-narrowing.ll
A llvm/test/CodeGen/DirectX/switch-to-lookup-table-no-i8-narrowing.ll
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-phys.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-bad-split.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash-self-split.mir
A llvm/test/CodeGen/MIR/AMDGPU/virtregmap-stash.mir
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/nvvm-annotations-D120129.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
A llvm/test/CodeGen/NVPTX/ret-align-mismatch.ll
M llvm/test/CodeGen/RISCV/GlobalISel/add-imm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomic-load-store-fp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-add-sub.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/bitreverse-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/combine-neg-abs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/div-by-constant.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/fastcc-float.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-arith.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-convert.ll
M llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv32zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64p.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zba.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
M llvm/test/CodeGen/RISCV/GlobalISel/scmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shift.ll
M llvm/test/CodeGen/RISCV/GlobalISel/shifts.ll
M llvm/test/CodeGen/RISCV/GlobalISel/ucmp.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/add_sext_shl_constant.ll
M llvm/test/CodeGen/RISCV/add_shl_constant.ll
M llvm/test/CodeGen/RISCV/addc-adde-sube-subc.ll
M llvm/test/CodeGen/RISCV/addcarry.ll
M llvm/test/CodeGen/RISCV/addimm-mulimm.ll
M llvm/test/CodeGen/RISCV/aext-to-sext.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/alu64.ll
M llvm/test/CodeGen/RISCV/and-negpow2-cmp.ll
M llvm/test/CodeGen/RISCV/and-shl.ll
M llvm/test/CodeGen/RISCV/arith-with-overflow.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg-branch-on-result.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/atomic-rmw.ll
M llvm/test/CodeGen/RISCV/atomic-signext.ll
M llvm/test/CodeGen/RISCV/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/RISCV/avgceils.ll
M llvm/test/CodeGen/RISCV/avgceilu.ll
M llvm/test/CodeGen/RISCV/avgfloors.ll
M llvm/test/CodeGen/RISCV/avgflooru.ll
M llvm/test/CodeGen/RISCV/bf16-promote.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/bfloat-maximum-minimum.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat.ll
M llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
M llvm/test/CodeGen/RISCV/bitreverse-shift.ll
M llvm/test/CodeGen/RISCV/bittest.ll
M llvm/test/CodeGen/RISCV/branch-on-zero.ll
M llvm/test/CodeGen/RISCV/bswap-bitreverse.ll
M llvm/test/CodeGen/RISCV/bswap-known-bits.ll
M llvm/test/CodeGen/RISCV/bswap-shift.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
M llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
M llvm/test/CodeGen/RISCV/calling-conv-p-ext-vector.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-float.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-on-stack.ll
M llvm/test/CodeGen/RISCV/calls-cf-branch.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/RISCV/clmulh.ll
M llvm/test/CodeGen/RISCV/clmulr.ll
M llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
M llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
M llvm/test/CodeGen/RISCV/combine-storetomstore.ll
M llvm/test/CodeGen/RISCV/compress.ll
M llvm/test/CodeGen/RISCV/condbinops.ll
M llvm/test/CodeGen/RISCV/condops.ll
M llvm/test/CodeGen/RISCV/constpool-known-bits.ll
M llvm/test/CodeGen/RISCV/copyprop.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/csr-first-use-cost.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
M llvm/test/CodeGen/RISCV/di-assignment-tracking-vector.ll
M llvm/test/CodeGen/RISCV/div-by-constant.ll
M llvm/test/CodeGen/RISCV/div-pow2.ll
M llvm/test/CodeGen/RISCV/div.ll
M llvm/test/CodeGen/RISCV/div_minsize.ll
M llvm/test/CodeGen/RISCV/double-arith.ll
M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-mem.ll
M llvm/test/CodeGen/RISCV/double-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/double-select-fcmp.ll
M llvm/test/CodeGen/RISCV/double-select-icmp.ll
M llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
M llvm/test/CodeGen/RISCV/double_reduct.ll
M llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/fastcc-bf16.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-half.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fixed-csr.ll
M llvm/test/CodeGen/RISCV/float-arith.ll
M llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/float-convert-strict.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/float-round-conv.ll
M llvm/test/CodeGen/RISCV/float-select-icmp.ll
M llvm/test/CodeGen/RISCV/fma-combine.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore-zilsd.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/fold-binop-into-select.ll
M llvm/test/CodeGen/RISCV/fold-masked-merge.ll
M llvm/test/CodeGen/RISCV/fold-mem-offset-zilsd.ll
M llvm/test/CodeGen/RISCV/fold-mem-offset.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/fpclamptosat.ll
M llvm/test/CodeGen/RISCV/fpenv.ll
M llvm/test/CodeGen/RISCV/frm-write-in-loop.ll
M llvm/test/CodeGen/RISCV/get-setcc-result-type.ll
M llvm/test/CodeGen/RISCV/ghccc-rv32.ll
M llvm/test/CodeGen/RISCV/ghccc-rv64.ll
M llvm/test/CodeGen/RISCV/ghccc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
M llvm/test/CodeGen/RISCV/global-merge-minsize.ll
M llvm/test/CodeGen/RISCV/global-merge.ll
M llvm/test/CodeGen/RISCV/half-arith-strict.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
M llvm/test/CodeGen/RISCV/half-fcmp.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-maximum-minimum.ll
M llvm/test/CodeGen/RISCV/half-mem.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/half-zfa.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/i64-icmp.ll
M llvm/test/CodeGen/RISCV/iabs.ll
M llvm/test/CodeGen/RISCV/icmp-non-byte-sized.ll
M llvm/test/CodeGen/RISCV/idiv_large.ll
M llvm/test/CodeGen/RISCV/imm.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-d-modifier-N.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
M llvm/test/CodeGen/RISCV/inline-asm-f-modifier-N.ll
M llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
M llvm/test/CodeGen/RISCV/jump-is-expensive.ll
M llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
M llvm/test/CodeGen/RISCV/jumptable.ll
M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
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M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/load-store-pair.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-add-cheaper-than-mul.ll
M llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
M llvm/test/CodeGen/RISCV/lpad.ll
M llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
M llvm/test/CodeGen/RISCV/machine-cse.ll
M llvm/test/CodeGen/RISCV/machine-pipeliner.ll
M llvm/test/CodeGen/RISCV/machine-sink-load-immediate.ll
M llvm/test/CodeGen/RISCV/machinelicm-constant-phys-reg.ll
M llvm/test/CodeGen/RISCV/macro-fusion-lui-addi.ll
M llvm/test/CodeGen/RISCV/mask-variable-shift.ll
M llvm/test/CodeGen/RISCV/mem.ll
M llvm/test/CodeGen/RISCV/mem64.ll
M llvm/test/CodeGen/RISCV/memcmp-optsize.ll
M llvm/test/CodeGen/RISCV/memcmp.ll
M llvm/test/CodeGen/RISCV/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memmove.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/memset-pattern.ll
M llvm/test/CodeGen/RISCV/min-max.ll
M llvm/test/CodeGen/RISCV/miss-sp-restore-eh.ll
M llvm/test/CodeGen/RISCV/mul-expand.ll
M llvm/test/CodeGen/RISCV/mul.ll
M llvm/test/CodeGen/RISCV/musttail-indirect-args.ll
M llvm/test/CodeGen/RISCV/narrow-shl-cst.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/nomerge.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/or-is-add.ll
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr135206.ll
M llvm/test/CodeGen/RISCV/pr142004.ll
M llvm/test/CodeGen/RISCV/pr145360.ll
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M llvm/test/CodeGen/RISCV/pr84653_pr85190.ll
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M llvm/test/CodeGen/RISCV/pr95284.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
M llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
M llvm/test/CodeGen/RISCV/reassoc-shl-addi-add.ll
M llvm/test/CodeGen/RISCV/redundant-copy-from-tail-duplicate.ll
M llvm/test/CodeGen/RISCV/rem.ll
M llvm/test/CodeGen/RISCV/remat.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rotl-rotr.ll
M llvm/test/CodeGen/RISCV/rv32-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv32-move-merge.ll
M llvm/test/CodeGen/RISCV/rv32p.ll
M llvm/test/CodeGen/RISCV/rv32xandesperf.ll
M llvm/test/CodeGen/RISCV/rv32xtheadbb.ll
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M llvm/test/CodeGen/RISCV/rv64-double-convert.ll
M llvm/test/CodeGen/RISCV/rv64-float-convert.ll
M llvm/test/CodeGen/RISCV/rv64-half-convert.ll
M llvm/test/CodeGen/RISCV/rv64-inline-asm-pairs.ll
M llvm/test/CodeGen/RISCV/rv64i-complex-float.ll
M llvm/test/CodeGen/RISCV/rv64i-demanded-bits.ll
M llvm/test/CodeGen/RISCV/rv64i-shift-sext.ll
M llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
M llvm/test/CodeGen/RISCV/rv64p.ll
M llvm/test/CodeGen/RISCV/rv64xtheadba.ll
M llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
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M llvm/test/CodeGen/RISCV/rv64zbs.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
M llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvp-unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/65704-illegal-instruction.ll
M llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
M llvm/test/CodeGen/RISCV/rvv/active_lane_mask.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-array.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-scalable-struct.ll
M llvm/test/CodeGen/RISCV/rvv/alloca-load-store-vector-tuple.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/buildvec-sext.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/combine-ctpop-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/combine-store-extract-crash.ll
M llvm/test/CodeGen/RISCV/rvv/combine-vl-vw-macc.ll
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vector-insert-elt.ll
M llvm/test/CodeGen/RISCV/rvv/concat-vectors-constant-stride.ll
M llvm/test/CodeGen/RISCV/rvv/constant-folding-crash.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/double-round-conv.ll
M llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/fcanonicalize-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compressstore-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fcanonicalize-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i-sat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access-zve32x.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lround.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp-bf16.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-scalarized.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sext-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-concat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-merge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-rotate.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store-merge-crash.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmacc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmaccbf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-reverse-float.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-fp-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrol.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vror.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmaccsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsll.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvdot4a8i.ll
M llvm/test/CodeGen/RISCV/rvv/float-round-conv.ll
M llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximumnum-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fminimumnum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/fold-scalar-load-crash.ll
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M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
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M llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/frm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fround-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fshr-fshl.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/get_vector_length.ll
M llvm/test/CodeGen/RISCV/rvv/half-round-conv.ll
M llvm/test/CodeGen/RISCV/rvv/incorrect-extract-subvector-combine.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-fp.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
M llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll
M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
M llvm/test/CodeGen/RISCV/rvv/intrinsic-vector-match.ll
M llvm/test/CodeGen/RISCV/rvv/known-never-zero.ll
M llvm/test/CodeGen/RISCV/rvv/llrint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/llround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/localvar.ll
M llvm/test/CodeGen/RISCV/rvv/lrint-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/lround-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
M llvm/test/CodeGen/RISCV/rvv/masked-sdiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-srem.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
M llvm/test/CodeGen/RISCV/rvv/masked-udiv.ll
M llvm/test/CodeGen/RISCV/rvv/masked-urem.ll
M llvm/test/CodeGen/RISCV/rvv/memcpy-inline.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/mixed-float-bf16-arith.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-combine.ll
M llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/musttail-indirect-args.ll
M llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll
M llvm/test/CodeGen/RISCV/rvv/named-vector-shuffle-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/nontemporal-vp-scalable.ll
M llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/pr125306.ll
M llvm/test/CodeGen/RISCV/rvv/pr165232.ll
M llvm/test/CodeGen/RISCV/rvv/pr52475.ll
M llvm/test/CodeGen/RISCV/rvv/pr61561.ll
M llvm/test/CodeGen/RISCV/rvv/pr83017.ll
M llvm/test/CodeGen/RISCV/rvv/pr88576.ll
M llvm/test/CodeGen/RISCV/rvv/pr88799.ll
M llvm/test/CodeGen/RISCV/rvv/pr90559.ll
M llvm/test/CodeGen/RISCV/rvv/pr95865.ll
M llvm/test/CodeGen/RISCV/rvv/redundant-vfmvsf.ll
M llvm/test/CodeGen/RISCV/rvv/regcoal-liveinterval-pruning-crash.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/reproducer-pr146855.ll
M llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
M llvm/test/CodeGen/RISCV/rvv/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/rvv/round-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
M llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll
M llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfnrclip_x_f_qf.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfnrclip_xu_f_qf.ll
M llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
M llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/splats-with-mixed-vl.ll
M llvm/test/CodeGen/RISCV/rvv/sshl_sat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/stlf.ll
M llvm/test/CodeGen/RISCV/rvv/stores-of-loads-merging.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
M llvm/test/CodeGen/RISCV/rvv/strided-vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.ll
M llvm/test/CodeGen/RISCV/rvv/undef-vp-ops.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vadc.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vasub.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu.ll
M llvm/test/CodeGen/RISCV/rvv/vclmul.ll
M llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vcopysign-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop-shl-zext-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vcpop.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vector-compress.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-extract-last-active.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/vector-reassociations.ll
M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmp-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcmps-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst-byte-compare-index.ll
M llvm/test/CodeGen/RISCV/rvv/vfirst.ll
M llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-w-bf.ll
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M llvm/test/CodeGen/RISCV/rvv/vfwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-bf-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-bf-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-alt.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmaccbf16-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmul.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-bf.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfwsub-w-bf.ll
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M llvm/test/CodeGen/RISCV/rvv/vfwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-evl-tail-folding.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-live-out.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
M llvm/test/CodeGen/RISCV/rvv/vle_vid-vfcvt.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
M llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
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M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
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M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbf.ll
M llvm/test/CodeGen/RISCV/rvv/vmseq.ll
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M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
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M llvm/test/CodeGen/RISCV/rvv/vmsleu.ll
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M llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
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M llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.x.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor.ll
M llvm/test/CodeGen/RISCV/rvv/vp-combine-reverse-load.ll
M llvm/test/CodeGen/RISCV/rvv/vp-combine-store-reverse.ll
M llvm/test/CodeGen/RISCV/rvv/vp-cttz-elts.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-float.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-fixed-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
M llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vpstore.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp-f16.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu.ll
M llvm/test/CodeGen/RISCV/rvv/vrgatherei16-subreg-liveness.ll
M llvm/test/CodeGen/RISCV/rvv/vrol-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vror-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-power-of-two.ll
M llvm/test/CodeGen/RISCV/rvv/vscale-vw-web-simplification.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-valid-elen-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vsext.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub.ll
M llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-mask-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vwaddu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/vwmulu.ll
M llvm/test/CodeGen/RISCV/rvv/vwsll.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub-mask-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/vwsub.w.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/vwsubu.w.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
M llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vzext.ll
M llvm/test/CodeGen/RISCV/rvv/xandesvbfhcvt-vfwcvt-s-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-sdnode.ll
M llvm/test/CodeGen/RISCV/sadd_sat.ll
M llvm/test/CodeGen/RISCV/sadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/scmp.ll
M llvm/test/CodeGen/RISCV/select-binop-identity.ll
M llvm/test/CodeGen/RISCV/select-cc.ll
M llvm/test/CodeGen/RISCV/select-cond.ll
M llvm/test/CodeGen/RISCV/select-const.ll
M llvm/test/CodeGen/RISCV/select-constant-xor.ll
M llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
M llvm/test/CodeGen/RISCV/select-pseudo-merge-with-stack-adj.ll
M llvm/test/CodeGen/RISCV/select-zbb.ll
M llvm/test/CodeGen/RISCV/select.ll
M llvm/test/CodeGen/RISCV/sextw-removal.ll
M llvm/test/CodeGen/RISCV/shift-amount-mod.ll
M llvm/test/CodeGen/RISCV/shift-and.ll
M llvm/test/CodeGen/RISCV/shift-masked-shamt.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/shl-cttz.ll
M llvm/test/CodeGen/RISCV/shlimm-addimm.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-load-atomic-acquire-seq_cst.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-load.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-mul.ll
M llvm/test/CodeGen/RISCV/short-forward-branch-opt-qcloads.ll
M llvm/test/CodeGen/RISCV/shrinkwrap-jump-table.ll
M llvm/test/CodeGen/RISCV/shrinkwrap.ll
M llvm/test/CodeGen/RISCV/signed-truncation-check.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-store.ll
M llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll
M llvm/test/CodeGen/RISCV/split-urem-by-constant.ll
M llvm/test/CodeGen/RISCV/srem-lkk.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/ssub_sat.ll
M llvm/test/CodeGen/RISCV/ssub_sat_plus.ll
M llvm/test/CodeGen/RISCV/stack-clash-prologue.ll
M llvm/test/CodeGen/RISCV/stack-folding.ll
M llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/switch-width.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/trunc-nsw-nuw.ll
M llvm/test/CodeGen/RISCV/typepromotion-overflow.ll
M llvm/test/CodeGen/RISCV/uadd_sat.ll
M llvm/test/CodeGen/RISCV/uadd_sat_plus.ll
M llvm/test/CodeGen/RISCV/ucmp.ll
M llvm/test/CodeGen/RISCV/udiv-const-optimization.ll
M llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
M llvm/test/CodeGen/RISCV/urem-lkk.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/usub_sat_plus.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/varargs-with-fp-and-second-adj.ll
M llvm/test/CodeGen/RISCV/vscale-demanded-bits.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xaluo.ll
M llvm/test/CodeGen/RISCV/xcvmem-heuristic.ll
M llvm/test/CodeGen/RISCV/xcvmem.ll
M llvm/test/CodeGen/RISCV/xqccmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
M llvm/test/CodeGen/RISCV/xqcia.ll
M llvm/test/CodeGen/RISCV/xqciac.ll
M llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xqcibm-cto-clo-brev.ll
M llvm/test/CodeGen/RISCV/xqcibm-extract.ll
M llvm/test/CodeGen/RISCV/xqcibm-insbi.ll
M llvm/test/CodeGen/RISCV/xqcibm-insert.ll
M llvm/test/CodeGen/RISCV/xqcicm.ll
M llvm/test/CodeGen/RISCV/xqcics.ll
M llvm/test/CodeGen/RISCV/xqcilia.ll
M llvm/test/CodeGen/RISCV/xqcilsm-memset.ll
M llvm/test/CodeGen/RISCV/xqcisls.ll
M llvm/test/CodeGen/RISCV/xtheadmac.ll
M llvm/test/CodeGen/RISCV/xtheadmemidx.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
M llvm/test/CodeGen/RISCV/zbb-logic-neg-imm.ll
M llvm/test/CodeGen/RISCV/zcb-regalloc-hints.ll
M llvm/test/CodeGen/RISCV/zcmp-additional-stack.ll
M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
M llvm/test/CodeGen/RISCV/zdinx-spill.ll
A llvm/test/CodeGen/RISCV/zero-call-used-regs.ll
M llvm/test/CodeGen/RISCV/zibi.ll
M llvm/test/CodeGen/RISCV/zicond-fp-select-zfinx.ll
M llvm/test/CodeGen/RISCV/zicond-opts.ll
M llvm/test/CodeGen/RISCV/zilsd-spill.ll
M llvm/test/CodeGen/RISCV/zilsd.ll
M llvm/test/CodeGen/SPIRV/FCmpFalse_Vec.ll
A llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
A llvm/test/CodeGen/SPIRV/constant/local-zero-constants.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector-skipped.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-type-vector.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/multi-function-printf.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedAdd_spv_i64.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/is_fpclass.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/signed_arithmetic_overflow.ll
A llvm/test/CodeGen/SPIRV/select-aggregate.ll
A llvm/test/CodeGen/SPIRV/select-composite-constant.ll
M llvm/test/CodeGen/SPIRV/trunc-nonstd-bitwidth.ll
M llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
M llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
M llvm/test/CodeGen/X86/apx/ccmp.ll
M llvm/test/CodeGen/X86/apx/ctest.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
M llvm/test/CodeGen/X86/apx/setzucc.ll
M llvm/test/CodeGen/X86/atomic-load-store.ll
A llvm/test/CodeGen/X86/code-model-elf-constpool-large.ll
M llvm/test/CodeGen/X86/combine-pmuldq.ll
M llvm/test/CodeGen/X86/conditional-tailcall.ll
M llvm/test/CodeGen/X86/fast-isel-fcmp.ll
M llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
A llvm/test/CodeGen/X86/flags-copy-lowering-unreachable.mir
M llvm/test/CodeGen/X86/hipe-cc64.ll
M llvm/test/CodeGen/X86/ifma-combine-vpmadd52.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/madd.ll
M llvm/test/CodeGen/X86/musttail-tailcc.ll
M llvm/test/CodeGen/X86/pmaddubsw.ll
M llvm/test/CodeGen/X86/pr27591.ll
M llvm/test/CodeGen/X86/pr32284.ll
M llvm/test/CodeGen/X86/pr53842.ll
M llvm/test/CodeGen/X86/pr54369.ll
A llvm/test/CodeGen/X86/reset-fpenv-mmo.ll
M llvm/test/CodeGen/X86/sibcall.ll
A llvm/test/CodeGen/X86/stack-coloring-setjmp.ll
M llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
M llvm/test/CodeGen/X86/widen_fadd.ll
M llvm/test/CodeGen/X86/widen_fdiv.ll
M llvm/test/CodeGen/X86/widen_fmul.ll
M llvm/test/CodeGen/X86/widen_fsub.ll
A llvm/test/CodeGen/Xtensa/literal.ll
A llvm/test/CodeGen/Xtensa/tls.ll
M llvm/test/Instrumentation/Instrumentor/default_config.json
M llvm/test/Instrumentation/Instrumentor/module_and_globals.ll
A llvm/test/Instrumentation/Instrumentor/numeric.ll
A llvm/test/Instrumentation/Instrumentor/numeric_config.json
R llvm/test/Instrumentation/Instrumentor/operations.json
R llvm/test/Instrumentation/Instrumentor/operations.ll
A llvm/test/MC/AArch64/LFI/exclusive.s
A llvm/test/MC/AArch64/LFI/fp.s
A llvm/test/MC/AArch64/LFI/jumps-only.s
A llvm/test/MC/AArch64/LFI/literal.s
A llvm/test/MC/AArch64/LFI/lse.s
A llvm/test/MC/AArch64/LFI/mem-lr.s
A llvm/test/MC/AArch64/LFI/mem.s
A llvm/test/MC/AArch64/LFI/no-lfi-loads.s
A llvm/test/MC/AArch64/LFI/no-lfi-stores.s
A llvm/test/MC/AArch64/LFI/passthrough.s
A llvm/test/MC/AArch64/LFI/prefetch.s
A llvm/test/MC/AArch64/LFI/rcpc.s
A llvm/test/MC/AArch64/LFI/simd.s
A llvm/test/MC/AArch64/LFI/stack.s
M llvm/test/MC/AArch64/LFI/sys.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop1_err.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
M llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32.s
M llvm/test/MC/AMDGPU/gfx1250_asm_wmma_w32_err.s
A llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
A llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32.s
A llvm/test/MC/AMDGPU/gfx1251_asm_wmma_w32_err.s
M llvm/test/MC/AMDGPU/gfx1251_err.s
M llvm/test/MC/COFF/seh-unwindv3-error.s
M llvm/test/MC/COFF/seh-unwindv3-inheritance.s
A llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16-fake16.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_wmma_w32.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_wmma_w32.txt
M llvm/test/MC/RISCV/rv32c-invalid.s
M llvm/test/MC/RISCV/rv64c-invalid.s
M llvm/test/MC/RISCV/rvc-hints-invalid.s
M llvm/test/MC/RISCV/target-abi-invalid.s
M llvm/test/MC/RISCV/target-abi-valid.s
M llvm/test/MC/RISCV/xqcibm-invalid.s
A llvm/test/MC/Xtensa/tls.s
M llvm/test/Other/dump-before-after.ll
M llvm/test/Other/print-changed-machine.ll
M llvm/test/TableGen/GlobalISelEmitter/SkippedPatterns.td
M llvm/test/ThinLTO/X86/dtlto/timetrace.ll
M llvm/test/Transforms/Attributor/nofpclass-canonicalize.ll
M llvm/test/Transforms/ConstraintElimination/geps-unsigned-predicates.ll
M llvm/test/Transforms/GVN/PRE/pre-loop-load.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/copysign.ll
M llvm/test/Transforms/InstCombine/modular-format.ll
M llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-canonicalize.ll
M llvm/test/Transforms/InstCombine/trunc.ll
M llvm/test/Transforms/InstSimplify/fold-intrinsics.ll
M llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LICM/scalar-promote.ll
M llvm/test/Transforms/LoopInterchange/confused-dependence.ll
M llvm/test/Transforms/LoopInterchange/currentLimitation.ll
M llvm/test/Transforms/LoopInterchange/debuginfo.ll
M llvm/test/Transforms/LoopInterchange/force-interchange.ll
M llvm/test/Transforms/LoopInterchange/fp-reductions.ll
M llvm/test/Transforms/LoopInterchange/guarded-inner-loop.ll
A llvm/test/Transforms/LoopInterchange/inner-induciton-step-is-not-invariant.ll
M llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll
M llvm/test/Transforms/LoopInterchange/interchange-insts-between-indvar.ll
M llvm/test/Transforms/LoopInterchange/lcssa-incoming-value-is-not-instr.ll
M llvm/test/Transforms/LoopInterchange/legality-for-scalar-deps.ll
M llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
M llvm/test/Transforms/LoopInterchange/multilevel-partial-reduction.ll
M llvm/test/Transforms/LoopInterchange/non-phi-uses-lcssa-phi.ll
M llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
M llvm/test/Transforms/LoopInterchange/outer-only-reductions.ll
A llvm/test/Transforms/LoopInterchange/partially-perfect-loop.ll
M llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
M llvm/test/Transforms/LoopInterchange/pr43326-ideal-access-pattern.ll
M llvm/test/Transforms/LoopInterchange/pr43326.ll
M llvm/test/Transforms/LoopInterchange/pr48212.ll
M llvm/test/Transforms/LoopInterchange/profitability-redundant-interchange.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization-heuristic.ll
M llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
A llvm/test/Transforms/LoopInterchange/reduction-extra-use-in-inner-loop.ll
M llvm/test/Transforms/LoopInterchange/reduction2mem-limitation.ll
M llvm/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
M llvm/test/Transforms/LoopInterchange/reductions-non-wrapped-operations.ll
A llvm/test/Transforms/LoopStrengthReduce/X86/lsr-icmpzero-no-inttoptr.ll
M llvm/test/Transforms/LoopStrengthReduce/funclet.ll
M llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
M llvm/test/Transforms/LoopStrengthReduce/pr25541.ll
M llvm/test/Transforms/LoopStrengthReduce/pr27056.ll
A llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions-interleave.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
A llvm/test/Transforms/LoopVectorize/RISCV/i128-trip-count-evl.ll
M llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
A llvm/test/Transforms/LoopVectorize/RISCV/stepvector-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
Log Message:
-----------
Merge branch 'main' of github.com:llvm/llvm-project into users/ziqingluo/PR-179173940
Conflicts:
clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
Compare: https://github.com/llvm/llvm-project/compare/00b39efd86ec...0618f10ad95b
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