[all-commits] [llvm/llvm-project] 9bbed7: [AArch64] Optimize vector slide shuffles with zero...

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  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9bbed741e260753de029fcf7b22844fe23362a39
      https://github.com/llvm/llvm-project/commit/9bbed741e260753de029fcf7b22844fe23362a39
  Author: dibrinsofor <64705019+dibrinsofor at users.noreply.github.com>
  Date:   2026-06-12 (Fri, 12 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/ext-narrow-index.ll
    M llvm/test/CodeGen/AArch64/fp-conversion-to-tbl.ll
    A llvm/test/CodeGen/AArch64/shuffle-slide-to-shift.ll

  Log Message:
  -----------
  [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (#185170)

We currently emit `movi`+`ext` instructions when generating code for
shuffle slides of a 64-bit vector left/right and fill it with zeros.
This patch optimizes these patterns to use a single `ushr`/`shl`
instruction instead.

Example:
```llvm
  define <8 x i8> @slide_left(<8 x i8> %v) {
    %r = shufflevector <8 x i8> %v, <8 x i8> zeroinitializer,
         <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
    ret <8 x i8> %r
  }
```

Before, we generate:
```
  movi    v1.2d, #0
  ext     v0.8b, v0.8b, v1.8b, #1
```

Now:
```
  ushr    d0, d0, #8
```

Fixes: #183398
Alive2 proof: https://alive2.llvm.org/ce/z/QaW5CQ

---------

Signed-off-by: Dibri Nsofor <dibrinsofor at gmail.com>



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