[all-commits] [llvm/llvm-project] 70beeb: [GIsel] import min/max rewrites (#188267)

[Luisa Cicolini via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 70beebdcf407f931cc8f9e28550b67ee3c60ecc7
      https://github.com/llvm/llvm-project/commit/70beebdcf407f931cc8f9e28550b67ee3c60ecc7
  Author: Luisa Cicolini <48860705+luisacicolini at users.noreply.github.com>
  Date:   2026-06-11 (Thu, 11 Jun 2026)

  Changed paths:
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.mir
    A llvm/test/CodeGen/AArch64/combine-max-min.ll

  Log Message:
  -----------
  [GIsel] import min/max rewrites (#188267)

this PR imports the rewrites for min/max operations existing in the
SelectionDAG
[combine](https://github.com/llvm/llvm-project/blob/20aff2085c358d3e112b245494161ddb9ffe0410/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4272)
to GlobalISel

---------

Co-authored-by: Osman Yasar <osmanyas05 at gmail.com>



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