[all-commits] [llvm/llvm-project] 5e7ec2: [clang][CIR][AArch64] Add lowering for conversion ...

[Andrzej Warzyński via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5e7ec28c5e3a70588bbe9368d3816b009cf3670f
      https://github.com/llvm/llvm-project/commit/5e7ec28c5e3a70588bbe9368d3816b009cf3670f
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2026-06-11 (Thu, 11 Jun 2026)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
    M clang/test/CodeGen/AArch64/neon-intrinsics.c
    M clang/test/CodeGen/AArch64/neon-misc.c
    A clang/test/CodeGen/AArch64/neon/conversion-fullfp16.c
    M clang/test/CodeGen/AArch64/neon/intrinsics.c
    M clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c

  Log Message:
  -----------
  [clang][CIR][AArch64] Add lowering for conversion intrinsics (#199990)

This PR adds lowering for intrinsic from the following groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#conversions-2

It continues the work started in #190961 and #193273. This PR implements
conversions from FP to integer types where the bit-wdith does not
change:
  * vcvt_s64_f64
  * vcvt_u64_f64
  * vcvt_s32_f32
  * vcvtq_s32_f32
  * vcvtq_s64_f64
  * vcvt_u32_f32
  * vcvtq_u32_f32
  * vcvtq_u64_f64
  * vcvt_s16_f16
  * vcvtq_s16_f16
  * vcvt_u16_f16
  * vcvtq_u16_f16

The corresponding tests are moved from:
  * clang/test/CodeGen/AArch64/

to:
  * clang/test/CodeGen/AArch64/neon/

The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.



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