[all-commits] [llvm/llvm-project] 6ee9d9: [lldb] Fix mod-while-iteration in IRForTarget (#20...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Wed Jun 10 13:26:35 PDT 2026
Branch: refs/heads/users/vitalybuka/spr/specialcaselist-add-backward-compatible-dot-slash-handling
Home: https://github.com/llvm/llvm-project
Commit: 6ee9d90c58c4c7194f3a552e01a3e44c376cdfbe
https://github.com/llvm/llvm-project/commit/6ee9d90c58c4c7194f3a552e01a3e44c376cdfbe
Author: Raphael Isemann <rise at apple.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
Log Message:
-----------
[lldb] Fix mod-while-iteration in IRForTarget (#203035)
We modify the IR module here while iterating over it. Use the usual list
trick to delay modification until after the loop.
This was uncovered by bccd1b9cb744e5dd96ee59baa4bf4583457feea3
Commit: 9fa5f887d051c0ab63cfdd41dd15f0b350b20f93
https://github.com/llvm/llvm-project/commit/9fa5f887d051c0ab63cfdd41dd15f0b350b20f93
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/test/Other/dump-before-after.ll
Log Message:
-----------
[llvm] Fix crash with -ir-dump-directory & analysis passes (#202477)
The `StandardInstrumentations` were not filtering out analysis passes
(e.g. `-print-after-all`, etc).
* When printing to `stdout`, this results in additional output that is
unnecessary.
* When using `-ir-dump-directory` because the `PassID` is used for the
filename it results in an invalid file path causing the compiler to
crash. This becomes apparent with `-O1` or higher (e.g. `clang++ -mllvm
-print-before-all -mllvm -ir-dump-directory=dumpdir -O1 -S test.cpp`).
An example of the crash is shown below:
```
fatal error: error in backend: Failed to open dumpdir\18-a1a2011b35962283-module-RequireAnalysisPass<llvm::GlobalsAA, llvm::Module,
llvm::AnalysisManager<Module>>-before.ll to support -ir-dump-directory: invalid argument
```
Note that with `LLVM_ENABLE_IO_SANDBOX` the error is more ambiguous
showing up as `fatal error: error in backend: IO sandbox violation`.
Commit: 52e6b3612a3a27c69be9f86e7272e7ec01df9f9e
https://github.com/llvm/llvm-project/commit/52e6b3612a3a27c69be9f86e7272e7ec01df9f9e
Author: Jonathan L'Work <113400649+Jonathan03ant at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
Log Message:
-----------
[AMDGPU][GISEL] Adding RegBankLegalize rules for G_AMDGPU_SPONENTRY (#200864)
Commit: 2a6eae60aca0fbf27a151b6f7f44971572cf07ae
https://github.com/llvm/llvm-project/commit/2a6eae60aca0fbf27a151b6f7f44971572cf07ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[VPlan] Compute VPDominatorTree upfront, pass to passes (NFC) (#203058)
createHeaderPhiRecipes and replaceSymbolicStrides both run on the
initial plain-CFG VPlan0 before loop regions are created, and each
recomputed its own VPDominatorTree internally. Since the block-level CFG
is unchanged between them, compute the dominator tree once in the caller
and pass it in by const reference, avoiding a redundant recalculation.
Commit: 054a840e0370704c9a9705f5660861f0364d08d8
https://github.com/llvm/llvm-project/commit/054a840e0370704c9a9705f5660861f0364d08d8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-inbounds-gep-with-pointer-casts.ll
Log Message:
-----------
Reapply "[VPlan] Use VPInstructionWithType for uniform casts." (#202427) (#203057)
This reverts commit 5eae7dc2ac7d8dde06a943771b792aeb91c31f57.
Recommitted version moved out ::getAsRecipe to the .cpp to avoid
https://lab.llvm.org/buildbot/#/builders/160 build failures.
Original message:
Use VPInstructionWithType instead of VPReplicate recipe for uniform
casts. This is a first step towards breaking up VPReplicateRecipe. Using
the general VPInstructionWithType has the additional benefit that we can
now apply a number of simplifications directly.
Depends on https://github.com/llvm/llvm-project/pull/140621
PR: https://github.com/llvm/llvm-project/pull/140623
Commit: fe4316d67a8bfbaf12a650429fb4c1e5d5003f44
https://github.com/llvm/llvm-project/commit/fe4316d67a8bfbaf12a650429fb4c1e5d5003f44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
Log Message:
-----------
clang/AMDGPU: Pass BoundArch through device libs handling (#196586)
Pre-work to consolidate target identification for future target
option bug fixes. Also requires updating flang to match recent
clang changes.
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
Commit: 8d2510ecde24beacb50bff51a1a62c7feae12c00
https://github.com/llvm/llvm-project/commit/8d2510ecde24beacb50bff51a1a62c7feae12c00
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
Log Message:
-----------
[AMDGPU][NFC] Restore clamp modifiers in gfx11_asm_vop3_dpp16.s (#203062)
Were dropped by mistake in
https://github.com/llvm/llvm-project/pull/202721.
Commit: c36815b3e2c42b70923ef6509532640c940dc00d
https://github.com/llvm/llvm-project/commit/c36815b3e2c42b70923ef6509532640c940dc00d
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M libc/src/__support/threads/raw_rwlock.h
Log Message:
-----------
[libc][rwlock] fix timeout writer signal stealing problem (#201937)
When a timeout triggers, the waiting thread wakes up, unregisters
itself from the waiting queue, and exits. However, if the timing-out
thread is preempted after waking up but before it can unregister,
and a concurrent unlock occurs during this window, the timing-out
thread may consume the wake-up signal.
For example, assume the lock is in writer-preference mode and a
writer (W0) holds the lock. A reader (R) and another writer (W1,
with a short timeout) arrive and join the queue. W1's timeout
expires, so it wakes up and attempts to acquire the queue lock,
but is preempted before succeeding. W0 then releases the lock and,
preferring writers, sends a wake-up signal to W1. When W1 resumes,
it acquires the queue lock, unregisters, and exits due to the
timeout, ignoring the wake-up signal. As a result, the reader (R)
is left waiting indefinitely, leading to a deadlock.
To fix this, we track whether the serialization number changed
specifically for writers, and propagate the wake signal if it did.
If the timing-out thread is a reader, signal consumption is safe
because:
1. If there are pending writers, they will be woken up first.
2. Otherwise, if there are pending readers, they are all woken up
via broadcasting (notify_all), so one reader timing out does not
steal others' signal.
Assisted-by: AI tools, manually checked
Commit: 79aaf537bda3cefbd778dc92b533bbf6e8e5d435
https://github.com/llvm/llvm-project/commit/79aaf537bda3cefbd778dc92b533bbf6e8e5d435
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/CodeGen/SystemZ/zos-abi.c
Log Message:
-----------
[SystemZ][NFC] Sync downstream zos-abi.c test changes (#202437)
Syncs downstream changes to SystemZ zos-abi.c test:
1. Add test for char type parameter passing with sign extension
2. Rename pass_complexlike_float2 to pass_complexlike_float for
consistency
NFC - test-only changes.
Commit: 84e806d259626d79ae20ebd76e5fb0fed34ef7c0
https://github.com/llvm/llvm-project/commit/84e806d259626d79ae20ebd76e5fb0fed34ef7c0
Author: Tim Corringham <timothy.corringham at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/test/lit.cfg.py
Log Message:
-----------
[clang][lit] set spirv-tools feature when tools are available (#203067)
When the spirv tools are available (e.g. built with
-DLLVM_INCLUDE_SPIRV_TOOLS_TESTS) register the spirv-tools lit feature
in clang/test/lit.cfg.py.
This can then be used to skip tests that are not applicable when these
tools are available.
Fixes: #203049
Co-authored-by: Tim Corringham <tcorring at amd.com>
Commit: e4945cff7f120323d3f3da42923b87c24029d82f
https://github.com/llvm/llvm-project/commit/e4945cff7f120323d3f3da42923b87c24029d82f
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/CodeGenCoverage.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/OptionStrCmp.h
M llvm/include/llvm/Support/VirtualOutputBackend.h
M llvm/include/llvm/Support/VirtualOutputBackends.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/include/llvm/Support/VirtualOutputFile.h
M llvm/include/llvm/Support/Watchdog.h
M llvm/include/llvm/Support/circular_raw_ostream.h
M llvm/include/llvm/Support/raw_ostream_proxy.h
Log Message:
-----------
[llvm] Fix most LLVM_ABI annotations in Support (#202932)
This updates most LLVM_ABI annotations in the Support headers to match
expected usage:
* All public APIs should be properly annotated.
* Inlined functions should not be annotated.
These changes were done by a script fixing annotations on LLVM public
headers and manually checked.
This effort is tracked in #109483.
Commit: 7bcdec0b48ee8f64c16d1c13d7940073c3cb03a7
https://github.com/llvm/llvm-project/commit/7bcdec0b48ee8f64c16d1c13d7940073c3cb03a7
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[MLIR][XeGPU] Enable WG-level mxfp GEMM via generalized shape_cast collapse inference (#201496)
Summary
Bringing up two WG-level mxfp GEMM integration tests —
simple_mxfp_gemm_quantizeA_F4 and
simple_mxfp_gemm_dequantizeB_F4 — exposed several gaps in the XeGPU
layout-propagation and unroll paths
that previously kept them from compiling end-to-end. This PR lands those
two tests as the motivating
workloads, plus the supporting changes:
1. A generalized shape_cast collapse layout inference — required because
the mxfp lowering inserts
vector.shape_cast ops that collapse multiple src dims into a single dst
dim with non-trivial sg / lane
layouts spanning across them. The previous matchCollapseToInnermostDim
only covered the narrow […] →
[N] / [1, N] shape and could not infer correct source layouts for these
patterns.
2. A small primitive (expandDims) on the layout attribute so the new
code stays as elegant as the use
case of collapseDims.
3. Bug fixes uncovered while running these workloads end-to-end
(transpose layout check, layout-attr
unroll cast crash, drop-dims order pollution).
What's in this PR
Motivating integration tests (the driving force)
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
These exercise WG-level GEMM with mxfp quantization (BF16 × F4 paths).
They depend on every other
change in the PR; without them, layout propagation crashes or yields
conflicting layouts on the
inserted vector.shape_cast and xegpu.load_matrix / xegpu.store_matrix
ops.
Generalized shape_cast collapse inference
- New utility xegpu::matchDimCollapse(srcShape, resShape, collapseDims)
in XeGPUUtils.{h,cpp} — the
dual of matchSplitDimExpansion, returning per-dst-dim groups of src
indices.
- inferShapeCastSourceLayout use case 3 now handles arbitrary collapse
patterns:
- sg_layout / lane_layout spread outer-to-inner, so each subgroup / lane
owns a contiguous run in the
collapsed dst dim's row-major linearization.
- sg_data / lane_data / inst_data fill innermost-first, with per-dim
caps from any layout already placed.
- inst_data is seeded from lane_layout * lane_data per dim; the
remaining factor spreads innermost-first.
- order is rewritten by walking dst order fastest-first and emitting
each group's src dims innermost-fastest.
- Net effect for the mxfp tests: no data movement across sg / lane
boundaries when shape_cast collapses dims.
Refactor: expandDims interface method
- Added expandDims(int64_t dim, ArrayRef<int64_t> targetShape) to the
DistributeLayoutAttr interface,
with implementations on both LayoutAttr and SliceAttr. It's the
rank-increasing dual of collapseDims
and bakes in the distribution policy above.
- inferShapeCastSourceLayout use case 3 now mirrors use case 2's
per-group loop:
auto srcLayout = resLayout;
for (dst dim in reverse) {
if (group.empty()) srcLayout = srcLayout.dropDims({dstIdx});
else if (group.size() > 1) srcLayout = srcLayout.expandDims(dstIdx,
targetShape);
}
return srcLayout;
- Replaces ~190 lines of inlined per-field distribution logic with a
handful of lines.
Bug fixes uncovered while bringing up the integration tests
- LayoutAttr::isTransposeOf: corrected the per-dim check to match
vector.transpose semantics (dst[i] =
src[perm[i]]); the old comparison indexed src and dst inversely.
- LayoutAttr::dropDims: stop synthesizing a default [rank-1,...,0] order
when the input had none — that
synthesized order tripped collapseDims's adjacency check downstream.
- UnrollLoadMatrixOp / UnrollStoreMatrixOp: stop assuming the op's
layout is always a LayoutAttr. Use
DistributeLayoutAttr and guard dropInstData() so SliceAttr /
missing-layout inputs no longer crash
unrolling.
Unit-test coverage
- New shape_cast collapse coverage in both
propagate-layout-subgroup.mlir and
propagate-layout-inst-data.mlir for: plain innermost collapse, layout
spill across multiple src dims,
and multi-group collapse.
- Updated one lane_layout expectation in propagate-layout.mlir to
reflect the generalized distribution.
Files changed
- mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td — interface + class
declarations for expandDims
- mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h — declaration for
matchDimCollapse
- mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp — expandDims impls,
dropDims order fix, isTransposeOf fix
- mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp — refactored use
case 3
- mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp — load/store_matrix
unroll hardening
- mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp — matchDimCollapse impl
- mlir/test/Dialect/XeGPU/propagate-layout-{subgroup,inst-data,}.mlir —
new tests / updated expectation
-
mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_{dequantizeB_F4,quantizeA_F4}.mlir
— new
motivating integration tests
---------
Co-authored-by: Claude Opus 4.7 (1M context) <noreply at anthropic.com>
Commit: 077ec06128e27e3dce2b97563dab703f89024ddf
https://github.com/llvm/llvm-project/commit/077ec06128e27e3dce2b97563dab703f89024ddf
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
Log Message:
-----------
[AMDGPU] Avoid errors with 23-bit division and remainder. (#202753)
Extensive testing of expandDivRem24 found an error when calculating Y/X
when Y = (0x7FFFFF/X)*X-1. There are
36 values of X for which this happens. Limit expansion to 23-bit signed
and 22-bit unsigned to avoid this issue.
Testing added in https://github.com/llvm/llvm-test-suite/pull/419.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: c04e776213f2eb2da2df538adaa50b840cc64112
https://github.com/llvm/llvm-project/commit/c04e776213f2eb2da2df538adaa50b840cc64112
Author: David Green <david.green at arm.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Minor rearrangement of cost instructions. NFC (#203080)
This just moves the existing cost checks to a more standard order and
cleans up
how v2i64 is processed.
Commit: 437140c6a0bdfe4991f62603cecb4c19e86a75c9
https://github.com/llvm/llvm-project/commit/437140c6a0bdfe4991f62603cecb4c19e86a75c9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M llvm/lib/Support/SpecialCaseList.cpp
Log Message:
-----------
[NFC][SpecialCaseList] Add findRule helpers (#203025)
Introduce findRule helpers to RegexMatcher, GlobMatcher, and Matcher.
These helpers find the rule name matching a given line number.
This is a non-functional change (NFC) and will be used in a subsequent
commit to provide better warning messages when deprecated dot-slash
matching is triggered.
Assisted-by: Gemini
Commit: eb27cc6287ee20135503229c81ce7278cf924519
https://github.com/llvm/llvm-project/commit/eb27cc6287ee20135503229c81ce7278cf924519
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/test/CodeGen/SystemZ/zos-abi.c
M clang/test/lit.cfg.py
M libc/src/__support/threads/raw_rwlock.h
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/CodeGenCoverage.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/OptionStrCmp.h
M llvm/include/llvm/Support/VirtualOutputBackend.h
M llvm/include/llvm/Support/VirtualOutputBackends.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/include/llvm/Support/VirtualOutputFile.h
M llvm/include/llvm/Support/Watchdog.h
M llvm/include/llvm/Support/circular_raw_ostream.h
M llvm/include/llvm/Support/raw_ostream_proxy.h
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/Other/dump-before-after.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-inbounds-gep-with-pointer-casts.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Commit: e664b2f0fa99c2a096a2113860a9ae553a8cbba4
https://github.com/llvm/llvm-project/commit/e664b2f0fa99c2a096a2113860a9ae553a8cbba4
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/test/CodeGen/SystemZ/zos-abi.c
M clang/test/lit.cfg.py
M libc/src/__support/threads/raw_rwlock.h
M lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
M llvm/include/llvm/Support/AArch64BuildAttributes.h
M llvm/include/llvm/Support/CodeGenCoverage.h
M llvm/include/llvm/Support/DebugCounter.h
M llvm/include/llvm/Support/JSON.h
M llvm/include/llvm/Support/Jobserver.h
M llvm/include/llvm/Support/LSP/Protocol.h
M llvm/include/llvm/Support/LSP/Transport.h
M llvm/include/llvm/Support/MathExtras.h
M llvm/include/llvm/Support/OptionStrCmp.h
M llvm/include/llvm/Support/VirtualOutputBackend.h
M llvm/include/llvm/Support/VirtualOutputBackends.h
M llvm/include/llvm/Support/VirtualOutputConfig.h
M llvm/include/llvm/Support/VirtualOutputError.h
M llvm/include/llvm/Support/VirtualOutputFile.h
M llvm/include/llvm/Support/Watchdog.h
M llvm/include/llvm/Support/circular_raw_ostream.h
M llvm/include/llvm/Support/raw_ostream_proxy.h
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/Support/SpecialCaseList.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/llvm.sponentry.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/sdivrem24.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/udivrem24.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
M llvm/test/Other/dump-before-after.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/single-scalar-cast.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/RISCV/vplan-riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/as_cast.ll
M llvm/test/Transforms/LoopVectorize/cast-costs.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/preserve-inbounds-gep-with-pointer-casts.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
rebase
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/ab4ad6c4d7a4...e664b2f0fa99
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