[all-commits] [llvm/llvm-project] 8342bf: [mlir][acc] Add acc.predicate_region for redundant...

[Vitaly Buka via All-commits]

  Branch: refs/heads/users/vitalybuka/spr/nfcspecialcaselist-use-helper-for-version-checks
  Home:   https://github.com/llvm/llvm-project
  Commit: 8342bf926db0436f0a64f69b4b38238e4fa78ae9
      https://github.com/llvm/llvm-project/commit/8342bf926db0436f0a64f69b4b38238e4fa78ae9
  Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
    M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
    M mlir/test/Dialect/OpenACC/invalid-cg.mlir
    M mlir/test/Dialect/OpenACC/ops-cg.mlir

  Log Message:
  -----------
  [mlir][acc] Add acc.predicate_region for redundant/single semantics (#203011)

Add acc.predicate_region, an intermediate codegen operation that groups
statements at intermediate points in a loop nest within
acc.compute_region. OpenACC distinguishes partitioned loop execution
from single and redundant execution at nest transitions: for example,
gang-redundant code runs on all gangs but not as partitioned gang-loop
iterations, and worker-single or vector-single code runs on one worker
or vector lane rather than across the full worker or vector partition.
This grouping marks code whose execution scope differs from surrounding
partitioned loops, so predication and synchronization can be applied
correctly during lowering.


  Commit: 5784cd3d997c84b42f6eda733949dc260b322170
      https://github.com/llvm/llvm-project/commit/5784cd3d997c84b42f6eda733949dc260b322170
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir

  Log Message:
  -----------
  AMDGPU/UniformityAnalysis: For G_AMDGPU_WHOLE_WAVE_FUNC_SETUP, always divergent (#203000)


  Commit: 3443243ded167229ddc37e64b7e754854ae1ba2c
      https://github.com/llvm/llvm-project/commit/3443243ded167229ddc37e64b7e754854ae1ba2c
  Author: Jerry Shih <bignose1007 at gmail.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/test/Dialect/Linalg/canonicalize.mlir

  Log Message:
  -----------
  [mlir][linalg] add more pattern to fold pack op padding_value. (#198468)

No padding is needed for unit tile size.


  Commit: 1a4ff9624091a74bda9f8a7beec4aae0413b8b6e
      https://github.com/llvm/llvm-project/commit/1a4ff9624091a74bda9f8a7beec4aae0413b8b6e
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    A llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
    M mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
    M mlir/test/Dialect/Linalg/canonicalize.mlir
    M mlir/test/Dialect/OpenACC/invalid-cg.mlir
    M mlir/test/Dialect/OpenACC/ops-cg.mlir

  Log Message:
  -----------
  rebase

Created using spr 1.3.7


Compare: https://github.com/llvm/llvm-project/compare/1b4e530c65af...1a4ff9624091

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