[all-commits] [llvm/llvm-project] ded7a3: [AMDGPU] Support Wave Reduction for i16 types - 3 ...

[Aaditya via All-commits]

  Branch: refs/heads/users/easyonaadit/amdgpu/i16-wave-reduce-bitwise
  Home:   https://github.com/llvm/llvm-project
  Commit: ded7a3935ddf6416094aa55a0bfa39c6bdb723c1
      https://github.com/llvm/llvm-project/commit/ded7a3935ddf6416094aa55a0bfa39c6bdb723c1
  Author: easyonaadit <115080342+easyonaadit at users.noreply.github.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll

  Log Message:
  -----------
  [AMDGPU] Support Wave Reduction for i16 types - 3 (#194812)

Supported Ops: `and`, `or`, `xor`.
Supports only the iterative stratergy, DPP is yet
to be supported.
Supports only Fake-16 versions of the lowering.
True-16 support is yet to be added.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications