[all-commits] [llvm/llvm-project] 37931f: [AMDGPU] Support Wave Reduction for i16 types - 1 ...

[Aaditya via All-commits]

  Branch: refs/heads/users/easyonaadit/amdgpu/i16-wave-reduce-min-max
  Home:   https://github.com/llvm/llvm-project
  Commit: 37931f6b679e7de747ce0ef735dab674721fa525
      https://github.com/llvm/llvm-project/commit/37931f6b679e7de747ce0ef735dab674721fa525
  Author: easyonaadit <115080342+easyonaadit at users.noreply.github.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll

  Log Message:
  -----------
  [AMDGPU] Support Wave Reduction for i16 types - 1 (#194808)

Supported Ops: `min`, `umin`, `max`, `umax`.
16-bit wave reduce ops are promoted to 32-bit
operations before ISEL. From there they use the
existing implementations for 32-bit reductions.

Assisted by - Claude-sonnet:4.6



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