[all-commits] [llvm/llvm-project] d8388a: [AArch64] Use PNR rather than PPR register class f...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d8388a15b33e67fd297a47a0e6ee80c3a5cd947a
      https://github.com/llvm/llvm-project/commit/d8388a15b33e67fd297a47a0e6ee80c3a5cd947a
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2026-06-10 (Wed, 10 Jun 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/predicate-as-counter-phi.ll

  Log Message:
  -----------
  [AArch64] Use PNR rather than PPR register class for aarch64svcount (#202394)

While predicates and predicate-as-counter both use the same underlying
registers, within LLVM they use different register classes (PPR vs PNR).
Mapping aarch64svcount to the PPRRegClass results in some unnecessary
cross register class copies around PHIs, which results in some
unnecessary moves.



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