[all-commits] [llvm/llvm-project] 391cbd: Reland [RISCV] Check SP-relative offset in needsFr...
Aiden Grossman via All-commits
all-commits at lists.llvm.org
Tue Jun 9 13:59:04 PDT 2026
Branch: refs/heads/users/boomanaiden154/main.tailcallelim-add-profile-annotations-to-return-value-selects
Home: https://github.com/llvm/llvm-project
Commit: 391cbd232dfded7d9af778f9a1fdb04982a15a42
https://github.com/llvm/llvm-project/commit/391cbd232dfded7d9af778f9a1fdb04982a15a42
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
Log Message:
-----------
Reland [RISCV] Check SP-relative offset in needsFrameBaseReg when FP offset overflows (#202499)
When a frame pointer is present, needsFrameBaseReg previously only
checked the FP-relative offset to decide if a virtual base register was
needed. If the worst-case FP offset exceeded the 12-bit immediate range,
a base register was always materialized, even when the SP-relative
offset would fit.
Since getFrameIndexReference can now select SP over FP when the offset
fits in the compressed instruction immediate range, also check the
SP-relative offset before deciding a base register is needed. This
avoids unnecessary base register materialization and results in some
code size savings.
Reland of b5d577d3faef.
Commit: eb954b0bb91f3a9374a00279650e1a0977871062
https://github.com/llvm/llvm-project/commit/eb954b0bb91f3a9374a00279650e1a0977871062
Author: ritter-x2a <9519134+ritter-x2a at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Drop docs for invalid load-release and store-acquire operations (#202338)
The LangRef says "release and acq_rel orderings are not valid on load
instructions" [for loads](https://llvm.org/docs/LangRef.html#load-instruction)
and "acquire and acq_rel orderings aren't valid on store instructions"
[for stores](https://llvm.org/docs/LangRef.html#store-instruction).
Providing them in textual IR is diagnosed with an error.
Therefore, we should not define semantics for these invalid constructs.
Part of LCOMPILER-2273.
Commit: fc9bf89cfd9aa312bc5f1a855c76d04cf715d868
https://github.com/llvm/llvm-project/commit/fc9bf89cfd9aa312bc5f1a855c76d04cf715d868
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
R libcxx/include/__type_traits/dependent_type.h
M libcxx/include/module.modulemap.in
M libcxx/include/variant
Log Message:
-----------
[libc++] Simplify some meta programming in <variant> (#201538)
Specifically, this avoids `__dependent_type` and `__type_identity`
instantiations, reducing compile times a bit.
Commit: 188c0486bd8db4ac51afe1b986228fafe1bdf21b
https://github.com/llvm/llvm-project/commit/188c0486bd8db4ac51afe1b986228fafe1bdf21b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
Log Message:
-----------
[LAA] Don't check for free in evaluatePtrAddRecAtMaxBTCWillNotWrap() (#202341)
The fact that an object of a certain size existed at the the location at
some point is sufficient to prove the desired nowrap fact. Whether the
object still exists there doesn't matter in this context.
Commit: 1ad448f48b3ea8c79e3246dff691d41449db562d
https://github.com/llvm/llvm-project/commit/1ad448f48b3ea8c79e3246dff691d41449db562d
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
Log Message:
-----------
[InstCombine] Don't reuse a sibling binop with extra flags via demanded elts (#199782) (#201545)
SimplifyDemandedVectorElts can replace a vector binop with a sibling
binop. But if the sibling carries a flag the original lacked, it could
produce a result the original never would. E.g.
Reusing `sub nuw` could make the result poison on wrap.
Reusing `fmul nsz` could flip the sign of a zero.
Reusing `fdiv arcp` could make the result less accurate.
Fix by only reusing the sibling when its flags are a subset of the
replaced binop's.
https://alive2.llvm.org/ce/z/9yEaG7
Fixes #199782.
Commit: ae85794cf3a2a6a2742940609be64c1a4f4a60b7
https://github.com/llvm/llvm-project/commit/ae85794cf3a2a6a2742940609be64c1a4f4a60b7
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vpmax intrinsics (#201495)
### summary
part of : https://github.com/llvm/llvm-project/issues/185382
Adds ClangIR support for all AArch64 NEON pairwise-maximum intrinsics
(vpmax*) in
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#pairwise-maximum
Also enables the scalar pairwise reductions vpmaxs_f32, vpmaxqd_f64,
vpmaxnms_f32, and vpmaxnmqd_f64 by routing them through the common NEON
SISD path (fmaxv / fmaxnmv).
Commit: 6b90b6b4a38d4692d321c03684de6853622c59ea
https://github.com/llvm/llvm-project/commit/6b90b6b4a38d4692d321c03684de6853622c59ea
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode] Check Ptr primtype in Store op (#202314)
Commit: 69215c5e4f03253d78218bf5ac55f81b90118082
https://github.com/llvm/llvm-project/commit/69215c5e4f03253d78218bf5ac55f81b90118082
Author: Jakob Koschel <jakobkoschel at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/docs/SafeStack.rst
M clang/lib/Sema/SemaChecking.cpp
A clang/test/Sema/safestack-deprecated-builtins.c
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/sanitizer/safestack_interface.h
M compiler-rt/lib/safestack/CMakeLists.txt
M compiler-rt/lib/safestack/safestack.cpp
M compiler-rt/test/safestack/sigaltstack.c
Log Message:
-----------
[SafeStack] Introduce public interface header and deprecate builtins (#198292)
Introduce `sanitizer/safestack_interface.h` to expose SafeStack utility
functions as a public interface, similar to other sanitizers.
Exposed functions:
* `__safestack_get_unsafe_stack_ptr`
* `__safestack_get_unsafe_stack_bottom`
* `__safestack_get_unsafe_stack_top`
Deprecate the existing `__builtin___get_unsafe_stack_*` builtins and
emit warnings suggesting the new `__safestack_` equivalents.
Runtime compatibility aliases `__get_unsafe_stack_*` are maintained.
Commit: c04c945d2563297ca75baf13050594e2bd3dcec5
https://github.com/llvm/llvm-project/commit/c04c945d2563297ca75baf13050594e2bd3dcec5
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/LICM/hoist-deref-load.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
Log Message:
-----------
[ValueTracking] Handle chain of single-pred blocks in willNotFreeBetween() (#202308)
willNotFreeBetween() currently handles the case where both instructions
are in the same block, or one is in the single predecessor of the other.
This patch extends this to handle a chain of single predecessor blocks.
The budget now applies to all checked instructions, rather than per
block. Also increase the budget by a factor of two (which means that new
budget interpretation should never regress relative to the previous).
Commit: 19250eb71a32aafd540b5f9b03eea6be8121b2d2
https://github.com/llvm/llvm-project/commit/19250eb71a32aafd540b5f9b03eea6be8121b2d2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Analysis/ValueTracking/assume.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Verifier/assume-bundles.ll
Log Message:
-----------
[InstCombine] Drop zero size dereferenceable assumptions (#202411)
Commit: e12a55706f77052a20cf315d0d8c83a910b360fb
https://github.com/llvm/llvm-project/commit/e12a55706f77052a20cf315d0d8c83a910b360fb
Author: Yexuan Xiao <bizwen at nykz.org>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGCoroutine.cpp
A clang/test/CodeGenCoroutines/coro-cwg2935.cpp
Log Message:
-----------
[Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (C… (#202279)
…WG2935)
This patch attempts to implement the solution I proposed for [CWG2935
(Github)](https://github.com/cplusplus/CWG/issues/575), aligning Clang's
behavior with GCC and MSVC instead of leaving it undefined. When
`initial_suspend` (as well as `ready` and `suspend`) throws an
exception, Clang fails to destroy the task even though the task has
already been initialized (see https://godbolt.org/z/E4Y4bEn54).
This patch updates CGCoroutine.cpp to clean up the coroutine return
value after an exception is thrown when it is constructed in place,
addressing CWG2935.
I would like to hear more opinions on the solution and seek help to fix
Clang.
Commit: cbffca291f395f8b8055396a417ee7620f6582b9
https://github.com/llvm/llvm-project/commit/cbffca291f395f8b8055396a417ee7620f6582b9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Only save frame offset in debug builds (#202294)
We only ever use this value to verify that a frame has cleaned up after
itself, i.e. in assertions.
Commit: c30ea28015bf0c2899b485c3bf531d7c7e61f518
https://github.com/llvm/llvm-project/commit/c30ea28015bf0c2899b485c3bf531d7c7e61f518
Author: Vaisman <vasili.svirski at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/test/Dialect/NVGPU/invalid.mlir
Log Message:
-----------
[mlir][nvgpu] Add negative tests for warpgroup MMA accumulator ops (#202516)
Add verifier tests for warpgroup MMA accumulator initialization
and store operations.
The tests cover invalid accumulator shapes, unsupported non-f32
store results, and mismatched store destination shapes.
The verifier logic for these cases exists in
WarpgroupMmaInitAccumulatorOp::verify() and
WarpgroupMmaStoreOp::verify(), but lacked explicit negative test
coverage in invalid.mlir.
Commit: bccd1b9cb744e5dd96ee59baa4bf4583457feea3
https://github.com/llvm/llvm-project/commit/bccd1b9cb744e5dd96ee59baa4bf4583457feea3
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Transforms/IPO/StripSymbols.cpp
M llvm/unittests/ADT/StringMapTest.cpp
Log Message:
-----------
[StringMap] Invalidate iterators in remove() (#202520)
erase() bumps the epoch to invalidate iterators (#202237), but the
lower-level remove() — which detaches an entry without destroying it,
used
by ValueSymbolTable via Value::setName() — did not. Move the
incrementEpoch() into remove() so remove-while-iterating fails fast
under
LLVM_ENABLE_ABI_BREAKING_CHECKS too.
Aided by Claude Opus 4.8
Commit: 239a898a235ff81e6208be31670ef143435506c8
https://github.com/llvm/llvm-project/commit/239a898a235ff81e6208be31670ef143435506c8
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
Log Message:
-----------
[AArch64][GlobalISel] Fix post-legalizer observer notifications (#202376)
Assisted-by: codex
Commit: 6a18bd7be02b5f2f663018a5ab30ac12b2d3a00e
https://github.com/llvm/llvm-project/commit/6a18bd7be02b5f2f663018a5ab30ac12b2d3a00e
Author: A. Jiang <de34 at live.cn>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libcxx/include/__format/range_formatter.h
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
Log Message:
-----------
[libc++][format] Propagate `m` when formatting range elements (#94562)
As per
[[tab:formatter.range.type]](https://eel.is/c++draft/tab:formatter.range.type),
the effects of the `m` option need to be propagated to the formatter of
range elements.
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: c155183957c7d4a0a53cf781c266b02dd6f1a377
https://github.com/llvm/llvm-project/commit/c155183957c7d4a0a53cf781c266b02dd6f1a377
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve-multivector-fold-imms.ll
Log Message:
-----------
[AArch64][SVE] Select immediate offsets for multi-vector instructions (#201637)
This handles multi-vector intrinsics in getMemVTFromNode() and
implements the missing ISEL patterns needed to select the immediate
(mul vl) offsets.
Commit: 2990f95ae247808e5c0f413d9e91658302ea5b6f
https://github.com/llvm/llvm-project/commit/2990f95ae247808e5c0f413d9e91658302ea5b6f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
Log Message:
-----------
[SPIR-V] Deduplicate createVariable and createExitVariable helpers into SPIRVUtils (#202512)
Commit: 620cdfb1d1000e9de4cdeb35dfa60ff0299d925e
https://github.com/llvm/llvm-project/commit/620cdfb1d1000e9de4cdeb35dfa60ff0299d925e
Author: Access <ShootingStarDragons at protonmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
Log Message:
-----------
[clangd][Mangler] Drop unknown compile options (#200001)
this pr remove the options that not work for clang, which will make
compile failed for clang++, and this will make modules completions of
clangd work. And we will also log the unsupported options
Commit: 99f6a20075abd71b4dd64b073c6159e507495cd2
https://github.com/llvm/llvm-project/commit/99f6a20075abd71b4dd64b073c6159e507495cd2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/codegen.cpp
Log Message:
-----------
[clang][bytecode] Check floating-point semantics in `Memcpy` op (#202204)
We shouldn't try to do the memcpy if the semantics don't match.
Commit: 7f6f60f8325aa724331a768a589e2c22b19f0416
https://github.com/llvm/llvm-project/commit/7f6f60f8325aa724331a768a589e2c22b19f0416
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
Log Message:
-----------
[mlir][SPIR-V] Support floating-point atomic_rmw addf in MemRefToSPIRV (#202330)
Commit: 95c24830265cba8c4844dda3384025bac0bf96b4
https://github.com/llvm/llvm-project/commit/95c24830265cba8c4844dda3384025bac0bf96b4
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGenHLSL/preserve-interface-dce.hlsl
A clang/test/CodeGenHLSL/preserve-interface.hlsl
A clang/test/Driver/dxc_fspv_preserve_interface.hlsl
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/preserve-interface-dce.ll
A llvm/test/CodeGen/SPIRV/preserve-interface.ll
Log Message:
-----------
[clang][SPIR-V] Implement -fspv-preserve-interface (#196404)
This flag, originally implemented in DXC, prevents GlobalDCE from
removing entry-point interface variables, even if they are unreferenced
after inlining.
This adds `HLSLSpvPreserveInterface` to `LangOptions.def` and
`Options.td`. In `CGHLSLRuntime::finishCodeGen()`, it adds all
`addrspace(7)` and `addrspace(8)` globals to `llvm.compiler.used`.
In `processGlobalValue()`, it extends the condition that emits
`spv_unref_global` to fire for globals whose only uses come from
`llvm.compiler.used` or `llvm.used`.
Fixes https://github.com/llvm/llvm-project/issues/136936
Commit: 8b4902300521d4a0980d9d35210c02b405f0df86
https://github.com/llvm/llvm-project/commit/8b4902300521d4a0980d9d35210c02b405f0df86
Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/lit.cfg.py
Log Message:
-----------
[Compiler-rt][test] Fix circular link dependency between builtins and libc (#199482)
Currently, the link order is `libclang_rt.builtins.a -lc -lm`. Builtins
are scanned first after which symbols like `abort` are unresolved
references that are resolved through libc.a. However, resolving the
references to these symbols further lead to undefined references to
`_aeabi_uldivmod` etc. that can only resolved through builtins.
Reversing the order also wont fix the issue because `libc.a` introduces
`__aeabi_uldivmod` which is resolved by builtins but it introduces
`abort` which can only be resolved libc.a.
This patch fixes this by wrapping the archives in a linker group
(--start-group/--end-group), which instructs the linker to rescan all
archives in the group until no new symbols can be resolved.
This error is exposed only when bfd like linkers are used.
Commit: ab31c28892a9ad5e016e94500861c93018736e7b
https://github.com/llvm/llvm-project/commit/ab31c28892a9ad5e016e94500861c93018736e7b
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp6x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp8x2.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
Log Message:
-----------
[MLIR][NVVM] Add support for narrow-fp to bf16x2 conversions (#200157)
This change adds the following NVVM Ops to support narrow-fp to bf16x2
conversions:
- `nvvm.convert.f6x2.to.bf16x2`
- `nvvm.convert.f4x2.to.bf16x2`
- `nvvm.convert.f8x2.to.bf16x2` (updated to allow `E4M3FN` and `E5M2`
types)
Also removes unnecessary verifiers for narrow-fp to `f16x2` conversions
to instead use `TypeAttrOf` to validate the source type in the ODS
definition.
Commit: c3d13ceb8a894312211c88bf2ef947708442a855
https://github.com/llvm/llvm-project/commit/c3d13ceb8a894312211c88bf2ef947708442a855
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
Log Message:
-----------
[AMDGPU] Use alloc size for array stride in LowerBufferFatPointers (#202530)
Array elements are laid out at multiples of getTypeAllocSize, not
getTypeStoreSize
LLVM memory model lays out array element `i` at `i * allocSize`
(reflected in `DataLayout::getTypeAllocSize`), apply it for fat pointers
to prevent miscompile
Commit: 3fec9c702b597e1a0204ff30137ae8d1557e395c
https://github.com/llvm/llvm-project/commit/3fec9c702b597e1a0204ff30137ae8d1557e395c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
A mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
Log Message:
-----------
[mlir][SPIR-V] Add SPIRVToLLVM direct conversions for cast, CL, GL and logical ops (#202506)
Lower the OpenCL extended instruction set math ops, GL math ops (Trunc,
Asin, Acos, Atan), logical Ordered/Unordered, and the pointer cast ops
to their LLVM dialect equivalents
Commit: 6bf8d4b059bd5cd4b660be6063769a9f162e5ec0
https://github.com/llvm/llvm-project/commit/6bf8d4b059bd5cd4b660be6063769a9f162e5ec0
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
Log Message:
-----------
[VPlan] Look through BCast when folding live-ins (#202527)
This gives us some minor improvements.
Commit: bf860889a8ff3fea28dbace895cd633ccbe79608
https://github.com/llvm/llvm-project/commit/bf860889a8ff3fea28dbace895cd633ccbe79608
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
Log Message:
-----------
Revert "[test][Support] Disable CFI-icall for DynamicLibrary Overload test" (#202550)
Reverts llvm/llvm-project#202446
Commit: 383db8a1ddc9f8db49c8305e463b3a80b7cd8638
https://github.com/llvm/llvm-project/commit/383db8a1ddc9f8db49c8305e463b3a80b7cd8638
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M .ci/compute_projects.py
Log Message:
-----------
[CI][Offload] Fix offload depends on openmp (#202541)
It appears that Offload depends on OpenMP. Thus, enable OpenMP as a
runtime to test when offload has changes.
Commit: 08636d456502fb7404e632598e16f3698367a6f7
https://github.com/llvm/llvm-project/commit/08636d456502fb7404e632598e16f3698367a6f7
Author: Davide Grohmann <davide.grohmann at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVExperimentalMLOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
A mlir/test/Dialect/SPIRV/IR/experimental-ml-ops.mlir
A mlir/test/Target/SPIRV/experimental-ml-ops.mlir
Log Message:
-----------
[mlir][spirv] Add Arm.ExperimentalMLOperations.1 extended inst set (#202283)
This instruction set provides a mechanism to encode experimental ML
operations in SPIR-V modules. Such instructions are encoded via the
single CALL operator in the instruction set by specifying an op_code and
customized inputs values.
Reference:
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extended/Arm.ExperimentalMLOperations.asciidoc
Signed-off-by: Niklas Lithammer <niklas.lithammer at arm.com>
Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
Commit: 514f5b766667c4c696b260f783403e8b41bc8798
https://github.com/llvm/llvm-project/commit/514f5b766667c4c696b260f783403e8b41bc8798
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
Log Message:
-----------
[ConstantFolding] Fix dropped bits in non-integer-ratio bitcast with undef lane (#202282)
When constant-folding a vector bitcast(e.g. <4 x i24> -> <3 x i32>), an
undef source element inserted a DstBitSize-wide zero placeholder into
the bit buffer. This could clobber defined source element, producing a
wrong result on big-endian targets.
Fix by inserting SrcBitSize-wide zero instead.
Alive2 proof:
before (unsound): https://alive2.llvm.org/ce/z/R_ZQ75
after (verified): https://alive2.llvm.org/ce/z/VuV3mz
Commit: 6746898d2bfc086947d86715e065f8dbf74e9690
https://github.com/llvm/llvm-project/commit/6746898d2bfc086947d86715e065f8dbf74e9690
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
R clang/test/CodeGenHLSL/preserve-interface-dce.hlsl
R clang/test/CodeGenHLSL/preserve-interface.hlsl
R clang/test/Driver/dxc_fspv_preserve_interface.hlsl
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
R llvm/test/CodeGen/SPIRV/preserve-interface-dce.ll
R llvm/test/CodeGen/SPIRV/preserve-interface.ll
Log Message:
-----------
Revert "[clang][SPIR-V] Implement -fspv-preserve-interface (#196404)" (#202558)
This reverts commit 95c24830265cba8c4844dda3384025bac0bf96b4.
Fail log:
https://lab.llvm.org/buildbot/#/builders/226/builds/9015/steps/7/logs/stdio
```
FAILED: lib/libLLVMFrontendHLSL.so.23.0git
: && /opt/rh/gcc-toolset-13/root/usr/bin/c++ -fPIC -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wno-missing-field-initializers -pedantic -Wno-long-long -Wimplicit-fallthrough -Wno-uninitialized -Wno-nonnull -Wno-class-memaccess -Wno-dangling-reference -Wno-redundant-move -Wno-pessimizing-move -Wno-array-bounds -Wno-stringop-overread -Wno-dangling-pointer -Wno-noexcept-type -Wdelete-non-virtual-dtor -Wsuggest-override -Wno-comment -Wno-misleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -Wl,-z,defs -Wl,-z,nodelete -Wl,-rpath-link,/home/botworker/bbot/amdgpu-offload-build-only/build/./lib -Wl,--gc-sections -shared -Wl,-soname,libLLVMFrontendHLSL.so.23.0git -o lib/libLLVMFrontendHLSL.so.23.0git lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/CBuffer.cpp.o lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/HLSLBinding.cpp.o lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/HLSLResource.cpp.o lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/HLSLRootSignature.cpp.o lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/RootSignatureMetadata.cpp.o lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/RootSignatureValidations.cpp.o -Wl,-rpath,"\$ORIGIN/../lib:\$ORIGIN/../lib/x86_64-unknown-linux-gnu:/home/botworker/bbot/amdgpu-offload-build-only/build/lib:" lib/libLLVMCore.so.23.0git lib/libLLVMBinaryFormat.so.23.0git lib/libLLVMSupport.so.23.0git -Wl,-rpath-link,/home/botworker/bbot/amdgpu-offload-build-only/build/lib && :
/opt/rh/gcc-toolset-13/root/usr/libexec/gcc/x86_64-redhat-linux/13/ld: lib/Frontend/HLSL/CMakeFiles/LLVMFrontendHLSL.dir/CBuffer.cpp.o: in function `llvm::hlsl::CBufferMetadata::removeCBufferGlobalsFromUseList(llvm::Module&)':
CBuffer.cpp:(.text._ZN4llvm4hlsl15CBufferMetadata31removeCBufferGlobalsFromUseListERNS_6ModuleE+0xce): undefined reference to `llvm::removeFromUsedLists(llvm::Module&, llvm::function_ref<bool (llvm::Constant*)>)'
collect2: error: ld returned 1 exit status
```
Commit: a172eb9fcdebc93ad123b1f9d8b3ba953b904e7d
https://github.com/llvm/llvm-project/commit/a172eb9fcdebc93ad123b1f9d8b3ba953b904e7d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
Log Message:
-----------
[GlobalISel][AMDGPU] Emit proper diagnostic when inline asm register allocation fails (#201380)
Replace the silent fallback return with a DiagnosticInfoInlineAsm error
and undef result values, so the failure is reported to the user instead
of relying on -global-isel-abort
discussed in https://github.com/llvm/llvm-project/pull/200771
Commit: 944284fe6329eb133bdbf9af77af6fa0cd280070
https://github.com/llvm/llvm-project/commit/944284fe6329eb133bdbf9af77af6fa0cd280070
Author: Matthias Springer <me at m-sp.org>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
Log Message:
-----------
[mlir][Interfaces] Document completeness requirement of `RegionBranchOpInterface` (#202018)
Document that interface implementations must report all possible control
flow edges. Failure to report a possible edge may break
analyses/transformations/APIs such as
`RegionBranchOpInterface::isRepetitiveRegion`.
Commit: 0f6f15a59f3f774a7f055f9754fe97c088390c4e
https://github.com/llvm/llvm-project/commit/0f6f15a59f3f774a7f055f9754fe97c088390c4e
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
A llvm/test/Transforms/IndVarSimplify/exit-value-safe-udiv.ll
Log Message:
-----------
[SCEVExpander] Don't expand a UDiv with a possibly-poison divisor (#202378)
SCEVExpander::isSafeToExpand only check divisor isKnownNonZero, which
ignore the possibility of poison. For the following divisor:
```
%ct = call i32 @llvm.cttz.i32(i32 %x, i1 true)
%divisor = add i32 %ct, 1
...
%rem = urem i32 1, %divisor
```
The urem may be hoisted unsafely.
Fix by also check divisor isGuaranteedNotToBePoison.
Fixes https://github.com/llvm/llvm-project/issues/202028
Commit: 96a263602fa6a8130cf9f67723bddb27787b7d97
https://github.com/llvm/llvm-project/commit/96a263602fa6a8130cf9f67723bddb27787b7d97
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
Log Message:
-----------
[clang][bytecode] Remove `InterpFrame::ThisPointerOffset` (#202322)
Replace it with a `uint8_t` representing some bool flags about the
function. This reduces the size of a frame from 88 to 80 bytes.
Commit: 09b451f1e7f7715b5cf994c24ef698b2a8579dbc
https://github.com/llvm/llvm-project/commit/09b451f1e7f7715b5cf994c24ef698b2a8579dbc
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libcxx/include/__bit_reference
A libcxx/test/libcxx/containers/sequences/vector.bool/nodiscard.iterator.verify.cpp
Log Message:
-----------
[libc++][vector] Apply `[[nodiscard]]` to `vector<bool>::iterator` (#202265)
Towards #172124
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: c4f4206ff3ab97db9577f11bb2dabd40896bcca9
https://github.com/llvm/llvm-project/commit/c4f4206ff3ab97db9577f11bb2dabd40896bcca9
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
A libcxx/test/libcxx/containers/sequences/vector/nodiscard.iterator.verify.cpp
Log Message:
-----------
[libc++][vector] Test `[[nodiscard]]` applied to `vector::iterator` (#202262)
Adds test coverage.
`[[nodicard]]` applied in:
- #198489
- #198492
Towards #172124
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Commit: 01d3932364bee33f8e861d5664c2983cc855124f
https://github.com/llvm/llvm-project/commit/01d3932364bee33f8e861d5664c2983cc855124f
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
A clang/test/Headers/hip-constexpr-cmath.hip
Log Message:
-----------
[Clang][HIP] Include `__clang_cuda_math_forward_declares.h` before `<cmath>` (#201563)
In HIP, `constexpr` functions are treated as both `__host__` and
`__device__`.
A new version of the MS STL shipped with the build tools version
14.51.36231 has `constexpr` definitions for some `cmath` functions when
the
compiler in use is Clang (this gets worse when C++23 is in use).
These definitions conflict with the `__device__` declarations we provide
in the header wrappers.
There is a workaround for this: We do not mark `constexpr`
functions [_that are defined in a system
header_](https://github.com/llvm/llvm-project/blob/03127a03860b9d8cb440fe8f51c00647f45eb8be/clang/lib/Sema/SemaCUDA.cpp#L877)
as
`__host__` and `__device__` if there is a previous `__device__`
declaration.
By moving `__clang_cuda_math_forward_declares.h` before `<cmath>` is
included we're able to benefit from this behavior.
This fixes error like this one
https://github.com/ggml-org/llama.cpp/issues/22570
even for recent versions of C++.
This patch should address C++23 concerns where more functions are marked
as `constexpr`.
However, we should still figure out how to provide `__device__
constexpr` versions for those functions, or not provide ours and use the
system's if they exist.
This patch replaces https://github.com/llvm/llvm-project/pull/200395
Commit: d7d9601c182889ec5e25492fb94d22a70c03fc2b
https://github.com/llvm/llvm-project/commit/d7d9601c182889ec5e25492fb94d22a70c03fc2b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
Log Message:
-----------
[Loads] Migrate isDereferenceable APIs to SimplifyQuery (#202553)
These take the usual set of analysis parameters, so we can encapsulate
them using SimplifyQuery.
Commit: 0e9ff9805decab9896068f37c18a713a68e53f93
https://github.com/llvm/llvm-project/commit/0e9ff9805decab9896068f37c18a713a68e53f93
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
Log Message:
-----------
[OFFLOAD][L0] Add wait events for AsyncQueue memFill (#202287)
Fix an issue where memFill operations were not chained properly with respect prior operations.
Commit: 9ac836b3ddff45ebd9f4d23cae3e573991c7f64c
https://github.com/llvm/llvm-project/commit/9ac836b3ddff45ebd9f4d23cae3e573991c7f64c
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/intap.cpp
Log Message:
-----------
[clang][bytecode] Fix shifting by negative IntAP values (#202505)
The negation of a negative value didn't necessarily result in a positive
value. Fix that by giving it one more bit of precision.
Commit: 96480b2880838fe3fb3f3120347beb1ed1560d37
https://github.com/llvm/llvm-project/commit/96480b2880838fe3fb3f3120347beb1ed1560d37
Author: Andrei Golubev <andrey.golubev at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.td
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
A mlir/test/Dialect/Bufferization/Transforms/test-one-shot-module-bufferize.mlir
M mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
Log Message:
-----------
[mlir][bufferization] Drop TensorLikeType::getBufferType() (#201350)
Replace TensorLikeType::getBufferType() with
options.unknownTypeConverterFn() hook. Make the hook work with
tensor-like and buffer-like types (instead of builtins) to maintain the
same behaviour at the API boundary level and still allow user types to
be properly supported.
Historically, an attempt to support user types within the one-shot
bufferization framework was made. As part of it,
TensorLikeType::getBufferType() was introduced to allow user-provided
types to customize bufferization. However, the whole affair proved to be
overly complex: there is an interface with customization points for
user-provided tensors, and options-based (not sufficient) implementation
for builtin tensors. On top of this, there was always a
function-specific hook to customize function-level behaviour further. As
a result of this, users would need to implement two different mechanisms
on their end: interface implementation + option hooks.
It seems more reasonable at this stage to thus drop the interface part
and just allow unknown type conversion hook to be used directly. That
way, users would only need to supply that hook themselves (with the
caveat of having to perform a type dispatch inside of the hook).
As a drive by, multiple tests that exercise the usage of custom tensor
type (e.g. !test.test_tensor) are moved to work on top of a test pass.
Default memory space inference hook is also updated to work on top of
tensor-like type to align the signature to the unknown type conversion.
Note for LLVM integration:
* Implementation(s) of `TensorLikeType::getBufferType()` for
(user-provided) tensor types should now be moved into a user-specified
`BufferizationOptions::unknownTypeConverterFn()` hook
* In case upstream one-shot-bufferization pass was used to bufferize IR
with user types, such a setup would likely fail now, since a fallback to
type-based bufferization can now only be set through bufferization
options, and cannot be configured at the upstream pass level. One needs
to create a new pass that sets up the necessary bufferization hooks and
calls one-shot-bufferization infrastructure manually.
Commit: f704a92281ee2ff741fa94048970ac6dea19a1b6
https://github.com/llvm/llvm-project/commit/f704a92281ee2ff741fa94048970ac6dea19a1b6
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayAssignable.logicalptr.hlsl
M clang/test/CodeGenHLSL/cbuffer-matrix-layout-keyword.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
R llvm/test/CodeGen/DirectX/cbuffer_global_elim.ll
R llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
Log Message:
-----------
Revert "[HLSL] Set visibility of cbuffer global variables to internal" (#202538)
Reverts llvm/llvm-project#200312
Breaks several buildbots, e.g.,
https://lab.llvm.org/buildbot/#/builders/203/builds/48531
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
Commit: 00e3e6f4cbbba60ddfcd648269dd5f2e8d799cbc
https://github.com/llvm/llvm-project/commit/00e3e6f4cbbba60ddfcd648269dd5f2e8d799cbc
Author: Xiaomeng Zhang <zhangxiaomeng at hygon.cn>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/Driver/x86-march.c
M clang/test/Frontend/x86-target-cpu.c
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/Preprocessor/predefined-arch-macros.c
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/include/llvm/TargetParser/Host.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Target/X86/X86.td
A llvm/lib/Target/X86/X86ScheduleC864GM4.td
A llvm/lib/Target/X86/X86ScheduleC864GM7.td
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/test/CodeGen/X86/bypass-slow-division-64.ll
M llvm/test/CodeGen/X86/cmp16.ll
A llvm/test/CodeGen/X86/cpus-hygon.ll
M llvm/test/CodeGen/X86/rdpru.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
M llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
M llvm/test/MC/X86/x86_long_nop.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-adx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-aes.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-avx1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-avx2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-bmi1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-bmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-clflushopt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-clzero.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-cmov.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-cmpxchg.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-f16c.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-fma.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-fsgsbase.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-lea.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-lzcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-mmx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-movbe.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-mwaitx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-pclmul.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-popcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-prefetchw.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-rdrand.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-rdseed.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sha.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse3.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse41.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse42.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse4a.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-ssse3.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x86_32.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x86_64.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x87.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-xsave.s
A llvm/test/tools/llvm-mca/X86/C864GM4/zero-idioms.s
A llvm/test/tools/llvm-mca/X86/C864GM7/independent-load-stores.s
A llvm/test/tools/llvm-mca/X86/C864GM7/partially-overlapping-group-resources.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-adx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-aes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bitalg.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bitalgvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bw.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bwvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512cd.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512cdvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512dq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512dqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512gfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512gfnivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512ifma.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512ifmavl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vaes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vaesvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi2vl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vnni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vnnivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vp2intersect.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vp2intersectvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpclmulqdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpclmulqdqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpopcntdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpopcntdqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avxgfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avxvnni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-bmi1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-bmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-clflushopt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-clwb.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-cmov.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-cmpxchg.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-f16c.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-fma.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-fsgsbase.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-gfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-lea.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-lzcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-mmx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-movbe.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-mwaitx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-pclmul.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-popcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-prefetchw.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-rdrand.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-rdseed.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sha.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse3.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse41.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse42.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse4a.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-ssse3.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-vaes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-vpclmulqdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x86_32.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x86_64.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x87.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-xsave.s
A llvm/test/tools/llvm-mca/X86/C864GM7/zero-idioms.s
Log Message:
-----------
[X86] Hygon Processors Initial enablement (#187622)
This patch adds initial support for several Hygon architectures.
The Hygon architectures include:
- c86-4g-m4
- c86-4g-m6
- c86-4g-m7
This patch includes:
- Added Hygon architectures CPU targets recognition in Clang and LLVM
- Added Hygon architectures to target parser and host CPU detection
- Updated compiler-rt CPU model detection for Hygon architectures
- Added Hygon architectures to various optimizer tests
- Added scheduler models for Hygon architectures CPU targets
Commit: 11cf29581486565b04767ce313602312824d0109
https://github.com/llvm/llvm-project/commit/11cf29581486565b04767ce313602312824d0109
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.h
Log Message:
-----------
Revert "[NFC][llvm-exegesis] Disable CFI-icall for JIT-executed function" (#202571)
Reverts llvm/llvm-project#202472
Commit: a1c1cdd44b372c08125d2b6a4aa445620cd284a3
https://github.com/llvm/llvm-project/commit/a1c1cdd44b372c08125d2b6a4aa445620cd284a3
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
Log Message:
-----------
[AlignmentFromAssumes] Skip huge alignment (#202567)
Fixes https://github.com/llvm/llvm-project/issues/202043
Though `align` on huge alignment is not supported, the case below
confirms we allow huge alignment in `assume`:
https://github.com/llvm/llvm-project/blob/c4f4206ff3ab97db9577f11bb2dabd40896bcca9/llvm/test/Transforms/InstCombine/assume.ll#L71
In this case, we should skip huge alignment in AlignmentFromAssumes.
Commit: 0f8a3b23f1e1ffe69d6d49576347ea967ec611be
https://github.com/llvm/llvm-project/commit/0f8a3b23f1e1ffe69d6d49576347ea967ec611be
Author: Anshul Nigham <nigham at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combine-ptr-add-chain.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
Log Message:
-----------
[NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (#194156)
Adds a standard porting.
Updates some (but not all) tests to verify the NewPM path is working.
Commit: 85ab77340528a7d2e03595aa43c42fcb6105f650
https://github.com/llvm/llvm-project/commit/85ab77340528a7d2e03595aa43c42fcb6105f650
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
A llvm/test/Transforms/InstCombine/issue173148-sext-phi-select-infloop.ll
Log Message:
-----------
[InstCombine] Fix infinite combine loop in evaluateInDifferentType (#202572)
The implementation assumes that all original uses inside visited
instructions would get removed as part of changing the type. However,
this is not true for uses in select conditions, as only the value
operands change type in that case. Bail out if we encounter uses in
select conditions to avoid this.
Fixes https://github.com/llvm/llvm-project/issues/173148.
Commit: 9dfcf7663b1604ae5ced030a69e2be0e93632d5e
https://github.com/llvm/llvm-project/commit/9dfcf7663b1604ae5ced030a69e2be0e93632d5e
Author: Fangrui Song <i at maskray.me>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/docs/ProgrammersManual.rst
M llvm/include/llvm/ADT/StringMap.h
M llvm/lib/Support/StringMap.cpp
M llvm/unittests/ADT/StringMapTest.cpp
M llvm/utils/gdb-scripts/prettyprinters.py
Log Message:
-----------
[StringMap] Replace tombstone deletion with TAOCP 6.4 Algorithm R (#202103)
StringMap uses quadratic probing with lazy deletion: an erased entry
becomes a tombstone, a third bucket state alongside empty and live that
every find/insert must inspect.
Switch to linear probing with Knuth TAOCP 6.4 Algorithm R deletion,
similar to DenseMap #200595.
erase now relocates the following entries to close the hole. StringMap
buckets are pointers to heap-allocated entries, so only the pointers
(and the parallel hash array) move. References and pointers to entries
remain valid, but iterators are invalidated.
Depends on #202237 and #202520
Aided by Claude Opus 4.8
Commit: ca227bff07085250e3a146dadf2ea3246d8b23a8
https://github.com/llvm/llvm-project/commit/ca227bff07085250e3a146dadf2ea3246d8b23a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
Log Message:
-----------
[AMDGPU] Produce ballot/icmp/fcmp lane masks at wavefront width (#201358)
Commit: f7e4167f816ac8c5a6e553c66f3b90fe040d1362
https://github.com/llvm/llvm-project/commit/f7e4167f816ac8c5a6e553c66f3b90fe040d1362
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
Log Message:
-----------
[AMDGPU] Clamp load_monitor scope to minimum SCOPE_SE (#198245)
The load_monitor instructions monitor L2 cache lines and therefore
require at least SCOPE_SE to ensure the L2 cache is hit. The current
memory model requires the user to ensure that the specified scope is
such that it results in at least SCOPE_SE, otherwise the behaviour is
undefined. Instead, we now clamp the emitted scope at a minimum of
SCOPE_SE, so that the undefined behaviour is converted into a
performance loss instead.
Assisted-By: Claude Opus 4.6
Commit: 323285f141535bfa8607f773c814000dd4f69e98
https://github.com/llvm/llvm-project/commit/323285f141535bfa8607f773c814000dd4f69e98
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
Log Message:
-----------
[SLP] Update test against const-folding (#202532)
223ef1f3 ([IRBuilder] ConstFold unary intrinsics, #200496) made a lot of
test updates to SLPVectorizer. The tests were written a long time ago,
and it is unclear what their intent was, but at least update the one
test to replace constants with arguments, where the intent is clear.
Commit: 7581dc5a298dd1736c84ff21fbc310d40901a894
https://github.com/llvm/llvm-project/commit/7581dc5a298dd1736c84ff21fbc310d40901a894
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/unions.cpp
Log Message:
-----------
[clang][bytecode] Fix an assertion failure in visitDtorCall() (#202507)
In `emitDestructionPop()`, we assert that the Descriptor has a
non-trivial dtor. Check this first here so we don't do all this work for
nothing.
Commit: 057a1fe9bd5b3c72ea6d65c456d1266fc20d8e33
https://github.com/llvm/llvm-project/commit/057a1fe9bd5b3c72ea6d65c456d1266fc20d8e33
Author: anjenner <161845516+anjenner at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
Log Message:
-----------
[AMDGPU][GISel] Add register bank legalization rules for amdgcn_raw_buffer_load_async_lds (#201406)
Also amdgcn_struct_buffer_load_async_lds,
amdgcn_raw_ptr_buffer_load_async_lds, and
amdgcn_struct_ptr_buffer_load_async_lds.
Commit: 271c8b75cde53d78da5ce971ced8694cca149749
https://github.com/llvm/llvm-project/commit/271c8b75cde53d78da5ce971ced8694cca149749
Author: Vinit Deodhar <vadeodhar89 at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgEnums.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
Log Message:
-----------
[mlir][linalg] Add sin, cos, tan to elementwise operations (#200950)
Add sin, cos, and tan as UnaryFn entries in the linalg dialect, enabling
their use via linalg.elementwise, named ops (linalg.sin, linalg.cos,
linalg.tan), and specialization from linalg.generic.
---------
Co-authored-by: Vinit Deodhar <vinitdeodhar at users.noreply.github.com>
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
Co-authored-by: Vinit Deodhar <vdeodhar at ah-vdeodhar-l.dhcp.mathworks.com>
Commit: 9129363adbcc3474639e2a3b2b263905da1f86ca
https://github.com/llvm/llvm-project/commit/9129363adbcc3474639e2a3b2b263905da1f86ca
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
Log Message:
-----------
[GlobalISel] Use more inline elements in a match table SmallVector (#202568)
The 4 inline elements for OnFailResumeAt only cover 36.8% (33455 / 90902) of
aarch64-isel executeMatchTable invocations encountered while compiling sqlite3
on aarch64-O0-g.
The 8 inline elements cover 100% (maximum observed depth was 6). Small -0.09%
CTMark geomean improvement on aarch64-O0-g.
https://llvm-compile-time-tracker.com/compare.php?from=2de2edb943fe1b83d79bdffa03606eb8c5452e9b&to=8deb4f949b5f80a26a8a61775fb411bf30fefd80&stat=instructions%3Au
Assisted-by: codex
Commit: 54d5646b0d70e3a198817c61c40ba0226a66bf29
https://github.com/llvm/llvm-project/commit/54d5646b0d70e3a198817c61c40ba0226a66bf29
Author: lijinpei-amd <jinpli at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/test/SemaCXX/attr-section.cpp
Log Message:
-----------
[Sema] Add original GH192264 reproducer as a section-conflict regression test (#202276)
Follow up of https://github.com/llvm/llvm-project/pull/200873
Commit: 8b0223858b1e15a4310de18445d972e7648b740f
https://github.com/llvm/llvm-project/commit/8b0223858b1e15a4310de18445d972e7648b740f
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
A clang/test/SemaHIP/amdgpu-av-load-store.hip
A clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
A clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
Log Message:
-----------
[AMDGPU][Clang] add __builtin_amdgcn_av_(load|store)_b128 (#199176)
These builtins allow the program to request store-available and
load-visible accesses as described in #191246. Each of them takes a
__MEMORY_SCOPE_* operand that is then translated to target-specific
cache policy bits.
This patch was extracted from #172090.
Co-authored-by: macurtis-amd <macurtis at amd.com>
Assisted-by: Claude Opus 4.6
---------
Co-authored-by: macurtis-amd <macurtis at amd.com>
Commit: 88caf8ef2bd61005e854952b8a1e699aa72347d8
https://github.com/llvm/llvm-project/commit/88caf8ef2bd61005e854952b8a1e699aa72347d8
Author: Erik Enikeev <evonatarius at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
M llvm/test/CodeGen/PowerPC/fp-strict-fcmp-spe.ll
M llvm/test/CodeGen/PowerPC/legalize-invert-br_cc.ll
M llvm/test/CodeGen/PowerPC/spe.ll
Log Message:
-----------
Reland "[PowerPC] set libcall lowering for fp setcc ops on SPE boards" (#199198)
This is a reland of 4d0100789dc9b4db7d77c033d8f53f8b7dc68437, which was
reverted by c24ab4c814f680c5ac71600bf80d551123abd84d.
The functionality is unchanged from the original patch. This version
only fixes the fast-math flag propagation issue by passing `SDNodeFlags`
explicitly to `DAG.getSetCC()` (same as #199105 which was closed because
the underlying patch had been reverted).
Commit: 59e1338da9e97be33e19dbe0b0cda46a9eefe834
https://github.com/llvm/llvm-project/commit/59e1338da9e97be33e19dbe0b0cda46a9eefe834
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Strip Ctx arg from tryToFoldLiveIns (NFC) (#202559)
We get the Plan anyway, so the context doesn't need to be passed
separately.
Commit: b1880a09469217aab192ded75643f860fb3d55a8
https://github.com/llvm/llvm-project/commit/b1880a09469217aab192ded75643f860fb3d55a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
A llvm/lib/Target/SPIRV/SPIRVAuxDataHandler.cpp
A llvm/lib/Target/SPIRV/SPIRVAuxDataHandler.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-attributes.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-metadata-debug.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-metadata.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-auxdata-requires-extension.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-auxdata.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-attributes.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-metadata.ll
A llvm/test/CodeGen/SPIRV/linkage/available-externally-function.ll
A llvm/test/CodeGen/SPIRV/linkage/available-externally-global.ll
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
Log Message:
-----------
[SPIR-V] Add NonSemantic.AuxData emission (-spirv-preserve-auxdata) (#200002)
Add a NonSemantic.AuxData extended instruction set to the SPIR-V
backend, matching SPIRV-LLVM-Translator's --spirv-preserve-auxdata wire
format
- `-spirv-preserve-auxdata` emits LLVM attributes and metadata as
NonSemantic.AuxData records (requires SPV_KHR_non_semantic_info).
- `available_externally` functions keep their linkage via an AuxData
linkage record, emitted unconditionally.
Commit: 97b131ec4a7e021c45586a37832d380c0c16ce1c
https://github.com/llvm/llvm-project/commit/97b131ec4a7e021c45586a37832d380c0c16ce1c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
Log Message:
-----------
[AMDGPU][NFC] Add atomic optimization tests for gfx13 (#201299)
Commit: dae2935b32a673557e7060f8e90e73eaae4d6199
https://github.com/llvm/llvm-project/commit/dae2935b32a673557e7060f8e90e73eaae4d6199
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memcpy.align.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memmove.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
Log Message:
-----------
[SPIR-V] Drop constant zero-sized memcpy/memmove/memset before selection (#201904)
A constant zero Size operand is invalid for OpCopyMemorySized, and these
intrinsics are no-ops, so erase them instead of lowering
Commit: 70b68dff845403f62d77f42850ac779a78662272
https://github.com/llvm/llvm-project/commit/70b68dff845403f62d77f42850ac779a78662272
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.mir
Log Message:
-----------
[AMDGPU] Fix si-optimize-exec-masking stepping into debug values (#201947)
Summary:
This pass tries to step between register uses and would try to enter a
debug instruction if it managed to get between them.
Commit: 13b28db64845fc9fe7431338d5dc8919b28a6022
https://github.com/llvm/llvm-project/commit/13b28db64845fc9fe7431338d5dc8919b28a6022
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/test/TableGen/target-mem-intrinsic-attrs.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
Log Message:
-----------
[TableGen] Add ArgMem memory location (#201597)
This will allow to use IntrRead/IntrWrite with ArgMem. So this:
```
[IntrWriteMem , IntrInaccessibleMemOrArgMemOnly]
```
could become this:
```
[IntrWriteMem, IntrWrite<[ArgMem, InaccessibleMem]>]
```
Commit: 53870f797be01f586078c1f129d05325c83a3143
https://github.com/llvm/llvm-project/commit/53870f797be01f586078c1f129d05325c83a3143
Author: Arnav Mundada <arnav.dev.mail at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libc/include/math.yaml
Log Message:
-----------
[libc][math] Add missing math function entries dfmal,dfmaf128 to math.yaml (#199485)
Part of https://github.com/llvm/llvm-project/issues/199266
Added missing math function entries to `libc/include/math.yaml`:
- dfmaf128
- dfmal
Commit: ee39c604feff48ce4b5396f8a7c51da86768479b
https://github.com/llvm/llvm-project/commit/ee39c604feff48ce4b5396f8a7c51da86768479b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/docs/Multilib.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/MSVC.cpp
A clang/test/Driver/Inputs/multilib_msvc_tree/bin/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/debug/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/noexcept/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/release/.keep
A clang/test/Driver/msvc-multilib.yaml
M clang/test/Driver/print-multi-selection-flags.c
Log Message:
-----------
[Clang] Support multilibs on Windows (#200212)
Summary:
This was pushed to a follow-up, and I think the previous has lingered
long enough to expand this to Windows. the per-target runtime directory
this uses is default-off, but nothing stops us from just providing this.
The interest in this is for ROCm builds on Windows to be able to provide
asan / debug builds the same way on Linux.
Commit: 9c54c82d80271c326535f73064a8763d0c730a59
https://github.com/llvm/llvm-project/commit/9c54c82d80271c326535f73064a8763d0c730a59
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Host/ProcessLaunchInfo.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Utility/StringExtractorGDBRemote.cpp
Log Message:
-----------
[lldb][gdb-remote] Forward client terminal size to lldb-server (#201141)
Add a new gdb-remote packet, `QSetSTDIOWindowSize:cols=N;rows=N`, to
send the dimension of the terminal to the debuggee.
On Windows, the ConPTY emulates a PTY. The client's terminal (the one
the user is running lldb from) has to match the dimensions of the ConPTY
so that the debuggee (which is attached to the ConPTY) gets proper
terminal emulation. If there is a mismatch, lines will not wrap at the
right column and VT sequences will be out of place. In practice, in
lldb, this results in the `(lldb)` prompt being overwritten by the
stdout of the debuggee.
This patch forwards the dimension of the client (the terminal lldb.exe
is running in) to the ConPTY (opened by the server) so that the
dimensions of the client's terminal match the ones of the ConPTY.
As an example, here is the opposite case where the terminal does not
have dimensions (the vscode debug console) and the ConPTY still has
finite dimensions: https://github.com/llvm/llvm-project/pull/186472.
This is a follow up to:
- https://github.com/llvm/llvm-project/pull/201124
Commit: 5ec036aba1243801320611f23f644707496e69c9
https://github.com/llvm/llvm-project/commit/5ec036aba1243801320611f23f644707496e69c9
Author: David Green <david.green at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/test/CodeGen/AArch64/ldst-opt-umov-fpr-store.mir
Log Message:
-----------
[AArch64] Protect against mismatching sizes in UMOV combine. (#202116)
This fixes an issue from #199139 where a later revision was not checking
the connection between the size of the UMOV and the size of the store.
This adds a check, based on the register sizes and the memory size from
the MMO.
Commit: 67e3b31450012b939980fc91075d0ab0b035f284
https://github.com/llvm/llvm-project/commit/67e3b31450012b939980fc91075d0ab0b035f284
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/caches/NVPTX.cmake
M compiler-rt/cmake/caches/SPIRV64.cmake
Log Message:
-----------
[compiler-rt] Fix misspelled variable name in GPU caches (#202604)
Summary:
This likely didn't do anything, but it's best for things to be spelled
right.
Commit: 4662e7136d02accfeb11f5255eb1bcae10cff7ed
https://github.com/llvm/llvm-project/commit/4662e7136d02accfeb11f5255eb1bcae10cff7ed
Author: David Green <david.green at arm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
Log Message:
-----------
[AArch64][GlobalISel] BF16 libcalls operations. (#200740)
This fills in a number of bf16 instructions that lower through f32
libcall.
Commit: 85d4138c12cd1eae0eb7083279ca7b0b26cd15b1
https://github.com/llvm/llvm-project/commit/85d4138c12cd1eae0eb7083279ca7b0b26cd15b1
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libsycl/CMakeLists.txt
A libsycl/cmake/Modules/AddUnitTest.cmake
M libsycl/docs/index.rst
M libsycl/src/CMakeLists.txt
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
A libsycl/unittests/CMakeLists.txt
A libsycl/unittests/common/device_images.hpp
A libsycl/unittests/mock/CMakeLists.txt
A libsycl/unittests/mock/helpers.cpp
A libsycl/unittests/mock/helpers.hpp
A libsycl/unittests/mock/mock.cpp
A libsycl/unittests/platform/CMakeLists.txt
A libsycl/unittests/platform/get_platforms.cpp
A libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/register_and_unregister.cpp
A libsycl/unittests/queue/CMakeLists.txt
A libsycl/unittests/queue/queue.cpp
Log Message:
-----------
[libsycl] Add UT build and min test set (#199915)
This PR was assisted by GH Copilot (replication of base mock functions
according to my example, fake device image helpers).
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: cbfe4adc92bc0c9680285e9a47201f0ff68c9b66
https://github.com/llvm/llvm-project/commit/cbfe4adc92bc0c9680285e9a47201f0ff68c9b66
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-empty-struct.ll
Log Message:
-----------
[SPIR-V] Fix infinite loop on GEP handling for an empty struct (#202587)
Commit: 431a821cbbb66f89d0cd7d97c6eb7792801fd90e
https://github.com/llvm/llvm-project/commit/431a821cbbb66f89d0cd7d97c6eb7792801fd90e
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/logical-memcpy.inline.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/memcpy.inline.ll
Log Message:
-----------
[SPIRV] Add support for selection of G_MEMCPY_INLINE (#201925)
`G_MEMCPY_INLINE` is the same as `G_MEMCPY` but it's supposed to
guarantee the instruction will not be lowered to an external function
call. This is useful for projects like `libc`.
In SPIR-V, we would never lower to an external function call, we always
lower `G_MEMCPY` to `OpCopyMemory` or `OpCopyMemorySized`, or the copy
is optimized out, so we should be able to handle `G_MEMCPY_INLINE` and
`G_MEMCPY` the same.
Co-Authored-By: Claude Opus 4.8
[noreply at anthropic.com](mailto:noreply at anthropic.com)
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 3f28ade7a938f410baa061c4fe0c69a98dd58281
https://github.com/llvm/llvm-project/commit/3f28ade7a938f410baa061c4fe0c69a98dd58281
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/concat-vectors.ll
Log Message:
-----------
[SPIRV] Support selection of G_CONCAT_VECTORS (#201686)
Implement the G_CONCAT_VECTOR opcode using `OpCompositeConstruct`. The
semantics are similar so the implementation is straightforward.
This opcode being generated is somewhat rare, in this case it seems to
have remained due to the non-power of 2 vector length ABI.
Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 45f6ab064f881334affa6ff5e3b3cb056cde67cb
https://github.com/llvm/llvm-project/commit/45f6ab064f881334affa6ff5e3b3cb056cde67cb
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libsycl/src/detail/program_manager.cpp
Log Message:
-----------
[libsycl] Fix _LIBSYCL_EXPORT placement (#201364)
Fixes another instance of _LIBSYCL_EXPORT causing compiilation errors on
Windows.
Commit: 4d7ba1f5ef6402183372e2ea6358c53a9c182868
https://github.com/llvm/llvm-project/commit/4d7ba1f5ef6402183372e2ea6358c53a9c182868
Author: Drew Kersnar <dkersnar at nvidia.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/IR/Instructions.cpp
M llvm/test/Transforms/InstCombine/addrspacecast.ll
Log Message:
-----------
[IR] Preserve pointer-byte bitcasts around addrspacecast (#202454)
This fixes cast-pair elimination for addrspacecast combined with
pointer/byte bitcast.
The LLVM LangRef defines [bN byte
types](https://llvm.org/docs/LangRef.html#byte-type) as raw memory data
in SSA registers, where each bit may be an integer bit, part of a
pointer value, or poison.
The LangRef permits pointer-to-byte bitcast: the [bitcast .. to
instruction](https://llvm.org/docs/LangRef.html#bitcast-to-instruction)
says that if the source type is a pointer, the destination type must be
a pointer or a byte/vector-of-bytes type of the same size.
The same [bitcast .. to
section](https://llvm.org/docs/LangRef.html#bitcast-to-instruction) also
defines byte-to-pointer behavior: when the destination type is a pointer
type, a byte value whose bits all come from the same correctly ordered
pointer produces that pointer; otherwise it produces a pointer with the
address encoded by the input and no provenance.
By contrast, [addrspacecast ..
to](https://llvm.org/docs/LangRef.html#addrspacecast-to-instruction) is
only valid from a pointer or vector-of-pointers value to a pointer type
in a different address space.
So these two-step sequences are valid:
```
%p = addrspacecast ptr addrspace(1) %x to ptr
%b = bitcast ptr %p to b64
```
```
%p = bitcast b64 %x to ptr
%q = addrspacecast ptr %p to ptr addrspace(1)
```
But they cannot be folded into a single addrspacecast, because that
would require addrspacecast to cast directly to or from bN, which the
LangRef does not allow.
This patch prevents cast-pair elimination from performing those invalid
folds and adds InstCombine regression coverage for both directions. Both
tests crashed before this patch. This patch was created with the
assistance of AI, based on a real case I found while working on
https://github.com/llvm/llvm-project/pull/177908. I'm pretty sure I'm
reading the langref correctly, but please let me know if I am mistaken.
Commit: 26c72f1b4d375a7dc93df4435b012c221f4ae902
https://github.com/llvm/llvm-project/commit/26c72f1b4d375a7dc93df4435b012c221f4ae902
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for tensor load/store to lds (#202363)
Commit: 727ad9a21d32f19dd0fdf26b39a9c6a064692287
https://github.com/llvm/llvm-project/commit/727ad9a21d32f19dd0fdf26b39a9c6a064692287
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Add a feature for VOP3PX2 instructions incrementing VA_VDST twice (#202613)
Commit: 1723b7a301450d7000fe3a86e48adb9f9794d1e9
https://github.com/llvm/llvm-project/commit/1723b7a301450d7000fe3a86e48adb9f9794d1e9
Author: Srividya Sundaram <srividya.sundaram at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/Frontend/CompilerInvocation.cpp
R clang/test/CodeGenSYCL/filescope_asm.c
A clang/test/CodeGenSYCL/filescope_asm.cpp
M clang/test/Driver/offload-target.c
M clang/test/Driver/sycl.cpp
A clang/test/Frontend/sycl-c-input-error.cpp
M clang/test/Headers/__cpuidex_conflict.c
M clang/test/SemaSPIRV/BuiltIns/generic_cast_to_ptr_explicit.c
M clang/test/SemaSPIRV/BuiltIns/ids_and_ranges.c
M clang/test/SemaSPIRV/BuiltIns/subgroup-errors.c
M clang/unittests/Frontend/CompilerInvocationTest.cpp
Log Message:
-----------
[SYCL] Error on C inputs when compiling with -fsycl (#200318)
`SYCL` is a `C++`-based programming model and requires `C++` source
files.
Enforce this invariant in the frontend by rejecting `C` inputs when SYCL
mode is active, ensuring that `LangOpts.SYCL` implies
`LangOpts.CPlusPlus` regardless of how the compiler is invoked.
Commit: 6c706ed5896d10b2a900d5860b80851f01cfe943
https://github.com/llvm/llvm-project/commit/6c706ed5896d10b2a900d5860b80851f01cfe943
Author: xys-syx <xuyuansui at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvm/barrier.mlir
Log Message:
-----------
[MLIR][NVVM] Add explicit aligned attribute to nvvm.barrier and nvvm.barrier.reduction (#200745)
This PR according to the third PR commitments in #192203
This PR adds an explicit aligned boolean attribute to `nvvm.barrier`,
defaulting to true to preserve the existing semantic default, and
extends the op's LLVM IR lowering to pick between the `.aligned` and
non-`.aligned` spellings of the `@llvm.nvvm.barrier.cta.*` intrinsic
family.
Notes on using `BoolAttr` instead of UnitAttr: `nvvm.barrier`'s existing
lowering always emits an aligned intrinsic variant. Making aligned a
BoolAttr with default true captures that as the op's default, and the
`custom<Aligned>` described below only emits the keyword when
non-default.
(I am not able to merge branches, please help me)
Commit: 859ee9d83ef227848a98c5948f887574f5e7420c
https://github.com/llvm/llvm-project/commit/859ee9d83ef227848a98c5948f887574f5e7420c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-opt.c
M clang/test/Driver/hip-spirv-backend-phases.c
M clang/test/Driver/hip-spirv-linker-crash.c
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-flto-partitions.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc-static-lib.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hip-unbundle-preproc.hipi
M clang/test/Driver/hipspv-toolchain-rdc-separate.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/spirv-amd-toolchain.c
M clang/test/Driver/spirv-openmp-toolchain.c
Log Message:
-----------
[Clang] Set default LTO mode for AMDGCN/SPIR-V targets to full (#201457)
Summary:
Previously we had several layers of if conditions that functionally
amounted to pretending like we were in LTO-mode. The previous changes
moved the LTO settings into the toolchain so we can now override it for
our offloading toolchains. This allows us to respect the LTO mode, where
previously there was no way to override it.
The main artifact of this PR should be trimming up the massive if
statement.
Some slight by-products on the old-driver path, but this can be
recovered with `-fno-offload-lto` and the old driver should be deleted
in a few months anyways.
Commit: f8b0120edb7f19b30870462299e5f7eb0e40f656
https://github.com/llvm/llvm-project/commit/f8b0120edb7f19b30870462299e5f7eb0e40f656
Author: Rose Hudson <rose.hudson at sony.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/test/Driver/ps4-ps5-toolchain.c
Log Message:
-----------
[Clang][Driver] default-on include path backslash warning on PS5 (#202300)
It seems like there is precedent for using addClangWarningOptions in the
driver to set warning default states per-target, in e.g. AMDGPU.
These warnings are usually disabled by default to avoid overdiagnosing
common patterns on Windows host+target builds which don't care about
portability. Since PS5 builds are cross-compiled it makes less sense to
assume things about the host, so we want to diagnose portability issues
more eagerly.
Commit: 2ae3fa77da6c393c5b47ced09b6d91551d178b57
https://github.com/llvm/llvm-project/commit/2ae3fa77da6c393c5b47ced09b6d91551d178b57
Author: Nuri Amari <nuri.amari99 at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lld/MachO/Driver.cpp
M lld/docs/ReleaseNotes.rst
R lld/test/MachO/lc-linker-option-order.ll
A lld/test/MachO/lc-linker-option-postprocess.ll
A lld/test/MachO/lc-linker-option-sort.ll
Log Message:
-----------
[lld-macho] Sort LC_LINKER_OPTIONS before processing (#201604)
Previously https://reviews.llvm.org/D157716 brought handling of
LC_LINKER_OPTIONS closer to Apple linker behavior by processing the
options at the end after all object files have been added.
This corrects another difference in behavior, processing frameworks
before regular libraries (linked with -lFoo), and processing each group
in sorted order.
Processing a LC_LINKER_OPTIONS can trigger loads of more object files
which in turn may have more LC_LINKER_OPTIONS. We iterate this to a
fixed point, walking this graph in BFS order, processing each "level" of
the graph in the order described above. This graph traversal order
hasn't changed in this commit, only the sorting has.
The diff of the linker map produced for the included test before and
after:
```
23,28c23,28
< 0x000003D0 0x00000001 [ 4] _zlib
< 0x000003E0 0x00000001 [ 5] _zed_framework
< 0x000003F0 0x00000001 [ 6] _mlib
< 0x00000400 0x00000001 [ 7] _alpha_framework
< 0x00000410 0x00000001 [ 8] _alib
< 0x00000420 0x00000001 [ 9] _mid_framework
---
> 0x000003D0 0x00000001 [ 4] _alpha_framework
> 0x000003E0 0x00000001 [ 5] _mid_framework
> 0x000003F0 0x00000001 [ 6] _zed_framework
> 0x00000400 0x00000001 [ 7] _alib
> 0x00000410 0x00000001 [ 8] _mlib
> 0x00000420 0x00000001 [ 9] _zlib
```
Apple's linker produces the same order as after.
---------
Co-authored-by: Nuri Amari <nuriamari at fb.com>
Commit: cefb93799312e772f2d71529075bc4ab1b94b845
https://github.com/llvm/llvm-project/commit/cefb93799312e772f2d71529075bc4ab1b94b845
Author: Nick Sarnie <nick.sarnie at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
A llvm/test/CodeGen/SPIRV/ptrmask-logical.ll
A llvm/test/CodeGen/SPIRV/ptrmask-vec.ll
A llvm/test/CodeGen/SPIRV/ptrmask32.ll
A llvm/test/CodeGen/SPIRV/ptrmask64-32.ll
A llvm/test/CodeGen/SPIRV/ptrmask64.ll
Log Message:
-----------
[SPIRV] Add support for G_PTRMASK (#201450)
This instruction is generated by the
[llvm.ptrmask](https://llvm.org/docs/LangRef.html#llvm-ptrmask-intrinsic)
intrinsic, which is used for Clang builtins like
[__builtin_align_up](https://clang.llvm.org/docs/LanguageExtensions.html#alignment-builtins)
which is used in `libc`.
We are working on building `libc` for SPIR-V, so we hit this problem.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-Authored-By: Claude Sonnet 4.5 <noreply at anthropic.com>
---------
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
Commit: f4ecab143affd2c2c7953f58802673152fbd8c4b
https://github.com/llvm/llvm-project/commit/f4ecab143affd2c2c7953f58802673152fbd8c4b
Author: Justin Lebar <justin.lebar at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/ldexp.ll
A llvm/test/CodeGen/AArch64/powi-ldexp-promote-libcall-error.ll
Log Message:
-----------
[SelectionDAG] Promote FPOWI/FLDEXP exponents where possible, and raise an error otherwise (#200621)
PromoteIntOp_ExpOp is reached when the exponent type is illegal.
- When the exponent type was smaller than int, we'd hit an assertion. In
builds where asserts were disabled, we actually ended up doing the right
thing; makeLibCall would sign-extend the value to int.
- When the exponent type was too large, we'd also hit an assertion. In
builds were asserts were disabled, we would *not* do the right thing;
we'd end up silently truncating the value. Now we explicitly raise an
error.
Commit: 02cd239f7d3d9261af719b38f1afc18c0e9ea6f2
https://github.com/llvm/llvm-project/commit/02cd239f7d3d9261af719b38f1afc18c0e9ea6f2
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
Log Message:
-----------
AMDGPU/GlobalISel: RegBankLegalize rules for cvt f16<->fp8/bf8 (#202361)
Small types are impemented using integers in LLVMIR,
because of this there are no irtranslator failures.
Commit: a2ec5c68ba8767c5dc1266946663c8715389da66
https://github.com/llvm/llvm-project/commit/a2ec5c68ba8767c5dc1266946663c8715389da66
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/test/Semantics/OpenMP/copyprivate04.f90
M flang/test/Semantics/OpenMP/copyprivate05.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/from-clause-v51.f90
M flang/test/Semantics/OpenMP/in-reduction.f90
M flang/test/Semantics/OpenMP/lastprivate01.f90
M flang/test/Semantics/OpenMP/name-conflict.f90
M flang/test/Semantics/OpenMP/named-constants.f90
M flang/test/Semantics/OpenMP/reduction04.f90
M flang/test/Semantics/OpenMP/reduction16.f90
M flang/test/Semantics/OpenMP/task-reduction.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/to-clause-v51.f90
Log Message:
-----------
[flang][OpenMP] More detailed checks for argument list items in clauses (#201334)
For clauses that take list of variable, locator, and extended list
items, perform checks that the actual arguments meet the corresponding
requirements. This is version-based, since clause requirements have
changed over time.
Commit: d439dde4e6c0af6126ccb6c222653bfce07ad3d1
https://github.com/llvm/llvm-project/commit/d439dde4e6c0af6126ccb6c222653bfce07ad3d1
Author: Lucas Chollet <lucas.chollet at serenityos.org>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/test/CodeGen/zero-call-used-regs.c
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
M llvm/test/CodeGen/X86/zero-call-used-regs.ll
Log Message:
-----------
[clang] Add more test coverage for "zero-call-used-regs" (#201834)
In clang, the main function is treated as a special case and no
"zero-call-used-regs" attributes are emitted for it. This patch adds
proper unit testing for that functionality.
AFAIU, treating `main` as a special case was initially implemented in
the backend. However, during review [1] the logic was moved to clang
while the associated test case was never updated (and then copied over
to the AArch64 test file).
[1] https://reviews.llvm.org/D110869
More specifically this comment: https://reviews.llvm.org/D110869#3285932
---
Commenting out
https://github.com/llvm/llvm-project/blob/8e217eda17df80d2035d6ff27e74bfa8df77339a/clang/lib/CodeGen/CodeGenFunction.cpp#L1102-L1104
makes the new tests fail while the removed test still pass.
Commit: 44714f90d8e203b9227613c52e7794b58b78454e
https://github.com/llvm/llvm-project/commit/44714f90d8e203b9227613c52e7794b58b78454e
Author: jpwang <jpwang at smail.nju.edu.cn>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/powi.ll
Log Message:
-----------
[InstCombine] Fold afn powi(2.0, x) to ldexp(1.0, x) (#202114)
This PR adds a conservative InstCombine fold `powi(2.0, x) -> ldexp(1.0,
x)` with an `afn` flag.
This together with the existing fold `y * ldexp(1.0, x) -> ldexp(y, x)`
makes it possible to optimize cases like `y * __builtin_powif(2.0f, x)`
under fast-math.
The fold is intentionally limited to cases where the base is exactly 2.0
for now to make it simple.
Fixes #200654
Commit: eac7bb457352bad9d630c057b6336b7168eb9e7b
https://github.com/llvm/llvm-project/commit/eac7bb457352bad9d630c057b6336b7168eb9e7b
Author: woruyu <1214539920 at qq.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/MachineFrameInfo.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
A llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
M llvm/test/TableGen/RegisterInfoEmitter-errors.td
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[AMDGPU] Set SGPR spill stack IDs when creating spill slots (#197628)
### Summary
This PR resolves https://github.com/llvm/llvm-project/issues/195092.
Teach register classes to describe the StackID to use for their spill
slots, and use it when creating spill frame objects. This lets AMDGPU
SGPR spill slots be marked as TargetStackID::SGPRSpill at construction
time instead of patching the frame object later while emitting spill
instructions.
Also handle SGPR callee-saved spill slots created directly by
SILowerSGPRSpills, which bypass the generic PEI spill slot creation
path. Without this, late SGPR scavenging can see an SGPR spill pseudo
using a default-stack frame index and trip the SGPRSpill assertion.
Commit: 85ac9a1e00690b1a956aa1ede7fbb11a298b9a78
https://github.com/llvm/llvm-project/commit/85ac9a1e00690b1a956aa1ede7fbb11a298b9a78
Author: Artem Chikin <achikin at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
M clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[clang][deps] Add in-flight query caching to `DependencyScanningFilesystemSharedCache` (#199680)
Concurrent dep-scan workers querying the same filename or UID each issue
their own `stat` and `open` against the underlying filesystem; only the
first to finish wins the cache insert, the others' work is wasted.
Add per-key in-flight tracking to `CacheShard`. `InProgressByFilename`
and `InProgressByUID` map each active key to a
`std::shared_ptr<InProgressEntry>` carrying a `std::condition_variable`,
a `Done` predicate, and the produced entry pointer.
`acquireFilenameSlot` / `acquireUIDSlot` collapse three outcomes
(resolved hit, in-progress wait, fresh producer slot) into one critical
section against the shard lock. `fulfilFilenameSlot`,`fulfilUIDSlot`
publish the produced entry, set `Done`, erase the slot, and `notify_all`
waiters outside the lock.
`computeAndStoreResult` now claims the filename slot before `stat` and
the UID slot before `readFile`, so both stat and open redundancy
collapse.
Commit: 2bbf94d210f73d2e1fd52a4179cd89834198675d
https://github.com/llvm/llvm-project/commit/2bbf94d210f73d2e1fd52a4179cd89834198675d
Author: khaki3 <47756807+khaki3 at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/test/HLFIR/assign-bufferize.fir
M flang/test/HLFIR/associate-codegen.fir
M flang/test/HLFIR/bufferize01.fir
M flang/test/HLFIR/extents-of-shape-of.f90
M flang/test/HLFIR/mul_transpose.f90
M flang/test/HLFIR/shapeof-lowering.fir
Log Message:
-----------
[flang][hlfir] Reset lower bounds to one when bufferizing hlfir.as_expr move (#202406)
Example:
```fortran
module m
type t
integer, allocatable :: a(:)
end type
contains
function pf()
integer, allocatable :: pf(:)
allocate(pf(-5:-3)); pf = [1,2,3]
end function
end module
program p
use m
type(t) :: z
z = t(pf())
print *, lbound(z%a,1) ! must be 1
end program
```
In this code, the allocatable function result `pf()` is used in the
structure constructor `t(...)`. As an expression its lower bound is 1,
but lowering wraps the result descriptor in `hlfir.as_expr ... move`,
and bufferization forwarded that descriptor as-is — so its lower bound
`-5` leaked into the reallocated component, printing `-5`.
Fix: when bufferizing `hlfir.as_expr` with `move`, rebox a descriptor
that may carry non-default lower bounds back to lower bound 1
(descriptor only, no data copy).
Commit: 1732c650bff1a34aff3b001d4670b2eb1ab02798
https://github.com/llvm/llvm-project/commit/1732c650bff1a34aff3b001d4670b2eb1ab02798
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
Log Message:
-----------
[llvm-objdump] Remove path from test output (#201940)
Commit: 790f0623411d5d9d5c989f14e87f2fe86f52eaf3
https://github.com/llvm/llvm-project/commit/790f0623411d5d9d5c989f14e87f2fe86f52eaf3
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.h
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/test/Analysis/CostModel/ARM/memcpy.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/X86/pr57673.ll
Log Message:
-----------
[SelectionDAG] Pass dest and src alignments separately to memcpy and memmove lowering functions (#201119)
Implements FIXMEs around memcpy and memmove lowering code about passing
destination and source alignments to lowering functions.
Fixes ARM cost model's cost estimation for an inlined `memcpy`. The test
shows the generated code as two instructions so the cost should've been 2,
but it was estimated as a libcall which costs 4.
In the backend functions that don't care about destination and source
alignments, the old alignment calculation `std::min(dstAlign, srcAlign)`
used as the alignment. This gives us the old lowering behavior on those
backends.
Commit: 2d4afb8f9d12901cc472e14f9c2c8146226f5aa4
https://github.com/llvm/llvm-project/commit/2d4afb8f9d12901cc472e14f9c2c8146226f5aa4
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
A llvm/test/CodeGen/AMDGPU/si-fold-operands-bundle.mir
Log Message:
-----------
[AMDGPU] SIFoldOperands: update BUNDLE header implicit use when folding (#201872)
When folding an operand inside a BUNDLE, also rewrite the matching
implicit use on the bundle header. LiveVariables iterates a
MachineBasicBlock with the bundle-aware iterator and only inspects the
header, so without this update its kill flags go stale and a later
MachineVerifier run reports "Using a killed virtual register".
Co-Authored-By: Claude Opus 4 <noreply at anthropic.com>
Co-authored-by: Claude Opus 4 <noreply at anthropic.com>
Commit: 743283c295ccc6411296a9a2a757ae4e3b3aa1e0
https://github.com/llvm/llvm-project/commit/743283c295ccc6411296a9a2a757ae4e3b3aa1e0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
Log Message:
-----------
[lldb][Windows] enable skipped tests (#202689)
Commit: 86f543d6e809fc8de6772aa29fca98e4276bd5c8
https://github.com/llvm/llvm-project/commit/86f543d6e809fc8de6772aa29fca98e4276bd5c8
Author: Donát Nagy <donat.nagy at ericsson.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
Log Message:
-----------
[NFC][analyzer] Refactor VisitReturnStmt (#202675)
Simplify an old-style for loop that used explicit iterator manipulation,
and clarify the manipulation of the exploded nodes by removing the
`NodeBuilder`.
This is part of my commit series that gradually removes the class
`NodeBuilder`.
Commit: e0d0d3db9dd47ab9649ebb356ce404b55a2e4a77
https://github.com/llvm/llvm-project/commit/e0d0d3db9dd47ab9649ebb356ce404b55a2e4a77
Author: Chenguang Wang <w3cing at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/test/TableGen/ConcatenatedSubregs.td
M llvm/test/TableGen/RegisterClassCopyCost.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[llvm][MC] Store RegSize using uint32_t instead of uint16_t. (#201886)
`uint32_t` is needed for working with registers with size >= 65535,
which is the case for a private ISA that I am currently working on. The
performance impact is negligible. See discussions in [LLVM
Discourse](https://discourse.llvm.org/t/rfc-support-reg-sizes-greater-than-65534/90970/2).
Commit: 5adc7ddc15cdb39d0f2f8e1daa8ca21aaa374d3a
https://github.com/llvm/llvm-project/commit/5adc7ddc15cdb39d0f2f8e1daa8ca21aaa374d3a
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_ftn_entry.h
A openmp/runtime/test/api/omp_nteams_api_restriction.c
Log Message:
-----------
[OpenMP] Ignore teams ICV setters in restricted contexts (#194428)
This patch prevents `omp_set_num_teams()` and
`omp_set_teams_thread_limit()` from updating teams-related ICVs when
called from restricted runtime contexts.
The non-implicit parallel-region case follows the OpenMP 5.1
restriction. The active `teams`-region case is handled defensively
because these ICVs are device-scoped and updating them during an active
`teams` region can affect later teams execution.
The calls now warn and return without updating the ICVs.
Fixes #194426.
Commit: f31853255c300e07b93783425e40948cc0dfdb0f
https://github.com/llvm/llvm-project/commit/f31853255c300e07b93783425e40948cc0dfdb0f
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/test/API/commands/platform/connect/TestPlatformConnect.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/breakpoint/delayed_breakpoints/TestDelayedBreakpoint.py
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
Log Message:
-----------
[lldb][Windows] extend @skipIfWindows to lldb-server or in process (#202688)
Some tests fail when using `lldb-server.exe` and pass when using the in
process plugin and vice-versa.
This patch adds the `skipIfWindowsAndNoLLDBServer` and
`expectedFailureWindowsAndNoLLDBServer` decorators (and their opposites)
to only skip tests if they run on `lldb-server` or the in process
plugin.
This fixes 4 XPASS when running tests with `USE_LLDB_SERVER=1`.
rdar://179117754
Commit: b2ee616a926eb2936b892431c7f8a574104e34b9
https://github.com/llvm/llvm-project/commit/b2ee616a926eb2936b892431c7f8a574104e34b9
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Lex/Lexer.cpp
A clang/test/CXX/lex/lex.header/p2.cpp
Log Message:
-----------
[clang][Lex] Don't parsing header name as a string literal (#201763)
Fixes https://github.com/llvm/llvm-project/issues/132643.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: a147be81a246188ad954ecd2fd1ee93684f49c95
https://github.com/llvm/llvm-project/commit/a147be81a246188ad954ecd2fd1ee93684f49c95
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/unittests/Expression/DWARFExpressionTest.cpp
Log Message:
-----------
[lldb] Add missing period in DWARFExpressionTest (NFC) (#202706)
Commit: 48a4b66451149e0c456a5479c695d894d368de2d
https://github.com/llvm/llvm-project/commit/48a4b66451149e0c456a5479c695d894d368de2d
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-06-10 (Wed, 10 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprClassification.cpp
A clang/test/AST/dependent-assignment-classification.cpp
Log Message:
-----------
[clang] Classify binary op value kinds use ClassifyExprValueKind when it's type-dependent (#202696)
The crash is from an internal inconsistency in Clang’s expression
classification.
Expr::ClassifyImpl computes a classification like CL_LValue or
CL_PRValue, then asserts that this agrees with the AST node’s own value
category:
- clang/lib/AST/ExprClassification.cpp:37
- CL_LValue must satisfy E->isLValue()
- CL_PRValue must satisfy E->isPRValue()
Fixes https://github.com/llvm/llvm-project/issues/202693.
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: c0e8b29f009bf504b9aafe1f39a539a4f68ca60c
https://github.com/llvm/llvm-project/commit/c0e8b29f009bf504b9aafe1f39a539a4f68ca60c
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
Log Message:
-----------
[CIR][NFC] Align emitLValue with classic codegen (#202448)
This reorganizes the `CIRGenFunction::emitLValue` function to align it
with `CodeGenFunction::EmitLValueHelper` in classic codegen. Previously,
the default handler for the switch statement reported an NYI diagnostic
for any l-value class that wasn't handled in the function. This change
adds case handlers for every class that is handled by classic codegen,
giving each their own NYI diagnostic.
The purpose of this is to more explicitly show what is missing and to
make it easier to port the classic codegen implementation to CIR.
The existing CIR handling is not changed, just the order.
Commit: f4ee842902bf1fb29a956b6a36b17c547407cdbf
https://github.com/llvm/llvm-project/commit/f4ee842902bf1fb29a956b6a36b17c547407cdbf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
Log Message:
-----------
compiler-rt: Suppress -g error for gpu builds (#202230)
Commit: de42f4f2130183111d4d62865177190d6e642ade
https://github.com/llvm/llvm-project/commit/de42f4f2130183111d4d62865177190d6e642ade
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-tasks.yml
M llvm/utils/release/build-docs.sh
Log Message:
-----------
[docs] Release man pages (#201376)
This adds the possibility to generate man pages from the `llvm/utils/release/build-docs.sh` script. Furthermore the `release-documentation` github workflow was modified to build and upload the man pages.
This was done to prevent dependency problems when myst-parser will become a hard dependency to build the documentation in LLVM. See https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840/26?u=kwk
Additionally the `build-docs.sh` script now determines the release from the source directory if no release was given. Otherwise the generated tarballs would be missing the release entirely. To make it clear that something was generated from any git directory, a short git revision will be attached to the release (e.g. `23.0.0-gc823de88d51f58`).
The script generates a total of 67 man pages for the 22.1.7 release (see below).
`lld` has their own man page hardcoded in [`lld/docs/ld.lld.1`](https://github.com/llvm/llvm-project/blob/main/lld/docs/ld.lld.1). It gets packaged manually because of a missing cmake target. To get all projects install their man pages in the same directory to package up, we have to run the install targets rather than just the build targets (e.g. `install-docs-clang-man` instead of just `docs-clang-man`).
Here's what's in the tarball for the `22.1.7` release when you run the script from this change:
```console
$ rm -rf llvm_man_pages-* docs-build llvm-project
$ ./llvm/utils/release/build-docs.sh -no-sphinx -no-doxygen -release 22.1.7
```
```console
$ tar -tf llvm_man_pages-22.1.7.tar.xz
llvm_man_pages-22.1.7/
llvm_man_pages-22.1.7/polly.1
llvm_man_pages-22.1.7/lldb.1
llvm_man_pages-22.1.7/lldb-server.1
llvm_man_pages-22.1.7/extraclangtools.1
llvm_man_pages-22.1.7/flang.1
llvm_man_pages-22.1.7/clang.1
llvm_man_pages-22.1.7/diagtool.1
llvm_man_pages-22.1.7/FileCheck.1
llvm_man_pages-22.1.7/bugpoint.1
llvm_man_pages-22.1.7/clang-tblgen.1
llvm_man_pages-22.1.7/dsymutil.1
llvm_man_pages-22.1.7/lit.1
llvm_man_pages-22.1.7/llc.1
llvm_man_pages-22.1.7/lldb-tblgen.1
llvm_man_pages-22.1.7/lli.1
llvm_man_pages-22.1.7/llvm-addr2line.1
llvm_man_pages-22.1.7/llvm-ar.1
llvm_man_pages-22.1.7/llvm-as.1
llvm_man_pages-22.1.7/llvm-bcanalyzer.1
llvm_man_pages-22.1.7/llvm-cgdata.1
llvm_man_pages-22.1.7/llvm-config.1
llvm_man_pages-22.1.7/llvm-cov.1
llvm_man_pages-22.1.7/llvm-cxxfilt.1
llvm_man_pages-22.1.7/llvm-cxxmap.1
llvm_man_pages-22.1.7/llvm-debuginfo-analyzer.1
llvm_man_pages-22.1.7/llvm-diff.1
llvm_man_pages-22.1.7/llvm-dis.1
llvm_man_pages-22.1.7/llvm-dwarfdump.1
llvm_man_pages-22.1.7/llvm-dwarfutil.1
llvm_man_pages-22.1.7/llvm-exegesis.1
llvm_man_pages-22.1.7/llvm-extract.1
llvm_man_pages-22.1.7/llvm-ifs.1
llvm_man_pages-22.1.7/llvm-install-name-tool.1
llvm_man_pages-22.1.7/llvm-ir2vec.1
llvm_man_pages-22.1.7/llvm-lib.1
llvm_man_pages-22.1.7/llvm-libtool-darwin.1
llvm_man_pages-22.1.7/llvm-link.1
llvm_man_pages-22.1.7/llvm-lipo.1
llvm_man_pages-22.1.7/llvm-locstats.1
llvm_man_pages-22.1.7/llvm-mc.1
llvm_man_pages-22.1.7/llvm-mca.1
llvm_man_pages-22.1.7/llvm-nm.1
llvm_man_pages-22.1.7/llvm-objcopy.1
llvm_man_pages-22.1.7/llvm-objdump.1
llvm_man_pages-22.1.7/llvm-offload-binary.1
llvm_man_pages-22.1.7/llvm-opt-report.1
llvm_man_pages-22.1.7/llvm-otool.1
llvm_man_pages-22.1.7/llvm-pdbutil.1
llvm_man_pages-22.1.7/llvm-profdata.1
llvm_man_pages-22.1.7/llvm-profgen.1
llvm_man_pages-22.1.7/llvm-ranlib.1
llvm_man_pages-22.1.7/llvm-readelf.1
llvm_man_pages-22.1.7/llvm-readobj.1
llvm_man_pages-22.1.7/llvm-reduce.1
llvm_man_pages-22.1.7/llvm-remarkutil.1
llvm_man_pages-22.1.7/llvm-size.1
llvm_man_pages-22.1.7/llvm-stress.1
llvm_man_pages-22.1.7/llvm-strings.1
llvm_man_pages-22.1.7/llvm-strip.1
llvm_man_pages-22.1.7/llvm-symbolizer.1
llvm_man_pages-22.1.7/llvm-tblgen.1
llvm_man_pages-22.1.7/llvm-test-mustache-spec.1
llvm_man_pages-22.1.7/llvm-tli-checker.1
llvm_man_pages-22.1.7/mlir-tblgen.1
llvm_man_pages-22.1.7/opt.1
llvm_man_pages-22.1.7/tblgen.1
llvm_man_pages-22.1.7/ld.lld.1
```
Commit: 5f864f90fd20209ce63c3a1280ac2e8fdc44a3c3
https://github.com/llvm/llvm-project/commit/5f864f90fd20209ce63c3a1280ac2e8fdc44a3c3
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.h
Log Message:
-----------
[NFC][llvm-exegesis] Disable CFI-icall for JIT-executed function (#202472) (#202682)
Reland of #202472 reverted with #202571.
Here we are going to use LLVM_NO_SANITIZE.
Commit: 26c550852a90c0eb1732ce3fd48bdf25124eaa4b
https://github.com/llvm/llvm-project/commit/26c550852a90c0eb1732ce3fd48bdf25124eaa4b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-non-scheduled-node.ll
Log Message:
-----------
[SLP] Recompute copyable operand deps of bundled members in scheduleBlock
An instruction modeled as a copyable element in one node may be used directly
by another node registered only after its deps were last computed. The
deferred recomputation is consumed before that node joins the tree, so the
direct def-use edge is missed and the count stays too low, tripping the
unscheduled-deps assertion. Clear and recompute such bundled members against
the full tree in scheduleBlock.
Fixes #202463
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/202712
Commit: 95bd483fbb6c7b94dd8fa9d8577d633aa02da6b8
https://github.com/llvm/llvm-project/commit/95bd483fbb6c7b94dd8fa9d8577d633aa02da6b8
Author: gulfemsavrun <gulfem at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/lib/asan/CMakeLists.txt
Log Message:
-----------
[asan] Make exceptions for asan_new_delete.cpp conditional (#202436)
Introduce the COMPILER_RT_ASAN_ENABLE_EXCEPTIONS CMake
option to control whether the ASan C++ runtime
(asan_new_delete.cpp) is compiled with exception
support.
This fixes build failures on platforms with noexcept
toolchains (like Fuchsia's noexcept variant) where
ASan was compiled with exceptions but linked against a
noexcept libc++abi, resulting in undefined symbol
errors for __cxa_begin_catch and __gxx_personality_v0.
The option defaults to ON to preserve the behavior of
#200719, but automatically defaults to OFF if
LIBCXX_ENABLE_EXCEPTIONS or LIBCXXABI_ENABLE_EXCEPTIONS
is set to OFF in the same runtimes build.
Commit: b7cdfe410b1eda88d732709217830fb7bd432432
https://github.com/llvm/llvm-project/commit/b7cdfe410b1eda88d732709217830fb7bd432432
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
R .github/workflows/issue-subscriber.yml
R .github/workflows/pr-subscriber.yml
A .github/workflows/subscriber.yml
Log Message:
-----------
workflows: Consolidate pr-subscriber and issue-subscriber (#200503)
This consolidates duplicate logic from the pr-subscriber and
issue-subscriber workflows into a single workflow.
Commit: 93c95d3d18f3aa35648daff21544794f90fe9cec
https://github.com/llvm/llvm-project/commit/93c95d3d18f3aa35648daff21544794f90fe9cec
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[HIP] Fix `-flto` overriding `--no-lto` not that it is default (#202699)
Summary:
The previous changes to LTO made the flto flag passed by default which
overrode the hack we did to ervert to the old non-LTO pipline. This is a
temporary hack so I'm hacking it even further to fix it.
Commit: 93bc18ff2d13e3246a7629ca17bb8352d2c51d89
https://github.com/llvm/llvm-project/commit/93bc18ff2d13e3246a7629ca17bb8352d2c51d89
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lld/MachO/ConcatOutputSection.cpp
M lld/MachO/ConcatOutputSection.h
A lld/test/MachO/arm64-thunk-stubs-multi-text.s
A lld/test/MachO/arm64-thunk-stubs.s
M lld/test/MachO/arm64-thunks.s
Log Message:
-----------
[lld][macho] Fix thunks with multiple text sections (#199747)
When there are multiple `__text` sections, LLD might not generate thunks
to stubs sections when they are required, leading to relocation errors.
```
ld64.lld: error: a.o:(symbol _foo+0x0): relocation BRANCH26 is out of range: 134217744 is not in [-134217728, 134217727]; references _extern_sym
```
Create `TextOutputSection::estimateStubsEndVA()` to correctly estimate
the end VA of the last stubs section so we can tell when branches to
stub symbols will be in range.
Technically this could cause lld to generate more thunks in some cases.
If a binary requires thunks (the `__TEXT` segment is >128MiB) and has
multiple `__text` sections like `__text_cold` or `__lcxx_override`, then
all branches to stub symbols will require thunks. Without this change we
could get the relocation errors above. We might be able to workaround
the problem by placing the `__text` section last.
Fixes https://github.com/llvm/llvm-project/issues/195387.
Commit: 5f689cd94ab1ba030eb9a9fc607b941acba87e93
https://github.com/llvm/llvm-project/commit/5f689cd94ab1ba030eb9a9fc607b941acba87e93
Author: jimingham <jingham at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.h
Log Message:
-----------
Remove support for the obsolete "_fixup" and "_fixedup" modes of objc_msgSend (#202449)
This was one of a long series of tricks for accelerating ObjC dispatch,
but this one hasn't been used for many years now, and the ObjC
maintainers have no intention of reviving this notion.
Commit: 14b2935dba9eab5a52aa2a8c806e29102fbafcf6
https://github.com/llvm/llvm-project/commit/14b2935dba9eab5a52aa2a8c806e29102fbafcf6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
Log Message:
-----------
compiler-rt: Consolidate regex checks for amdgpu targets (#202281)
Commit: 146abed5cd072a27c4240c7cf53b764571e62462
https://github.com/llvm/llvm-project/commit/146abed5cd072a27c4240c7cf53b764571e62462
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
Log Message:
-----------
[AArch64][NFC] Avoid relocations in LdStNInstrDesc (#202025)
These are small strings, so instead of an 8 byte string pointer that
needs a relocation store the strings directly inline. This avoids 320
relocations in libLLVM.so.
Commit: 5fd8036c0cd6eeab4cbc1dea1ca8569c082e874c
https://github.com/llvm/llvm-project/commit/5fd8036c0cd6eeab4cbc1dea1ca8569c082e874c
Author: fineg74 <61437305+fineg74 at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
A llvm/test/CodeGen/SPIRV/transcoding/store-atomic-ptr.ll
Log Message:
-----------
[SPIRV] Let atomic store store pointers (#201251)
SPIRV atomic store permits only integer or floats as per SPIRV spec.
When compiling libc there several places in the code where pointers are
atomically stored causing compilation to break. It can be fixed by using
casting in the libc code but in order to keep the libc code clean it is
preferrable to do it in SPIRV backend. This change will cast pointer
parameters to integers of appropriate size and generate atomic store
instruction that uses integers per SPIRV spec.
Commit: 473fc95e5e297663a18d8399cce7c6f2a3cb6135
https://github.com/llvm/llvm-project/commit/473fc95e5e297663a18d8399cce7c6f2a3cb6135
Author: Zeyi Xu <mitchell.xu2 at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/Inputs/lifetime-analysis.h
M clang/test/Sema/warn-lifetime-safety.cpp
Log Message:
-----------
[LifetimeSafety] Diagnose UAF for aligned and nothrow new expressions (#202286)
Previously LifetimeSafety skips issuing a heap allocation loan for
replaceable global allocation functions such as aligned and nothrow
operator new. This commit fixes that by modeling those forms as heap
allocations.
Closes https://github.com/llvm/llvm-project/issues/196208
Commit: 655462209f3444ecaf526de6e1df2a84d5e54e4b
https://github.com/llvm/llvm-project/commit/655462209f3444ecaf526de6e1df2a84d5e54e4b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-opt.c
M clang/test/Driver/hip-spirv-backend-phases.c
M clang/test/Driver/hip-spirv-linker-crash.c
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-flto-partitions.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc-static-lib.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hip-unbundle-preproc.hipi
M clang/test/Driver/hipspv-toolchain-rdc-separate.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/spirv-amd-toolchain.c
M clang/test/Driver/spirv-openmp-toolchain.c
Log Message:
-----------
Revert "[Clang] Set default LTO mode for AMDGCN/SPIR-V targets to full" (#202714)
Reverts llvm/llvm-project#201457
Caused flang lit test failures, e.g.
https://lab.llvm.org/buildbot/#/builders/80/builds/22848
Commit: 9c3de270df396a85b01d9aa5dd6729a27f841f2b
https://github.com/llvm/llvm-project/commit/9c3de270df396a85b01d9aa5dd6729a27f841f2b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/allocate03.f90
M flang/test/Semantics/OpenMP/allocators02.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/detach01.f90
M flang/test/Semantics/OpenMP/firstprivate02.f90
M flang/test/Semantics/OpenMP/lastprivate03.f90
M flang/test/Semantics/OpenMP/linear-clause-array-section.f90
M flang/test/Semantics/OpenMP/parallel-private01.f90
M flang/test/Semantics/OpenMP/parallel-private02.f90
M flang/test/Semantics/OpenMP/parallel-private03.f90
M flang/test/Semantics/OpenMP/parallel-private04.f90
M flang/test/Semantics/OpenMP/parallel-sections01.f90
M flang/test/Semantics/OpenMP/parallel-shared01.f90
M flang/test/Semantics/OpenMP/parallel-shared02.f90
M flang/test/Semantics/OpenMP/parallel-shared03.f90
M flang/test/Semantics/OpenMP/parallel-shared04.f90
M flang/test/Semantics/OpenMP/resolve01.f90
M flang/test/Semantics/OpenMP/threadprivate01.f90
Log Message:
-----------
[flang][OpenMP] Move check for substring to semantic checks (#201384)
Move it to CheckVarIsNotPartOfAnotherVar, which is also refactored a
bit.
Commit: 13a95bf84c1a2378b97a03493da2b37f3a71fb7c
https://github.com/llvm/llvm-project/commit/13a95bf84c1a2378b97a03493da2b37f3a71fb7c
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/utils/gn/secondary/bolt/unittests/Profile/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Windows/Common/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Frontend/Offloading/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
Log Message:
-----------
[gn build] Port commits (#202730)
1ef2f3b98b13
2426b855f303
2bd098b819c1
69215c5e4f03
88bd366041fd
a08dce6881f6
fc9bf89cfd9a
Commit: 7e526f7bc4ace92236d7d07cb5771031347f2ce4
https://github.com/llvm/llvm-project/commit/7e526f7bc4ace92236d7d07cb5771031347f2ce4
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d.mlir
A mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d_inbounds.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_affine_apply.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
Log Message:
-----------
[mlir][affine] emit `in_bounds` on `transfer_read`/`write` when statically provable in `affine-super-vectorize` (#201180)
This patch fixes an issue reported on the MLIR Discourse ([May
2026](https://discourse.llvm.org/t/mlir-affine-affine-super-vectorize-does-not-set-in-bounds-on-transfer-ops-for-statically-divisible-shapes/90785/3)),
that I also came across during a study I reported in [my blog
post](https://federicobruzzone.github.io/posts/mlir-study.html).
`affine-super-vectorize` always creates `vector.transfer_read` and
`vector.transfer_write` without an `in_bounds` attribute, even when it
is statically provable that every access stays within bounds. This
forces downstream lowering to unconditionally emit
`llvm.intr.masked.load`/`llvm.intr.masked.store`: masked intrinsics that
carry $\sim3\times$ overhead on AArch64/NEON and prevent
auto-vectorization (see the MLIR Discourse).
## Root cause
`vectorizeAffineLoad` and `vectorizeAffineStore` in `SuperVectorize.cpp`
forwarded neither the `in_bounds` mask nor any analysis of it when
constructing the transfer ops. The fix computes the mask at
vectorization time by inspecting the permutation map and the memref type
via a new `computeInBoundsMask` helper:
- `AffineDimExpr`: the vector dimension maps to a concrete memref
dimension. If that dimension is static and divisible by the vector
width, the accesses are guaranteed in-bounds.
- `AffineConstantExpr`: a broadcast (the dimension is collapsed to a
constant index). A broadcast can never be out-of-bounds.
- Everything else (e.g., AffineAddExpr on dynamic dimensions):
conservatively left false.
<details>
<summary>Reproduction</summary>
Run the lowering pipeline on any static-size affine copy loop:
```mlir
// file: copy.mlir
func.func @copy(%A: memref<512x512xf32>, %B: memref<512x512xf32>) {
affine.for %i = 0 to 512 {
affine.for %j = 0 to 512 {
%v = affine.load %A[%i, %j] : memref<512x512xf32>
affine.store %v, %B[%i, %j] : memref<512x512xf32>
}
}
return
}
```
```
mlir-opt copy.mlir \
--affine-super-vectorize="virtual-vector-size=4" \
--convert-vector-to-llvm \
--finalize-memref-to-llvm \
--convert-func-to-llvm
```
Before this patch: masked intrinsics despite fully static, divisible
dimensions:
```
%31 = llvm.intr.masked.load %30, %25, %16 {alignment = 4 : i32} : (!llvm.ptr, vector<4xi1>, vector<4xf32>) -> vector<4xf32>
llvm.intr.masked.store %31, %43, %38 {alignment = 4 : i32} : vector<4xf32>, vector<4xi1> into !llvm.ptr
```
After this patch: plain vector load/store:
```
%23 = llvm.load %22 {alignment = 4 : i64} : !llvm.ptr -> vector<4xf32>
llvm.store %23, %28 {alignment = 4 : i64} : vector<4xf32>, !llvm.ptr
```
</details>
AI Disclaimer: I used AI for the tests.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Co-authored-by: Artem Gindinson <gindinson at roofline.ai>
Commit: 2aaaff72e65f8a8e67515ca51768ef65f222d524
https://github.com/llvm/llvm-project/commit/2aaaff72e65f8a8e67515ca51768ef65f222d524
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
M flang/test/Semantics/OpenMP/reduction-assumed.f90
Log Message:
-----------
[flang][OpenMP] Move assumed-size array check to list item verification (#201385)
The presence of whole assumed-size arrays will now be diagnosed in a
single location, together with the verification of list item kinds.
Commit: 3c0e69e655a28a0061404b5f296a07abf037e5be
https://github.com/llvm/llvm-project/commit/3c0e69e655a28a0061404b5f296a07abf037e5be
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
Log Message:
-----------
[compiler-rt] Fix undefined AMDGPU variable not set for builtins (#202733)
Summary:
compiler-rt is weird and has multiple config files, make sure this is
set for both libs and builtins.
Commit: 2b9a8e2d76e1d99f95a13f70dc619dc679187432
https://github.com/llvm/llvm-project/commit/2b9a8e2d76e1d99f95a13f70dc619dc679187432
Author: Ziqing Luo <ziqing_luo at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
Log Message:
-----------
[SSAF] Increase Expr kind coverage in EntityPointerLevelTranslator (#197568)
- Add support for more kinds of Expr that can be translated to
EntityPointerLevel(s).
- Additionally, fix bugs in PointerFlowExtractor discovered by tests
added for the new Expr kinds.
Commit: 6e7c4fd79d769bf860045af798a1ee7eefc88305
https://github.com/llvm/llvm-project/commit/6e7c4fd79d769bf860045af798a1ee7eefc88305
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/CMakeLists.txt
Log Message:
-----------
[lldb][cmake] Fix lldb_python_target_dir in unusual build configurations (#202492)
The lldb binary, when running regression tests, will search for Python
bindings relative to itself. Normally,
`${CMAKE_BINARY_DIR}/${CMAKE_CFG_INTDIR}` is consistent with that path,
but both Arm and Qualcomm build toolchains using a configuration where
that doesn't work.
Fix the configuration to use LLVM_RUNTIME_OUTPUT_INTDIR as the source of
truth for where lldb will be installed. This is the variable used to
determine where the lldb binary is located in the build directory, so it
will always be consistent.
Commit: 7d1cc51305618bfe2d63603d9cec3a4a4c147a10
https://github.com/llvm/llvm-project/commit/7d1cc51305618bfe2d63603d9cec3a4a4c147a10
Author: cmtice <cmtice at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
Log Message:
-----------
[LLDB] Fix race/collision in TestGlobalModuleCache.py (#202731)
https://github.com/llvm/llvm-project/pull/201561 sped up the test so
much that, on very fast machines, there is now a collision. The two
different a.out files get created with the exact same timestmp, which
confuses the module caching and can result in odd test failures:
make: Leaving directory
'/build/work/8a9b9199309f6c504f12c8bdaef77b319248/google3/tmp/lldb-test-build.noindex/python_api/global_module_cache/TestGlobalModuleCache.test_TwoTargetsOneDebugger_dwarf'
Unable to load lldb extension module. Possible reasons for this include:
1) LLDB was built with LLDB_ENABLE_PYTHON=0
2) PYTHONPATH and PYTHONHOME are not set correctly. PYTHONHOME should
refer to
the version of Python that LLDB built and linked against, and PYTHONPATH
should contain the Lib directory for the same python distro, as well as
the
location of LLDB's site-packages folder.
3) A different version of Python than that which was built against is
exported in
the system's PATH environment variable, causing conflicts.
4) The executable
'/build/work/8a9b9199309f6c504f12c8bdaef77b319248/google3/runfiles/google3/third_party/llvm/llvm-project/lldb/lldb'
could not be found. Please check
that it exists and is executable.
This PR fixes that by future-dating the second a.out file.
AI-assisted by Gemini.
Commit: 219c085c45b8e0bb4f2ea0e1131646e7916b9936
https://github.com/llvm/llvm-project/commit/219c085c45b8e0bb4f2ea0e1131646e7916b9936
Author: albertbolt1 <albertboltinfinity at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/lib/AST/MicrosoftMangle.cpp
A clang/test/CodeGenCXX/aarch64-mangle-sme-attrs-ms.cpp
Log Message:
-----------
[arm64] Added Microsoft mangling code for sme attributes (#199567)
Fixes #178804 .
Commit: 8dac043eb036250cfc2010c44c75b54d08d2d5ef
https://github.com/llvm/llvm-project/commit/8dac043eb036250cfc2010c44c75b54d08d2d5ef
Author: John Otken <john at otken.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/unittests/Runtime/InputExtensions.cpp
M flang/docs/Extensions.md
Log Message:
-----------
[flang-rt] Add support for logical binary input edit descriptor (#193490)
Add binary 'B' input edit descriptor support for logical values to flang
runtime EditLogicalInput(). The logical binary 'B' edit descriptor is
already supported in EditLogicalOutput().
Co-authored-by: John Otken john.otken at hpe.com
Commit: df75b5d458b9faef2007485e8348d83b32798a5c
https://github.com/llvm/llvm-project/commit/df75b5d458b9faef2007485e8348d83b32798a5c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/CodeGen/epilog-unwind.c
A clang/test/CodeGen/winx64-eh-unwind-egpr.c
M clang/test/Driver/cl-options.c
A clang/test/Driver/winx64-eh-unwind.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/lib/IR/Module.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
A llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
A llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-required.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-funclet-prolog.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-push2pop2.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-split.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-epilog-ops.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-prolog-ops.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv3.ll
M llvm/test/DebugInfo/COFF/apx-egpr.ll
M llvm/test/MC/AsmParser/seh-directive-errors.s
A llvm/test/MC/COFF/seh-unwindv3-error.s
A llvm/test/MC/COFF/seh-unwindv3-inheritance.s
A llvm/test/MC/COFF/seh-unwindv3-large.s
A llvm/test/MC/COFF/seh-unwindv3-nonmirror.s
A llvm/test/MC/COFF/seh-unwindv3-pool-sharing.s
A llvm/test/MC/COFF/seh-unwindv3.s
M llvm/unittests/MC/CMakeLists.txt
A llvm/unittests/MC/WODRoundTripTest.cpp
Log Message:
-----------
[win][x64] Add support for Windows x64 unwind v3 (#200249)
The extended registers in Intel APX cannot be described in the current
Windows x64 unwind information, this has made it neccesary to introduce
a new version. While designing this new version, improvements have been
made from the lessons learnt from the existing unwind information
formats (both x64 and AArch64).
Documentation for unwind v3 is available at:
<https://learn.microsoft.com/en-us/cpp/build/x64-unwind-information-v3>
This change:
* Implements encoding unwind v3 information in MC. This includes support
for non-mirror epilogs, WOD pool sharing and using large infos if
required.
* Add support for encoding push2/pop2 SEH info: a new `SEH_Push2Regs`
pseudo-instruction and `.seh_push2regs` assembly directive.
* Changes the prolog/epilog codegen to support unwind v3. Specifically,
adding pseudos into the epilog (as non-mirror epilogs are permitted) and
placing the pseudos in the prolog before the instruction instead of
after (as v3 measures its offsets from the start rather than the end of
an instruction).
* Add an unwind v3 pass to chain unwind info if there are too many
epilogs in a function and raise a fatal error if there are too many
instructions in a prolog or epilog.
* Changes the module flag and code gen enums to allow selecting
"Default" vs "v1" vs "v2 best effort" vs "v2 required" vs "v3" unwind
info version.
* Adds new Clang and cc1 flags for selecting the unwind info version and
deprecates the old v2 flag. The default unwind info version stays as v1
UNLESS the EGPR target feature is enabled (then it will use v3). Trying
to enable EGPR when v1/v2 is explicitly enabled will result in an error.
Windows 11 [build
29576](https://learn.microsoft.com/en-us/windows-insider/release-notes/experimental-future-platforms/preview-build-29576-1000)
and above support unwind v3 in user-mode, but do not yet support large
info.
Commit: e95d6365af4a04f70f7f76743b58197a163a6d52
https://github.com/llvm/llvm-project/commit/e95d6365af4a04f70f7f76743b58197a163a6d52
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
A llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll
Log Message:
-----------
[LoopInterchange] Add test for legality check missing latch condition (NFC) (#202725)
Add a test case reported in #202220. This is a case where the condition
of the inner loop's latch branch is complex, in particular, it's not a
`cmp` instruction, and thus the legality check fails to properly detect
an unsupported case.
Commit: 870c33765b7da53d7234fd1d93eda20d1775d971
https://github.com/llvm/llvm-project/commit/870c33765b7da53d7234fd1d93eda20d1775d971
Author: Miguel A. Arroyo <miguel.arroyo at rockstargames.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CommandLine.cpp
Log Message:
-----------
[llvm][cmake] Print Integrated CRT Alloc (#201741)
* As with other similar toggle-able features, the `--version` reports if
a custom allocator is used (e.g. `+alloc:<name>`).
Commit: 89b969eadbaf49a2de6b7722f248f67a42944d10
https://github.com/llvm/llvm-project/commit/89b969eadbaf49a2de6b7722f248f67a42944d10
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Driver/ToolChain.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-opt.c
M clang/test/Driver/hip-spirv-backend-phases.c
M clang/test/Driver/hip-spirv-linker-crash.c
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-flto-partitions.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc-static-lib.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hip-unbundle-preproc.hipi
M clang/test/Driver/hipspv-toolchain-rdc-separate.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/spirv-amd-toolchain.c
M clang/test/Driver/spirv-openmp-toolchain.c
M flang/test/Driver/omp-driver-offload.f90
Log Message:
-----------
Reapply "[Clang] Set default LTO mode for AMDGCN/SPIR-V targets to full" (#202714) (#202736)
This reverts commit 655462209f3444ecaf526de6e1df2a84d5e54e4b.
Commit: c901f5bcc757f5fa2ef037287465f68b7a90b67c
https://github.com/llvm/llvm-project/commit/c901f5bcc757f5fa2ef037287465f68b7a90b67c
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
A clang/test/Driver/driverkit26-boundary.c
A clang/test/Driver/simple-darwin.c
M llvm/lib/TargetParser/Triple.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[clang][Darwin] Canonicalize DriverKit platform between DriverKit 26<->27 (#202690)
* Canonicalize driverkit26 to 27 in availability & deployment
versioning.
* Make darwin27 and later map 1:1 to the same macOS major version.
Resolves: rdar://178548081
Commit: d0a1f86e78908ab30d48a9408cc4673c20203422
https://github.com/llvm/llvm-project/commit/d0a1f86e78908ab30d48a9408cc4673c20203422
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/Mach-O/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.cpp
A lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Log Message:
-----------
[lldb] Extract Mach-O export trie parsing into MachOTrie.{h,cpp} (NFC) (#202735)
ParseTrieEntries and its TrieEntry helpers were file-local statics in
ObjectFileMachO.cpp, unreachable from tests. Move them into a
self-contained translation unit (depending only on lldbUtility) so the
parser can be exercised in isolation.
Commit: 784836de471a74a45a4f4431974b7c3c588ffa81
https://github.com/llvm/llvm-project/commit/784836de471a74a45a4f4431974b7c3c588ffa81
Author: yebinchon <86588366+yebinchon at users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/test/Fir/convert-to-llvm-invalid.fir
A flang/test/Fir/shape-extents.mlir
A flang/test/Fir/shape-to-llvm.mlir
A flang/test/Transforms/FIRToMemRef/forwarded-shape.mlir
Log Message:
-----------
[FIR] add a fir.shape_extents operation (#199361)
Add fir.shape_extents op. This takes a !fir.shape<n> and unpacks it into
n integer SSA values (one per dimension, row-to-column order). This
supports lowering when extent values are needed but the defining
fir.shape is not visible.
FIRToMemRef now inserts fir.shape_extents when recovering extents from a
shape operand that is not a direct fir.shape / fir.shape_shift /
existing fir.shape_extents result (e.g. block arguments from
fir.select_case).
Also allow live fir.shape values at fir-to-llvm lowering: !fir.shape<n>
maps to an n-field i64 LLVM struct, and live fir.shape ops lower via
llvm.undef + llvm.insertvalue. fir.shape_extents lowers via
llvm.extractvalue (+ cast to index).
In the original path, cg-rewrite still fuses shape-bearing fir.embox /
fir.array_coor into fircg.* forms and shapes remain dead before LLVM
lowering. The new path is for forwarded shapes that survive past memref
lowering.
Tests: adds shape-extents.mlir (op + canonicalize) &
forwarded-shape.mlir (FIRToMemRef fir.shape_extents insertion)
updates convert-to-llvm-invalid.fir (live fir.shape is no longer an
invalid case).
---------
Co-authored-by: Yebin Chon <ychon at nvidia.com>
Commit: 5997a17bdaec757775a71bbe9e390f1f8e737178
https://github.com/llvm/llvm-project/commit/5997a17bdaec757775a71bbe9e390f1f8e737178
Author: Guilherme Lopes <guilhermeglopes at tecnico.ulisboa.pt>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
A llvm/test/Transforms/JumpThreading/lifetime-alloca.ll
Log Message:
-----------
[JumpThreading] Fix lifetime markers when alloca requires SSA renaming (#188147)
JumpThreading can create PHI nodes for alloca values when threading
across blocks. This violates the requirement introduced in #149310 that
lifetime.start/end intrinsics must operate directly on allocas.
After SSA reconstruction, check if any lifetime marker for an alloca now
points to a PHI node. If so, drop all lifetime markers for that alloca.
Fixes #167733
Commit: c4803d71255236d8d8b4ef608011cd7d53c1bda0
https://github.com/llvm/llvm-project/commit/c4803d71255236d8d8b4ef608011cd7d53c1bda0
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/assume.ll
Log Message:
-----------
[InstCombine] Move nonnull assumptions to the base of a gep (#195650)
Alive2 proof: https://alive2.llvm.org/ce/z/2TkRyt
Commit: fb8ec0b096a517c50720dab17ce57ba76e841133
https://github.com/llvm/llvm-project/commit/fb8ec0b096a517c50720dab17ce57ba76e841133
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
Log Message:
-----------
[test][Support] Disable CFI-icall for DynamicLibrary Overload test (#202446) (#202684)
The test performs manual symbol lookup and calls, which triggers
Control Flow Integrity indirect call checks.
Reland of #202446 reverted with #202550.
Here we are going to use LLVM_NO_SANITIZE.
Commit: c1ff74c4bf50c811f4155d51dc53456b568ca8ba
https://github.com/llvm/llvm-project/commit/c1ff74c4bf50c811f4155d51dc53456b568ca8ba
Author: Weiwei C <weiwei.chen at modular.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
Log Message:
-----------
[mlir] Don't use shared_ptr reference. (#202703)
`const std::share_ptr<...>&` doesn't increase ref count which can easily
cause downstream user bugs with maintaining the life time of the object.
Remove `&` to kick in ref count.
Commit: d1304bd75f71c0c425d137da36f8d6a29d9aa0a2
https://github.com/llvm/llvm-project/commit/d1304bd75f71c0c425d137da36f8d6a29d9aa0a2
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
M mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
Log Message:
-----------
[mlir][acc] Offload verifier should print variable names (#202678)
The offload target verifier is used to ensure that all ssa values and
symbols have appropriate OpenACC mapping. When this is not the case, an
error is shown. However, showing variable names is useful and thus add
the functionality since OpenACCSupport has the means to retrieve them.
Commit: e5f4d51418fc2f101282a20aafbce3fa3e80ed51
https://github.com/llvm/llvm-project/commit/e5f4d51418fc2f101282a20aafbce3fa3e80ed51
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/test/Target/SPIRV/decorations-id.mlir
Log Message:
-----------
[mlir][SPIR-V] Enable spirv-val for OpDecorateId decoration tests (NFC) (#202591)
Commit: 087df2c6a34542baf1b3acbf0088074c79769003
https://github.com/llvm/llvm-project/commit/087df2c6a34542baf1b3acbf0088074c79769003
Author: Ryotaro Kasuga <kasuga.ryotaro at fujitsu.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll
Log Message:
-----------
[LoopInterchange] Bail out if inner latch branch cond is not CmpInst (#202726)
The condition argument of the branch instruction in the inner loop latch
is checked during the legality check phase, and the loops are rejected
if the condition argument is in an unsupported form. Previously, this
check ran only when the condition was a `cmp` instruction, so it missed
cases where it was not, e.g., an `and` of two `i1` values.
This patch fixes the issue by simply bailing out if the condition
argument is not a `cmp` instruction. This may be too conservative, but
it is sound, and we can improve the analysis in the future if desired.
Fix #202220.
Commit: 56067875b7d5f44dbc41e8628b39858c421a64a2
https://github.com/llvm/llvm-project/commit/56067875b7d5f44dbc41e8628b39858c421a64a2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Target/SPIRV/linkage-types.mlir
Log Message:
-----------
[mlir][SPIR-V] Add WeakLinkageAMD capability for Weak linkage type (#202590)
Commit: 2f217a67295c120d7b97c1d8d6df71f35ebbd109
https://github.com/llvm/llvm-project/commit/2f217a67295c120d7b97c1d8d6df71f35ebbd109
Author: Changqing Jing <changqing.jing at bmw.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.cpp
M llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
A llvm/test/CodeGen/WebAssembly/immutable-global-alias.ll
A llvm/test/CodeGen/WebAssembly/imported-const-global.ll
A llvm/test/CodeGen/WebAssembly/invalid-wasm-global-function-alias.ll
A llvm/test/CodeGen/WebAssembly/invalid-wasm-global-symbol.ll
Log Message:
-----------
[WebAssembly] Preserve constness for imported globals (#199507)
This fixes a WebAssembly backend bug where imported `const` globals lose
their
constness during lowering.
For a source like:
```c++
extern "C" {
extern const int [[clang::address_space(1)]] imported_g;
int goo() { return imported_g; }
}
```
In current main branch, the imported_g is lowered to mutable import
global.
```
(module
(type (;0;) (func (result i32)))
(import "env" "imported_g" (global (;0;) (mut i32)))
(func (;0;) (type 0) (result i32)
global.get 0)
(table (;0;) 1 1 funcref)
(memory (;0;) 2)
(export "memory" (memory 0))
(export "goo" (func 0))
(export "__indirect_function_table" (table 0)))
```
The root cause is that wasm global mutability was hard-coded during
symbol
typing, so the backend ignored `GlobalVariable::isConstant()`. This
patch
threads mutability through wasm global symbol typing and derives it from
`!GV->isConstant()`.
Both the asm-printer path and the MCInst-lowering path are updated,
because
either of them may initialize the wasm symbol first.
Commit: 7f5a6d77bac92ca3273bb0a98b8604f4987001ed
https://github.com/llvm/llvm-project/commit/7f5a6d77bac92ca3273bb0a98b8604f4987001ed
Author: hotschmoe <stronggarner66 at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/MC/WinCOFFObjectWriter.cpp
A llvm/test/MC/AArch64/coff-secrel-hi12.s
Log Message:
-----------
[MC][COFF][AArch64] Add helper symbols for large SECREL addends (#199602)
## Summary
Create helper label symbols for ARM64 COFF SECREL HI12/LO12 relocations
when the byte offset cannot fit in the 12-bit instruction addend.
This is the MC-side follow-up to #200060: with LLD now handling small
SECREL_HIGH12A byte addends correctly, this patch only handles the
remaining large-addend case that needs a helper symbol.
Fixes #199581.
AI assistance: Claude (Anthropic), Codex (OpenAI).
## Tests
`llvm/test/MC/AArch64/coff-secrel-hi12.s`, run for both
`aarch64-windows` and `arm64ec-windows`, covers:
- Temporary symbol, offset in range (`.Lsmall`, `.Lsmall+4`): emitted as
a `.bss` section relocation with the offset baked into the imm12; no
helper symbol.
- Temporary symbol, offset out of range (`.Lsmall+16`, `.Llarge`,
`.Llarge+4`): a helper label symbol is created at the exact section
offset and the imm12 is cleared.
- Non-temporary symbol, offset in range (`large`, `large+128`):
relocation against the symbol with the addend in the imm12; no helper
symbol.
`ninja -C build check-llvm-mc`
Commit: 37337d80763e29177dfd87e2fb702f4ea935d002
https://github.com/llvm/llvm-project/commit/37337d80763e29177dfd87e2fb702f4ea935d002
Author: ykhatav <yashasvi.khatavkar at intel.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/Parse/Parser.h
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/interop_prefer_type_brace_ast_print.cpp
A clang/test/OpenMP/interop_prefer_type_brace_messages.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[clang][OpenMP] Add OMP 6.0 prefer_type({fr,attr}) parsing for interop (#198868)
This PR adds parsing support for the OpenMP 6.0 brace-grouped
prefer_type modifier on the init clause of #pragma omp interop, while
preserving the OpenMP 5.1 flat form. Each preference-specification can
now carry an optional
fr(<foreign-runtime-id>) and zero or more attr(<string-literal>...)
selectors, eg:
#pragma omp interop init(prefer_type({fr("sycl"), attr("ompx_propX")}, \
{fr("level_zero")}, \
{attr("ompx_propY")}), targetsync: obj)
Commit: 8c0f84e7a71091df9e20fa06a2c5e67fe0d183f5
https://github.com/llvm/llvm-project/commit/8c0f84e7a71091df9e20fa06a2c5e67fe0d183f5
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
Log Message:
-----------
[flang] Add RegionBranchOpInterface to fir.do_loop (#202418)
`fir.do_loop` lacked RegionBranchOpInterface, causing dataflow analyses
and others to treat host loops as opaque and conservatively block
optimizations.
Implement getSuccessorRegions, getEntrySuccessorOperands, and
getSuccessorInputs on fir.do_loop, and override
getMutableSuccessorOperands on fir.result to customize for accommodating
the occasionally present finalValue in `fir.result`.
As a side effect, alias analysis now resolves pass-through iter-carried
references to MustAlias instead of MayAlias.
Commit: 596e95cc514f33f0b176fcae781824d14c249464
https://github.com/llvm/llvm-project/commit/596e95cc514f33f0b176fcae781824d14c249464
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github] Add github-automation container (#200704)
There are several jobs that use the pattern:
1. Checkout github-automation.py script.
2. Install dependencies for github-automation.py script.
3. Run the github-automation.py script.
We can consolidate a lot of this logic into the container and simplify
the workflows. This may also speed them up the workflow jobs slightly,
but most of them are already pretty fast, so it may not make a big
difference.
Commit: 003ba404c8b50b367879cad29783d24881a6c1c6
https://github.com/llvm/llvm-project/commit/003ba404c8b50b367879cad29783d24881a6c1c6
Author: Schrodinger ZHU Yifan <yfzhu at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/src/__support/block.h
M libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.h
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_test.cpp
M libc/test/src/__support/freestore_test.cpp
M libc/test/src/__support/freetrie_test.cpp
Log Message:
-----------
[libc] Migrate `Block` to `BlockRef` in baremetal allocator (#201001)
Under C++ object lifetime and strict aliasing rules, accessing typed
objects requires that an object of that type actually exists at the
memory location. Previously, the Block structure stored prev and next
offset values, where the prev field overlapped with the usable space of
the preceding block to save space. When the predecessor was allocated,
user payload was written directly to this overlapping space,
complicating object lifetime management. A key issue arose during
reallocation (like in-place shrinking), where the allocator needed to
manipulate block boundaries (e.g., splitting a block) while user payload
was still actively residing in that memory. This caused undefined
behavior due to accessing typed Block members that collided with the
user's active objects.
This patch eliminates the problem by always treating blocks as raw bytes
accessed through a byte-backed proxy (BlockRef). Instead of constructing
or casting to typed Block structures, metadata is read and written using
aligned byte-copy operations (inline_memcpy). This decouples block
manipulation from C++ object lifetime rules, guaranteeing safe access
without violating strict aliasing.
Assisted-by: AI Tools, checked manually
Commit: d76b85c46e0d319322945283a396f6917444023f
https://github.com/llvm/llvm-project/commit/d76b85c46e0d319322945283a396f6917444023f
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
A llvm/test/CodeGen/X86/dag-maps-huge-region-crash.ll
Log Message:
-----------
[MachineScheduler] Check we don't add self dependency edge when adding barrier (#202743)
Followup to #200945.
When we hit the huge-region limit for both FPExceptions and memory
operations, we'd first set BarrierChain to the current SU in the
FPExceptions path, then again in the memory operations path, and we'd
add the SU itself as a dependency.
Check we're not adding a self dependency when creating a barrier.
Assisted-by: Gemini
Commit: 88fbb4a9eef5ec9f79a4db028e9e1e907a1ae866
https://github.com/llvm/llvm-project/commit/88fbb4a9eef5ec9f79a4db028e9e1e907a1ae866
Author: Anshul Nigham <nigham at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
Log Message:
-----------
[NewPM][AArch64] Port AArch64DAGToDAGISelLegacy to NewPM (#202739)
Adds `AArch64DAGToDAGISelPass`, the NewPM port for AArch64 instruction
selection. Inherits from `SelectionDAGISelPass` and reuses its
implementation, similar to X86 and AMDGPU ports and the Legacy pass
implementation.
Assisted by Gemini
Commit: f6e900184a814b8339c41c764ef13a7aedfc9480
https://github.com/llvm/llvm-project/commit/f6e900184a814b8339c41c764ef13a7aedfc9480
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
Log Message:
-----------
[AMDGPU] Fix GISel lowering for amdgcn_s_quadmask, amdgcn_s_wqm (#202704)
This change also marks the intrinsics
`amdgcn_s_quadmask` and `amdgcn_s_wqm`
as AlwaysUniform.
Commit: 06f25425e324fdfa79613f5255dfb2c77ae7de6d
https://github.com/llvm/llvm-project/commit/06f25425e324fdfa79613f5255dfb2c77ae7de6d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/expand-ptrtoaddr.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/miniters.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
Log Message:
-----------
[VPlan] Also expand integer SCEVAddExpr in expandSCEVExpr. (#200925)
Generalize the SCEVMulExpr handling in expandSCEVExpr to also handle
SCEVAddExpr. Currently limited to integer expressions only. Pointer to
follow separately, as they cannot use Instruction::Add.
Commit: d1330e2e624039c8ee67db4d1f6e686b6d339722
https://github.com/llvm/llvm-project/commit/d1330e2e624039c8ee67db4d1f6e686b6d339722
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes d0a1f86 (#202746)
This fixes d0a1f86e78908ab30d48a9408cc4673c20203422.
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4ed07e26fc00fbfef25b7e9889eace5514a795f0
https://github.com/llvm/llvm-project/commit/4ed07e26fc00fbfef25b7e9889eace5514a795f0
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M compiler-rt/CMakeLists.txt
M compiler-rt/lib/profile/CMakeLists.txt
Log Message:
-----------
Build ROCm profile runtime by default (#202718)
The ROCm profile runtime should get regular build coverage. Keeping it
off by
default lets it regress unless a build enables it explicitly.
Make the option default to on for normal Linux and Windows builds, where
the
runtime is supported. The target still has the existing dependency
checks, and
normal profile links keep using the base profile runtime unless the
driver
selects the ROCm archive for HIP profiling.
Commit: 2bc40691cd99e819fc35a852a33d53a04074458f
https://github.com/llvm/llvm-project/commit/2bc40691cd99e819fc35a852a33d53a04074458f
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
Log Message:
-----------
Revert "[test][Support] Disable CFI-icall for DynamicLibrary Overload test (#202446)" (#202768)
Reverts llvm/llvm-project#202684
This breaks builds with some gcc versions (at least v14).
```
/home/aidengrossman/llvm-project/llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp:62:32: error: attributes are not allowed on a function-definition
62 | TEST(DynamicLibrary, Overload) __attribute__((no_sanitize("cfi-icall"))) {
| ^~~~~~~~~~~~~
```
Commit: 11eb729d31a654f33bd3ce520aaef05cd9b2edb0
https://github.com/llvm/llvm-project/commit/11eb729d31a654f33bd3ce520aaef05cd9b2edb0
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M .ci/compute_projects.py
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
R .github/workflows/issue-subscriber.yml
R .github/workflows/pr-subscriber.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-doxygen.yml
M .github/workflows/release-tasks.yml
A .github/workflows/subscriber.yml
M clang-tools-extra/clangd/CompileCommands.cpp
M clang-tools-extra/clangd/unittests/CompileCommandsTests.cpp
M clang/docs/LanguageExtensions.rst
M clang/docs/Multilib.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/SafeStack.rst
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/RecursiveASTVisitor.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Basic/CodeGenOptions.h
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenMPKinds.h
M clang/include/clang/DependencyScanning/DependencyScanningFilesystem.h
M clang/include/clang/Driver/ToolChain.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaAMDGPU.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ExprClassification.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/OpenMPClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/CGCoroutine.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
M clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/AMDGPU.h
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.h
M clang/lib/Driver/ToolChains/HIPSPV.cpp
M clang/lib/Driver/ToolChains/HIPSPV.h
M clang/lib/Driver/ToolChains/MSVC.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/__clang_hip_runtime_wrapper.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
M clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Core/ExprEngineCallAndReturn.cpp
M clang/test/AST/ByteCode/codegen.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/intap.cpp
M clang/test/AST/ByteCode/unions.cpp
A clang/test/AST/dependent-assignment-classification.cpp
A clang/test/CXX/lex/lex.header/p2.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/amdgpu-builtin-is-invocable.c
M clang/test/CodeGen/amdgpu-builtin-processor-is.c
M clang/test/CodeGen/epilog-unwind.c
M clang/test/CodeGen/link-builtin-bitcode.c
M clang/test/CodeGen/target-builtin-noerror.c
A clang/test/CodeGen/winx64-eh-unwind-egpr.c
M clang/test/CodeGen/zero-call-used-regs.c
A clang/test/CodeGenCXX/aarch64-mangle-sme-attrs-ms.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
A clang/test/CodeGenCoroutines/coro-cwg2935.cpp
M clang/test/CodeGenHLSL/ArrayAssignable.hlsl
M clang/test/CodeGenHLSL/ArrayAssignable.logicalptr.hlsl
M clang/test/CodeGenHLSL/cbuffer-matrix-layout-keyword.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_and_namespaces.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_packoffset.hlsl
M clang/test/CodeGenHLSL/resources/cbuffer_with_static_global_and_function.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer.hlsl
M clang/test/CodeGenHLSL/resources/default_cbuffer_with_layout.hlsl
A clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
R clang/test/CodeGenSYCL/filescope_asm.c
A clang/test/CodeGenSYCL/filescope_asm.cpp
A clang/test/Driver/Inputs/multilib_msvc_tree/bin/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/debug/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/noexcept/.keep
A clang/test/Driver/Inputs/multilib_msvc_tree/include/x86_64-pc-windows-msvc/release/.keep
M clang/test/Driver/amdgpu-openmp-sanitize-options.c
M clang/test/Driver/amdgpu-openmp-toolchain.c
M clang/test/Driver/cl-options.c
A clang/test/Driver/driverkit26-boundary.c
M clang/test/Driver/hip-binding.hip
M clang/test/Driver/hip-device-compile.hip
M clang/test/Driver/hip-offload-compress-zlib.hip
M clang/test/Driver/hip-offload-compress-zstd.hip
M clang/test/Driver/hip-phases.hip
M clang/test/Driver/hip-rdc-device-only.hip
M clang/test/Driver/hip-sanitize-options.hip
M clang/test/Driver/hip-save-temps.hip
M clang/test/Driver/hip-spirv-backend-bindings.c
M clang/test/Driver/hip-spirv-backend-opt.c
M clang/test/Driver/hip-spirv-backend-phases.c
M clang/test/Driver/hip-spirv-linker-crash.c
M clang/test/Driver/hip-target-id.hip
M clang/test/Driver/hip-toolchain-device-only.hip
M clang/test/Driver/hip-toolchain-no-rdc.hip
M clang/test/Driver/hip-toolchain-rdc-flto-partitions.hip
M clang/test/Driver/hip-toolchain-rdc-separate.hip
M clang/test/Driver/hip-toolchain-rdc-static-lib.hip
M clang/test/Driver/hip-toolchain-rdc.hip
M clang/test/Driver/hip-unbundle-preproc.hipi
M clang/test/Driver/hipspv-toolchain-rdc-separate.hip
M clang/test/Driver/hipspv-toolchain-rdc.hip
M clang/test/Driver/hipspv-toolchain.hip
A clang/test/Driver/msvc-multilib.yaml
M clang/test/Driver/offload-target.c
M clang/test/Driver/openmp-offload-gpu.c
M clang/test/Driver/print-multi-selection-flags.c
M clang/test/Driver/ps4-ps5-toolchain.c
A clang/test/Driver/simple-darwin.c
M clang/test/Driver/spirv-amd-toolchain.c
M clang/test/Driver/spirv-openmp-toolchain.c
M clang/test/Driver/sycl.cpp
A clang/test/Driver/winx64-eh-unwind.c
M clang/test/Driver/x86-march.c
A clang/test/Frontend/sycl-c-input-error.cpp
M clang/test/Frontend/x86-target-cpu.c
M clang/test/Headers/__cpuidex_conflict.c
A clang/test/Headers/hip-constexpr-cmath.hip
M clang/test/Misc/target-invalid-cpu-note/x86.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
A clang/test/OpenMP/interop_prefer_type_brace_ast_print.cpp
A clang/test/OpenMP/interop_prefer_type_brace_messages.cpp
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Sema/Inputs/lifetime-analysis.h
A clang/test/Sema/safestack-deprecated-builtins.c
M clang/test/Sema/warn-lifetime-safety.cpp
M clang/test/SemaCXX/attr-section.cpp
A clang/test/SemaHIP/amdgpu-av-load-store.hip
A clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-error.cl
A clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
M clang/test/SemaSPIRV/BuiltIns/generic_cast_to_ptr_explicit.c
M clang/test/SemaSPIRV/BuiltIns/ids_and_ranges.c
M clang/test/SemaSPIRV/BuiltIns/subgroup-errors.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/DependencyScanning/CMakeLists.txt
M clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
M clang/unittests/Frontend/CompilerInvocationTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
M clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/base-config-ix.cmake
M compiler-rt/cmake/caches/AMDGPU.cmake
M compiler-rt/cmake/caches/NVPTX.cmake
M compiler-rt/cmake/caches/SPIRV64.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/CMakeLists.txt
A compiler-rt/include/sanitizer/safestack_interface.h
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/builtins/CMakeLists.txt
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/profile/CMakeLists.txt
M compiler-rt/lib/safestack/CMakeLists.txt
M compiler-rt/lib/safestack/safestack.cpp
M compiler-rt/test/builtins/CMakeLists.txt
M compiler-rt/test/builtins/Unit/lit.cfg.py
M compiler-rt/test/safestack/sigaltstack.c
M compiler-rt/test/ubsan_minimal/CMakeLists.txt
M flang-rt/lib/runtime/edit-input.cpp
M flang-rt/unittests/Runtime/InputExtensions.cpp
M flang/docs/Extensions.md
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Semantics/openmp-utils.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/TypeConverter.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/BufferizeHLFIR.cpp
M flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Driver/omp-driver-offload.f90
M flang/test/Fir/convert-to-llvm-invalid.fir
A flang/test/Fir/shape-extents.mlir
A flang/test/Fir/shape-to-llvm.mlir
M flang/test/HLFIR/assign-bufferize.fir
M flang/test/HLFIR/associate-codegen.fir
M flang/test/HLFIR/bufferize01.fir
M flang/test/HLFIR/extents-of-shape-of.f90
M flang/test/HLFIR/mul_transpose.f90
M flang/test/HLFIR/shapeof-lowering.fir
M flang/test/Semantics/OpenMP/allocate03.f90
M flang/test/Semantics/OpenMP/allocators02.f90
M flang/test/Semantics/OpenMP/assumed-size-array-dsa.f90
M flang/test/Semantics/OpenMP/copyprivate04.f90
M flang/test/Semantics/OpenMP/copyprivate05.f90
M flang/test/Semantics/OpenMP/cray-pointer-usage.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/detach01.f90
M flang/test/Semantics/OpenMP/firstprivate02.f90
M flang/test/Semantics/OpenMP/from-clause-v45.f90
M flang/test/Semantics/OpenMP/from-clause-v51.f90
M flang/test/Semantics/OpenMP/in-reduction.f90
M flang/test/Semantics/OpenMP/lastprivate01.f90
M flang/test/Semantics/OpenMP/lastprivate03.f90
M flang/test/Semantics/OpenMP/linear-clause-array-section.f90
M flang/test/Semantics/OpenMP/name-conflict.f90
M flang/test/Semantics/OpenMP/named-constants.f90
M flang/test/Semantics/OpenMP/parallel-private01.f90
M flang/test/Semantics/OpenMP/parallel-private02.f90
M flang/test/Semantics/OpenMP/parallel-private03.f90
M flang/test/Semantics/OpenMP/parallel-private04.f90
M flang/test/Semantics/OpenMP/parallel-sections01.f90
M flang/test/Semantics/OpenMP/parallel-shared01.f90
M flang/test/Semantics/OpenMP/parallel-shared02.f90
M flang/test/Semantics/OpenMP/parallel-shared03.f90
M flang/test/Semantics/OpenMP/parallel-shared04.f90
M flang/test/Semantics/OpenMP/reduction-assumed.f90
M flang/test/Semantics/OpenMP/reduction04.f90
M flang/test/Semantics/OpenMP/reduction16.f90
M flang/test/Semantics/OpenMP/resolve01.f90
M flang/test/Semantics/OpenMP/task-reduction.f90
M flang/test/Semantics/OpenMP/threadprivate01.f90
M flang/test/Semantics/OpenMP/to-clause-v45.f90
M flang/test/Semantics/OpenMP/to-clause-v51.f90
A flang/test/Transforms/FIRToMemRef/forwarded-shape.mlir
M libc/fuzzing/__support/freelist_heap_fuzz.cpp
M libc/include/math.yaml
M libc/src/__support/block.h
M libc/src/__support/freelist.cpp
M libc/src/__support/freelist.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.h
M libc/test/src/__support/block_test.cpp
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/__support/freelist_test.cpp
M libc/test/src/__support/freestore_test.cpp
M libc/test/src/__support/freetrie_test.cpp
M libcxx/include/CMakeLists.txt
M libcxx/include/__bit_reference
M libcxx/include/__format/range_formatter.h
R libcxx/include/__type_traits/dependent_type.h
M libcxx/include/module.modulemap.in
M libcxx/include/variant
A libcxx/test/libcxx/containers/sequences/vector.bool/nodiscard.iterator.verify.cpp
A libcxx/test/libcxx/containers/sequences/vector/nodiscard.iterator.verify.cpp
M libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h
M libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h
M libsycl/CMakeLists.txt
A libsycl/cmake/Modules/AddUnitTest.cmake
M libsycl/docs/index.rst
M libsycl/src/CMakeLists.txt
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
A libsycl/unittests/CMakeLists.txt
A libsycl/unittests/common/device_images.hpp
A libsycl/unittests/mock/CMakeLists.txt
A libsycl/unittests/mock/helpers.cpp
A libsycl/unittests/mock/helpers.hpp
A libsycl/unittests/mock/mock.cpp
A libsycl/unittests/platform/CMakeLists.txt
A libsycl/unittests/platform/get_platforms.cpp
A libsycl/unittests/program_manager/CMakeLists.txt
A libsycl/unittests/program_manager/register_and_unregister.cpp
A libsycl/unittests/queue/CMakeLists.txt
A libsycl/unittests/queue/queue.cpp
M lld/MachO/ConcatOutputSection.cpp
M lld/MachO/ConcatOutputSection.h
M lld/MachO/Driver.cpp
M lld/docs/ReleaseNotes.rst
A lld/test/MachO/arm64-thunk-stubs-multi-text.s
A lld/test/MachO/arm64-thunk-stubs.s
M lld/test/MachO/arm64-thunks.s
R lld/test/MachO/lc-linker-option-order.ll
A lld/test/MachO/lc-linker-option-postprocess.ll
A lld/test/MachO/lc-linker-option-sort.ll
M lldb/CMakeLists.txt
M lldb/docs/resources/lldbgdbremote.md
M lldb/include/lldb/Host/ProcessLaunchInfo.h
M lldb/include/lldb/Host/windows/PseudoConsole.h
M lldb/include/lldb/Utility/StringExtractorGDBRemote.h
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/source/Host/common/ProcessLaunchInfo.cpp
M lldb/source/Host/windows/PseudoConsole.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.cpp
M lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCTrampolineHandler.h
M lldb/source/Plugins/ObjectFile/Mach-O/CMakeLists.txt
A lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.cpp
A lldb/source/Plugins/ObjectFile/Mach-O/MachOTrie.h
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Utility/StringExtractorGDBRemote.cpp
M lldb/test/API/commands/platform/connect/TestPlatformConnect.py
M lldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py
M lldb/test/API/functionalities/breakpoint/breakpoint_locations/TestBreakpointLocations.py
M lldb/test/API/functionalities/breakpoint/delayed_breakpoints/TestDelayedBreakpoint.py
M lldb/test/API/functionalities/scripted_frame_provider/circular_dependency/TestFrameProviderCircularDependency.py
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/ProgrammersManual.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ADT/StringMap.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/MachineFrameInfo.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/Frontend/HLSL/CBuffer.h
M llvm/include/llvm/IR/BundleAttributes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/Module.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/MC/MCWin64EH.h
M llvm/include/llvm/MC/MCWinEH.h
M llvm/include/llvm/Support/CodeGen.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/TargetParser/Host.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/TargetParser/X86TargetParser.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/MachineFrameInfo.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Frontend/HLSL/CBuffer.cpp
M llvm/lib/IR/BundleAttributes.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCWin64EH.cpp
M llvm/lib/MC/WinCOFFObjectWriter.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/StringMap.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64PassRegistry.def
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/DirectX/DXILCBufferAccess.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVBaseInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
A llvm/lib/Target/SPIRV/SPIRVAuxDataHandler.cpp
A llvm/lib/Target/SPIRV/SPIRVAuxDataHandler.h
M llvm/lib/Target/SPIRV/SPIRVBuiltins.td
M llvm/lib/Target/SPIRV/SPIRVCBufferAccess.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
M llvm/lib/Target/SPIRV/SPIRVTypeInst.h
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.cpp
M llvm/lib/Target/WebAssembly/Utils/WebAssemblyTypeUtilities.h
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
A llvm/lib/Target/X86/X86ScheduleC864GM4.td
A llvm/lib/Target/X86/X86ScheduleC864GM7.td
M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
A llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/TargetParser/X86TargetParser.cpp
M llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
M llvm/lib/Transforms/IPO/StripSymbols.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopInterchange.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Analysis/CostModel/ARM/memcpy.ll
M llvm/test/Analysis/LoopAccessAnalysis/early-exit-runtime-checks.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
M llvm/test/Analysis/ValueTracking/assume.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-cast.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-trunc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/form-bitfield-extract-from-and.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combine-ptr-add-chain.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-hoist-same-hands.mir
M llvm/test/CodeGen/AArch64/bf16-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
M llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/AArch64/ldst-opt-umov-fpr-store.mir
A llvm/test/CodeGen/AArch64/powi-ldexp-promote-libcall-error.ll
A llvm/test/CodeGen/AArch64/sve-multivector-fold-imms.ll
M llvm/test/CodeGen/AArch64/zero-call-used-regs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
M llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f16.fp8.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
A llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
A llvm/test/CodeGen/AMDGPU/si-fold-operands-bundle.mir
M llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.mir
R llvm/test/CodeGen/DirectX/cbuffer_global_elim.ll
M llvm/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
M llvm/test/CodeGen/PowerPC/fp-strict-fcmp-spe.ll
M llvm/test/CodeGen/PowerPC/legalize-invert-br_cc.ll
M llvm/test/CodeGen/PowerPC/spe.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
R llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
A llvm/test/CodeGen/SPIRV/concat-vectors.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-attributes.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-metadata-debug.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-all-function-metadata.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-auxdata-requires-extension.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-auxdata.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-attributes.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-metadata.ll
A llvm/test/CodeGen/SPIRV/linkage/available-externally-function.ll
A llvm/test/CodeGen/SPIRV/linkage/available-externally-global.ll
M llvm/test/CodeGen/SPIRV/linkage/linkage-types.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/logical-memcpy.inline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memcpy.align.ll
A llvm/test/CodeGen/SPIRV/llvm-intrinsics/memcpy.inline.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memmove.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
A llvm/test/CodeGen/SPIRV/pointers/getelementptr-empty-struct.ll
A llvm/test/CodeGen/SPIRV/ptrmask-logical.ll
A llvm/test/CodeGen/SPIRV/ptrmask-vec.ll
A llvm/test/CodeGen/SPIRV/ptrmask32.ll
A llvm/test/CodeGen/SPIRV/ptrmask64-32.ll
A llvm/test/CodeGen/SPIRV/ptrmask64.ll
M llvm/test/CodeGen/SPIRV/transcoding/atomic-load-store-unsupported.ll
A llvm/test/CodeGen/SPIRV/transcoding/store-atomic-ptr.ll
A llvm/test/CodeGen/WebAssembly/immutable-global-alias.ll
A llvm/test/CodeGen/WebAssembly/imported-const-global.ll
A llvm/test/CodeGen/WebAssembly/invalid-wasm-global-function-alias.ll
A llvm/test/CodeGen/WebAssembly/invalid-wasm-global-symbol.ll
A llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh-v3.ll
M llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
M llvm/test/CodeGen/X86/bypass-slow-division-64.ll
M llvm/test/CodeGen/X86/cmp16.ll
A llvm/test/CodeGen/X86/cpus-hygon.ll
A llvm/test/CodeGen/X86/dag-maps-huge-region-crash.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/rdpru.ll
M llvm/test/CodeGen/X86/slow-unaligned-mem.ll
M llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
M llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-required.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-funclet-prolog.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-push2pop2.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-split.ll
A llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-epilog-ops.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-prolog-ops.mir
A llvm/test/CodeGen/X86/win64-eh-unwindv3.ll
M llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
M llvm/test/CodeGen/X86/zero-call-used-regs.ll
M llvm/test/DebugInfo/COFF/apx-egpr.ll
A llvm/test/MC/AArch64/coff-secrel-hi12.s
M llvm/test/MC/AsmParser/seh-directive-errors.s
A llvm/test/MC/COFF/seh-unwindv3-error.s
A llvm/test/MC/COFF/seh-unwindv3-inheritance.s
A llvm/test/MC/COFF/seh-unwindv3-large.s
A llvm/test/MC/COFF/seh-unwindv3-nonmirror.s
A llvm/test/MC/COFF/seh-unwindv3-pool-sharing.s
A llvm/test/MC/COFF/seh-unwindv3.s
M llvm/test/MC/X86/x86_long_nop.s
M llvm/test/TableGen/ConcatenatedSubregs.td
M llvm/test/TableGen/RegisterClassCopyCost.td
M llvm/test/TableGen/RegisterInfoEmitter-errors.td
M llvm/test/TableGen/target-mem-intrinsic-attrs.td
M llvm/test/Transforms/AlignmentFromAssumptions/simple.ll
A llvm/test/Transforms/IndVarSimplify/exit-value-safe-udiv.ll
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/addrspacecast.ll
M llvm/test/Transforms/InstCombine/assume.ll
A llvm/test/Transforms/InstCombine/issue173148-sext-phi-select-infloop.ll
M llvm/test/Transforms/InstCombine/powi.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
A llvm/test/Transforms/JumpThreading/lifetime-alloca.ll
M llvm/test/Transforms/LICM/hoist-deref-load.ll
A llvm/test/Transforms/LoopInterchange/complex-inner-latch-condition.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-uniform-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/transform-narrow-interleave-to-widen-memory.ll
M llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
M llvm/test/Transforms/LoopVectorize/expand-ptrtoaddr.ll
M llvm/test/Transforms/LoopVectorize/expand-scev-after-invoke.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/induction-step.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/miniters.ll
M llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
M llvm/test/Transforms/LoopVectorize/pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/reduction-minmax-users-and-predicated.ll
M llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
A llvm/test/Transforms/SLPVectorizer/X86/recalc-copyable-operand-deps-non-scheduled-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/revec-reduced-value-vectorized-later.ll
M llvm/test/Verifier/assume-bundles.ll
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-adx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-aes.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-avx1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-avx2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-bmi1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-bmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-clflushopt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-clzero.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-cmov.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-cmpxchg.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-f16c.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-fma.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-fsgsbase.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-lea.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-lzcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-mmx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-movbe.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-mwaitx.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-pclmul.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-popcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-prefetchw.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-rdrand.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-rdseed.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sha.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse1.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse2.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse3.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse41.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse42.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-sse4a.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-ssse3.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x86_32.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x86_64.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-x87.s
A llvm/test/tools/llvm-mca/X86/C864GM4/resources-xsave.s
A llvm/test/tools/llvm-mca/X86/C864GM4/zero-idioms.s
A llvm/test/tools/llvm-mca/X86/C864GM7/independent-load-stores.s
A llvm/test/tools/llvm-mca/X86/C864GM7/partially-overlapping-group-resources.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-adx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-aes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bitalg.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bitalgvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bw.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bwvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512cd.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512cdvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512dq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512dqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512gfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512gfnivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512ifma.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512ifmavl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vaes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vaesvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmi2vl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vbmivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vnni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vnnivl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vp2intersect.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vp2intersectvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpclmulqdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpclmulqdqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpopcntdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vpopcntdqvl.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avxgfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-avxvnni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-bmi1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-bmi2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-clflushopt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-clwb.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-cmov.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-cmpxchg.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-f16c.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-fma.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-fsgsbase.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-gfni.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-lea.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-lzcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-mmx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-movbe.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-mwaitx.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-pclmul.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-popcnt.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-prefetchw.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-rdrand.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-rdseed.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sha.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse1.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse2.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse3.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse41.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse42.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-sse4a.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-ssse3.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-vaes.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-vpclmulqdq.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x86_32.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x86_64.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-x87.s
A llvm/test/tools/llvm-mca/X86/C864GM7/resources-xsave.s
A llvm/test/tools/llvm-mca/X86/C864GM7/zero-idioms.s
M llvm/test/tools/llvm-objdump/MachO/function-starts.test
M llvm/tools/llvm-exegesis/lib/Assembler.h
M llvm/unittests/ADT/StringMapTest.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/MC/CMakeLists.txt
A llvm/unittests/MC/WODRoundTripTest.cpp
M llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.h
M llvm/utils/TableGen/Common/InfoByHwMode.h
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/gdb-scripts/prettyprinters.py
M llvm/utils/gn/secondary/bolt/unittests/Profile/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/StaticAnalyzer/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/Windows/Common/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Frontend/Offloading/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Target/AArch64/BUILD.gn
M llvm/utils/release/build-docs.sh
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationTypeInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgEnums.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
A mlir/include/mlir/Dialect/SPIRV/IR/SPIRVExperimentalMLOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
M mlir/lib/Bytecode/Reader/BytecodeReader.cpp
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/lib/Dialect/Arith/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationDialect.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/OpenACC/Transforms/OffloadTargetVerifier.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparsificationAndBufferizationPass.cpp
M mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
M mlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
A mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
M mlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_1d.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d.mlir
A mlir/test/Dialect/Affine/SuperVectorize/vectorize_2d_inbounds.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_affine_apply.mlir
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/Transforms/one-shot-non-module-bufferize.mlir
A mlir/test/Dialect/Bufferization/Transforms/test-one-shot-module-bufferize.mlir
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
M mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
M mlir/test/Dialect/NVGPU/invalid.mlir
M mlir/test/Dialect/OpenACC/offload-target-verifier.mlir
A mlir/test/Dialect/SPIRV/IR/experimental-ml-ops.mlir
M mlir/test/Dialect/SPIRV/Transforms/vce-deduction.mlir
M mlir/test/Target/LLVMIR/nvvm/barrier.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp6x2.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp8x2.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/SPIRV/decorations-id.mlir
A mlir/test/Target/SPIRV/experimental-ml-ops.mlir
M mlir/test/Target/SPIRV/linkage-types.mlir
M mlir/test/lib/Dialect/Bufferization/TestOneShotModuleBufferize.cpp
M mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
M mlir/test/lib/Dialect/Test/TestOpDefs.cpp
M mlir/test/lib/Dialect/Test/TestTypeDefs.td
M mlir/test/lib/Dialect/Test/TestTypes.cpp
M offload/plugins-nextgen/level_zero/src/L0Queue.cpp
M openmp/runtime/src/i18n/en_US.txt
M openmp/runtime/src/kmp_ftn_entry.h
A openmp/runtime/test/api/omp_nteams_api_restriction.c
M utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/261639245371...11eb729d31a6
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