[all-commits] [llvm/llvm-project] 790f06: [SelectionDAG] Pass dest and src alignments separa...
Ömer Sinan Ağacan via All-commits
all-commits at lists.llvm.org
Tue Jun 9 09:03:49 PDT 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 790f0623411d5d9d5c989f14e87f2fe86f52eaf3
https://github.com/llvm/llvm-project/commit/790f0623411d5d9d5c989f14e87f2fe86f52eaf3
Author: Ömer Sinan Ağacan <omeragacan at gmail.com>
Date: 2026-06-09 (Tue, 09 Jun 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARC/ARCISelLowering.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
M llvm/lib/Target/ARM/ARMSelectionDAGInfo.h
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.cpp
M llvm/lib/Target/BPF/BPFSelectionDAGInfo.h
M llvm/lib/Target/CSKY/CSKYISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
M llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.h
M llvm/lib/Target/Lanai/LanaiISelLowering.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.cpp
M llvm/lib/Target/Lanai/LanaiSelectionDAGInfo.h
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/M68k/M68kISelLowering.cpp
M llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
M llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySelectionDAGInfo.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
M llvm/lib/Target/X86/X86SelectionDAGInfo.h
M llvm/lib/Target/XCore/XCoreISelLowering.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
M llvm/lib/Target/XCore/XCoreSelectionDAGInfo.h
M llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
M llvm/test/Analysis/CostModel/ARM/memcpy.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/X86/pr57673.ll
Log Message:
-----------
[SelectionDAG] Pass dest and src alignments separately to memcpy and memmove lowering functions (#201119)
Implements FIXMEs around memcpy and memmove lowering code about passing
destination and source alignments to lowering functions.
Fixes ARM cost model's cost estimation for an inlined `memcpy`. The test
shows the generated code as two instructions so the cost should've been 2,
but it was estimated as a libcall which costs 4.
In the backend functions that don't care about destination and source
alignments, the old alignment calculation `std::min(dstAlign, srcAlign)`
used as the alignment. This gives us the old lowering behavior on those
backends.
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