[all-commits] [llvm/llvm-project] cb053c: [AMDGPU] Fix gfx1250 WMMA latencies
Austin Kerbow via All-commits
all-commits at lists.llvm.org
Tue Jun 9 00:19:04 PDT 2026
Branch: refs/heads/users/kerbowa/amdgpu-gfx1250-wmma-latencies
Home: https://github.com/llvm/llvm-project
Commit: cb053c1486d9c6c838ac06183bd1a803bae75488
https://github.com/llvm/llvm-project/commit/cb053c1486d9c6c838ac06183bd1a803bae75488
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2026-06-08 (Mon, 08 Jun 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/SISchedule.td
M llvm/test/CodeGen/AMDGPU/misched-into-wmma-hazard-shadow.mir
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
A llvm/test/tools/llvm-mca/AMDGPU/gfx1250-wmma-cycles.s
Log Message:
-----------
[AMDGPU] Fix gfx1250 WMMA latencies
- 16x16x64 FP8/BF8 WMMA run in 4 cycles, not 8. Add a 4-cycle
WriteXDL1PassWMMA write and split the FP8/BF8 InstRW by shape so that
16x16x128 FP8/BF8 (and F16/BF16) keep the 8-cycle latency.
- f8f6f4 WMMA run in 4 cycles when both matrix inputs are f4 and 8 cycles
when any input is f6 or f8, instead of the previous 8/16. Update the
scheduling predicate accordingly.
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