[all-commits] [llvm/llvm-project] d68c74: Reland [RISCV] Prefer SP over FP for frame index ...

[Garvit Gupta via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d68c7424d130432a3ab30edbbd860ec00e42f180
      https://github.com/llvm/llvm-project/commit/d68c7424d130432a3ab30edbbd860ec00e42f180
  Author: Garvit Gupta <garvgupt at qti.qualcomm.com>
  Date:   2026-06-09 (Tue, 09 Jun 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
    M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
    M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
    M llvm/test/CodeGen/RISCV/calling-conv-lp64.ll
    M llvm/test/CodeGen/RISCV/emit-x8-as-fp.ll
    M llvm/test/CodeGen/RISCV/frame.ll
    M llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
    M llvm/test/CodeGen/RISCV/ipra.ll
    M llvm/test/CodeGen/RISCV/large-stack.ll
    M llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
    A llvm/test/CodeGen/RISCV/prefer-sp-over-fp-with-v.ll
    M llvm/test/CodeGen/RISCV/push-pop-popret.ll
    M llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
    M llvm/test/CodeGen/RISCV/rv64-statepoint-call-lowering-x2.ll
    M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
    M llvm/test/CodeGen/RISCV/vararg.ll
    M llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
    M llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
    M llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll

  Log Message:
  -----------
   Reland [RISCV] Prefer SP over FP for frame index access when offset     fits within compressed immediate range. (#201541)

Before this change, we would use fp/s0/x8 for most stack accesses when
frame pointers were present. This is an over-approximation when a
stack slot is reachable from both SP and FP with no scalable offset.

This patch replaces the unconditional getFrameRegister() call in
getFrameIndexReference with an explicit register selection decision
tree.

When both SP and FP are available (no stack realignment, no
variable-sized objects), prefer SP if the SP-relative offset fits in
the compressed instruction immediate range (<=252 for RV32, <=504 for
RV64). This enables compression for sp-relative instructions to
c.swsp/c.lwsp (RV32) and c.sdsp/c.ldsp (RV64) thereby reducing code
size.

The SP preference is guarded by hasReservedCallFrame(MF) to ensure SP
is stable throughout the function body. This is necessary because
hasRVVFrameObject() conservatively returns true for any function
compiled
with V extension, causing hasReservedCallFrame() to return false even
for
scalar functions without RVV spills. Without this guard, SP-relative
offsets would be incorrect when ADJCALLSTACKDOWN/UP move SP during the
function body. This was observed as a miscompile in zstd decompression
when compiled with -fno-omit-frame-pointer -march=rv64gcv.

Reland of 46e07d38e078 with the hasReservedCallFrame guard fix.



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