[all-commits] [llvm/llvm-project] 30f5bf: [AMDGPU] Document that only naturally aligned atom...

[Fabian Ritter via All-commits]

  Branch: refs/heads/users/ritter-x2a/05-28-_amdgpu_document_that_only_naturally_aligned_atomics_of_up_to_64_bits_are_supported_by_the_amdgpu_backend
  Home:   https://github.com/llvm/llvm-project
  Commit: 30f5bff88ec3698fee08603c0345572e195bded2
      https://github.com/llvm/llvm-project/commit/30f5bff88ec3698fee08603c0345572e195bded2
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2026-06-08 (Mon, 08 Jun 2026)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [AMDGPU] Document that only naturally aligned atomics of up to 64 bits are supported by the AMDGPU backend

We get an error from AtomicExpandPass if those constraints are not satisfied.
The 64-bit limit is set [here, in AMDGPUISelLowering.cpp](https://github.com/llvm/llvm-project/blob/5cac2751fb9cf3112d16717b278e40d07dd6cfdc/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp#L645).


  Commit: 0be85f0b3ccef097009123c7bfb90c1f8fa3e501
      https://github.com/llvm/llvm-project/commit/0be85f0b3ccef097009123c7bfb90c1f8fa3e501
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2026-06-08 (Mon, 08 Jun 2026)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  Introduce a new "Unsupported IR Constructs" section and move the point about unsupported atomics there.


Compare: https://github.com/llvm/llvm-project/compare/4ac9738c707e...0be85f0b3cce

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