[all-commits] [llvm/llvm-project] e910a5: [M68k] Disassemble index suppress in the full exte...

[Min-Yih Hsu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e910a52b6a8c00c3b48efd8c38632695b3033536
      https://github.com/llvm/llvm-project/commit/e910a52b6a8c00c3b48efd8c38632695b3033536
  Author: Min-Yih Hsu <min at myhsu.dev>
  Date:   2026-06-06 (Sat, 06 Jun 2026)

  Changed paths:
    M llvm/lib/Target/M68k/Disassembler/M68kDisassembler.cpp
    M llvm/lib/Target/M68k/M68kInstrFormats.td
    M llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp
    M llvm/test/MC/Disassembler/M68k/data.txt

  Log Message:
  -----------
  [M68k] Disassemble index suppress in the full extension word correctly (#202080)

When the IS (Index Suppress) bit in the full extension word is set, we
need to use NoReg for the index register in the decoded MCInst. This was
not properly supported in the disassembler before.

This patch fixes this issue by using a pseudo 5-bit "register" binary
encoding for index register, where the first 4 bits carry the actual
register number and the last bit (at MSB) indicates whether we suppress
index register or not.



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