[all-commits] [llvm/llvm-project] 681fc7: [mlir][ROCDL] Move ROCDL intrinsic enum immargs to...
Krzysztof Drewniak via All-commits
all-commits at lists.llvm.org
Fri Jun 5 09:53:05 PDT 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 681fc74ac47eaa597d22506231a347748dda635b
https://github.com/llvm/llvm-project/commit/681fc74ac47eaa597d22506231a347748dda635b
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-06-05 (Fri, 05 Jun 2026)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUAttrs.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUBase.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
A mlir/include/mlir/Dialect/LLVMIR/ROCDLAttrs.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
A mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
A mlir/include/mlir/Dialect/LLVMIR/ROCDLEnums.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Target/LLVM/ROCDL/Utils.h
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/AMDGPUToROCDL/gfx1250.mlir
M mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma-gfx950.mlir
M mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
M mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx1250.mlir
M mlir/test/Dialect/AMDGPU/ops.mlir
A mlir/test/Dialect/LLVMIR/rocdl-cache-policy-invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Integration/GPU/ROCM/gpu-lower-to-rocdl-pipeline.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][ROCDL] Move ROCDL intrinsic enum immargs to enums (#198875)
In many cases, a "i32" `immarg` arguhment to an intrinsic in the AMDGPU
backend actually corresponds directly to some enumerated set of values
in the backend, which we have to smuggle through an I32. This makes the
MLIR forms of intrinsics less readable and means that people either have
to use the `amdgpu` dialect to get these enums or have to roll their own
enums if they want to know what's going on.
This PR rips the band-aid off and breaks the world by swapping out those
integer attributes for enum attributes.
Of special note is the handling of the aux/cachepolicy field on various
intrinsics; in the backend, all the architectures share an enum and
you've just got to use the right names in the right spots. Here, we've
separated out the cases for pre-gfx942, gfx942+, and gfx12 enums as
separate attributes (including separate casing for gfx12 atomics) and
allowed any of them to be used. We also allow an I32Attr in those
arguments for easy importing and to make the common case of "0" portably
printable.
In all other cases, we've just moved to the new enums.
The WMMA ops, which have multiple immadiate arguments that could be
confusing, have been given assembly formats than name the filed names.
This commit also moves the AMDGPU dialct to use the new enums.
In order to be able to use the current `EnumAttr` system, a method has
been added to LLVM translation to allow such enum attributes to be
converted to their underlying integer constants.
AI usage: this is a quasi-mechanical refactor that was pretty much
farmed out to Codex
---------
Co-authored-by: OpenAI Codex <codex at openai.com>
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