[all-commits] [llvm/llvm-project] 3b095d: [RISCV][P-ext] Select scalar asub/asubu and mulhr/...

[SiHuaN via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3b095d9763756c3ba245a9eedbce4509302a4f23
      https://github.com/llvm/llvm-project/commit/3b095d9763756c3ba245a9eedbce4509302a4f23
  Author: SiHuaN <liyongtai at iscas.ac.cn>
  Date:   2026-06-05 (Fri, 05 Jun 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/test/CodeGen/RISCV/rv32p.ll

  Log Message:
  -----------
  [RISCV][P-ext] Select scalar asub/asubu and mulhr/mulhru/mulhrsu on RV32 (#201540)

The truncate combine only formed these nodes for packed vectors; extend
it to scalar i32 on RV32 and add the matching isel patterns.



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