[all-commits] [llvm/llvm-project] ab478d: [LV] Implement integer part of VPDerivedIV cost mo...

[David Sherwood via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ab478d9c57547e96e9b5db2621ac2d913bec6ab8
      https://github.com/llvm/llvm-project/commit/ab478d9c57547e96e9b5db2621ac2d913bec6ab8
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2026-06-04 (Thu, 04 Jun 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/f128-fmuladd-reduction.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/fully-unrolled-cost.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-spills.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reverse-load-store.ll
    M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
    M llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
    M llvm/test/Transforms/LoopVectorize/X86/interleave-ptradd-with-replicated-operand.ll
    M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
    M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
    M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
    M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/interleave_vec.ll

  Log Message:
  -----------
  [LV] Implement integer part of VPDerivedIV cost model (#198252)

Adds support for InductionDescriptor::IK_IntInduction variants of
inductions in VPDerivedIVRecipe::computeCost. Designing a cost model for
this recipe is tricky because it gets expanded in expandVPDerivedIV into
smaller individual recipes that will then be folded by simplifyRecipe.
Effectively the cost model has to guess how these will be folded
otherwise the costs will be too pessimistic. For example, 'add i32 %x,
0' and 'mul i32 %x, 1' should both be treated as zero cost since all
uses will be replaced with '%x'. Similarly,
'mul i32 %x, 4' will be converted to 'shl i32 %x, 2', and 'mul i32 %x,
-1' will be simplified to 'sub i32 0, %x'.

As can be seen by this PR, it's important to have non-zero costs for
cases where VPDerivedIVRecipe recipes will end up with non-foldable
instructions. Some of the tests now favour wider VFs to cover the
non-zero cost, or in other cases we prefer not to vectorise at all. I've
added loop attributes in some places to maintain the previous
vectorisation behaviour so that we're still matching the intent of the
test.

I built the LLVM test suite and I couldn't find any cases where we use
more than the first lane of the result so for now I maintained the
original behaviour and returned 0. The other induction types (pointers,
floating point values) are also left as returning 0 for now. These will
be handled in future PRs.



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